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LAB Exp 1

The document outlines an experiment focused on basic logic gates using the Code Sys tool, including OR, AND, NOT, NAND, NOR, and EX-OR gates. It provides a procedure for creating ladder logic diagrams and emphasizes the importance of truth tables for understanding the functionality of these gates. Additionally, it includes an exercise for implementing NAND, NOR, XOR, and XNOR gates in ladder logic.

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Vimala Elumalai
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0% found this document useful (0 votes)
39 views5 pages

LAB Exp 1

The document outlines an experiment focused on basic logic gates using the Code Sys tool, including OR, AND, NOT, NAND, NOR, and EX-OR gates. It provides a procedure for creating ladder logic diagrams and emphasizes the importance of truth tables for understanding the functionality of these gates. Additionally, it includes an exercise for implementing NAND, NOR, XOR, and XNOR gates in ladder logic.

Uploaded by

Vimala Elumalai
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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Department of Electronics and Communication

LDCS ELEC 20014.2

Sec: ________

Student’s name: ______________________________

ID: ____________________

Instructor: ________________________
Experiment 1: Basic Logic Gates
Objectives:

1. To familiarize with the Code Sys tool.


2. To demonstrate Basic Logic gates, AND , OR, NOT in ladder logic.

Verification of Logic Gates and Truth table


a) OR GATE: - We can construct simply logic functions for our hypothetical lamp circuit, using
multiple contacts, and document these circuits quite easily and understandably with additional
rungs to our original "ladder." If we use standard binary notation for the status of the switches
and lamp (0 for unactuated or de- energized; 1 for actuated or energized), a truth table can be
made to show how the logic works. Now, the lamp will come on if either contact A or contact
B is actuated, because all it takes for the lamp to be energized is to have at least one path for
current What we have is a simple OR logic function, implemented with nothing more than
contacts and a lamp.

b) AND GATE:- We can mimic the AND logic function by wiring the two contacts in
series instead of parallel Now, the lamp energizes only if contact A and contact B are
simultaneously actuated. A path exists for current from wire if and only if both switch
contacts are closed.
c) NOT GATE:- The logical inversion, or NOT, function can be performed on a contact
input simply by using normally-closed contact instead of a normally- open contact,
Now, the lamp energizes if the contact is not actuated, and de- energizes when the
contact is actuated.

d) NAND GATE: - If we take our OR function and invert each "input" through the use
of normally-closed contacts, we will end up with a NAND function. In a special
branch of mathematics known as Boolean algebra, this effect of gate function identity
changing with the inversion of input signals is described by DeMorgan's Theorem,
The lamp will be energized if either contact is unactuated. It will go out only if both
contacts are actuated simultaneously.
e) NOR GATE:-Likewise, if we take our AND function and invert each
"input" through the use of normally-closed contacts, we will end up with a
NOR function.

f) EX - OR GATE:-We can build combinational logic functions by grouping


contacts in series-parallel arrangements, as well. In the following example,
we have an Exclusive-OR function built from a combination of AND, OR,
and inverter (NOT) gates
Procedure
1. Open Code Sys Tool
2. New Project
3. Standard Project
4. Enter the name of the project
5. Select Ladder logic diagram from drop down menu of PLC_PRG in
6. Right Click and Select Insert Network
7. Select insert contact as input and name it appropriately
8. Select insert coil as output
9. Build the project
10. click on online and select login
11. Write values and check the output

Results
Attach the results here. A sample is provided

CONCLUSION

EXERCISE
Implement NAND, NOR , XOR and XNOR gates using Ladder Logic Diagram

REFERENCES
1. https://www.codesys.com/
2. Mano, M., 2013. Digital Design. 5th ed.Prentice Hall.

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