UNIT I

1. Describe the various control and status signals in 8085. Indicate the values of the status and control signals
during opcode fetch, memory read, memory write and reset cycle. [6]
2. Two machine codes, 06H and 48H are stored in memory locations 2000H and 2001h respectively (hint: MVI B,
48H). Illustrate the bus timings as these machine codes are executed. Calculate the time required to execute
the complete instruction cycle if the clock frequency is 2MHz. [10]
3. Calculate the number of memory chips required to design 16K byte memory if the memory chip size is 1024 x4
bits. [4]
4. Why demultiplexing of address/data bus necessary? Explain how it is achieved in 8085. What do you mean by
instruction cycle and machine cycle? [8]
5. What is meant by wait state in 8085? Explain the following pins w.r.t. 8085. [4]
(i) X1, X2/ RST 7.5 (ii) ALE/ INTR
6. Instruction code 4FH (MOC C, A) is stored in memory location 2005h. Illustrate the data flow and list the
sequence of events when the code is fetched with a neat diagram. [8]
7. Write note on various registers, flags, PC and SP of 8085 microprocessor. [6]
8. Explain the function of control lines available in 8085 microprocessor, show the direction of these control lines.
[6]
9. What is meant by the term ‘memory map’? The memory address of the last location of an 8K byte memory
chip is FBFFH. What is the starting address? What signal are required to interface this chip with 8085? Draw
the interfacing diagram and explain in brief. [8]
10. Explain the functions of signals on following pins of 8085. [8]
(i) HOLD/ S0 and S1 (ii) HLDA/ CLK OUT/TRAP/ ALE (iii) READY/ RD/ SID (iv) IO/M/ RESET IN
11. Draw the timing diagrams for : [8]
(i) CMP M instruction (ii) DCR M instruction
12. With the help of a neat block diagram explain the salient architectural features of 8085 microprocessor. [8]
13. Explain with diagram the entire bus structure of 8085. [4]
14. Draw the timing diagram for the execution of the following instruction. [10]
F100H MOV A,B
The opcode for MOV A, B is 78H.
15. Explain in brief the various externally initiated signals of 8085. [3]
16. Why is there a need for demultiplexing the bus AD7-AD0 in 8085? Explain with neat diagram. Assume that the
memory location 2075 has data byte 47H. Specify content of address bus A15-A8 and multiplexed data bus AD7-
AD0 when microprocessor unit inserts a read signal. [8]
17. How is a microprocessor different from a microcontroller? [4]
18. Name the various factors which could increases the speed of execution of a microprocessor. [3]
19. Draw the timing diagram for the execution of the following instruction. [8]
300FH ADI FEH
The opcode for ADI byte is CEH.
20. With the help of a neat diagram, explain the flag register of 8085. [3]
21. With a neat timing diagram, explain the execution of the following 8085 instruction. [8]
8000H DCR B
The opcode for DCR B is 05H.
22. Explain various status and control signal of 8085. [4]
23. Explain with a neat diagram, generation of control signals w.r.t. 8085. [6]
24. Explain in brief the Arithmetic logic unit of 8085 microprocessor. [6]
25. With reference to 8085, explain in detail the bus structure, control and status signals and their purpose. [8]
26. With the help of a neat block diagram, explain the internal structure of the 8085 microprocessor. [6]
27. With a neat timing diagram, explain the memory write machine cycle for the 8085 microprocessor. [6]
28. Define: [5]
 a) Instruction cycle b) Machine cycle c) Clock cycle

What does 8 bit in an 8 bit microprocessor specify?

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UNIT II

1. Write instructions to load 2 unsigned number in register B and register C, respectively. Subtract (C) from (B), if
the result is in 2’s complement form then convert the result in absolute magnitude and display it at PORT1;
otherwise display the positive result. [8]
2. Explain the subtract operation performed by 8085. If the accumulator has 91H and the register B has 92H, the
show the steps involved and the flags status after the instruction SUB B is executed. [6]
3. Specify the register contents and the flag status as the following instructions are executed. [6]
A B S Z CY
XX XX X X X
XRA A
MVI B, 4AH
SUI 4FH
ANA B
HLT
4. Write an assembly language code for 8085 to add 10 data bytes stored at starting location 2000H and display
the sum at the output port if the sum does not generate a carry. If the sum generates a carry stop the addition
and display 01H at the output port. [8]
5. Write an assembly level language code for 8085 to count down continuously from 3FFH to 000H in a system with
a 0.5µs clock period. There should be a 20ms delay between counts. Display the least significant 8 bits of the
count at one of the port. [12]
6. Write an assembly level language code for 8085 to implement a modulo 7 counter with a one second delay
between counts. [10]
7. Write a 8085 program for binary to BCD conversion of a number stored at memory location 5000H and store the
result at memory location 7000H. [8]
8. Explain how many times the following loop will be executed [4]
LXI B, 0007H
LOOP: DCX B
MOV A, B
ORA C
JNZ LOOP
9. Write 3 different instructions such that each of these makes the accumulator of 8085 zero. [4]
10. Write a program to find 1’ss complement of A0H data. The data must be loaded in register B and so should the
1’s complement. [6]
11. Explain different classifications of instruction sets and addressing mode with suitable example available in
8085. [10]
12. Explain the following instruction:
(i) STAX/ MOV M,B/ CMP A/ LDA 2150/ LDAX B
(ii) LHLD addr/ DCX B/ ORA M/ DCR M/ INX H
(iii) DAD/ XRA M/ XCHG/DAA/ SUB M/ MOV A,B
13. Write a subroutine for 8085 to generate delay of 100µs. (Assume 320ns clock cycle) [8]
14. Assume the contents of accumulator are AAH and CY=0. Determine the contents after execution of RLC
instruction twice. [4]
15. A string of readings are stored in memory starting at address XX50H. the end of the string is indicated by the
byte 0DH. WAP to check each byte and save the bytes that are higher than 6010 and lower than 10010 in memory
locations starting from XX90H. Display the number of bytes saved at PORT1. Draw a neat flowchart. [6]
16. Explain the following instructions of 8085. Specify the machine cycles and number of clock cycles required to
execute the instruction [12]
(i) MVI, data/ INR B/ LXI SP, 0400H/ ADI 01H/SUB M/ STAX B
(ii) LHLD/ SHLD address/ RAL/ IN F1H/ CMA/ ADD M/ MOV A,B/
 (iii) PUSH Rp/ CMP M/ LDA F200H/ LXI B, 2050H/ MOV A,M/ XCHG
17. With a suitable flowchart and using assembly language of 8085, WAP to arrange an array of length 0AH in
ascending and in descending order. [8]
18. How does the microprocessor differentiate between data and instruction? [3]
19. Briefly describe ‘Static debugging’ and ‘Dynamic debugging’. [4]
20. A block of data stored in memory locations from XX55H to XX5AH. Transfer the data to locations XX80H to
XX85H in the reverse order. Draw a neat flowchart and write a program to achieve this using 8085. [8]
21. Data bytes are stored in memory locations from XX50 to XX55H. WAP to insert an additional 5 bytes of data in
consecutive memory locations starting from XX55H, without any loss of data. Draw a neat flowchart. [6]
22. A 1-byte hex number is stored in location XX50H. WAP to calculate the decimal equivalent of the number. Draw
a neat flowchart. [6]
23. A set of 8 data bytes is stored in memory locations starting at XX50H. WAP to check each data byte for bits D7
and D0. If D7 or D0 is 1, reject the data byte. Otherwise, store the data bytes at memory locations staring at
XX60H. [6]
24. Write an ALP to count continuously in hex from FFH to 00H in a system with 0.5µs clock period. Use register C to
set up 1ms delay between each count and display the numbers at one of the output ports. [8]
25. A set of readings is stored in memory locations starting at F100H. The end of the string is indicated by the byte
00H. Add the set of readings and display the entire sum at F200H (sum) and F201H (carry). [8]
26. Explain the functions of the following subroutines: [4]
a) LXI SP, FFFFH
MVI L, 00H
PUSH H
POP PSW
RET
b) LXI SP, FFFFH
PUSH B
PUSH D
POP B
POP D
RET
27. Load bit pattern F2H in register B and C2H in register C. Mask all the bits except D0 from register B and C. If
D0=1 in both registers turn ON the light connected to D0 position of the output port 01H, else turn OFF the
light. [6]
28. Specify the register contents as the following instructions are executed. [5]
A B C D E H L
MVI C, FFH XX XX X X X
LXI H, 2070H
LXI D, 2070H
MOV M,C
LDAX D
HLT
29. What is the use of a stack? Explain using suitable diagrams how a stack operates in 8085. [7]
30. Identify and explain the addressing modes of the following 8085 instructions: [8]
(i) STA 2356H (ii) CMA(iii) MOV A, M (iv) OUT 02H
31. State the destination register/ memory location in the following instructions. Also find how many bytes each
instruction would require in memory. [6]
(1) MOV A, M (2) LXI B, C4A5H (3) STAX D
32. Specify the register contents and the flag status as the following instructions are executed. [6]
A Z CY
 x x
MVI A, 80H
ORA A
RAR
XRA A
33. Which mathematical function is performed by the following instructions: [2]
MVI A, 07H
RLC
MOB B, A
RLC
RLC
ADD B
34. Register B contains 65H and accumulator has 97H. Subtract B from A. Compute the result in A and flag status.[4]
35. Explain flag register of 8085 MPU.
MVI A, FFH
ADI 01H
Which of the flags in the flag register will be affected after executing the above program statements? [4]
36. Specify the number of times the following loops are executed: [6]
(i) MVI A,17H
LOP: ORA A
RAL
JNC LOP
(ii) LOP: MVI B,64H
NOP
DCR B
JNZ LOP
(iii) ORA A
MVI B, 64H
LOP: DCR B
JNC LOP
(iv) LXI B, 1000H
LOP: DCX B
NOP
JNZ LOP
37. Analyze following program & specify content of general purpose register &CY flag. Initial value of CY=0.[3]
(i) MVI A, B7 (ii) MVI A, B7
ORA A ORA A
RLC RAL
38. Identify the memory locations that are cleared by the following instructions: [2]
MVI B, 00H
LXI H, XX75H
MOV M, B
INX H
MOV M,B
HLT
39. Explain the function of the following program and explain how many times the loop is executed. Jutsify. [3]
LXI H, 0009H
NXT: MVI M, 00H
DCX H
 JNZ NXT
HLT
40. Write an ALP for a seconds counter. The counter should count from 00-59 and after reaching 59 it should reset
back to 00. Assume 0.5µs clock period for the 8085µP. [8]
41. Explain the differences between the CALL/RET and PUSH/POP instructions. List at least 5 points. [5]
42. With the help of a neat flowchart exaplin how continuous and conditional loops are set up in the 8085 µP. Use
suitable examples. [7]
43. Write a program to perform the following functions: [5]
(i) Load the number 8BH in register D
(ii) Load the number 6FH in register C
(iii) Increment the contents of register C by one.
(iv) Add contents of registers C and D and display the sum at PORT1.
44. Data byte 28H is stored in register B. Data byte 97H is stored in the accumulator. Show the contents of registers
B, C and the accumulator after execution of the following 2 instructions: [3]
MOV A, B
MOC C,A
45. Read the following program and answer the questions given below: [7]
LXI H, 2100H
LXI D, 0000H
NEXT: ADDM
JNC SKIP
INR E
SKIP: DCR D
JNZ NEXT
LXI H, 2090H
MOV M, A
INX H
MOV M, E
HLT
(i) What does the program do on execution?
(ii) Assuming the byte counter is set up, specify the number of bytes added by the program.
(iii) Specify the memory locations where result is stored.
(iv) Identify 2 errors in the program.
46. Design an up-down counter to count from 0 to9 and 9 to 0 continuously with 1.5ms delay between each count
and display the count at one of the output ports. Draw flowchart and show delay calculations. [8]
47. Write a program to meet the following specifications: [8]
(i) Initialize SP to XX99H
(ii) Clear the memory locations starting from XX90H to XX9FH
(iii) Load register pair B, D and H with data 0237H, 1242H 4087H respectively.
(iv) Push contents of register pair B, D and H on the stack.
48. Write a program to find out minimum value of data stored at 10 locations in memory. [8]
49. Explain the execution of CALL and RET instruction with an example. [7]
50. The main program is stored beginning at location 0100H. The main program has called the subroutine at 0150H
and when the microprocessor is executing the instruction at location 0151 (LXI) it is interrupted. Read the
program and then answer the questions below. [5]
START: 0100 LXI SP, 0400H
0103 EI

0120 CALL 0150H

 SUB: 0150 PUSH B
0151 LXI B, 10FFH
0154 MOV C, A

015E POP B
015F RET
(i) Specify the contents of stack location 03FFH after the CAL instruction.
(ii) Specify the stack locations where the contents of register B and C are stored
(iii) When program is interrupted what is the memory address stored on stack?

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UNIT III

1. Design a 7-segment LED output port for 8085 with device address F6H using 74LS138 3-to-1 decoder. 74LS20 4-
input NAND gate, 74LS02NOR gate and a common anode 7-segmant LED. Write instructions to display 7, 8 and
9 at the 7-segment LED. [8]
2. Discuss memory-mapped I/O in detail. [8]
3. Explain why the number of output ports in the peripheral mapped I/O is restricted to 256 ports. [4]
4. Draw the block diagram of the 8255A PPI and describe the various modes that it can operate in. [5]
5. With the help of a block diagram explain the architecture of 8255 peripheral chip. How are the ports of 8255
identified? [8]
6. Write the assembly language program code to accomplish the following: [8]
(i) Configure all the ports of 8255 in mode 0 as output ports.
(ii) Make PC2 pin of port C high and low alternately using BSR mode of 8255.
(iii) Output FFH and 00H alternately on all ports of 8255.

Assume symbolic port addresses.

7. Show the basic interface to connect an ADC to 8085 and explain how continuous analog to digital conversion can
be achieved for the system. [8]
8. Draw a neat diagram showing how the 6116 memory chip can be interfaced to the 8085, for a memory map
starting from 1000H. [6]
9. Explain mode 1 and Mode 2 of 8255 PPI. [8]
10. Write 8085 instruction to make pC4 pin of port C of 8255 ON and OFF alternatively. Use symbolic address and
use BSR mode. [6]
11. Explain bidirectional communication between a master and slave 8085 microprocessor using 8255. [8]
12. Differentiate between peripheral-mapped I/O and memory-mapped I/O. [4]
13. With the help of a neat diagram explain how the 1408 DAC can be interfaced with 8085 in unipolar range, to
limit the peak voltage to 7.5V. How can this circuit be used to generate a continuous ramp output? Explain in
detail. [7]

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UNIT IV

1. Describe 8251A internal architecture with a block diagram. [10]

2. Interface 13 interrupts to 8085 using 8259 and write a control word for master and slave. [8]
3. Explain in detail RST instruction. Also draw the circuit diagram to implement RST3. [6]
4. Briefly explain vectored interrupts of 8085. [6]
5. Explain the interrupt process in a microprocessor and the use of EI and DI instructions. How the interrupt are
marked in the 8085 having 5 interrupt input? [8]
6. Draw the block diagram of 8259A and explain the function of each block. Explain the different ICWs and OCWs
showing the significance of each bit. Explain the sequence of events that occur when one or more interrupt
request lines go high. [10]
7. What do you understand by initialization of 8251 USART? Explain the formats of mod words, command words
and status word of 8251. Hence write the initialization instruction. Assume symbolic port addresses. [8]
8. What are maskable interrupts in 8085? Explain how these interrupts are masked. [6]
9. What do you understand by the terms ‘vectored interrupts’ and ‘non-vectored interrupts’? Name the vectored
interrupts of 8085. [6]
10. Discuss RIM and SIM instruction format. [6]
11. Briefly describe the various vectored interrupt input of 8085. How are SIM and RIM instructions used in
connection with these interrupts? [7]
12. Summarize the following interrupts in an 8085 system wrt i) its type, ii) triggering level, iii) priority: [6]
a) TRAP b) RST 7.5 c) INTR/ RST 5.5
13. Explain the various 8085 interrupts in brief. [4]
14. Explain the hardware interrupts in an 8085 microprocessor system. [5]
15. Explain maskable interrupts in 8085 MPU. [5]
16. Draw the format of a SIM instruction and explain its bit pattern. [5]

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