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The document contains a series of questions and answers related to semiconductor physics, including topics such as doping, electron and hole concentrations, current flow in semiconductors, and the behavior of p-n junctions under various conditions. It covers concepts like energy gaps, resistance, and the effects of temperature on semiconductor properties. The questions are formatted in a multiple-choice style, indicating a focus on educational assessment in the field of electronics and materials science.

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0% found this document useful (0 votes)
52 views11 pages

Adobe Scan Mar 12, 2025

The document contains a series of questions and answers related to semiconductor physics, including topics such as doping, electron and hole concentrations, current flow in semiconductors, and the behavior of p-n junctions under various conditions. It covers concepts like energy gaps, resistance, and the effects of temperature on semiconductor properties. The questions are formatted in a multiple-choice style, indicating a focus on educational assessment in the field of electronics and materials science.

Uploaded by

Vidhi Kumbhat
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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LEVEL02 JEE Main Level

1 IfN, and N, be the numbers of holes and conduction 6 Apotential difference of 2V is applied between the
electrons in an extrinsic semiconductor, then opposite faces of a Ge crystal plate of area 1 cm
(a) N, > N, and thickness 0.5 mm. If the concentration of
(b) N, = N, electrons in Ge is 2 × 101 /m'and mobilities of
(c) N, <N, electrons and holes are 0.36 m /volt- s and
(d) N, > N, or N, <N, depending on the nature of 0.14 m' / volt-s respectively,then the current
impurity flowing through the plate will be
2 A Ge specimen is doped with AI. The concentration (a) 0.25A (b)0.45 A (c) O.56 A (d) 0.64 A
of acceptor atoms is -10 atoms/m.Given that 7 The temperature coefficient of resistance of a
the intrinsic concentration of electron hole pairs is semiconductor
- 10 /m',the concentration of electron in the (a) is always positive
specimen is (b) is always negative
(a) 10" /m? (b) 105 /m? (c) is zero
(c) 10 /m (d) 10² /m (d) may be positive or negative or zero
3 Pure Si at 500 K has equal number of electron (n,) 8 Wires P and Q have the same resistance at ordinary
and hole (n,)concentrations of 1.5 x 106 m (room) temperature. When heated, resistance of P
Doping by indium increases n,to 4.5 x 10" m increases and that of Q decreases. We conclude that
The doped semiconductor is of (a) P and Q
are conductors of different materials
(a) -type with electron concentration (b) P is -type semiconductor and Q is ptype
n, =2.5 × 10 m-3 semiconductor
(b) ptype having electron concentration (c) P is semiconductor and Qis conductor
n, =5x 10° m-3 (d) P is conductor and Qis semiconductor
(c) n-type with electron concentration 9 Astrip of copper and another of germanium are
n, =5 x 1022 m
cooled from room temperature to 80 K. the
(d) ptype with electron concentration resistance of
n, =2.5 x 1010 m -3

(a) Each of these decreases


The contribution in the total current flowing through (b) Copper strip increases and that of germanium
3
asemiconductor due to electrons and holes are decreases
(c) Copper strip decreases and that of germanium
and-respectively. If the drift velocity of electrons is increases
(d) Each of the above increases
5
times that of holes at this temperature, then the 10 Although carbon, silicon and germanium have same
2
lattice structure and four valence electrons each,
ratio of concentration of electrons and holes is
(a) 6:5 (b) 5:6 their band structure leads to the energy gaps as
(c) 3:2 (d) 2:3 (a) E, (Si) <E, (Ge) <E, (C)
5 In semiconductor the concentration of electrons and
(b) E, (C) >E, (Si) >E, (Ge)
holes are 8x 10 /m and5x 10 /m respectively. (c) E, (Ge) >E, (Si) >E, (C)
If the mobilities of electrons and holes are (d)E, (Si) =E, (Ge) =E, (C)
2.3 m² / volt- s and 0.01 m /volt- s respectively, 11 The typical ionisation energy of adonor in silicon is
then then semiconductor is (a) 10.0 eV (b) 1.0 eV
(c) 0.1 eV (d) 0.001 eV
(a) ntype and its resistivity is 0.34 ohm-metre
(b) ptype and its resistivity is 0.034 ohm-metre 12 The energy gap between conduction band and the
(c) ntype and its resistivity is 0.034 ohm-metre valence band is of the order of 0.7 eV. Then, it is
(d)ptype and its resistivity is 3.40 ohm-metre (a) an insulator (b) a conductor
(c) a semiconductor (d) an alloy
13 The band gap in germanium and silicon ineV 17 The width of forbidden gap in silicon crystal is 1.1 ev.
respectively are When the crystal is converted in to a n-type
(a) 0.7. 1.1 (b) 1.1, 0.7 semiconductor the distance of Fermi level from
(c) 1.1, 0 (d) 0, 1.1 conduction band is
(a) greater than 0.55 eV (b) equal to 0.55 ev
14 Which of the energy band diagrams shown in the (c) lesser than 0.55 eV (d) equal to 1.1 eV
figure corresponds to that of a semiconductor?
CB CB 18 Ap-n photodiode is made of a material with a band
gap of 2.0eV. The minimum frequency of the
radiation that can be absorbed by the material is
VB
nearly
(a) 10 x 1o'4 Hz (b) 5 x 10"Hz
(c) 1 x 10" Hz (d) 20 x 10* Hz
VB
19 An electron-hole pair is formed when light of
(a) (b) maximum wavelength 6000 ¢ is incident on the
C8 CB semiconductor.What is the band gap energy of the
semiconductor? (h =6.62 x 1o* J-s)
Eg>>kT Eg=kT (a) 3.31 >x 10-1 J (b) 3.07 X101 J
VB (c) 2.07 x 10-19 J (d) 2.07 J
VE

(c) (d) 20 Ap-type semiconductor has acceptor levels 57 meV


above the valence band. The maximum wavelength
15 Which of the following statements is true for an of light required to create a hole is (Planck's constant
n-type semiconductor? h=6.6 x10 J-s)
(a) The donor level lies closely below the bottom of the (a) 57Å (b)57 x 10 ¢
conduction band. (c) 217100 ¢ (d) 11.61x 10-* Å
(b) The donor level lies closely above the top of the
valence band 21 The depletion layer in the p-n junction region is
(c) The donor level lies at the halfway mark of the caused by
forbidden energy gap (a) Drift of holes
(d) None of the above (b) Diffusion of charge carriers
16 The energy band diagrams for three semiconductor (c) Migration of impurity ions
(d) Drift of electrons
samples of silicon are as shown. We can then assert
that 22 Within depletion region of p-n junction diode
(a) pside is positive and -side is negative
(b) pside is negative and -side is positive
(c) Both sides are positive or both negative
(d) Both sides are neutral
23 The electrical resistance of depletion layer is large
(a) Sample Xis undoped while samples Yand Zhave because
been doped with a third group and a fifth group (a) It has no charge carriers
impurity respectively (b) It has a large number of charge carriers
(b) Sample Xis undoped while both samples Yand Z (c) It contains electrons as charge carriers
have been doped with a fifth group impurity (d) it has holes as charge carriers
(c) Sample Xhas been doped with equal amounts of
third and fifth group impurities while samples Yand 24 In the middle of the depletion layer of reverse biased
Zare undoped p-n junction, the
(d) Sample X is undoped while samples Yand Z have (a) electric field is zero
been doped with a fifth group and a third group (b) potential is maximum
impurity respectively (c) electric field is maximum
(d) potential is zero
25 In a junction diode,the direction of diffusion current
is
(a) From region to pregion
(b)From pregion to nregion
(c) From region to p-region if the junction is forward
baised and vice versa if it is reverse baised (a) Xis ptype, Yis rtype and the junction is forward
(d) From pregion toregion if the junction is forward biased
baised and vice-versa if it is reversed baised (b) Xis ptype, Yisptype and the junction is forward
biased
26 The dominant mechanism for motion of charge
carriers in forward and reverse biased silicon p-n (c) Xis ptype, Yis ntype and the junction is reverse
biased
junctions are
(a) drift in forward bias,diffusion in reverse bias (d) X is ntype, Y is p-type and the junction is reverse
biased
(b) diffusion in forward bias, drift in reverse bias
(c) diffusion in both forward and reverse bias 32 In the case of forward biasing of p-n junction, which
(d) drift in both forward and reverse bias one of the following figures correctly depicts the
direction of flow of carriers?
27 When forward bias is applied to a p-n junction, then
what happens to the potential barrier V, and the + n +

width of charge depleted region x?


(a) V, increases, x decreases
(b)V, decreases, x increases V
(c) V, increases, x increases
(d) V, decreases, x decreases (a) (b)
28 On increasing the reverse bias to a large value in a Vb V
p-n junction, diode current n

(a) increases slowly (b) remains fixed


(c) suddenly increases (d) decreases slowly
V
29 Consider the following statements A and B and
identify the correct choice of the given answers. (c) (d)
A. The width of the depletion layer in a p-n junction
diode increases in forward bias. 33 The depletion layer in a silicon diode is 1 um wide
B. In an intrinsic semiconductor the fermi energy level and its knee potential is 0.6 V, then the electric field
is exactly in the middle of the forbidden gap in the depletion layer will be
(a) A is true and B is false (b) Both A and B are false (a) 0.6 Vm-1 (b)6 x 10 Vm 1
(c) Ais false and Bis true (d) Both Aand Bare true (c) 6x 10 Vm1 (d) Zero
30 ASiand a Ge diode has identical physical 34 Two identical p-n junctions are connected in series in
dimensions. The band gap in Si is larger than that in three different ways as shown below to abattery.
Ge. An identical reverse bias is applied across the The potential drop across the p-n junctions are
diodes equal in
(a) The reverse current in Ge is larger than that in Si
(b) The reverse current in Siis larger than that in Ge
P
(c) The reverse current is identical in the two diodes
(d) The relative magnitude of the reverse currents
cannot be determined from the given data only
31 Asemiconductor Xismade by doping a germanium
crystal with arsenic (Z =33). A second semiconductor
Yismade by doping germanium with indium (Z = 49).
The two are joined end to end and connected to a
battery as shown. Which of the following statements
is correct
(a) circuits 2 and 3 41 The i-V characteristicof a p-n junction diode is
(b)circuits 1 and 2 shown below. The approximate dynamic resistance
(c) circuits 1 and 3 of the P-N junction when a forward bias of 2 volt is
(d) None of the circuit applied
35 Ap-n junction in series with a resistance of 5 ks2 is I (mA)
connected acrossa 50 V DC source. If the forward 800

bias resistance of the junction is 50Q bias current is 400


p

2 2.1 V(volt)
(a) 1 2 (b) 0.25 Q
50V
(c) 0.5 S (d) 5 2
42 Ajunction diode has a resistance of 25 2 when
(a) 8.8 mA (b) 1 mA forward biased and 2500 Qwhen reverse biased. The
(c) 2 mA (d) 9.9 mA current in the diode, for the arrangement shown will
be
36 In a fonward biased p-n junction diode, the potential 10 2
barrier in the depletion region is of the form 5V OV
V
lc)1 A 1
(a)A (d)
480
15 7 25

(a) (b) 43 What is the current through an ideal pn-junction


V diode shown in figure below
100 S2

1\ 3V
(c) (d)
37 The approximate ratio of resistances in the forward
and reverse bias of the pn-junction diode is
(a) 10: 1 (b) 10 :1 (a) Zero (b) 10 mA
(c) 1:10* (d) 1: 10* (c) 20 mA (d) 50 mA

38 When the forward bias voltage of a diode is changed 44 In the circuit,if the forward voltage drop for the
from 0.6Vto0.7V, the current changes from 5 mA diode is 0.5 V, the current will be
0.5V
to 15 mA. Then its forward bias resistance is
(a) 0.01 2 (b) 0.1 S2
(c) 10 S2 (d) 100 2
8V 22kQ
39 The reverse bias in a junction diode is changed from
8V to 13Vthen the value of the current charges
from 40A to 60 uA. The resistance of junction diode (a) 3.4mA (b) 2 mA (c) 2.5 mA (d) 3 mA
will be
(a) 2 x 10 2 (b) 2.5 x 10 2 45 Asource of 8V drives the diode in figure. through a
(c) 3x 10 2 (d) 4 x 10 2 current-limiting resistor of 100 ohm. Then the
magnitude of the slope load line on the I-V
40 When a silicon pn junction is in forward biased characteristics of the diode is
condition with series resistance, it has knee voltage
of 0.6 V. Current flow in it is 5 mA, when pn junction
is connected with 2.6 V battery, the value of series +
.8 V
resistance is
(a) 100 S2 (b) 200 S2
100 S2
(c) 400 S2 (d) 500 2
(a) 0.01 (b) 100 (c) 0.08 (d) 12.5
46 For the given circuit of pn-junction diode, which of 50 In the following circuit find i, andi,
the following statement is correct 2 ks2

10 V

(a) 0, 0 (b) 5 mA, 5 mA


(a) In forward biasing the voltage across R is V (d) 0, 5 mA
(c) 5 mA, 0
(b) In forward biasing the voltage across Ris 2V
(c) In reverse biasing the voltage across R is V 51 In the given circuit
D3 5 2
(d) In reverse biasing the voltage across R is 2V
47 The junction diode in the following circuit requires a D, 10 2
minimum current of 1mA to be above the knee point
(0.7 V) of its |-V characteristic curve. The voltage
across the junction diode is independent of current 20 2
above the knee point. If V =4V, then the maximum
value of Rso that the voltage is above knee point will
be 10 V
R 07V
The current through the battery is
(a) 0.5 A (b) 1 A
(c) 1.5 A (d) 2 A
52 In the following circuit the equivalent resistance
between A and B is
(a) 3.3 kQ (b) 4.0 k 2 (c) 4.7 k2 (d) 6.6 k2 4S2 62

48 The diode used in the circuit shown in the figure has A


a constant voltage drop of 0.5 V at all currents and a -10 V 2V
maximum power rating of 100 mW. What should be 82 122
the value of the resistor R, connected in series with
the diode for obtaining maximum current? 20
0.5 V (a) (b) 10 S2
3

(c) 16 S2 (d) 20
53 In the following circuits pn-junction diodes D, D, and
D, are ideal. For the following potentials of Aand B,
1.5 V the correct increasing order of resistance between A
(a) 1.5 S2 (b) 5 2 (c) 6.67 2 (d) 200 2 and B will be
49 The circuit shown in the figure contains two diodes D,
each with a forward resistance of 50 Qand with
infinite backward resistance. If the battery is 6V, the D
current through the 100 S resistance (in ampere) is Da
150 2
RI4

50 2
(i) -10V, -5V (iü) -5V, -10V
(ii) -4V, -12 V
6V 100 2
(a) (i) < (ii) < (i) (b) (ii) < (ii) < ()
(a) Zero (b) 0.02 (c) 0.03 (d) 0.036
(c) (ii) = (i) < () (d) (i) =(ii) < (i)
the current through the zener
54 Ge and Si diodes conduct at 0.3V and 0.7 V 61 In the circuit given
diode is
respectively. In the following figure if Ge diode
connection is reversed, the value of V, changes by
R,S 500 92

L15V
12 V 5 k2
1500 2

(a) 0.2 V (b)0.4 V (c) 0.6 V (d) 0.8 v (a) 10 mA (b) 6.67 MA
(c) 5 mA (d) 3.33 MA
55 Two identical capacitors Aand Bare charged to the
same potentialV and are connected in two circuits at 62 From the circuit shown below, the maximum and
t= 0,as shown in figure. The charge on the minimum values of Zener diode current are
capacitors at time t = CR are respectively 5 k2

80 -120V 50oV S10k2


R R

(Gi) (a) 6mA, SmA (b) 14mA, 5mA


(6)VC.vC (d)VC VC (c) 9 mA, 1mA (d) 3mA, 2mA
(a) VC, VC (c) c, Y
e e e e 63 Consider the following statement Aand Band
56 Ajunction diode is connected to a10 Vsource and identify the correct choice of the given answers
10°2 rheostat as shown in figure. The slope of load (A) AZener diode is always connected in reverse bias
line on the characteristic curve of diode will be to use it as a voltage regulator.
(B) The potential barrier of a p-n junction lies between
0.1 to 0.3 approximately
10 V (a) A and B are correct
(b) Aand Bare wrong
(a) 10² AV-! (b) 10 AV-! (c) A is correct but B is wrong
(c) 10 AV-1 (d) 10 AV (d) A is wrong but B is correct

57 Zener breakdown takes place if 64 Avalanche breakdown in a p-n junction diode is due
to
(a) doped impurity is low (b) doped impurity is high (a) sudden shift of Fermi level
(c) less impurity in npart (d) less impurity in ptype
(b) increase in the width of forbidden gap
58 Zener diode is used as
(c) sudden increase of impurity concentration
(a) Half wave rectifier (b) Fullwave rectifier
(d)cumulative effect of increased electron collision and
(c) AC voltage stabilizer (d) DC voltage stabilizer creation of added electron-hole pairs
59 Avalanche. breakdown is due to 65 If in a p-n junction diode, a square input signal of
(a) Collision of minority charge carrier 10 V is applied as shown
(b) Increase in depletion layer thickness 5V
(c) Decrease in depletion layer thickness
(d) None of the above
60 Ifa Zener diode (V, =5V andl, =10 mA) is -5 V
connected in series with a resistance and 20 V is Then, the output signal across R, wll be
applied across the combination, then the maximum 10 V +5 V[
resistance one can use without spoiling zener action (a) (b) (c) (d)
is
-10 V -5 V
(a) 20 kS (b) 15 kS (c) 10 kS2 (d) 1.5 kl
66 The output in the circuit of figure is taken across a
capacitor. It is as shown in figure
(a) 220 V (b) 110 V (c) 311.1 V (d) 220
V2
y
70 Ap-n junction (D) shown in the figure can act as a
V rectifier. An alternating current source () is
connected in the circuit. The current (I) in the
resistor (R)can be shown
(a +5V/ (b)
5\

AAA
5
(d)
5V

67 waveform shown when applied to the following


A (a) (b)
circuit will produce which of the following output
waveform? Assuming ideal diode configuration and
R, =R, (c) (d)
R
5V

V
71 The output wave form of full wave rectifier is
-5V

(a (b)
45V

-5V (c)
(a) (d)
(b)
25V 72 In the half wave rectifier circuit operating from 50 Hz
-2.5V mains frequency, the fundamental frequency in the
ripple would be
(c (d) (a) 25 Hz (b) 50 Hz
68 In the circuit shown in figure the maximum output (c) 70.7 Hz (d) 100 Hz
voltage V, is 73 A full-wave rectifier circuit with an AC input is shown
V,‘ AC input
10 V
Full
O
2k2 o Wave R
TI2 AC
Rectifier Output
2ks2 2k2

The output voltage across R, is represented as


(a) Ov 5
(b) 5 V (c) 10 V
(d)V
V2 (a) o! (b)
69 Adiode is connected to 220 (rms) AC in series with
a capacitor as shown in figure. The voltage across the
capacitor

220 V
C
(c) o (d) o
AC
74 Aful wave rectifier circuit along with the input and 78 The value of DC voltage in half wave rectifier in
output voltages is 6000000
shown in the figure converting AC voltage V= 100 sin(314 t) into DCis
(a) 100 V (b) 50 V (c) 32 V (d) Ov

Output 79 For given electric voltage signal DC value is


voltage V

6.28 V
Input

Voltage
(a) 6.28V (b) 3.14 V (c) 4 V (d) 0 v
Output 80 A sinusoidal voltage of peak value 200 volt is
connected to a diode and resistor in the circuit
figure, so that halfwave rectification occurs. If the
Voltage
forward resistance of the diode is negligible
compared to R, the RMS voltage (in volt) across Ris
The contritbution to output voltage from diode-2 is
(a) A.C (b) B, D (c) B, C (d) A, D approximately

75 A
silicon diode has a threshold voltage of 0.7 V. If an E-200
volt
input voltage given by 2 sin(rt) is supplied to a half
wave rectifier circuit using this diode, the rectified
output has a peak value of 200
(a) 200 (b) 100 (C) (d) 280
(a) 2 V (b) 1.4 V (c) 1.3 V (d) 0.7 V J2
76 In the diagram, the input is across the terminals A 81 In the given diagram, input voltage is V, and output
and C and the output is across the terminals Band D,
then the output is
across R, is V, .Frequency of output voltage (V,) will
be

CR
D
(a) zero (b) same as input
(c) full wave rectifier (d) half wave rectifier V=10 sin (100 t)

77 In the circuit given below, V(t) is the sinusoidal (a) 50 Hz (b) 100 Hz (c) 150 Hz (d) 25 Hz
voltage source, voltage drop Va (t) across the 82 What will be the input of Aand Bfor the Boolean
resistance is expression (A +B) (A-B) =1
D.
S2
R=100 R=150
Sg (a) 0, 0 (b) 0, 1 (c) 1, 0 (d) 1, 1
W
VA8 83 Which of the following logic gate is a universal gate?
(a) OR (b) NOT (c) AND (d) NOR
84 Digital circuit can be made by repetitive use of this
gate
(a) is half wave rectified (a) AND (b) OR
(b) is full wave rectified (c) NOT (d) NAND
(c) has the same peak value in the positive and negative
half cycles 85 When the two inputs of a NAND gate are shorted,
the resulting gate is
(d) has different peak values during positive and
negative half cycle (a) NOR (b) OR
(c) NOT (d) AND
86 Given below are symbols for some logic gates. The 92 In the circuit given A, B and C are inputs and Y is the
XOR gate and NOR gate respectively are output

Be
(2) (3) (4)
C"
(a) 1 and 2 (b)2 and 3 (c) 3 and 4 (d) 1 and 4 The output of Y is
87 The following logic circuit represents (a) high for all the high inputs
(b) high for all the low inputs
(c) high only when A = 0, B= 0,C =1
(d) low for all low inputs
(a) NAND gate with output O= X+Y
(b) NOR gate with output O=X+ Y 93 Figure gives a system of logic gates. From the study
(c) NAND gate with output O = X-Y of truth table, it can be found that to produce a high
output (1) at Rwe must have
(d) NOR gate with output O= X-Y Xe
88 The output Yof the logic circuit shown in figure is
best represented as

Be o
Ce
(a) X = 0, Y = 1 (b) X = 1, Y = 1
(a) A + B-C (b) A + B.C (d) X = 0, Y = 0
(c) X= 1, Y= 0
(c) A
+ BC (d) A + B -C
94 Select the outputs Y of the combination of gates
89 Output W is given by shown below for inputs A=1, B= 0; A =1, B=1and
A = 0, B =0 respectively

Ve
Ae

Be

Ze

(a) (X-Y)-Z (b) (X + Y) Z


(c) (X + Y~ (d) X-+} (a) (0 1 1) (b) (0 0 1) (c) (10 0) (d) (1 1 1)

O The diagram of a logic circuit is given below. 95 The circuit diagram shows a logic combination with
We the states of output X, Yand Z given for inputs P, Q.
Rand Sall at state 1.When inputs P and Rchange to
state Owith inputs Q and S stillat 1, the states of
outputs X, Yand Z change to
P(1) X (1)
Q(1)
The output F of the circuit is given by -"Z (0)
(a) W-(X + Y) (b) W-(X-Y)
(c) W + (X-Y) (d) W + (X + )
91 To get an output 1 from the circuit shown in the (a) 1, 0, 0 (b) 1, 1, 1 (c) 0, 1, 0 (d) 0, 0, 1
figure, the input must be 96 In circuit in following fig. the value of Y is
Ae

Be

Ce

(a) A = 0, B = 1, C = 0 (b) A = 1, B= 0,C =0


(c) A= 1, B= 0,C=1 (d) A= 1, B=1,C=0
Bare .
(a) O 102 The real time variation of input signals A and
(b) 1 shown below. If the inputs are fed into NAND Pate
(c) fluctuates between 0 and 1 then select the output signal from the following
(d) indeterminate as the circuit can't be realised
97 The output of an OR gate is connected to both the A

inputs of a NAND gate. The combination will serve as a Be


(a) OR gate (b) NOT gate B

(c) NOR gate (d) AND gate


t(s)
98 The combination of gates shown below yields y

(a) (b)

2 6 8 t (s) 0 2 6
8t(8

(a) OR gate (b) NOT gate (c) (d)


(c) XOR gate (d) NAND gate
2 4 8 t () 4 6
8 t (S
99 The following configuration of gate is equivalent to
figure. 103 For this truth table
OR
A
Be AND 1
G. 0
NAND 1 0
1
G 1 1 1
(a) NAND (b) XOR Which logic expression is correct?
(c) OR (d) None of these (a) Y= AB + AB (b) Y= AB + AB
100 identify the operation performed by the circuit given (c) Y=AB + AB (d) Y= AB + AB
in the figure. 104 In the adjacent circuit, Aand Brepresent two inputs
A and Crepresents the output. The circuit represents
A

(a) NOT (b) AND (c) OR (d) NAND


(a) NOR gate (b) AND gate
101 The following figure shows a logic gate circuit with (c) NAND gate (d) OR gate
two inputs A and Band the output C. The voltage
waveforms of A, B and Care as shown below
Ao
Previous Year's Questions
Logic gale JEE Main
circuit
Bo

1
1 Which of the following circuits is reverse-biased?
(2024, 27 Jan Shift-]
-5V

1 (a) +2v1 (b)

The logic circuit gate is (c) (d)


(a) AND gate (b) NAND gate +2V
-10 V
(c) NOR gate (d) OR gate
Level 2
Single Choice Correct Questions
1. (d) 2. (a) 3. (b) 4. (a) 5. (a)
6. (d) 7. (b) 8. (d) 9. (c) 10. (b)
11. (c) 12. (c) 13. (a) 14. (d) 15. (a)
16. (d) 17. (c) 18. (b) 19. (a) 20. (c)
21. (b) 22. (b) 23. (a) 24. (a) 25. (b)
26. (b) 27. (d) 28. (c) 29. (c) 30. (c)
31. (d) 32. (d) 33. (c) 34. (a) 35. (d)
36. (d) 37. (d) 38. (c) 39. (b) 40. ()
41. (b) 42. (b) 43. (c) 44. (a) 45. (a)
46. (a) 47. (a) 48. (b) 49. (b) 50. (d)
51. (c) 52. (c) 53. (c) 54. (b) 55. (b)
56. (b) 57. (b) 58. (c) 59. (a) 60. (d)
61. (d) 62. (c) 63. (c) 64. (d) 65. (d)
66. (c) 67. (d) 68. (b) 69. (d) 70. (c)
71. (c) 72. (b) 73. (b) 74. (b) 75. (c)
76. (c) 77. (d) 78. (c) 79. (c) 80. (c)
81. (b) 82. (a) 83. (d) 84. (d) 85. (c)
86. (b) 87. (b) 88. (d) 89. (a) 90. (c)
91. (c) 92. (c) 93. (c) 94. (c) 95. (c)
96. (a) 97. (c) 98. (a) 99. (b) 100. (b)
101. (a) 102. (b) 103. (d) 104. (d)

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