Adobe Scan Mar 12, 2025
Adobe Scan Mar 12, 2025
1 IfN, and N, be the numbers of holes and conduction 6 Apotential difference of 2V is applied between the
electrons in an extrinsic semiconductor, then opposite faces of a Ge crystal plate of area 1 cm
(a) N, > N, and thickness 0.5 mm. If the concentration of
(b) N, = N, electrons in Ge is 2 × 101 /m'and mobilities of
(c) N, <N, electrons and holes are 0.36 m /volt- s and
(d) N, > N, or N, <N, depending on the nature of 0.14 m' / volt-s respectively,then the current
impurity flowing through the plate will be
2 A Ge specimen is doped with AI. The concentration (a) 0.25A (b)0.45 A (c) O.56 A (d) 0.64 A
of acceptor atoms is -10 atoms/m.Given that 7 The temperature coefficient of resistance of a
the intrinsic concentration of electron hole pairs is semiconductor
- 10 /m',the concentration of electron in the (a) is always positive
specimen is (b) is always negative
(a) 10" /m? (b) 105 /m? (c) is zero
(c) 10 /m (d) 10² /m (d) may be positive or negative or zero
3 Pure Si at 500 K has equal number of electron (n,) 8 Wires P and Q have the same resistance at ordinary
and hole (n,)concentrations of 1.5 x 106 m (room) temperature. When heated, resistance of P
Doping by indium increases n,to 4.5 x 10" m increases and that of Q decreases. We conclude that
The doped semiconductor is of (a) P and Q
are conductors of different materials
(a) -type with electron concentration (b) P is -type semiconductor and Q is ptype
n, =2.5 × 10 m-3 semiconductor
(b) ptype having electron concentration (c) P is semiconductor and Qis conductor
n, =5x 10° m-3 (d) P is conductor and Qis semiconductor
(c) n-type with electron concentration 9 Astrip of copper and another of germanium are
n, =5 x 1022 m
cooled from room temperature to 80 K. the
(d) ptype with electron concentration resistance of
n, =2.5 x 1010 m -3
2 2.1 V(volt)
(a) 1 2 (b) 0.25 Q
50V
(c) 0.5 S (d) 5 2
42 Ajunction diode has a resistance of 25 2 when
(a) 8.8 mA (b) 1 mA forward biased and 2500 Qwhen reverse biased. The
(c) 2 mA (d) 9.9 mA current in the diode, for the arrangement shown will
be
36 In a fonward biased p-n junction diode, the potential 10 2
barrier in the depletion region is of the form 5V OV
V
lc)1 A 1
(a)A (d)
480
15 7 25
1\ 3V
(c) (d)
37 The approximate ratio of resistances in the forward
and reverse bias of the pn-junction diode is
(a) 10: 1 (b) 10 :1 (a) Zero (b) 10 mA
(c) 1:10* (d) 1: 10* (c) 20 mA (d) 50 mA
38 When the forward bias voltage of a diode is changed 44 In the circuit,if the forward voltage drop for the
from 0.6Vto0.7V, the current changes from 5 mA diode is 0.5 V, the current will be
0.5V
to 15 mA. Then its forward bias resistance is
(a) 0.01 2 (b) 0.1 S2
(c) 10 S2 (d) 100 2
8V 22kQ
39 The reverse bias in a junction diode is changed from
8V to 13Vthen the value of the current charges
from 40A to 60 uA. The resistance of junction diode (a) 3.4mA (b) 2 mA (c) 2.5 mA (d) 3 mA
will be
(a) 2 x 10 2 (b) 2.5 x 10 2 45 Asource of 8V drives the diode in figure. through a
(c) 3x 10 2 (d) 4 x 10 2 current-limiting resistor of 100 ohm. Then the
magnitude of the slope load line on the I-V
40 When a silicon pn junction is in forward biased characteristics of the diode is
condition with series resistance, it has knee voltage
of 0.6 V. Current flow in it is 5 mA, when pn junction
is connected with 2.6 V battery, the value of series +
.8 V
resistance is
(a) 100 S2 (b) 200 S2
100 S2
(c) 400 S2 (d) 500 2
(a) 0.01 (b) 100 (c) 0.08 (d) 12.5
46 For the given circuit of pn-junction diode, which of 50 In the following circuit find i, andi,
the following statement is correct 2 ks2
10 V
(c) 16 S2 (d) 20
53 In the following circuits pn-junction diodes D, D, and
D, are ideal. For the following potentials of Aand B,
1.5 V the correct increasing order of resistance between A
(a) 1.5 S2 (b) 5 2 (c) 6.67 2 (d) 200 2 and B will be
49 The circuit shown in the figure contains two diodes D,
each with a forward resistance of 50 Qand with
infinite backward resistance. If the battery is 6V, the D
current through the 100 S resistance (in ampere) is Da
150 2
RI4
50 2
(i) -10V, -5V (iü) -5V, -10V
(ii) -4V, -12 V
6V 100 2
(a) (i) < (ii) < (i) (b) (ii) < (ii) < ()
(a) Zero (b) 0.02 (c) 0.03 (d) 0.036
(c) (ii) = (i) < () (d) (i) =(ii) < (i)
the current through the zener
54 Ge and Si diodes conduct at 0.3V and 0.7 V 61 In the circuit given
diode is
respectively. In the following figure if Ge diode
connection is reversed, the value of V, changes by
R,S 500 92
L15V
12 V 5 k2
1500 2
(a) 0.2 V (b)0.4 V (c) 0.6 V (d) 0.8 v (a) 10 mA (b) 6.67 MA
(c) 5 mA (d) 3.33 MA
55 Two identical capacitors Aand Bare charged to the
same potentialV and are connected in two circuits at 62 From the circuit shown below, the maximum and
t= 0,as shown in figure. The charge on the minimum values of Zener diode current are
capacitors at time t = CR are respectively 5 k2
57 Zener breakdown takes place if 64 Avalanche breakdown in a p-n junction diode is due
to
(a) doped impurity is low (b) doped impurity is high (a) sudden shift of Fermi level
(c) less impurity in npart (d) less impurity in ptype
(b) increase in the width of forbidden gap
58 Zener diode is used as
(c) sudden increase of impurity concentration
(a) Half wave rectifier (b) Fullwave rectifier
(d)cumulative effect of increased electron collision and
(c) AC voltage stabilizer (d) DC voltage stabilizer creation of added electron-hole pairs
59 Avalanche. breakdown is due to 65 If in a p-n junction diode, a square input signal of
(a) Collision of minority charge carrier 10 V is applied as shown
(b) Increase in depletion layer thickness 5V
(c) Decrease in depletion layer thickness
(d) None of the above
60 Ifa Zener diode (V, =5V andl, =10 mA) is -5 V
connected in series with a resistance and 20 V is Then, the output signal across R, wll be
applied across the combination, then the maximum 10 V +5 V[
resistance one can use without spoiling zener action (a) (b) (c) (d)
is
-10 V -5 V
(a) 20 kS (b) 15 kS (c) 10 kS2 (d) 1.5 kl
66 The output in the circuit of figure is taken across a
capacitor. It is as shown in figure
(a) 220 V (b) 110 V (c) 311.1 V (d) 220
V2
y
70 Ap-n junction (D) shown in the figure can act as a
V rectifier. An alternating current source () is
connected in the circuit. The current (I) in the
resistor (R)can be shown
(a +5V/ (b)
5\
AAA
5
(d)
5V
V
71 The output wave form of full wave rectifier is
-5V
(a (b)
45V
-5V (c)
(a) (d)
(b)
25V 72 In the half wave rectifier circuit operating from 50 Hz
-2.5V mains frequency, the fundamental frequency in the
ripple would be
(c (d) (a) 25 Hz (b) 50 Hz
68 In the circuit shown in figure the maximum output (c) 70.7 Hz (d) 100 Hz
voltage V, is 73 A full-wave rectifier circuit with an AC input is shown
V,‘ AC input
10 V
Full
O
2k2 o Wave R
TI2 AC
Rectifier Output
2ks2 2k2
220 V
C
(c) o (d) o
AC
74 Aful wave rectifier circuit along with the input and 78 The value of DC voltage in half wave rectifier in
output voltages is 6000000
shown in the figure converting AC voltage V= 100 sin(314 t) into DCis
(a) 100 V (b) 50 V (c) 32 V (d) Ov
6.28 V
Input
Voltage
(a) 6.28V (b) 3.14 V (c) 4 V (d) 0 v
Output 80 A sinusoidal voltage of peak value 200 volt is
connected to a diode and resistor in the circuit
figure, so that halfwave rectification occurs. If the
Voltage
forward resistance of the diode is negligible
compared to R, the RMS voltage (in volt) across Ris
The contritbution to output voltage from diode-2 is
(a) A.C (b) B, D (c) B, C (d) A, D approximately
75 A
silicon diode has a threshold voltage of 0.7 V. If an E-200
volt
input voltage given by 2 sin(rt) is supplied to a half
wave rectifier circuit using this diode, the rectified
output has a peak value of 200
(a) 200 (b) 100 (C) (d) 280
(a) 2 V (b) 1.4 V (c) 1.3 V (d) 0.7 V J2
76 In the diagram, the input is across the terminals A 81 In the given diagram, input voltage is V, and output
and C and the output is across the terminals Band D,
then the output is
across R, is V, .Frequency of output voltage (V,) will
be
CR
D
(a) zero (b) same as input
(c) full wave rectifier (d) half wave rectifier V=10 sin (100 t)
77 In the circuit given below, V(t) is the sinusoidal (a) 50 Hz (b) 100 Hz (c) 150 Hz (d) 25 Hz
voltage source, voltage drop Va (t) across the 82 What will be the input of Aand Bfor the Boolean
resistance is expression (A +B) (A-B) =1
D.
S2
R=100 R=150
Sg (a) 0, 0 (b) 0, 1 (c) 1, 0 (d) 1, 1
W
VA8 83 Which of the following logic gate is a universal gate?
(a) OR (b) NOT (c) AND (d) NOR
84 Digital circuit can be made by repetitive use of this
gate
(a) is half wave rectified (a) AND (b) OR
(b) is full wave rectified (c) NOT (d) NAND
(c) has the same peak value in the positive and negative
half cycles 85 When the two inputs of a NAND gate are shorted,
the resulting gate is
(d) has different peak values during positive and
negative half cycle (a) NOR (b) OR
(c) NOT (d) AND
86 Given below are symbols for some logic gates. The 92 In the circuit given A, B and C are inputs and Y is the
XOR gate and NOR gate respectively are output
Be
(2) (3) (4)
C"
(a) 1 and 2 (b)2 and 3 (c) 3 and 4 (d) 1 and 4 The output of Y is
87 The following logic circuit represents (a) high for all the high inputs
(b) high for all the low inputs
(c) high only when A = 0, B= 0,C =1
(d) low for all low inputs
(a) NAND gate with output O= X+Y
(b) NOR gate with output O=X+ Y 93 Figure gives a system of logic gates. From the study
(c) NAND gate with output O = X-Y of truth table, it can be found that to produce a high
output (1) at Rwe must have
(d) NOR gate with output O= X-Y Xe
88 The output Yof the logic circuit shown in figure is
best represented as
Be o
Ce
(a) X = 0, Y = 1 (b) X = 1, Y = 1
(a) A + B-C (b) A + B.C (d) X = 0, Y = 0
(c) X= 1, Y= 0
(c) A
+ BC (d) A + B -C
94 Select the outputs Y of the combination of gates
89 Output W is given by shown below for inputs A=1, B= 0; A =1, B=1and
A = 0, B =0 respectively
Ve
Ae
Be
Ze
O The diagram of a logic circuit is given below. 95 The circuit diagram shows a logic combination with
We the states of output X, Yand Z given for inputs P, Q.
Rand Sall at state 1.When inputs P and Rchange to
state Owith inputs Q and S stillat 1, the states of
outputs X, Yand Z change to
P(1) X (1)
Q(1)
The output F of the circuit is given by -"Z (0)
(a) W-(X + Y) (b) W-(X-Y)
(c) W + (X-Y) (d) W + (X + )
91 To get an output 1 from the circuit shown in the (a) 1, 0, 0 (b) 1, 1, 1 (c) 0, 1, 0 (d) 0, 0, 1
figure, the input must be 96 In circuit in following fig. the value of Y is
Ae
Be
Ce
(a) (b)
2 6 8 t (s) 0 2 6
8t(8
1
1 Which of the following circuits is reverse-biased?
(2024, 27 Jan Shift-]
-5V