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MSP CT1

A JFET (Junction Field Effect Transistor) is a three-terminal voltage-controlled semiconductor device where the output current is controlled by the input voltage, unlike BJTs which are current-controlled. JFETs have high input impedance, low noise, and operate effectively in amplifying weak signals, making them suitable for various applications. Key characteristics include the pinch-off voltage, gate-source cutoff voltage, and the relationship between drain current and voltage, with advantages such as reduced thermal runaway and high power gain.

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0% found this document useful (0 votes)
32 views10 pages

MSP CT1

A JFET (Junction Field Effect Transistor) is a three-terminal voltage-controlled semiconductor device where the output current is controlled by the input voltage, unlike BJTs which are current-controlled. JFETs have high input impedance, low noise, and operate effectively in amplifying weak signals, making them suitable for various applications. Key characteristics include the pinch-off voltage, gate-source cutoff voltage, and the relationship between drain current and voltage, with advantages such as reduced thermal runaway and high power gain.

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221710
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A BJT is a current controlled device where the output current is controlled by

the input current. A FET is a voltage controlled device where the output
current is controlled by the input voltage.
FET are of 2 types:
- Junction FET
- Metal Oxide Semiconductor FET
A JFET is a three terminal semiconductor device in which the current
conduction is by one type of carriers and is controlled by means of the
electric fields between the gate electrode and the conducting channel of the
device.
Construction:
A JFET consists of a p or n-type silicon bar containing two pn-junctions at the
side that surrounds the silicon bar. The bar forms the conducting chanel for
the charge carriers. The pn-junctions are internally connected and a terminal
is gate is taken out. Two other terminals called the source and the drain are
taken out of the two ends of the bar. If the bar is p-type, it’s a p-channel JFET
and vice-versa.
Polarities:
The diagrams who the polarities of the two types of JFETs. The voltage
between G and S is such that G is reverse biased. D and S terminals are
interchangeable.

1. The input circuit is reverse biased, so the device has high input
impedance.
2.The drain is biased such that the drain current ID flows from S to D,
3. In all JFETS, the source current IS is equal to drain current, thus ID = IS.
Principle:
The two pn-junctions at the sides form depletion layers. The current
conduction by charge carriers is through the channel between the two
depletion layers and out of the drain. The width and hence the resistance of
the channel can be controlled by changing the input voltage VGS. The greater
the reverse voltage VGS, the wider will be the depletion layers and narrower
the conducting channel. The narrower channel means greater resistance and
hence a decrease in source to drain current. Reverse will happen if VGS
decreases. Thus, JFET operates on the principle that width and hence the
resistance of the conducting channel can be varied by changing the reverse
voltage VGS. In other words, the magnitude of drain current ID can be
changed by altering VGS.
Working:
1. When a voltage VDS is applied across the drain and the source terminals
and the gate voltage is zero, the two pn-junctions at the sides of the bar
establish depletion layers. The charge carriers flow from the source to drain
through a channel between the depletion layers. The size of these layers
determines the width of the channel and hence the current conduction
through the bar.
2. When a reverse voltage VGS is applied between the gate and the source,
the width of the depletion layers increases and reduces the width of the
conducting channel, thereby increasing the resistance of the bar.
Consequently, the current from the source to drain is decreased. Conversely,
if the reverse voltage on the gate is decreased, the depletion layers get
narrower and the width of the conducting channel increases, and hence the
current from the source to the drain increases.
It is clear that the current from S to D can be controlled by the application of
an electric field on the gate. That’s why, it’s called a Field Effect Transistor.
Importance of JFET:
A JFET acts like a voltage-controlled device, i.e., the input voltage controls
the output current unlike a BJT where the input current controls the output
current. As JFET works like a vacuum tube, it was able to replace BJT in a lot
of functions where BJT was incapable. Also, as JFET has a higher input
impedance, it generates less noise, making it more suitable for amplifiers.
Difference between JFET and BJT:
(i) In a JFET, there is only one type of carrier unlike BJT where both minor
and major carriers play part in conduction.
(ii) JFET has high input impedance but BJT has low input impedance.
(iii) A typical BJT base current is a few μA while JFET gate current is a
thousand times smaller.
(iv) Output current in BJT is controlled by the input current but in JFET, it is
controlled by the input voltage. Thus, in BJT, gain is characterized by current
gain whereas in JFET, it is characterized by transconductance.
(v) In JFET, there are no junctions and the conduction is done by a single p or
n-type channel. For this reason, noise level in JFET is very small.
JFET as an Amplifier:
In a JFET amplifier circuit, the weak signal is applied between the gate and
source and the output is obtained between the drain-source circuit. For the
proper operation of JFET, the input circuit should always be reverse biased
which is done by the use of a battery VGG in the gate circuit.
A small change in the signal produces a large change in drain current. This
fact makes JFET capable of raising the strength of a weak signal. During the
positive half cycle of the signal, the reverse bias on the gate decreases and
the width of the channel and the drain current increases. During the
negative half cycle, the opposite happens. This results in a larger output and
thus the smaller weak signal is amplified.
Output characteristics of JFET:
The curve between drain current ID and drain-source voltage VDS of a JFET at
constant gate-source voltage VGS is known as output characteristics of JFET.

It can be seen that:


1. At first the drain current ID rises rapidly with drain-source voltage VDS but
then becomes constant. The VDS above which ID becomes constant is called
the pinch-off voltage VP.
2. After VP, the channel width becomes so narrow that the depletion layers
almost touch each other and ID passes through the small passage between
the layers. Therefore, increase in ID is very small with VDS above VP thus
appearing constant.
3. The characteristics resemble that of a pentode valve.
Salient features of JFET:
1. A JFET is a three-terminal voltage-controlled semiconductor device.
2. The JFET is always operated with the gate-source pn-junction reverse
biased.
3. In JFET, the gate current IG = 0
4. As IG = 0, IS = ID
5. The JFET must be operated between VGS = 0 and VGS(off), In this range, ID
varies from IDSS to zero.
6. As the two gates are at the same potential, both depletion layers change
by the same amount.
7. The JFET is not subjected to thermal runaway.
8. The drain current ID is controlled by changing the channel width.
9. As JFET has no gate current, there is no β rating of the device.
Important terms:
1. Shorted-gate drain current (IDSS): it is the drain current with the source
short-circuited to the gate (VGS = 0) and drain voltage (VDS) equal to pinch-off
voltage (VP). It is sometimes called zero-bias current.
The fig. shows the graph between ID and VDS for the shorted gate condition.
ID rises rapidly at first but levels off at VP. ID therefore reaches a maximum
value IDSS. When VDS is further increased, the depletion layers expand at the
top and the channel acts as a current limiter and keeps ID constant.

It should be noted that:


(i) IDSS is the maximum drain current as VGS = 0.
(ii) If the voltage exceeds the maximum drain voltage VDS(max), the JFET would
breakdown.
(iii) The region between VP and VDS(max) is called the active region where ID
remains constant. For proper working of JFET, it must be operated in the
active region.
2. Pinch-off voltage (VP): It is the minimum VDS at which ID essentially
becomes constant.
The fig. shows the characteristic curves of a JFET. The highest curve is for
VGS = 0, the shorted-gate condition. For values of VDS greater than VP, the
current is almost constant as when VDS equals VP, the channel is effectively
closed and does not allow further increase in ID. JFET functions properly
when it is operated in the active region VP < VDS < VDS(max).
3. Gate-source cutoff voltage VGS(off): It is the VGS where the channel is
completely cutoff and ID becomes zero.
When the reverse voltage VGS is increased, the depletion layers expand and
completely extend across the channel making it non-conducting, cutting it
off and reducing ID to zero.

Expression for Drain Current ID:

𝑉𝐺𝑆
𝐼𝐷 = 𝐼𝐷𝑆𝑆 [1 − ]2
𝑉𝐺𝑆(𝑜𝑓𝑓)
Advantages of JFET:
1. Due to high input impedance, it isolates the input and output circuits.
2. Operation of JFETs depend on the bulk material current carriers that do
not cross junctions, which reduces noise.
3. A JFET has a negative temperature coefficient of resistance which avoids
thermal runaway.
4. JFETs have a very high power gain reducing the need of driver stages.
5. JFETs are smaller, have a longer life and are more efficient.

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