Instructor’s Guide to Accompany Digital Electronics

Chapter 4

Chapter 4: Logic Functions and Gates

Teaching Outline

Describe the basic logic functions: AND, OR, and NOT.

Teachable Moments
It is extremely important that students thoroughly understand the properties and
behavior of the basic logic gates: AND, OR, NOT. Everything in digital logic builds on
this.
AND, OR, and NOT are called Boolean functions because they are the basic
functions of Boolean algebra, a type of mathematics that is used to analyze digital
circuits. A digital logic function (or Boolean function, or binary function) has only two
possible results, usually described by a logic level (HIGH/LOW), a binary number value
(0/1), or a Boolean value (true/false).
Electronically, logic functions are performed by devices called logic gates. Every gate
has one or more binary inputs and a binary output. A gate "looks" at the logic levels on
the inputs and "decides" what the output should be with that set of input values.
The names of the functions give clues to what they do:
AND looks for condition 1 AND condition 2 to be true.
OR looks for condition 1 OR condition 2 (or both) to be true.
NOT changes the input value to its opposite (0 to 1 or 1 to 0).
Although the above descriptions for AND and OR are for two inputs, these functions
can have any number of inputs. AND gates look for a true condition on all inputs; OR
gates look for a true condition on at least one input.
Each logic gate has a special symbol. The AND gate has a straight side on its input
and a curved output, something like a stretched letter D. The OR gate has a curved input
side and two curves that meet at a point at the output. A NOT gate (inverter) is a triangle
with the flat side on the input and the point at the output. It also has a small circle (a
"bubble"), usually on the output side, but sometimes on the input side. The bubble means
"logic inversion".

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Gates behavior is described by a truth table, which shows all possible input values,
listed in binary-count order, and the output value for every input combination.
Classroom Strategies
Go over this objective carefully with students and make sure it is well-understood before
moving on. Presentation options vary (blackboard/whiteboard, laptop and projector,
tablet PC), but there is a great deal of value in having students hand-copy notes on this
topic.
Start by discussing the everyday meanings of the words "and," "or," and "not." Relate
them to the Boolean functions AND, OR, and NOT. For each function, draw the gate
symbol, write the Boolean expression and how to say it (e.g., Y=A+B; "Y equals A OR
B"), and make a truth table. The OR function can often be a pitfall for a couple of
reasons:
1. "This OR that" – Make sure that students know that OR means "at least one," in other
words "this OR that (OR both)." This is called an "inclusive OR." If you really mean
"this OR that (but not both),” this is called an "exclusive OR", which is a different
logic function.
2. In Boolean algebra, we use the plus sign ("+") to mean OR. However, the expression
A+B should be pronounced "A OR B," not "A plus B." What's the difference? In
decimal arithmetic, 1+1=2 ("one plus one equals 2"). In binary arithmetic, 1+1=10
("one plus one equals one zero"). In Boolean algebra, the output of an OR gate is
HIGH if at least one input is HIGH, so 1+1=1 ("one OR one equals one"). While this
is a little confusing, it is an important distinction.
Find examples of how these might be used in a digital circuit. (e.g., the motor turns on
when sensor A AND sensor B are both HIGH. The word "AND" tells what Boolean
function to use.)

Draw simple switch circuits to represent AND, OR, and Exclusive OR functions.

Teachable Moments
Series switches will pass electrical current only if they are all closed. This
represents an AND function. Parallel switches will pass current if at least one of them
is closed. This represents an OR function.

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Chapter 4

Exclusive OR functions are more complicated to make with switches. They behave
somewhat like a stairway switch with two switch stations. (See Problem 4.44.)
Classroom Strategies
Demonstrate the Multisim example in Example 4.2. Have students practice with
Bring It Home activities 4.6 and 4.7, which are modifications to the Multisim file for
Example 4.2.

Describe those logic functions derived from the basic ones: NAND, NOR, Exclusive
OR, and Exclusive NOR.
Teachable Moments
NAND = NOT AND, NOR = NOT OR
Both gates have active-HIGH inputs and active-LOW outputs. (There are other
versions, called DeMorgan equivalent gates, where this is not the case.) These gates can
be analyzed using a "fill-in-the-blanks" approach, which can be used for any AND-
shaped or OR-shaped gate:
(All/At least one) input(s) (HIGH/LOW) make(s) the output (HIGH/LOW).
First blank: AND shape = "All"; OR shape = "At least one"
Second blank: input has a bubble = "LOW"; input has no bubble = "HIGH"
Third blank: output has a bubble = "LOW"; output has no bubble = "HIGH"

For example, a sentence describing a NAND gate is:

All inputs HIGH make the output LOW.

A sentence describing a NOR gate is:

At least one inputs HIGH make the output LOW.

These sentences describe the lines of a truth table where the output is 0, as follows.

A B

0 0
0 1 0
1 0 0
1 1 0 0

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Chapter 4

Since an output can be only 0 or 1, the blank lines must be 1s.The completed truth
tables are shown below.
A B

0 0 1 1
0 1 1 0
1 0 1 0
1 1 0 0

Boolean expressions can be derived from the gate symbol by going from left to
right and performing operations as they are encountered. For example, for a NOR
gate:
Start with the two inputs:
Combine the inputs in an OR function:
Invert the entire function and assign it to Y:

Similarly for a NAND function (note that the dot operator for AND is optional):
Start with the two inputs:
Combine the inputs in an AND function:
Invert the entire function and assign it to Y:

Exclusive OR and Exclusive NOR gates are exceptions to the fill-in-the-blanks

approach. The output of a 2-input Exclusive OR (XOR) gate is HIGH when either
input is HIGH, but not both. This also gives us the property that the output is HIGH
when the inputs are different and LOW when they are the same. The output of an
Exclusive NOR (XNOR) gate is the inverted output of an XOR gate.

Classroom Strategies
Present the operation of NAND and NOR gates using the fill-in-the-blanks method.
Do Bring It Home Exercises 4.13 to 4.22. Exercises 4.20 and 4.22 use Multisim.
Do Extra Mile Exercises 4.1 to 4.3

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Chapter 4

Explain the concept of active levels and identify active LOW and HIGH terminals of
logic gates.

Teachable Moments
An active level is the logic state (HIGH or LOW) that a device produces when it
is "on" or a logic state that it expects to see at an input to make it turn on. A logic gate
input or output with a bubble is active LOW. An input or output without a bubble is
active HIGH.

Classroom Strategies
Identify the active levels of AND, OR, and NOT gates. More gates will be examined
later.

Choose appropriate logic functions to solve simple design problems.

Teachable Moments
When selecting logic functions for a design problem, put the design requirement into words.
Examine the description for key words such as NOT, AND, OR (e.g., a motor goes on when
either sensor A or sensor B generates a logic HIGH. This obviously points to an OR or NOR
gate, depending on the active level required to turn on the motor.)
Classroom Strategies
Examine Example 4.1 on page 67 in the main text.

Draw the truth table of any logic gate.

Classroom Strategies
Use the methods described under objective #3.

Draw any logic gate, given its truth table.

Classroom Strategies
Use the methods described under objective #3. Also, students should simply memorize
the truth tables of the basic and derived logic functions.

Draw simple logic switch circuits for single-pole single-throw (SPST) and normally
open and normally closed pushbutton switches.

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Chapter 4

Teachable Moments
Understanding the operation of a logic switch hinges on two rules:
1. Two points that are wired directly together have the same voltage, and
2. If there is nearly zero current through a resistor, the voltage is nearly the same on both ends of
the resistor.
A logic switch is grounded on one side. The other side of the switch has a connection
to the power supply voltage through a pull-up resistor with a value of roughly 1 kΩ to 10
kΩ. The logic level is measured at the point where the pull-up resistor meets the switch.
Call this point X. When the switch is closed, X is connected directly to ground. By rule 1,
this means that X is grounded, or at logic LOW. When the switch is open, current flows
from the power supply, through the pull-up resistor to X, and into the input of a logic
circuit. The input resistance of a logic circuit is typically very high (in the MΩ range), so
its input current is very low. Almost no current flows through the pull-up resistor, so by
rule 2 the voltage at X is almost the same as the power supply voltage, or logic HIGH.
For a simpler explanation, just say that when the switch is closed, X is grounded, or
LOW. When the switch is open, X is pulled HIGH by the pull-up resistor.

Classroom Strategies
Demonstrate the logic switches in the Multisim examples 4.5 and 4.6. Have students
practice with the Multisim circuits for these examples. If they wish to, they can make
their own circuits rather than opening the provided files.
Get students to breadboard a set of logic switches using a DIP switch and a SIP pull-
up resistor pack. Check logic levels using a digital voltmeter.

Describe the use of light-emitting diodes (LEDs) as indicators of logic HIGH and
LOW states.

Teachable Moments
A diode is a device that conducts electricity in one direction only. It has two terminals
called the anode (the blunt end of the arrow) and the cathode (the pointy end of the
arrow). The arrow on the diode is in the direction of conventional current (positive to
negative). A light-emitting diode (LED) gives off light when it is conducting current.
This happens when the voltage at the anode is greater than the voltage at the cathode.
LED brightness increases with increasing current. If the current becomes too large, the

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Chapter 4

LED will burn out. The correct amount of current for enough brightness, but not so much
that it will damage the LED, is controlled by a series resistor. The value of this resistor is
typically between 220 Ω and 680 Ω for a standard LED and perhaps about 1 kΩ for a
high-efficiency LED.
An LED with its cathode grounded through a series resistor will turn on when a logic
HIGH is placed on its anode. Since ON=HIGH, this is an active-HIGH indicator. An
LED with its anode connected to the power supply through a series resistor will turn on
when a logic LOW is placed on its cathode. Since ON=LOW, this is an active-LOW
indicator.

Classroom Strategies
Demonstrate the Multisim circuit in Example 4.7. Notice that when two LEDs are
connected in parallel, but in opposite directions, only one of them can conduct at any
time. Have the students practice with the Multisim example.
Have students breadboard a logic switch, an inverter, and an LED, as shown in Figure
4.35 in the text. Remember: Multisim does not show this, but the inverter chip requires
power and ground for it to work. Have the students verify that the switch changes the
LED from on to off or vice-versa. Measure the voltages on the input and output of the
inverter.
Rewire the circuit to make the LED come on with the opposite logic level of that in
the original circuit. Verify operation and measure circuit voltages, as before.
Do Extra Mile activity 4.44.

Draw the DeMorgan equivalent form of any logic gate.

Teachable Moments
Use the fill-in-the-blanks method to describe the DeMorgan equivalent gates in either
AND or OR form. To change a gate description to its DeMorgan equivalent, change all
three blanks to the other choice. For example:
Original description: All inputs HIGH make the output LOW.
DeMorgan equivalent: At least one input LOW makes the output HIGH.

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Figure 4.21 on page 74 of the main text shows these equivalent gates (NAND). One
thing students have a hard time understanding is that these really are the same gate, just
drawn to emphasize different properties. Keep reminding them.
Figure 4.23 on page 75 shows the equivalent forms of the NOR function.
Classroom Strategies
Find a big wide blackboard/whiteboard. Draw the original NAND gate, write its
Boolean equation and descriptive sentence, and use the sentence to make its truth table.
Besides that, do the same for the original NOR gate. Next draw an OR-shaped gate with
bubbles on the inputs, but not the output and, again, derive the Boolean expression,
descriptive sentence and truth table. Do it again for an AND-shaped gate with bubbles on
the inputs, but not the output. When you have the board all filled up with the information
for the four gates, ask students to point out the ones that have the same truth tables. These
are DeMorgan equivalent NAND and NOR gates.

Determine when a logic gate will pass a digital waveform and when it will block the
signal.

Teachable Moments
A time-varying waveform can be passed or blocked by a logic gate. There are only four
possible outcomes.
1. The signal is blocked and the output is LOW.
2. The signal is blocked and the output is HIGH.
3. The signal is passed and the output waveform is the same as the input.
4. The signal is passed and the output waveform is opposite from the input.

Classroom Strategies
Open the Multisim file for Example 4.9 and demonstrate its function. Change the
AND gate to a NAND and demonstrate the new properties. Have students work with this
file and try all of the following gates: AND, OR, NAND, NOR, XOR, XNOR. You can
also have them breadboard a logic switch, LED, gate, and digital oscillator (<10 Hz).

Describe the behavior of tristate buffers.

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Teachable Moments
The hardest thing here is distinguishing the high-impedance state from the LOW state.
Emphasize that the Hi-Z state is like an electrical disconnection, whereas a logic LOW is
equivalent to connecting to the circuit ground.

Classroom Strategies
Breadboard the following circuit. When G is LOW, either the red or the green LED will be on,
depending on the state of A. When G is HIGH, the buffers are in the high-impedance state
(equivalent to open circuit) and neither LED will be on, regardless of the state of A.

Describe several types of integrated circuit packaging for digital logic gates.

Teachable Moments
Dual In-line Packages (DIP) where the standard for logic chips for many years, but now
they are mostly used for educational and hobbyist projects. Many other packaging
options exist now. Popular ones are listed in Figure 4.52 in the main text.
Classroom Strategies
Acquire some old printed circuit boards or computer option cards, such as old audio or
video cards or fax/modem cards. Have students identify the type of packaging for the
various chips on the boards.

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Chapter 4

Answers to Your Turn Activities

A 4-input gate has input variables A, B, C, and D and output Y. Write a descriptive
sentence for the active output state(s) if the gate is:
4.1 AND.
Answer: AND: “A AND B AND C AND D must be HIGH to make Y HIGH.”
4.2 OR.
Answer: OR: “One or more of A OR B OR C OR D must be HIGH to make Y HIGH.”
A logic gate turns on an active-HIGH light when its output is HIGH. The gate has two
inputs, each of which is connected to a logic switch, as shown in Figure 4.20.
4.3 What type of gate will turn on the light when the switches are in opposite positions?
Answer: XOR (The output is HIGH when the inputs are different.)
4.4 Which gate will turn off the light only when both switches are HIGH?
Answer: NAND (Both inputs HIGH make the output LOW.)
4.5 What type of gate turns off the light when at least one switch is HIGH?
Answer: NOR (At least one input HIGH makes the output LOW.)
4.6 Which gate turns on the light when the switches are in the same position?
Answer: XNOR (The output is HIGH when the inputs are the same.)
4.7 The output of a gate is described by the following Boolean expression:

Y  A B C  D
Write the Boolean expression for the DeMorgan equivalent form of this gate.
Answer: Y = ABC D
4.8 A single-pole single-throw switch is connected such that one end is grounded and the
other end is connected to a 1 kΩ pull-up resistor. The other end of the resistor
connects to the circuit power supply, VCC. What logic level does the switch provide
when it is open? When it is closed?
Answer: When the switch is open, it provides a logic HIGH because of the pull-up resistor. A
closed switch is LOW, due to the connection to ground.
4.9 Briefly explain why an AND gate is inhibited by a LOW Control input and an OR
gate is inhibited by a HIGH Control input.

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Answer: An AND gate needs two HIGH inputs to make a HIGH output. If the Control input is
LOW, the output can never be HIGH; the output remains LOW. An OR output is HIGH if one
input is HIGH. If the Control input is HIGH, the output is always HIGH, regardless of the level
at the Signal input. In both states of the Signal input, the output is “stuck” at one level,
signifying that the gate is inhibited.
4.10 How are the pins numbered in a DIP? How are the pins numbered in a QFP
package?
Answer: DIP: Viewed from above, with the notch in the package away from you, pin 1 is on the
left side at the far end. The pins are numbered counterclockwise from that point. QFP: When
viewed from above, with the cutoff corner at the top left, pin 1 top pin of the left row. The pins
number counterclockwise from there.

Answers to Bring It Home Activities

4.1 Basic Logic Functions
4.1 Draw the symbol for the NOT gate (inverter).
Answer:

4.2 Draw the symbol for a 3-input AND gate.

Answer:

4.3 Draw the symbol for a 3-input OR gate.

Answer:

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4.4 Write a sentence that describes the operation of a 4-input AND gate that has inputs
P, Q, R, and S and output T. Make the truth table of this gate and draw an asterisk
beside the line(s) of the truth table indicating when the gate output is in its active
state.
Answer: T is HIGH if P AND Q AND R AND S are all HIGH.

P Q R S T
0 0 0 0 0
0 0 0 1 0
0 0 1 0 0
0 0 1 1 0
0 1 0 0 0
0 1 0 1 0
0 1 1 0 0
0 1 1 1 0
1 0 0 0 0
1 0 0 1 0
1 0 1 0 0
1 0 1 1 0
1 1 0 0 0
1 1 0 1 0
1 1 1 0 0
1 1 1 1 1 *

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4.5 Write a sentence that describes the operation of a 4-input OR gate with inputs J, K,
L, and M and output N. Make the truth table of this gate and draw an asterisk beside
the line(s) of the truth table indicating when the gate output is in its active state.
Answer: N is HIGH if one or more of J, K, L, OR M is HIGH.
J K L M N
0 0 0 0 0
0 0 0 1 1 *
0 0 1 0 1 *
0 0 1 1 1 *
0 1 0 0 1 *
0 1 0 1 1 *
0 1 1 0 1 *
0 1 1 1 1 *
1 0 0 0 1 *
1 0 0 1 1 *
1 0 1 0 1 *
1 0 1 1 1 *
1 1 0 0 1 *
1 1 0 1 1 *
1 1 1 0 1 *
1 1 1 1 1 *

4.6 Multisim Problem

Multisim File: 04.01 AND gate and switches.ms10
Open the Multisim file for this problem and save it as 04.02 OR gate and switches.ms10.
Replace the 74LS08N 2-input AND gate with a 74LS32N 2-input OR gate. Also rewire
the two switches so that they represent a 2-input OR function.
Interactive Exercise:
Test the various switch combinations to see the operation of the SPST switches with
the lamp and the SPDT switches with the OR gate.
a. Does the lamp come on when J1 is open and J2 is closed? Explain.

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b. Does the digital probe come on when J3 is in the upper position and J4 is in the
lower position? Explain.
Answer: The modified Multisim circuit is shown in the following figure:

a. The lamp is on because the current must flow through either one or both of the switches to
turn on the lamp. As long as one switch is closed, this condition is met.
b. The digital probe is on. When J3 is up, it applies a HIGH to the OR gate. When J4 is down it
applies a LOW to the gate. Either one or both of the inputs must be HIGH to make the gate
output HIGH and turn on the probe.
4.7 Multisim Problem
Multisim File: 04.01 AND gate and switches.ms10
Open the Multisim file for this problem and save it as 04.02a 3-in AND gate and
switches.ms10. Replace the 74LS08N 2-input AND gate with a 74LS11N 3-input AND
gate and add an SPDT switch for the third input. Add an SPST switch to the lamp circuit
and rewire it so that it represents a 3-input AND function. Control the lamp with keys 1, 2,
and 3. Control the gate with keys A, B, and C. (To set the key value that controls a switch,
double-click the switch symbol to open a dialog box. In the Value tab, select the key value
from the drop-down box and click OK.)
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Interactive Exercise:
Test the various switch combinations to see the operation of the SPST switches with
the lamp and the SPDT switches with the OR gate.
a. Does the lamp come on when one switch is open and two are closed? Explain.
b. Does the digital probe come one when all three switches are in the upper position?
Explain.
Answers:
The modified Multisim circuit is shown in the following Figure:

a. The lamp is off because the current must flow through all switches to turn on the lamp. As
long as one switch is open, this condition is not met.
b. The digital probe is on. When a switch is up, it applies a HIGH to the AND gate. All inputs
must be HIGH to make the gate output HIGH and turn on the probe.

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4.8 State how four switches must be connected to represent a 4-input OR function. Draw
a circuit diagram showing how this function can control a lamp.
Answer: The switches must all be connected in parallel to form an OR function, as shown in the
following Figure:

4.9 Draw the circuit of a 3-input AND function, made using only 2-input logic gates.
Answer:

4.10 Draw the circuit of a 3-input OR function, made using only 2-input logic gates.
Answer:

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4.11 Multisim Problem

Multisim File: 04.03 3-in AND gate.ms10
Open the Multisim file for this problem, as shown in Figure 4.54. Control the gate inputs
with keys A, B, and C. (To set the key value that controls a switch, double-click the switch
symbol to open a dialog box. In the Value tab, select the key value from the drop-down
box and click OK.)
Interactive Exercise:
Test the various switch combinations to see the operation of the SPDT switches with
the 3-input AND gate and its equivalent circuit and answer the following questions.
a. Compare the states of Y1 and Y2 for all combinations of inputs A, B, and C.
What do you observe?
b. What combinations of inputs make the output of gate U2A HIGH?
c. Can Y2 be HIGH if the output of U2A is LOW? Explain.
Answers:
a. Y1 and Y2 are the same for all combinations.
b. The output of U2A is HIGH if A AND B are both HIGH.
c. Y2 cannot be HIGH if the output of U2A is LOW. U2B requires both the output of U2A and
input C to be HIGH to make Y2 HIGH.
4.12 Multisim Problem
Multisim File: 04.03 3-in AND gate.ms10
Open the Multisim file for this problem and save it as 04.04 3-in OR gate.ms10, as shown
in Figure 4.55. Replace U1A with a 3-input OR gate called OR3 from the Miscellaneous
Digital component group. Replace U2A and U2B with 2-input OR gates called OR2 from
the Miscellaneous Digital component group.
Interactive Exercise:
Test the various switch combinations to see the operation of the SPDT switches with
the 3-input OR gate and its equivalent circuit and answer the following questions.
a. Compare the states of Y1 and Y2 for all combinations of inputs A, B, and C. What
do you observe?
b. What combinations of inputs make the output of gate U2A HIGH?
c. Can Y2 be HIGH if the output of U2A is LOW? Explain.

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Answers:
a. Y1 and Y2 are the same for all combinations.
b. The output of U2A is HIGH if either A OR B or both are HIGH.
c. Y2 can be HIGH if the output of U2A is LOW, provided that input C is HIGH. U2B requires
either the output of U2A or input C to be HIGH to make Y2 HIGH.
4.2 Derived Logic Functions
4.13 For a 4-input NAND gate with inputs A, B, C, and D and output Y:
a. Write the truth table and a descriptive sentence.
b. Write the Boolean expression.
c. Draw the logic circuit symbol.
Answers:
a. Y is LOW when A, B, C, AND D are all HIGH.
A B C D Y
0 0 0 0 1
0 0 0 1 1
0 0 1 0 1
0 0 1 1 1
0 1 0 0 1
0 1 0 1 1
0 1 1 0 1
0 1 1 1 1
1 0 0 0 1
1 0 0 1 1
1 0 1 0 1
1 0 1 1 1
1 1 0 0 1
1 1 0 1 1
1 1 1 0 1
1 1 1 1 0

b.
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c. See Figure:

4.14 Repeat Problem 4.13 for a 4-input NOR gate.

Answers:
a. Y is LOW when one or more of A, B, C, OR D are HIGH.
A B C D Y
0 0 0 0 1
0 0 0 1 0
0 0 1 0 0
0 0 1 1 0
0 1 0 0 0
0 1 0 1 0
0 1 1 0 0
0 1 1 1 0
1 0 0 0 0
1 0 0 1 0
1 0 1 0 0
1 0 1 1 0
1 1 0 0 0
1 1 0 1 0
1 1 1 0 0
1 1 1 1 0

b.
c. See Figure:

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4.15 State the active levels of the inputs and outputs of a NAND gate and a NOR gate.
Answers:
Gate Input Output
NAND Active-HIGH Active-LOW
NOR Active-HIGH Active-LOW

4.16 Write a descriptive sentence of the operation of a 5-input NAND gate with inputs A,
B, C, D, and E and output Y. How many lines would the truth table of this gate have?
Answers: Y is LOW when A, B, C, D, AND E are all HIGH. The truth table would have 32 lines.
(25 = 32)
4.17 Repeat Problem 4.16 for a 5-input NOR gate.
Answers:
Y is LOW when one or more of A, B, C, D OR E are HIGH. The truth table would have 32 lines.
4.18 A pump motor in an industrial plant will start only if the temperature and pressure
of liquid in a tank exceed a certain level. The temperature sensor and pressure
sensor, shown in Figure 4.56 each produce a logic HIGH if the measured quantities
exceed this value. The logic circuit interface produces a HIGH output to turn on the
motor. Draw the symbol and truth table of the gate that corresponds to the action of
the logic circuit.
Answer:
Temperature Pressure Motor
0 0 0
0 1 0
1 0 0

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Instructor’s Guide to Accompany Digital Electronics
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1 1 1

4.19 Repeat Problem 4.18 for the case in which the motor is activated by a logic LOW.
Answer:
Temperature Pressure Motor
0 0 1
0 1 1
1 0 1
1 1 0

4.20 Multisim Problem

Multisim File: 04.03 3-in AND gate.ms10
Open the Multisim file for this problem, and save it as 04.05 3-in NAND gate.ms10.
Replace the 3-input AND gate with a 74LS10 3-input NAND gate. Replace U2A and U2B
with one 2-input gate each, to make an equivalent circuit of a 3-input NAND.
Interactive Exercise:

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Test the various switch combinations to see the operation of the SPDT switches with
the 3-input NAND gate and its equivalent circuit and answer the following questions.
a. Compare the states of Y1 and Y2 for all combinations of inputs A, B, and C. What
do you observe?
b. What combinations of inputs make the output of gate U2A LOW?
c. Can Y2 be LOW if the output of U2A is LOW? Explain.
Answers:
The Multisim circuit for this problem is shown in the following figure:

a. Y1 and Y2 are the same for all combinations.

b. The output of U2A is LOW if A AND B are both HIGH.
c. Y2 cannot be LOW if the output of U2A is LOW. U2B requires both the output of U2A and
input C to be HIGH to make Y2 LOW.
4.21 Draw the circuit of a 4-input NAND function, made using only 2-input logic gates.
Answer:

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4.22 Multisim Problem

Multisim File: 04.03 3-in AND gate.ms10
Open the Multisim file for this problem and save it as 04.06 3-in NOR gate.ms10.
Replace the 3-input AND gate with a 74LS27 3-input NOR gate. Replace U2A and U2B
with one 2-input gate each, to make an equivalent circuit of a 3-input NOR.
Interactive Exercise:
Test the various switch combinations to see the operation of the SPDT switches with
the 3-input NOR gate and its equivalent circuit and answer the following questions.
a. Compare the states of Y1 and Y2 for all combinations of inputs A, B, and C. What
do you observe?
b. What combinations of inputs make the output of gate U2A HIGH?
c. Can Y2 be LOW if the output of U2A is LOW? Explain.
Answers:
The Multisim circuit for this problem is shown in the following figure:

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Instructor’s Guide to Accompany Digital Electronics
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a. Y1 and Y2 are the same for all combinations.

b. The output of U2A is HIGH if either A OR B or both are HIGH.
c. Y2 can be LOW if the output of U2A is LOW, provided that input C is HIGH. U2B requires
either the output of U2A or input C to be HIGH to make Y2 LOW.
4.23 Draw the circuit of a 4-input NOR function, made using only 2-input logic gates.
Answer:

4.24 Find the truth table for the logic circuit shown in Figure 4.57.
Answer:
A B C
0 0 0 0 0

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Instructor’s Guide to Accompany Digital Electronics
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0 0 1 0 1
0 1 0 1 1
0 1 1 1 0
1 0 0 1 1
1 0 1 1 0
1 1 0 0 0
1 1 1 0 1

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Instructor’s Guide to Accompany Digital Electronics
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4.3 DeMorgan’s Theorems and Gate Equivalence

4.25 For each of the gates in Figure 4.58:
a. Write the truth table.
b. Indicate with an * which lines on the truth table show the gate output in its active
state.
c. Convert the gate to its DeMorgan equivalent form.
d. Rewrite the truth table and indicate which lines on the truth table show output
active states for the DeMorgan equivalent form of the gate.
Answers:

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Instructor’s Guide to Accompany Digital Electronics
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Gate d.

4.26 Refer to Figure 4.59. State which two gates of the three shown are DeMorgan
equivalents of each other. Explain your choice.
Answer:
Gates a. and c. are equivalent. A sentence describing gate a. is "At least one input HIGH makes
the output LOW." A sentence for gate c. is "Both inputs LOW make the output HIGH." A little
thought shows that these are two ways of saying the same thing. Also, to transform gate a. to its
equivalent, change the input levels (active-HIGH to active-LOW), the shape (OR to AND), and
the output level (active-LOW to active-HIGH). The result is the gate in c.
4.27 Refer to Figure 4.60. State which two gates of the three shown are DeMorgan
equivalents of each other. Explain your choice.
Answer: Gates a. and c. are equivalent. A sentence describing gate a. is "Both inputs LOW make
the output LOW." A sentence for gate c. is "At least one input HIGH makes the output HIGH,"
which is an equivalent statement. Also, to transform gate a. to its equivalent, change the input
levels (active-LOW to active-HIGH), the shape (AND to OR), and the output level (active-LOW
to active-HIGH). The result is the gate in c.
4.4 Logic Switches and LED Indicators
4.28 Sketch the circuit of a single-pole single-throw (SPST) switch used as a logic switch.
Briefly explain how it works.

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Instructor’s Guide to Accompany Digital Electronics
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Answer: The circuit is shown in Figure 4.26 in the main text. A brief explanation is given in that
part of the chapter.
4.29 Refer to Figure 4.27 (logic pushbuttons). Should the normally open pushbutton be
considered an active HIGH or active LOW device? Briefly explain your choice.
Answer: Active-LOW. The switch delivers a logic LOW to a connected circuit when it is pressed.
4.30 Should the normally closed pushbutton be considered an active HIGH or active
LOW device? Why?
Answer: Active-HIGH. The switch delivers a logic HIGH to a connected circuit when it is
pressed.
4.31 Briefly state what is required for an LED to illuminate.
Answer: An LED must have current flowing in a forward direction (from anode to cathode) for it
to illuminate. For this to happen, the voltage at the anode must be higher than the voltage at the
cathode.
4.32 Briefly state the relationship between the brightness of an LED and the current
flowing through it. Why is a series resistor required?
Answer: The greater the current flowing through the LED, the brighter it will be. If too much
current flows, it will burn out the LED. This current level is controlled by a series resistor.
4.33 Draw a circuit showing how an OR-gate output will illuminate an LED when the gate
output is LOW. Assume the required series resistor is 470 Ω.
Answer:

4.5 Enable and Inhibit Properties of Logic Gates

4.34 Draw the output waveform of the Exclusive NOR gate when a square waveform is
applied to one input and
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Instructor’s Guide to Accompany Digital Electronics
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a. The other input is held LOW

b. The other input is held HIGH
How does this compare to the waveform that would appear at the output of an
Exclusive OR gate under the same conditions?
Answer:

A
Y
B

Y
The waveform of the XNOR gate output is opposite in level to the output waveform of an XOR
gate.
4.35 Sketch the input waveforms represented by the following 32-bit sequences (use 1/4-
inch graph paper, 1 square per bit. Spaces are provided for readability only):
a. 0000 0000 0000 1111 1111 1111 1111 0000
b. 1010 0111 0010 1011 0101 0011 1001 1011
Assume that these waveforms represent inputs to a logic gate. Sketch the waveform
for gate output Y if the gate function is:
a. AND d. NOR
b. OR e. XOR
c. NAND f. XNOR
Answer:

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4.36 Repeat Problem 4.35 for the waveforms shown in Figure 4.61.
Answer:

4.37 The A and B waveforms shown in Figure 4.62 are inputs to an OR gate. Complete the
sketch by drawing the waveform for output Y.
Answer:

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Instructor’s Guide to Accompany Digital Electronics
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4.38 Repeat Problem 4.37 for a NOR gate.

Answer:

4.39 Make a truth table for the tristate buffers shown in Figure 4.46. Indicate the high-
impedance state by the notation “Hi-Z.” How do the enable properties of these gates
differ from gates such as AND and NAND?
Answer: The truth tables of the two tristate buffers are shown below. When a tristate buffer is
enabled, its output is not in either the logic HIGH or LOW state, but a third state called the
High-Impedance, or Hi-Z, state. The Hi-Z state is equivalent to electrically disconnecting the
output from the circuit. By contrast, the output of an AND or NAND gate is always electrically
connected to the circuit, either in logic HIGH (power supply voltage) or logic LOW (ground).
Noninverting Tristate Buffer Inverting Tristate Buffer
IN OUT IN OUT

0 0 0 0 0 1
0 1 1 0 1 0
1 0 Hi-Z 1 0 Hi-Z
1 1 Hi-Z 1 1 Hi-Z

4.6 Integrated Circuit Logic Gates

4.40 Name two logic families used to implement digital logic functions. How do they
differ?
Answer: Transistor-transistor Logic (TTL) and Complementary Metal-Oxide-Semiconductor
(CMOS). Typically, TTL devices can drive higher-current loads. CMOS has flexible power
supply requirements and uses less power.
4.41 List the industry-standard numbers for a quadruple 2-input NAND gate in low-
power Schottky TTL and high-speed CMOS technologies.

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Instructor’s Guide to Accompany Digital Electronics
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Answer: Low-power Schottky TTL: 74LS00

High-Speed CMOS: 74HC00
4.42 Repeat Problem 4.41 for a quadruple 2-input NOR gate. How does each numbering
system differentiate between the NAND and NOR functions?
Answer: Low-power Schottky TTL: 74LS02
High-Speed CMOS: 74HC02
The NAND and NOR functions are identified by the last two numbers of the part
number (00=Quad 2-in NAND, 02=Quad 2-in NOR)
4.43 List six types of packaging that a logic gate could come in.
Answer: Dual In-line Package (DIP); Small-Outline Integrated Circuit (SOIC); Thin Shrink
Small-Outline Package (TSSOP); Plastic Leaded Chip Carrier (PLCC); Quad Flat Pack (QFP);
Ball Grid Array (BGA)

Selected Answers to Extra Mile Activities

4.2 Derived Logic Functions
4.44 Figure 4.63 shows a circuit for a two-way switch for a stairwell. This is a common
circuit that allows you to turn on a light from either the top or the bottom of the
stairwell and off at the other end. The circuit also allows anyone coming along after
you to do the same thing, no matter which direction they are coming from.
The lamp is ON when the switches are in the same positions and OFF when they are
in opposite positions. What logic function does this represent? Draw the truth table
of the function and use it to explain your reasoning.
Answer: For switch A, let position A1 represent A=0 and position A2 represent A=1. Similarly,
for switch B, position B1 means B=0 and position B2 means B=1. Assume a logic 1 means the
lamp is on. If switches A and B are in the same position to turn on the lamp and opposite
positions to turn it off, this gives us the truth table shown below. This is a truth table for the
Exclusive NOR function.
A B Lamp
0 0 1
0 1 0

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Instructor’s Guide to Accompany Digital Electronics
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1 0 0
1 1 1

4.45 Recall the description of a 2-input Exclusive OR gate: “Output is HIGH if one input
is HIGH, but not both.” This is not the best statement of the operation of a multiple-
input XOR gate. Look at the truth table derived in Problem 4.24 and write a more
accurate description of n-input XOR operation.
Answer: The output is HIGH when an odd number of inputs is HIGH.
4.46 Multisim Problem
Multisim File: 04.07 Derived Logic Functions.ms10
A circuit showing gates for four derived logic functions is shown in Figure 4.64. Enter this
circuit in Multisim, using the components listed in Table 4.29. Save the file as 04.07
Derived Logic Functions.ms10.
Interactive Exercise:
Run the Multisim file for this problem as a simulation. Operate switches A and B to make
all possible combinations of input logic levels. Write a sentence that describes the
operation of each gate.
Answers:
NAND: All inputs HIGH make the output LOW.
NOR: At least one input HIGH makes the output LOW.
XOR: One input HIGH, but not both, makes the output HIGH. Also, the output is HIGH when the
inputs are different from each other.
XNOR: One input HIGH, but not both, makes the output LOW. Also, the output is HIGH when
the inputs are the same as each other.

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4.4 Logic Switches and LED Indicators

4.4 Multisim Problem
Multisim File: 04.10 LEDs in Opposite States.ms10
Open the Multisim file for this problem and save it as 04.11 LEDs in Opposite States
with V and I Meters.ms10. Modify the circuit by adding four multimeters, as shown in
Figure 4.65. Meters XMM1 and XMM2 are in series with the LEDs and set as ammeters
to measure current through the LEDs. Meters XMM3 and XMM4 are in parallel with the
LEDs and measure the voltage dropped across the LEDs.
Interactive Exercise:
a. Run the file as a simulation and fill in the following table with the readings on the
four multimeters. Also indicate whether each LED is on or off.
b. Write a general statement about the voltage across and current through an LED
when it is ON and when it is OFF.
Answers:
a. The meter readings for the circuit are shown in Figures EM4.4a and b. The readings are as
follows—

Switch LED1 LED2 XMM1 XMM2 XMM3 XMM4

Position (ON/OFF) (ON/OFF)
Down OFF ON 0A -11.854 mA -4.999 -1.799
V V
Up ON OFF 11.852 4.77 nA 1.799 V 4.999 V
mA (essentially 0)

See the following Figures:

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Meter Readings with Switches in the Down Position

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Meter Readings with Switches in the Up Position

b. Each LED draws about 11.85 mA when it is ON and 0 when it is OFF. When one of the LEDs
is ON, it drops about 1.8 V in the direction of the arrow. When it is OFF, it drops the entire
supply voltage (5 V) in the direction opposite to that of the arrow.
4.5 Enable and Inhibit Properties of Logic Gates
4.48 Figure 4.66 shows a circuit that will make a lamp flash at 3 Hz when the gasoline
level in a car’s gas tank drops below a certain point. A float switch in the tank
monitors the level of gasoline. What logic level must the float switch produce to make
the light flash when the tank is approaching empty? Why?

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Instructor’s Guide to Accompany Digital Electronics
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Answer: The AND gate is enabled when the float switch is HIGH and inhibited when it is LOW.
To make the light flash to warn of a low gasoline level, the float switch should produce a HIGH
when the level in the tank drops below a certain point.
4.49 Repeat Problem 4.48 for the case where the AND gate is replaced by a NOR gate.
Answer: The NOR gate is enabled when the float switch is LOW and inhibited when it is HIGH.
To make the light flash to show a low gasoline level, the float switch should produce a LOW
state.
4.50 Will the circuit in Figure 4.66 work properly if the AND gate is replaced by an
Exclusive OR gate? Why or why not?
Answer: An XOR gate will not work for this function. When the float switch is LOW, the lamp
will flash in phase with the 3-Hz pulse source. When the switch is HIGH, the lamp will also
flash, but this time out of phase with the pulse source. If we only see the lamp and not the pulse
source, we only see a flashing lamp with no way to tell which position the switch is in. Therefore,
this circuit will not indicate whether the tank is full or empty.

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