STW45NM50

N-channel 550 V @ TJmax, 0.08 Ω, 45 A, TO-247

MDmesh™ Power MOSFET

Features
RDS(on)
Type VDSS ID
max
STW45NM50FD 500 V < 0.1 Ω 45 A

■ 100% avalanche tested

■ High dv/dt and avalanche capabilities 3
2
1
■ Low input capacitance and gate charge
TO-247
■ Low gate input resistance

Application
■ Switching applications
Figure 1. Internal schematic diagram
Description
The MDmesh™ is a new revolutionary Power $
MOSFET technology that associates the Multiple
Drain process with the company’s PowerMESH™
horizontal layout. The resulting product has an
outstanding low on-resistance, impressively high
dv/dt and excellent avalanche characteristics. The '
adoption of the company’s proprietary strip
technique yields overall dynamic performance
that is significantly better than that of similar
competitor’s products. 3

!-V

Table 1. Device summary

Order code Marking Package Packaging

STW45NM50 W45NM50 TO-247 Tube

July 2009 Doc ID 8477 Rev 5 1/12

www.st.com 12
Contents STW45NM50

Contents

1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1 Electrical characteristics (curves) ............................. 6

3 Test circuit ................................................ 8

4 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

5 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

2/12 Doc ID 8477 Rev 5

STW45NM50 Electrical ratings

1 Electrical ratings

Table 2. Absolute maximum ratings

Symbol Parameter Value Unit

VGS Gate-source voltage ± 30 V

ID Drain current (continuous) at TC = 25 °C 45 A
ID Drain current (continuous) at TC=100 °C 28.4 A
IDM(1) Drain current (pulsed) 180 A
PTOT Total dissipation at TC = 25 °C 417 W
Derating factor 2.08 W/°C
(2)
dv/dt Peak diode recovery voltage slope 15 V/ns
TJ Operating junction temperature
-65 to 150 °C
Tstg Storage temperature
1. Pulse width limited by safe operating area
2. ISD ≤ 45 A, di/dt ≤ 400 A/µs, VDD = 80%V(BR)DSS

Table 3. Thermal resistance

Symbol Parameter Value Unit

Rthj-case Thermal resistance junction-case max 0.3 °C/W

Rthj-a Thermal resistance junction-ambient max 30 °C/W
Tl Maximum lead temperature for soldering purpose 300 °C

Table 4. Avalanche data

Symbol Parameter Value Unit

Avalanche current, repetitive or not-repetitive

IAR 20 A
(pulse width limited by Tj max)
Single pulse avalanche energy
EAS 810 mJ
(starting TJ = 25 °C, ID = IAR, VDD = 50 V)

Doc ID 8477 Rev 5 3/12

Electrical characteristics STW45NM50

2 Electrical characteristics

(TCASE = 25 °C unless otherwise specified)

Table 5. On/off states

Symbol Parameter Test conditions Min. Typ. Max. Unit

Drain-source breakdown
V(BR)DSS ID = 250 µA, VGS= 0 500 V
voltage
Zero gate voltage drain VDS = Max rating, 10 µA
IDSS
current (VGS = 0) VDS = Max rating @125 °C 100 µA
Gate body leakage current
IGSS VGS = ± 30 V ±100 nA
(VDS = 0)
VGS(th) Gate threshold voltage VDS= VGS, ID = 250 µA 3 4 5 V
Static drain-source on
RDS(on) VGS= 10 V, ID= 22.5 A 0.08 0.1 Ω
resistance

Table 6. Dynamic
Symbol Parameter Test conditions Min. Typ. Max. Unit

VDS >ID(on) x RDS(on)max

gfs (1) Forward transconductance - 20 S
ID = 22.5 A
Input capacitance
Ciss 3700 pF
Output capacitance
Coss VDS =25 V, f=1 MHz, VGS=0 - 610 pF
Reverse transfer
Crss 80 pF
capacitance
Equivalent output
Coss eq.(2) VGS=0, VDS =0 to 400 V - 325 pF
capacitance
Qg Total gate charge VDD= 400 V, ID = 45 A 87 117 nC
Qgs Gate-source charge VGS =10 V - 23 nC
Qgd Gate-drain charge Figure 14 42 nC
f=1 MHz Gate DC Bias= 0
RG Gate input resistance test signal level = 20 mV - 1.7 Ω
open drain
1. Pulsed: pulse duration=300µs, duty cycle 1.5%
2. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS
increases from 0 to 80% VDSS

4/12 Doc ID 8477 Rev 5

STW45NM50 Electrical characteristics

Table 7. Switching times

Symbol Parameter Test conditions Min. Typ. Max. Unit

VDD=250 V, ID= 22.5 A,

td(on) Turn-on delay time 26.5 ns
RG=4.7 Ω, VGS=10 V - -
tr Rise time 107.5 ns
Figure 15
tr(Voff) Off-voltage rise time VDD=400 V, ID= 45 A, 21.6 ns
tf Fall time RG=4.7 Ω, VGS=10 V - 87.7 - ns
tc Cross-over time Figure 15 110.9 ns

Table 8. Source drain diode

Symbol Parameter Test conditions Min. Typ. Max. Unit

ISD Source-drain current - 45 A

ISDM(1) Source-drain current (pulsed) - 180 A
(2)
VSD Forward on voltage ISD = 45 A, VGS = 0 - 1.5 V
trr Reverse recovery time ISD = 45 A, VDD = 100 V 200 ns
Qrr Reverse recovery charge di/dt = 100 A/µs, - 1600 nC
IRRM Reverse recovery current (see Figure 18) 16 A
trr Reverse recovery time ISD= 45 A, Tj = 150 °C 324 ns
Qrr Reverse recovery charge di/dt = 100 A/µs, - 4017 nC
IRRM Reverse recovery current VDD=100 V, (see Figure 18) 24.8 A
1. Pulse width limited by safe operating area
2. Pulsed: pulse duration=300µs, duty cycle 1.5%

Doc ID 8477 Rev 5 5/12

Electrical characteristics STW45NM50

2.1 Electrical characteristics (curves)

Figure 2. Safe operating area Figure 3. Thermal impedance

Figure 4. Output characteristics Figure 5. Transfer characteristics

Figure 6. Transconductance Figure 7. Static drain-source on resistance

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STW45NM50 Electrical characteristics

Figure 8. Gate charge vs gate-source voltage Figure 9. Capacitance variations

Figure 10. Normalized gate threshold voltage Figure 11. Normalized on resistance vs
vs temperature temperature

Figure 12. Source-drain diode forward

characteristics

Doc ID 8477 Rev 5 7/12

Test circuits STW45NM50

3 Test circuits

Figure 13. Switching times test circuit for Figure 14. Gate charge test circuit
resistive load
VDD

12V 47kΩ
1kΩ
100nF
RL 2200 3.3
µF µF
VDD IG=CONST
VD Vi=20V=VGMAX 100Ω D.U.T.
VGS 2200
RG D.U.T. µF 2.7kΩ VG

PW
47kΩ

PW 1kΩ
AM01468v1 AM01469v1

Figure 15. Test circuit for inductive load Figure 16. Unclamped inductive load test
switching and diode recovery times circuit

L
A A A
D
FAST L=100µH VD
G D.U.T. DIODE 2200 3.3
µF µF VDD
S B 3.3 1000
B B µF µF
25 Ω VDD ID
D

RG S
Vi D.U.T.

Pw
AM01470v1 AM01471v1

Figure 17. Unclamped inductive waveform Figure 18. Switching time waveform
V(BR)DSS ton toff
tr tdoff tf
VD tdon

90% 90%
IDM
10%
ID 10% VDS
0

VDD VDD 90%

VGS

AM01472v1 0 10% AM01473v1

8/12 Doc ID 8477 Rev 5

STW45NM50 Package mechanical data

4 Package mechanical data

In order to meet environmental requirements, ST offers these devices in different grades of

ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com. ECOPACK
is an ST trademark.

Doc ID 8477 Rev 5 9/12

Package mechanical data STW45NM50

TO-247 Mechanical data

Dim. mm.
Min. Typ Max.
A 4.85 5.15
A1 2.20 2.60
b 1.0 1.40
b1 2.0 2.40
b2 3.0 3.40
c 0.40 0.80
D 19.85 20.15
E 15.45 15.75
e 5.45
L 14.20 14.80
L1 3.70 4.30
L2 18.50
øP 3.55 3.65
øR 4.50 5.50
S 5.50

10/12 Doc ID 8477 Rev 5

STW45NM50 Revision history

5 Revision history

Table 9. Document revision history

Date Revision Changes

30-Mar-2005 4 Modified value on Source drain diode

23-Jul-2009 5 Modified values on Switching times

Doc ID 8477 Rev 5 11/12

 STW45NM50

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12/12 Doc ID 8477 Rev 5