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[Proceeding] Advanced testing of SiC power MOSFET modules for electric
motor drives
Original Citation:
Stella, Fausto; Pellegrino, Gianmario; Armando, Eric; Dapra, Davide (2017). Advanced testing
of SiC power MOSFET modules for electric motor drives. In: 2017 IEEE International Electric
Machines and Drives Conference, IEMDC 2017, usa, 2017. pp. 1-8
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This version is available at : http://porto.polito.it/2697231/ since: January 2018
Publisher:
Institute of Electrical and Electronics Engineers Inc.
Published version:
DOI:10.1109/IEMDC.2017.8002314
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Advanced Testing of SiC Power MOSFET Modules
for Electric Motor Drives
Fausto Stella1, Gianmario Pellegrino1, Eric Armando1, Davide Daprà2
1
Politecnico di Torino, Turin, Italy, fausto.stella@polito.it
2
Vishay Semiconductor Italiana S.p.A, Turin, Italy
Abstract—SiC power MOSFETs are an advancement in the characterization of the power module was realized in house
power electronics technology today available on the market. using low cost off-the-shelf components, including an
Respect to Si-based power devices, they offer potential for higher industrial microcontroller for control and data collection
operating temperatures, higher breakdown voltage with low on- purposes. The power modules where custom realized by
state resistance, and lower switching losses permitting much courtesy of Vishay Semiconductor Italiana, using SiC dies
higher switching frequencies. To date, the attempts to apply the from two leader semiconductor manufacturers.
SiC power devices to the field of AC drives are relented by the
high price of such new devices and by the challenges related to The results show the characterization of the on-state
electromagnetic compatibility and reliability. A new test rig is resistance as a function of junction temperature and drain
proposed, built for comprehensively testing SiC power MOSFET current, the evaluation of the voltage slew rate (dv/dt) as a
modules in real operating conditions, using off-the-shelf function of gate resistance and load current, and a new
hardware. The presented results focus on the evaluation of on- procedure for online monitoring the junction temperature,
resistance as a function of drain current and junction particularly useful both for the modules characterization and
temperature, and on dv/dt evaluation as a function of external for monitoring in operation.
gate resistance. Different modules are tested, custom realized
using SiC MOSFET dies by two leading manufacturers. Finally,
a new methodology for on-line estimation of the devices junction II. PROPOSED SETUP
temperature is presented.
The power section of the proposed setup is reported in Fig.
Keywords —SiC power MOSFET, Junction temperature 1. The custom Emipak 2B power module is connected in H-
monitoring, dv/dt limit, Regenerative test, On-state resistance. bridge configuration, suppling a purely inductive load. The
inductive load permits to mimic realistic operating conditions
I. INTRODUCTION without absorbing significant active power, in a regenerative
fashion. The same structure can be easily readapted to a three
SiC power MOSFETs have been one of the hits in power phase converter. The regenerative configuration is useful for
electronics for at least the last five years [1]. The literature testing the power devices since it avoids the need for high-
reports a number of comparisons between SiC power power power supply and load, and because it makes it easier to
MOSFETs and IGBTs, applied to hard switching power measure the power loss of the converter. The power module is
converters [1]-[2]. Key advantages of SiC power devices are monitored electrically and thermally, as detailed in the next
the lower switching and conduction loss, the higher operating paragraph.
temperature and the possibility of operating at higher switching
frequencies. Altogether, SiC devices are expected to
revolutionize power conversion more and more. Discrete
devices and power modules are on the market, and converters
designers are investigating feasible ways to exploit the SiC
potential for realizing more efficient, more integrated and more
rugged power converters. Dealing with the application of SiC
devices to the field of electric motor drives, improvements are
expected in terms of better physical integration of the power
electronics into the electrical machine and increased time
resolution coming from the high switching frequency, useful
for the control of high-speed machines. The downsides in the
application of SiC power devices to DC/AC and DC-DC
converters [3]-[4] deal with the cost of the components, the
non-compatible gate drivers, the tendency to generate
electromagnetic interferences [5] and switching overvoltages.
This paper describes a new setup for testing SiC power
MOSFET modules, capable of producing insightful
information on the behavior of the power devices in realistic Fig. 1. Schematic diagram of the proposed setup: red quantities are variables
operating conditions. All hardware needed for comprehensive measured online by the embedded controller.
With reference to Fig. 1, LEG1 of the module is closed- STGAP1S, that offers programmable fault check and hardware
loop current controlled, to impose the load current, and LEG2 protection thresholds.
is open-loop controlled at a fixed duty-cycle, to mimic a
constant voltage source. The 2-leg custom module (Fig. 2) has The power board houses the DC link capacitors and data
two inner capacitors (green rectangles), intimately connected to measurement systems (additional external DC link capacitor
the power devices to minimize the parasitic inductance of the are also provided). Five local A/D converters sample electrical
power loop. Moreover, a first NTC is embedded into the quantities with a synchronization trigger provided by the MCU
module (red rectangle labeled as NTC1), and used for (Micro Controller Unit). Such quantities are VGS, VDC, VDS,
measurement of the DBC substrate temperature (DBC = Direct iSW1L, iSW2L, all indicated in red in Fig. 1. Each A/D converter
Bonded Copper). A second NTC (red rectangle label as NTC2) communicates with the MCU through a dedicated opto-isolated
was later added in intimate contact with the switch SW1L, for SPI link.
a closer measurement of the die temperature. Besides on board data logging, the power absorbed from
the dc source and the power loss in the inductive load can be
measured with external power meters, for further verification
of the converter’s efficiency.
NTC2
NTC1
Fig. 2. Layout of power module (courtesy of Vishay Semiconductor Fig. 3. Overview of the proposed experimental setup.
Italiana). In green the two internal local capacitors. In blue the internal NTC
resistor (label “Th”), for measurement of case temperature.
A. Custom Boards Description
The setup depicted in Fig. 3 and Fig. 4, consists of one
control board, one power board and two gate driver boards, all
developed in-house.
The upper control board houses the STM32F429 Discovery
demo board based on the STM32F429ZI microcontroller unit,
which controls the power converter and the data acquisition
and collection. The Discovery board has a 64 Mbit SDRAM
memory onboard, used for data buffering during the
acquisitions at high sample rates, and the ST-LinkV2 Fig. 4. Detail of the different boards.
embedded interface, for debug and data exchange between the Table I - Ratings of the experimental setup
microcontroller and a host PC during the tests.
Maximum RMS Load current 40 A
The control board includes one LEM current transducer Maximum DC Voltage 1000 V
used for closed loop control of the load current (in blue in Fig.
Maximum Switching frequency 500 kHz
4). A Wheatstone bridge is used for measuring the resistance of
the NTC1 embedded in power module and a resonant high Electrolytic capacitors (total) 1120 μF
frequency power generator on board of the control board Film capacitors 10 μF
provides insulated power distribution to the gate drivers and to Ceramic capacitors (SMD) 300 nF
the data acquisition hardware located on the power board.
Inductive load 22 to 176 μH
The two driver boards, one for per leg of the module, are Microcontroller STM32F429ZI
sandwich-connected between the upper control board and the
lower power board. Such three-dimensional arrangement 12-bit A/D channels of the MCU 3
permits to minimize the distance between the drivers and the 12-bit A/D converters on the power board 5
power module and therefore the parasitics of the gate driver On-board SDRAM memory 64 Mbit
circuit. The driver boards are based on the intelligent driver
Adjustable plate temperature 30°-150 °C
Table I - Ratings of the experimental setup
Power Module #1 (from datasheet)
Rated current (Tsink=80 °C) 26A
Breakdown voltage 1200 V
RON @ 25 °C, 20 A 71 m
Cinternal 2 x 47 nF
Max Junction Temperature 175°C
Power Module #2 (from datasheet)
Rated current (Tsink=80 °C) 19 A
Breakdown voltage 1200 V
RON @ 25 °C, 20 A 78 m
Cinternal 2 x 47 nF
Max Junction Temperature 175 °C
Fig. 6. Detail of the power board. The two diodes D8 and D9 are close to
eachother.
B. VON sampling method III. RESULTS
One key point of the proposed setup is the accurate During the tests, the converter work in regenerative
measurement of the on voltage (VON) of SW1L, through conditions: the current flow from LEG2 to LEG1 with the sign
sampling of the signal VDS in Fig. 1. The system adopted for indicated in Fig. 1. In other words, LEG2 behaves as a buck
sampling VON is represented in Fig. 5. An operational amplifier converter, while LEG1 behaves as a boost converter.
in a differential configuration measures the difference between
the drain and the source terminals of SW1L. When the switch A. Mapping of RON via a sequence of current pulses
is OFF, the two diodes D8 and D9 block the OFF voltage to Characterization of RON versus junction temperature and
protect the measurement system from over voltage. When ON current is done by repeating a set of current pulses at
SW1L is ON, the two diodes are polarized by identical currents different values of case temperature, starting from 145 °C and
provided by the current mirror (U13B and U14A) so that the repeating the current sequence at every 5 °C down to 25 °C.
amplifier can measure the VON with no effect of the diodes The heatsink is preliminarily heated to 145 °C using two
voltage drop. As said, the two diodes (labels D8 and D9 in Fig. external heating resistors, not visible in Fig. 3.
6) are polarized so to have the same voltage drop. A small
residual difference was off-line calibrated prior to the tests. The DBC substrate temperature (or “case temperature”) is
About the temperature effect on voltage drop of D8 and D9, measured with the NTC1 resistor embedded in the module.
the two diodes can be considered at the same temperature; due When the target case temperature is reached (say 145°C), the
to their proximity. It is important that the slew rate of the heating resistors are shut off and current screening at junction
operational amplifier is high enough to switch from saturated temperature 145°C begins. Thirty-five current pulses of short
to linear output at every turn ON of the power component. An duration (150 μs each) are closed loop controlled in the H-
OPA 357 by TI with a 150 V/μs was chosen for this setup. bridge, from 1 A to 35 A, and the on voltage and current of
SW1L are measured at each current pulse to evaluate the RON.
10V 10V The 150 μs pulse duration ensures that the junction
temperature does not vary with respect to the measured case
R98 temperature. The time lag between one pulse and the following
U13B U14A
2k
Q1 3.3V one is 100 ms, so that the any residual perturbation of the
junction temperature is canceled before the next pulse occurs.
D10
R99 D6 The 1 A to 35 A current screening is completed in a total of
2k C48
2nF
R46
130k
C45
R40
5k1
3.5 s (see Fig. 7), during which the case temperature remains
5.6pF
3.3V
reasonably constant, as confirmed by measurements.
D8 R41 R96
DRAIN After the first current scan is completed, the heatsink fans
2k 3k
U15
+ EN +
ADC
are turned on until the case temperature reaches the next level
D9 R43 R97
-
of 140 °C. The current screening is repeated at the new
SOURCE
2k 3k
temperature, and so on. The test is stopped at a case
3.3V
R45 5k1
temperature of 25 °C. The complete test sequence is shown in
C47
2nF
R44
130k
C49 5.6pF Fig. 8 for one of the modules under test. At low current values
D7 (range 1.0 to 3.0 A) the measurement of voltages and currents
is more imprecise and so is the RON estimate.
Fig. 5. Schematic of measurement system for the VON
stable respect to the conducted current at constant temperature,
as show in Fig. 12 and Fig. 13.
a) b)
Fig. 9. a) Measured RON as a function of junction temperature and current for
Fig. 7. Impulsive current test for mapping the Ron. iSW1L=5 A/div t=200 module #1. b) Same for module #2.
ms/div
Fig. 10. Measured values of RON as a function of ࣄJunction for module #1.
Fig. 11. Measured values of RON as a function of ࣄJunction for module #2.
Fig. 8. Impulsive current test for mapping the RON (module #1).
B. RON comparison between the two modules
The results of the impulsive module scan described above
are reported in the form of an RON map, function of the Fig. 12. Measured values of RON as a function of iDS for module #1.
junction temperature and the current. Fig. 9 reports the RON
maps obtained for the different types of SiC MOSFETS under
test (module #1 and module #2). Besides having a lower on
resistance, module #1 is also more insensitive to temperature
than module #2. Comparing the two modules in terms of
resistance value would be incorrect because they have different
current ratings, but some consideration can still be made in
percentage terms. According to Fig. 10, the on resistance of
module #1 increases by 36 % when the temperature varies
from 35 °C to 145 °C at its rated current of 26 A. On the other
hand, according to Fig. 11 the on resistance of module #2 Fig. 13. Measured values of RON as a function of iDS for module #2.
increases by 84 % when the temperature varies from 35 °C to
145 °C, at rated current of 19 A. For both modules the RON is
C. dv/dt test
The possibility of high dv/dt of SiC power MOSFETs is an
opportunity that often turns into a curse, due to related
problems of electromagnetic interference, switching
overvoltages, line reflections and so on. Dealing with the field
of electrical drives, electrical machines tend to suffer the high
voltage slew-rate imposed by the converter resulting in
premature aging of the insulations and the excitement of
parasitic capacitances that can lead to impulsive common mode
currents. High voltage slew rate combined with the use of long
cables can lead to significant over voltages at the end of the Fig. 14. Module #1 turn-off, behavior of VDS for different values of gate
resistor.
cables [6]-[7]. For this reason, it is important find a
compromise between increasing the dv/dt to reduce the
switching losses and mitigating the problems discussed above.
Different values of gate resistance were tested to evaluate
the voltage slew-rate and peak overvoltage at turn-OFF. The
results are summarized in Table II for the two types of
modules. The maximum voltage slew rate for module #1 is
31 kV/μs and it is obtained during the turn-ON with a rated
current of 10 A and a gate resistor of 5 . The maximum
voltage slew rate for the module #2 is 50.5 kV/μs and it is
obtained during the turn-ON with a rated current of 5 A.
Unfortunately the slew-rate rejection of the gate driver is up to Fig. 15. Module #2 turn-off, behavior of VDS for different values of gate
resistor.
50 kV/μs, and this limited the capability of testing module #2
above such limit. A new driver board with augmented dv/dt
transient immunity is under design.
Peak over voltage during the turn-OFF is limited in all
tested conditions, despite the high slew-rate voltages. This
thanks to the optimized layout of the power loop within the
modules, mainly a merit of the dc-link capacitor embedded into
the module (green rectangles in Fig. 2). The module #2 can
reach higher levels of voltage slew rate: compared to
module #1 this means a potential for lower switching losses.
However, underdamped oscillations and 40% peak overvoltage
are observable at the turn-ON of module #2, with RG=15 and Fig. 16. Module #1 turn-on, behavior of VDS for different values of gate
iDS=25 A (Fig. 17). This shows that further increasing the dv/dt resistor.
of module #2 is hardly doable, despite the good layout of the
module.
Table II: Summary results collected dv/dt test
Power Module #1
Rg=10 19.5 kV/μs (10 A) //// 19.5 kV/μs (30 A)
Turn-ON
Rg=5 31 kV/μs (10 A) //// 24 kV/μs (30 A)
Rg=10 14.5 kV/μs (10 A) //// 17.5 kV/μs (30 A)
Turn-OFF
Rg=5 18 kV/μs (10 A) //// 23 kV/μs (30 A)
Power Module #2 Fig. 17. Module #2 turn-on, behavior of VDS for different values of gate
resistor.
Rg=39 17 kV/μs (5 A) //// 20.5 kV/μs (25 A)
Turn-ON
Rg=15 50.5 kV/μs (5 A) //// 41.5 kV/μs (25 A)
D. Switching Losses Evaluation
Rg=39 12.5 kV/μs (5 A) //// 18 kV/μs (25 A)
Turn-OFF
Rg=15 15.5 kV/μs (5 A) //// 37.2 kV/μs (25 A) Switching losses can be evaluated by measuring the DC
power absorbed by the module, for example using the
opposition method suggested in [8]. Respect to the standard
double pulse test (DPT) method, the proposed setup has the
advantage of testing the device in its final layout, inside the
module. The DPT is normally performed inserting the device
under test into a testing equipment with its own parasitics, and
with current and voltage probes adding other parasitics to the
power loop. The goodness of the layout is demonstrated by the
switching waveform in Fig. 14-Fig. 17. Unfortunately, at the
time of writing this paper tests are not completed. The main
unforeseen problems were the accuracy of input and output
power measurement when trying to avoid heavy preliminary
filtering of the measured quantities, and the already mentioned
limitations of the present gate drives.
a)
E. Online Monitoring of Junction Temperature
Knowing the junction temperature during operation would
be a powerful source of information for many purposes,
including protection, diagnostics and full exploitation of the
device safe operating area. The literature reports methods
based on Thermal Sensitive Electrical Parameters (TSEPs) [9],
[10], such as switching times or the threshold voltage of the
body diode. Most of the TSEP based techniques are impractical
to apply during operation of PWM power converters used in
b)
industrial applications.
In this work, the RON table of Fig. 9a is used for real-time
estimation of the junction temperature, as reported in Fig. 18.
The junction temperature is estimated in real time using
voltage and current samples, plus the RON table. Index k
indicates the current time sample of the digital controller tk.
This technique was developed at the purpose of testing the SiC
power MOSFET modules safely up to their maximum junction
temperature of 175°C.
c)
The response of the junction temperature estimate to
different current waveforms is reported in Fig. 19. Results for Fig. 19. a),b),c) On-line monitoring of junction temperature for module #1.
saw-tooth step and sinusoidal current waveforms are presented. Continuous blue line represents the estimated junction temperature of SW1L,
The case temperature is constant for all three tests (dashed blue dashed blue line represents the DBC temperature of the module, and the red
line) and the junction temperature follows the current line represents the current of the SW1L.
waveform with the delay of a first order low pass filter.
A similar concept of temperature monitoring was proposed
The good results reported here for SiC MOSFETs also tell in [11] for CoolMOS devices, but without addressing the
that this online temperature monitoring concept applies to Si- dependency of RON from the drain current, that is not negligible
MOSFETs, that have a more pronounced dependency of the here, and using imprecise datasheet data or additional hardware
RON from the junction temperature [1]. A computationally for accurate RON identification.
efficient implementation of the block diagram of Fig. 18 can be
obtained by replacing the LUT ࣄjunction= f(RON, iDS) with a
F. Repeatability of test
similar one where vDS is used in place of RON: ࣄjunction = f(VDS,
iDS). This releases the MCU from one division operation per The RON characterization was repeated three times for
sampling cycle. module #2 to evaluate the robustness and repeatability of the
proposed method. The resulting three look-up tables are used
in Fig. 20 for on-line temperature monitoring during the same
test, with load current of rectangular type. The junction
temperature estimate from the three look-up tables is the same.
It is possible to notice how the graphics overlay very well at
high current levels, and less perfectly at low current. This is
due to the lower precision of VON and IDS measurements at low
currents.
Fig. 18. Block diagram of the on-line temperature monitor.
Fig. 20. Temperature estimation using three different look-up-tables, made Fig. 22. Junction temperature estimation during a current step of 25 A
during three different tests (module #2) (module #2)
G. Insensitivity to the DBC temperature sensor position
Besides the main case temperature sensor NTC1 embedded
into the module, an additional sensor named NTC2 was later
included for measuring the temperature of the die SW1L in a
more intimate way (Fig. 2). The NTC2 has been placed as
close as possible to the die (Fig. 21), right under the bonding
wires.
The characterization of the module has been repeated using
the output of the NTC2 resistor instead of NTC1 as case
temperature, and another RON look-up table has been produced. Fig. 23. Junction temperature estimation with sinusoidal current reference
The comparison of the new look-up table with the old ones (module #2)
tells that the RON is well estimated in both cases. Subsequently, The results of Fig. 22 and Fig. 23 also tell that the proposed
the on-line temperature monitoring test was repeated to method for RON characterization is insensitive to the placement
compare the output of the two look-up tables, the one obtained of the NTC sensor within the power module. In particular, the
with the NTC1 and the new one obtained with NTC2. Fig. 22 proposed method applies to commercial power modules, taking
reports the results of the test, made using a current step advantage of standard NTC resistors normally included in the
reference. A similar test is show in Fig. 23, where a sinusoidal module.
current reference was used.
Efforts for using one NTC for direct measurement of the
The two tests show that the junction temperature estimates junction temperature fall short: the difference between the
confirm each other correctness, as the respective temperature junction temperature and the NTC2 temperature is as high as
maps where obtained using different NTC resistors in very 50 – 70°C or more, depending on operating conditions.
different positions for the measurement of the case
temperature. The case temperature waveforms, as measured
from NTC1 and NTC2, are reported in Fig. 22 and Fig. 23, IV. CONCLUSION
confirming that NTC2 is way more intimate to the SiC die than
NTC1, but far away from correctly estimating the die This work presents a setup and a test methodology for the
temperature. comprehensive characterization of SiC power MOSFET
modules. Dealing with dv/dt and switching overvoltages, the
results of the paper show that the layout of the module and the
presence of embedded capacitors can mitigate these problems a
lot. The on-state resistance was characterized comprehensively
via a new testing sequence, based on current pulses of short
duration and measurement of the case temperature with a
standard NTC embedded into the module. The inverse of the
resistance look-up table was used for on-line estimation of the
junction temperature during operation. Future work will focus
on the application of the proposed concepts to commercial
converters, because no expensive laboratory equipment is
involved in the tests, and because, in principle, the
characterization procedure can included in the commissioning
routines of any converter. The results of this work aim at
Fig. 21. Local NTC resistor label as “NTC2” in Fig. 2 positioned near the providing useful insights towards the broader application of
SW1L.
SiC MOSFET modules in high-speed AC motor drives.
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