Practice Problems

1. A frequency divider consists of a 160 MHz clock generator which is fed to a scale-of-16
counter. The most-significant-bit (MSB) of the counter is connected to the input clock of a
scale-of-1000 counter which is made of three decade counters. Determine the time periods of
the outputs from each counter.
[Ans: Time period at the output of scale-of-16 counter is 0.1µs
Time period at the output of 1st decade counter is 1 µs
Time period at the output of 2nd decade counter is 10 µs
Time period at the output of 3rd decade counter is 100 µs]

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2. A 4 2 digit seven-segment LED display uses diodes where each diode requires a 10 mA forward
current. Calculate the total supply current required for displaying 18888.
[Ans: 300 mA]

3. The analog full-scale voltage for an 8-bit digital code is 4 V. Calculate the resolution of the
conversion; analog levels represented by the MSB (most-significant-bit), the LSB (least-
significant-bit) and 11001000; and the digital full-scale voltage.
[Ans: Resolution = 15.625 mV, MSB = 2 V, LSB = 15.625 mV, 11001000 = 3.125 V, digital
full-scale voltage = 4 V – 15.625 mV = 3.9844 V]

4. A linear-ramp generator ADC has a 10-bit register, a 200 kHz clock generator, and a 5 V
maximum input level. During time duration t1, counting register counts clock pulses, and during
time duration t2, the register holds the value. If the minimum t2 is to be approximately 10% of
the maximum t1, determine a suitable ramp amplitude, ramp slope and ramp time period.
[Ans: Ramp amplitude = 5.5 V, Ramp slope = 977.517 V/sec, Ramp time period = 5.6265 ms]

5. A digital-ramp generator ADC uses an 8-bit register and a 1 MHz clock generator. During time
duration t1, counting register counts clock pulses, and during time duration t2, the register holds
the value. If the minimum t2 is to be approximately 20% of the maximum t1, determine a suitable
period for the control input.
[Ans: 306 µs]

6. A 4-bit R-2R DAC has Rf = R = 4 kΩ, and Vref = 8 V. Determine the digital inputs for the DAC
to give analog outputs (v0) of 1.5 V and 5 V. Also determine the current from the Vref, and the
output currents for the DAC inputs of 0001 and 0101.
[Ans: Input for Vo of 1.5 V is 0011, Input for Vo of 5 V is 1010, Current from Vref is 2 mA, Output
current for 0001 input is 0.125 mA, Output current for 0101 input is 0.625 mA]
7. A ramp generator type digital voltmeter has a 200 kHz clock and a 3-digit LED display. During
time duration t1, counting register counts clock pulses, and during time duration t2, the register
holds the value. Determine suitable time duration t1 when the maximum input is 1 V. If t2 is to
be approximately 20% of the maximum t1, determine a suitable frequency for the ramp
generator.
[Ans: t1 = 4.995 ms; Ramp generator frequency = 166.834 Hz]

8. A dual-slope integrator type digital voltmeter has a 200 kHz clock frequency. During time
duration t1, the integrator capacitor charges to input voltage, and during time duration t 2, the
integrator capacitor discharges to zero. The counting register counts clock pulses during t2,
which is proportional to the input voltage. The frequency divider with division ratio of 4096
generates integrator control waveform. Calculate the frequency of the integrator control
waveform, the value of t1 and the number of clock pulses that occur during t1.
If an ideal opamp integrator is used, the integrator output voltage is expressed as, 𝑣𝑜 (𝑡) =
1
− 𝑅𝐶 ∫ 𝑣𝑖 (𝑡)𝑑𝑡. For 1 V analog input voltage, determine the duration t2 and the number of clock
 pulses during t2. Assume, R = 20 kΩ, C = 1 µF, and discharge current for integrator capacitor
is 100 µA.
[Ans: Frequency of integrator control waveform = 48.828 Hz; t1 = 10.24 ms; Number of clock
pulses during t1 = 2048; t2 = 5.12 ms; Number of clock pulses during t2 = 1024]

9. A digital frequency meter displays a count of 366. The time-base generator has a 2 MHz clock
generator whose frequency is divided by five decade counters and one flip-flop. Calculate the
gate time (or counting time) and the measured frequency. Determine the count that would be
displayed if the flip-flop is removed from the time-base generator.
[Ans: Gate time = 0.1 sec; Measured frequency = 3.66 kHz; After removing the flip-flop from
the time-base generator, count that will be displayed is 183]