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MC1121 100ma Charge Pump Voltage Converter With Shutdown: Features

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21 views8 pages

MC1121 100ma Charge Pump Voltage Converter With Shutdown: Features

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© © All Rights Reserved
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MC1121

100mA Charge Pump Voltage


Converter with Shutdown
The MC1121 is a charge pump converter with 100mA output
current capability. It converts a 2.4V to 5.5V input to a corresponding
negative output voltage. As with all charge pump converters, the
MC1121 uses no inductors saving cost, size, and reducing EMI. http://onsemi.com
An on–board oscillator operates at a typical frequency of 10kHz (at
VDD = 5V) when the frequency control input (FC) is connected to
ground. The oscillator frequency increases to 200kHz when FC is
connected to VDD, allowing the use of smaller capacitors. Operation at
sub–10kHz frequencies results in lower quiescent current and is
accomplished with the addition of an external capacitor from OSC (pin
7) to ground. The MC1121 can be driven from an external clock
connected OSC. Typical supply current at 10kHz is 50µA, and falls to
Micro8
less than 1µA when the shutdown input is brought low, whether the
DM SUFFIX
internal or an external clock is used. The MC1121 is available in a CASE TBD
Micro–8 package. PRELIMINARY INFORMATION

Features PIN CONFIGURATION


• Converts a 2.4V to 5.5V Input Voltage to a Corresponding Negative (Top View)
Output Voltage (Inverter Mode)
• Uses Only 2 Capacitors; No Inductors Required! FC 1 8 VDD
• High Output Current: 100mA CAP+ 2
MC1121
7 OSC

• Selectable Oscillator Frequency: 10kHz to 200kHz GND 3 6 SHDN

• Power–Saving Shutdown Input CAP– 4 5 VOUT

• Optional High–Frequency Operation Allows Use of Small Capacitors


• Low Operating Current (FC = GND): 50µA
• Tested Operating Temperature Range: –40°C to +85°C
Typical Applications
• Laptop Computers ORDERING INFORMATION
• Medical Instruments Device Package Shipping
• Disk Drives MC1121DMR2 Micro–8 2500 Tape/Reel
• µP–Based Controllers
• Process Instrumentation
FUNCTIONAL BLOCK DIAGRAM
+ –
CAP+ C1 CAP–

SHDN
OSC
FC CONTROL Vout
OSC RC
OSCILLATOR SWITCH C2
+
MATRIX
VDD

GND MC1121 LOGIC


CIRCUITS

 Semiconductor Components Industries, LLC, 1999 1 Publication Order Number:


February, 2000 – Rev. 0 MC1121/D
MC1121

PIN DESCRIPTION

ÁÁÁÁÁ
ÁÁÁÁÁÁ
Pin No.
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
Symbol Description

ÁÁÁÁÁ
ÁÁÁÁÁÁ
ÁÁÁÁÁ
1
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁ
FC

ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
Frequency control for internal oscillator, FC = open, FOSC = 10kHz typ; FC = VDD, FOSC = 200kHz
typ, FC has no effect when OSC pin is driven externally

ÁÁÁÁÁ
ÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
2 CAP+ Charge–pump capacitor, positive terminal

ÁÁÁÁÁ
ÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
3 GND Power–supply ground input

ÁÁÁÁÁ
ÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
4 CAP– Charge–pump capacitor, negative terminal

ÁÁÁÁÁ
ÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
5 VOUT Output, negative voltage

ÁÁÁÁÁ
ÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
6 SHDN Shutdown

ÁÁÁÁÁ
ÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
7 OSC Oscillator control input. An external capacitor can be added to slow the oscillator. Take care to

ÁÁÁÁÁ
ÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
minimize stray capacitance. An external oscillator also may be connected to overdrive OSC

8 VDD Power–supply positive voltage input

ABSOLUTE MAXIMUM RATINGS*


Parameter Value Unit
VDD Supply Voltage 6.0 V
Operating Temperature Range –40 to +85 °C
OSC, FC, SHDN Input Voltage –0.3 to (VDD + 0.3) V
Output Short Circuit Duration 10 Sec
Storage Temperature Range –65 to +150 °C
Package Power Dissipation (TA ≤ 70°C) Micro8 mW
Derate by 4mW/°C for TA > 70°C 333
Lead Temperature (Soldering, 10 Seconds) +300 °C
* Maximum Ratings are those values beyond which damage to the device may occur.

ELECTRICAL CHARACTERISTICS (TA = –40°C to +85°C, VDD = 5V ±10% COSC = OPEN, C1, C2 = 10µF, FC = VDD,
SHDN = VIH, unless otherwise noted. Typical values are at TA = 25°C.)
Symbol Characteristic Min Typ Max Unit
IDD Active Supply Current
RL = Open, FC = Open or GND — 50 100 µA
RL = Open, FC = VDD — 0.6 1.0 mA
IDD(SHDN) Shutdown Supply Current (SHDN = 0V) — 0.2 1.0 µA
VDD Supply Voltage 2.4 — 5.5 V
VIH SHDN Logic High Input Voltage VDD x 0.8 — — V
VIL SHDN Logic Low Input Voltage — — 0.4 V
IIN Input Leakage Current µA
SHDN, OSC –1.0 — 1.0
FC Pin –4.0 — 4.0
ROUT Output Source Resistance (IOUT = 60 mA) — 12 20 W
IOUT Output Current (VOUT more negative than –3.75V) 60 100 — mA
FOSC Oscillator Frequency kHz
OSC Open, FC = Open or GND 5.0 10 —
SHDN = VIH, FC = VDD 100 200 —
PEFF Power Efficiency (FC = GND) %
RL = 2kW between VDD and VOUT 93 97 —
RL = 1 kW between VOUT and GND 94 97 —
IL = 60 mA to GND — 92 —
VEFF Voltage Conversion Efficiency (RL = OPEN) 99 99.9 — %

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2
MC1121

APPLICATIONS INFORMATION

Negative Voltage Converter The oscillator runs at 10kHz (typical) when FC and OSC
The MC1121 is typically used as a charge–pump voltage are not connected. The oscillator frequency is lowered by
inverter. C1 and C2 are the only two external capacitors used connecting a capacitor between OSC and GND, but FC can
in the operating circuit (see Figure 1). still multiply the frequency by 20 times in this mode.
An external clock source that swings within 100mV of
2.4 V to 5.5 V VDD and GND may overdrive OSC in the inverter mode.
OSC can be driven by any CMOS logic output. When OSC
FC VDD
is overdriven, FC has no effect.
1 8 Note that the frequency of the signal appearing at CAP+
MC1121
CAP+ OSC
and CAP- is half that of the oscillator. In addition, by
2 7 lowering the oscillator frequency, the effective output
+ resistance of the charge–pump increases. To compensate for
C2 GND SHDN SHDN*
– 3 6 this, the value of the charge–pump capacitors may be
CAP– Vout Vout
increased.
4 5 Because the 5kHz output ripple frequency may be low

C2 enough to interfere with other circuitry, the oscillator
+
frequency can be increased with the use of the FC pin or an
external oscillator. The output ripple frequency is half the
selected oscillator frequency. Although the MC1121’s
NOTES: *SHDN should be tied to VDD if not used.
quiescent current will increase if the clock frequency is
Figure 1. Charge Pump Inverter increased, it allows smaller capacitance values to be used for
C1 and C2.
The MC1121 is not actively regulated. A typical output Capacitor Selection
source resistance of 11.8W means that an input of +5V In addition to load current, the following factors affect the
results in - 5V output voltage under light load, and only MC1121 output voltage drop from its ideal value 1) output
decreases to - 3.8V (typ) with a 100mA load. resistance, 2) pump (C1) and reservoir (C2) capacitor ESRs,
The supplied output current is from capacitor C2 during and 3) C1 and C2 capacitance.
one–half the charge–pump cycle. This results in a The voltage drop is the load current times the output
peak–to–peak ripple of: resistance. The loss in C2 is the load current times C2’s ESR;
VRIPPLE = IOUT/2(fPUMP) (C2) + IOUT (ESRC2) C1’s loss is larger because it handles currents greater than
Where fPUMP is 5kHz (one half the nominal 10kHz the load current during charge–pump operation. Therefore,
oscillator frequency), and C2 = 150µF with an ESR of 0.2W the voltage drop due to C1 is about four times C1’s ESR
ripple is about 90mV with a 100mA load current. If C2 is multiplied by the load current, and a low (or high) ESR
raised to 390µF, the ripple drops to 45mV. capacitor has a greater impact on performance for C1 than
for C2.
Changing Oscillator Frequency In general, as the MC1121’s pump frequency increases,
The MC1121’s clock frequency is controlled by four capacitance values needed to maintain comparable ripple
modes: and output resistance diminish proportionately.
FC OSC Oscillator Frequency Cascading Devices
Open Open 10kHz To produce greater negative magnitudes of the initial
FC = VDD Open 200kHz supply voltage, the MC1121 may be cascaded (see Figure 2).
The resulting output resistance is approximately equal to the
Open or External Reduced from 10kHz or
FC = VDD Capacitor 200kHz depending on FC state sum of individual MC1121 ROUT values. The output voltage
(where n is an integer representing the number of devices
Open External Clock External Clock Frequency
cascaded) is defined by
VOUT = - n (VIN).

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3
MC1121

MC1121 Vin+ MC1121


“1” “n”

FC VDD FC VDD
1 8 1 8

CAP+ OSC CAP+ OSC


2 7 2 7
+ +
C1 GND SHDN SHDN* C1n GND SHDN SHDN*
3 6 3 6

CAP– Vout CAP– Vout Vout


4 5 4 5

C2 C2
+ +
NOTES: *SHDN should be tied to it’s respective VDD if not used.

Figure 2. Cascading MC1121s to Increase Output Voltage

Paralleling Devices capacitor C1, but the reservoir capacitor C2 serves all
To reduce output resistance, multiple MC1121s may be devices. The value of C2 should be increased by a factor of
paralleled (see Figure 3). Each device needs a pump n (the number of devices).

MC1121 Vin+ MC1121


“1” “n”

FC VDD FC VDD
1 8 1 8

CAP+ OSC OSC CAP+ OSC


2 7 2 7
+ +
C1 GND SHDN *SHDN C1n GND SHDN SHDN*
3 6 3 6

CAP– Vout CAP– Vout


4 5 4 5

Rout = Rout (of MC1121)/n(number of devices)


C2
NOTES: *SHDN should be tied to VDD if not used. +

Figure 3. Paralleling MC1121s to Reduce Output Resistance

Combined Positive Supply Multiplication and Negative Vin+


Voltage Conversion
D1, D2 = 1N4148
Figure 4 shows this dual function circuit, in which FC VDD
1 8
capacitors C1 and C2 perform pump and reservoir functions MC1121 D1
to generate the negative voltage. Capacitors C2 and C4 are CAP+ OSC
+ 2 7
the respective capacitors for the multiplied positive voltage. C1 Vout = Vin–
This particular configuration leads to higher source GND Vout
3 5
impedances of the generated supplies due to the finite C2
impedance of the common charge–pump driver. CAP– SHDN SHDN* +
4 6

Vout = (2Vin) –
C3 (VFD1) – (VFD2)
+
D2 +
NOTES: *SHDN should be C4
tied to VDD if not used.
Figure 4. Combined Positive
Multiplier and Negative Converter

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4
MC1121

TAPE AND REEL INFORMATION

Component Taping Orientation for Micro–8 Devices

USER DIRECTION OF FEED

PIN 1

Standard Reel Component Orientation


for R2 Suffix Device
(Mark Right Side Up)

Tape & Reel Specifications Table

Package Tape Width (W) Pitch (P) Part Per Full Reel Diameter

Micro–8 12 mm 4 mm 2500 13 inches

MARKING

MC1121DMR2

1121

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5
MC1121

PACKAGE DIMENSIONS

Micro8
PLASTIC PACKAGE
CASE TBD
ISSUE TBD
PIN 1

.122 (3.10) .197 (5.00)


.114 (2.90) .187 (4.80)

.026 (0.65) TYP.

.122 (3.10)
.114 (2.90)

.043 (1.10)
MAX. .008 (0.20)
6 ° MAX.
.005 (0.13)

.006 (0.15)
.016 (0.40) .002 (0.05) .028 (0.70)
.010 (0.25) .016 (0.40)
Dimensions: inches (mm)

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6
MC1121

Notes

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7
MC1121

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without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular
purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability,
including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be
validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others.
SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or
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alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer.

PUBLICATION ORDERING INFORMATION


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8

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