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Homework 1 Template

The document outlines the requirements for Homework 1 of ECE 599, focusing on the design of a double pulse test circuit for wide bandgap (WBG) devices. It includes sections on device introduction, key component design, gate drive design, and a preferred group implementation plan. The document emphasizes the importance of various components such as load inductors, DC sources, capacitors, and gate drive ICs, along with operational conditions for testing.

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26 views2 pages

Homework 1 Template

The document outlines the requirements for Homework 1 of ECE 599, focusing on the design of a double pulse test circuit for wide bandgap (WBG) devices. It includes sections on device introduction, key component design, gate drive design, and a preferred group implementation plan. The document emphasizes the importance of various components such as load inductors, DC sources, capacitors, and gate drive ICs, along with operational conditions for testing.

Uploaded by

foof faaf
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as DOCX, PDF, TXT or read online on Scribd
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ECE 599 Characterization of WBG Devices

Homework 1 ― Double pulse test circuit (including gate drive) design

Group number:

Group member:

Date:

1. Device introduction

Necessary device information needed before DPT circuit design

2. DPT key components design and control

2.1. Load inductor

Please depend on the core and winding provided in the lab

2.2. DC source

2.3. DC capacitor bank

2.3.1. Energy storage capacitor

2.3.2. Decoupling capacitor

2.4. Bleeder resistor

2.5. Double-pulse control duration as a function of operating conditions

Four operation conditions (min dc voltage + min load current; min dc voltage + max load

current; max dc voltage + min load current; max dc voltage + max load current)

3. Gate drive design

3.1. Signal isolator

3.2. Isolated power supply

3.3. Gate drive IC (gate drive IC may include signal isolator, if so, please make it clear)
3.4. Gate resistor

3.5. Decoupling capacitor

4. Preferred group implementation plan with reasoning

It is okay or even recommended to have different plans within the group

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