DM74LS138 • DM74LS139 Decoder/Demultiplexer

August 1986
Revised March 2000

DM74LS138 • DM74LS139
Decoder/Demultiplexer
General Description Features
These Schottky-clamped circuits are designed to be used ■ Designed specifically for high speed:
in high-performance memory-decoding or data-routing Memory decoders
applications, requiring very short propagation delay times.
Data transmission systems
In high-performance memory systems these decoders can
be used to minimize the effects of system decoding. When ■ DM74LS138 3-to-8-line decoders incorporates 3 enable
used with high-speed memories, the delay times of these inputs to simplify cascading and/or data reception
decoders are usually less than the typical access time of ■ DM74LS139 contains two fully independent 2-to-4-line
the memory. This means that the effective system delay decoders/demultiplexers
introduced by the decoder is negligible. ■ Schottky clamped for high performance
The DM74LS138 decodes one-of-eight lines, based upon ■ Typical propagation delay (3 levels of logic)
the conditions at the three binary select inputs and the
DM74LS138 21 ns
three enable inputs. Two active-low and one active-high
enable inputs reduce the need for external gates or invert- DM74LS139 21 ns
ers when expanding. A 24-line decoder can be imple- ■ Typical power dissipation
mented with no external inverters, and a 32-line decoder DM74LS138 32 mW
requires only one inverter. An enable input can be used as DM74LS139 34 mW
a data input for demultiplexing applications.
The DM74LS139 comprises two separate two-line-to-four-
line decoders in a single package. The active-low enable
input can be used as a data line in demultiplexing applica-
tions.
All of these decoders/demultiplexers feature fully buffered
inputs, presenting only one normalized load to its driving
circuit. All inputs are clamped with high-performance
Schottky diodes to suppress line-ringing and simplify sys-
tem design.

Ordering Code:
Order Number Package Number Package Description
DM74LS138M M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
DM74LS138SJ M16D 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
DM74LS138N N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
DM74LS139M M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
DM74LS139SJ M16D 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
DM74LS139N N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

© 2000 Fairchild Semiconductor Corporation DS006391 www.fairchildsemi.com

DM74LS138 • DM74LS139
Connection Diagrams
DM74LS138 DM74LS139

Function Tables
DM74LS138 DM74LS139
Inputs Inputs
Outputs Outputs
Enable Select Enable Select
G1 G2 (Note 1) C B A YO Y1 Y2 Y3 Y4 Y5 Y6 Y7 G B A Y0 Y1 Y2 Y3
X H X X X H H H H H H H H H X X H H H H
L X X X X H H H H H H H H L L L L H H H
H L L L L L H H H H H H H L L H H L H H
H L L L H H L H H H H H H L H L H H L H
H L L H L H H L H H H H H L H H H H H L
H L L H H H H H L H H H H
H L H L L H H H H L H H H
H L H L H H H H H H L H H H = HIGH Level
L = LOW Level
H L H H L H H H H H H L H X = Don’t Care
H L H H H H H H H H H H L
Note 1: G2 = G2A + G2B

Logic Diagrams
DM74LS138 DM74LS139

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 DM74LS138 • DM74LS139
Absolute Maximum Ratings(Note 2)
Note 2: The “Absolute Maximum Ratings” are those values beyond which
Supply Voltage 7V the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Input Voltage 7V Characteristics tables are not guaranteed at the absolute maximum ratings.
Operating Free Air Temperature Range 0°C to +70°C The “Recommended Operating Conditions” table will define the conditions
for actual device operation.
Storage Temperature Range −65°C to +150°C

DM74LS138 Recommended Operating Conditions

Symbol Parameter Min Nom Max Units
VCC Supply Voltage 4.75 5 5.25 V
VIH HIGH Level Input Voltage 2 V
VIL LOW Level Input Voltage 0.8 V
IOH HIGH Level Output Current −0.4 mA
IOL LOW Level Output Current 8 mA
TA Free Air Operating Temperature 0 70 °C

DM74LS138 Electrical Characteristics

over recommended operating free air temperature range (unless otherwise noted)
Typ
Symbol Parameter Conditions Min Max Units
(Note 3)
VI Input Clamp Voltage VCC = Min, II = −18 mA −1.5 V
VOH HIGH Level Output Voltage VCC = Min, IOH = Max, VIL = Max, VIH = Min 2.7 3.4 V
VOL LOW Level VCC = Min, IOL = Max, VIL = Max, VIH = Min 0.35 0.5
V
Output Voltage IOL = 4 mA, VCC = Min 0.25 0.4
II Input Current @ Max Input Voltage VCC = Max, VI = 7V 0.1 mA
IIH HIGH Level Input Current VCC = Max, VI = 2.7V 20 µA
IIL LOW Level Input Current VCC = Max, VI = 0.4V −0.36 mA
IOS Short Circuit Output Current VCC = Max (Note 4) −20 −100 mA
ICC Supply Current VCC = Max (Note 5) 6.3 10 mA
Note 3: All typicals are at VCC = 5V, TA = 25°C.
Note 4: Not more than one output should be shorted at a time, and the duration should not exceed one second.
Note 5: ICC is measured with all outputs enabled and OPEN.

DM74LS138 Switching Characteristics

at VCC = 5V and TA = 25°C
From (Input) Levels RL = 2 kΩ
Symbol Parameter To (Output) of Delay CL = 15 pF CL = 50 pF Units
Min Max Min Max
tPLH Propagation Delay Time
Select to Output 2 18 27 ns
LOW-to-HIGH Level Output
tPHL Propagation Delay Time
Select to Output 2 27 40 ns
HIGH-to-LOW Level Output
tPLH Propagation Delay Time
Select to Output 3 18 27 ns
LOW-to-HIGH Level Output
tPHL Propagation Delay Time
Select to Output 3 27 40 ns
HIGH-to-LOW Level Output
tPLH Propagation Delay Time
Enable to Output 2 18 27 ns
LOW-to-HIGH Level Output
tPHL Propagation Delay Time
Enable to Output 2 24 40 ns
HIGH-to-LOW Level Output
tPLH Propagation Delay Time
Enable to Output 3 18 27 ns
LOW-to-HIGH Level Output
tPHL Propagation Delay Time
Enable to Output 3 28 40 ns
HIGH-to-LOW Level Output

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DM74LS138 • DM74LS139
DM74LS139 Recommended Operating Conditions
Symbol Parameter Min Nom Max Units
VCC Supply Voltage 4.75 5 5.25 V
VIH HIGH Level Input Voltage 2 V
VIL LOW Level Input Voltage 0.8 V
IOH HIGH Level Output Current −0.4 mA
IOL LOW Level Output Current 8 mA
TA Free Air Operating Temperature 0 70 °C

DM74LS139 Electrical Characteristics

over recommended operating free air temperature range (unless otherwise noted)
Typ
Symbol Parameter Conditions Min Max Units
(Note 6)
VI Input Clamp Voltage VCC = Min, II = −18 mA −1.5 V
VOH HIGH Level VCC = Min, IOH = Max,
2.7 3.4 V
Output Voltage VIL = Max, VIH = Min
VOL LOW Level VCC = Min, IOL = Max
0.35 0.5
Output Voltage VIL = Max, VIH = Min V
IOL = 4 mA, VCC = Min 0.25 0.4
II Input Current @ Max Input Voltage VCC = Max, VI = 7V 0.1 mA
IIH HIGH Level Input Current VCC = Max, VI = 2.7V 20 µA
IIL LOW Level Input Current VCC = Max, VI = 0.4V −0.36 mA
IOS Short Circuit Output Current VCC = Max (Note 7) −20 −100 mA
ICC Supply Current VCC = Max (Note 8) 6.8 11 mA
Note 6: All typicals are at VCC = 5V, TA = 25°C.
Note 7: Not more than one output should be shorted at a time, and the duration should not exceed one second.
Note 8: ICC is measured with all outputs enabled and OPEN.

DM74LS139 Switching Characteristics

at VCC = 5V and TA = 25°C
From (Input) RL = 2 kΩ
Symbol Parameter To (Output) CL = 15 pF CL = 50 pF Units
Min Max Min Max
tPLH Propagation Delay Time
Select to Output 18 27 ns
LOW-to-HIGH Level Output
tPHL Propagation Delay Time
Select to Output 27 40 ns
HIGH-to-LOW Level Output
tPLH Propagation Delay Time
Enable to Output 18 27 ns
LOW-to-HIGH Level Output
tPHL Propagation Delay Time
Enable to Output 24 40 ns
HIGH-to-LOW Level Output

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 DM74LS138 • DM74LS139
Physical Dimensions inches (millimeters) unless otherwise noted

16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
Package Number M16A

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DM74LS138 • DM74LS139
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M16D

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 DM74LS138 • DM74LS139 Decoder/Demultiplexer
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide

Package Number N16E

Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
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