CHAUDHARY RANBIR SINGH UNIVERSITY,

JIND
J-K FLIP FLOP
AND
CMOS
 FLIP-FLOPS
A FLIP FLOP IS A FUNDAMENTAL SEQUENTIAL LOGIC CIRCUIT AND
MEMORY ELEMENT USED TO STORE 1 BIT OF INFORMATION .
TYPES OF FLIP-FLOPS
o SR FLIP-FLOP
o JK FLIP-FLOP
o MASTER SLAVE FLIP-FLOP
o D FLIP-FLOP
o T FLIP-FLOP
 COMMON CHARACTERISTICS OF FLIP FLOP

1. The outputs are always complementary to each other.

2. The circuit has two stable states i.e. set or 1 and reset or
0.
3. If the circuit is in set(1) state, it continues to remain in its
state and similarly if it is in reset(0) state, it continues to
remain in this state until the external signal is changed to
change this state.

SET STATE RESET STATE

 JK flip-flop is a sequential logic circuit, named
after Jack Kilby, that stores and manipulates binary
data, overcoming the limitations of the SR flip-flop
by having no indeterminate state when both inputs
are high, and instead toggling the output.
A gated S R flip flop with the addition of a
clock input circuitry is basically the J k flip
flop. This circuit prevents the invalid output
condition which occurs when both inputs
are high. The new addition here gives us
four possible outputs of the flip flop. The
output may be – No Change, Logic 0, Logic
1 & Toggle.
 where
G1,G2,G3,G4
are Nand gates.
 In characteristics table
of J-K Flip Flop,
we take three inputs Qn, J, K
and one output Qn+1.

Characteristic equation gives

the value of next state Qn+1.
Excitation table for j-k flip flop

We need excitation table when we have to

design counters of various bits. While drawing
excitation table if we know value of previous
state Qn and next state Qn+1, then we can
Find out the corresponding value of J and K.
 ADVANTAGE
o TOGGLE CAPABILITY
o NO INVALID STATES
o REDUCES RACE CONDITION
o Bi-STABLE OPERATION

LIMITATIONS
o COMPLEXITY
o MORE POWER CONSUMPTION
o PROPAGATION DELAY
o LIMITED SCALABILITY

RACE-AROUND CONDITION
The "race-around condition" in a JK flip-flop occurs when both J and K inputs are '1', and
the clock pulse is high for a duration longer than the flip-flop's propagation delay, causing
the output to toggle continuously and unpredictably.
 APPLICATIONS
o Counters: The JK flip-flop can be used in conjunction with other digital
logic gates to create a binary counter. This makes it useful in real-time
applications such as timers and clocks.

o Data storage: The JK flip-flop can be used to store temporary data in

digital systems.

o Synchronization: The JK flip-flop can be used to synchronize data

signals between two digital circuits, ensuring that they are operating on the
same clock cycle. This makes it useful in applications where timing is critical.

o Frequency division: The JK flip-flop can be used to create a

frequency divider, which is a circuit that divides the frequency of an input
signal by a fixed amount. This makes it useful in real-time applications such
as audio and video processing.
 CMOS
• CMOS (complementary metal-oxide semiconductor) is
the semiconductor technology used in the transistors that
are manufactured into most of today's computer
microchips.
• In CMOS technology, both kinds of transistors are used
in a complementary way to form a current gate that
forms an effective means of electrical control.
TYPES OF CMOS
o PMOS
o NMOS
 NMOS
❑ NMOS is built on a p-type substrate with n-type source and
drain diffused on it. In NMOS, the majority of carriers are
electrons. NMOS Transist
❑ When a high voltage is applied to the gate, the NMOS will
conduct.
❑ Similarly, when a low voltage is applied to the gate, NMOS
will not conduct. NMOS is considered to be faster than PMOS,
since the carriers in NMOS, which are electrons, travel twice as
fast as the holes.
 PMOS
❑ P- channel MOSFET consists of P-type Source
and Drain diffused on an N-type substrate.
❑ The majority of carriers are holes. When a high
voltage is applied to the gate, the PMOS will
not conduct. When a low voltage is applied to
the gate, the PMOS will conduct.
❑ The PMOS devices are more immune to noise
than NMOS devices.
 CMOS Working Principle
• In CMOS technology, both N-type and P-type transistors are used to design logic functions.
• The same signal which turns ON a transistor of one type is used to turn OFF a transistor of the other
type.
• This characteristic allows the design of logic devices using only simple switches, without the need for a
pull-up resistor.
• In CMOS logic gates a collection of n-type MOSFETs is arranged in a pull-down network between the
output and the low voltage power supply rail (Vss or quite often ground).
• Instead of the load resistor of NMOS logic gates, CMOS logic gates have a collection of p-type
MOSFETs in a pull-up network between the output and the higher-voltage rail (often named Vdd).
• Thus, if both a p-type and n-type transistor have their gates connected to the same input, the p-type
MOSFET will be ON when the n-type MOSFET is OFF, and vice-versa.
• The networks are arranged such that one is ON and the other OFF for any input pattern as shown in
the figure below.
• CMOS offers relatively high speed, low power dissipation, high noise margins in both states, and will
operate over a wide range of source and input voltages (provided the source voltage is fixed).
 ADVANTAGES AND DISADVANTAGES OF CMOS
ADVANTAGES DISADVANTAGES
• COST EFFECTIVE • POWER LIMITATIONS
• COMPATIBLITY WITH CMOS CIRCUITS • EFFICIENCY TRADE-OFF
• LOW POWER CONSUMPTION • LIMITED FREQUENCY RANGE
• EASY INTERGRATION WITH DIGITAL • DESIGN COMPLEXITY
CONTROL AND SIGNAL PROCESSING
CIRCUITRY ON SINGLE CHIP
 APPLICATIONS OF CMOS
❖ Logic Gates: CMOS inverters serve as the basic building blocks for various digital logic gates
such as AND, OR, NAND, and NOR gates. By combining multiple inverters in specific
configurations, a wide range of logical functions can be implemented, forming the basis for
digital circuits.
❖ Flip-flops and latches: They are essential components in sequential logic circuits, commonly
used for storing and processing data. CMOS inverters are employed in the construction of these
memory elements. The efficiency and low power consumption of CMOS technology make it well-
suited for these applications.
❖ Memory Cells in RAM: CMOS inverters play a crucial role in the design of memory cells
within Random Access Memory (RAM) circuits. SRAM (Static Random Access Memory) and DRAM
(Dynamic Random Access Memory) both utilize CMOS inverters as part of the overall memory cell
design, enabling efficient storage and retrieval of data.
❖ Microprocessors and Integrated Circuits: CMOS technology is widely used in the
fabrication of microprocessors and other integrated circuits (ICs). The CMOS inverter’s low power
consumption and the ability to integrate large numbers of transistors on a single chip make it
ideal for designing complex digital systems. The inverters form the basis for various functional
blocks within these chips, contributing to the overall performance and energy
efficiency of the devices.
PRESENTED BY: MUSKAN(20),SAKSHI(19) PRESENTED TO : DR. MEENU MALIK
MUSKAN(18),VANDANA(17)