Alinco DJ S41 Service ID5810
Alinco DJ S41 Service ID5810
EC10
DJ-S11T/E
Service Manual
CONTENTS
SPECIFICATIONS PC BOARD VIEW
1) General ..................................................................... 2 1) RF U n it ............................................................24~25
ALINCO, I n c
SPECIFICATIONS
430.000-439.995MHz (J Version)
DC Power Source 3.6—4.5 Volte DC (internal battery) 3 6 —4.5 Volts DC (internal battery)
Curient Consumption ; T X /a p p ro x. 30mA(© 5i5V DC) (C Version &EC10) T X /a pp rox. 260mA(Hi Power @5.5V DC)
Dimensions : 55(W )X 100(H) x 28(D)mm without projections 55(W) x 100(H) x 28(D)mm w ilhout projections
Weight : approx. 185g (with three AA drycells) approx. 185g (w ith three A A drycells)
2) Transmitter
Outpul Power : approx. IOmW(with 5.5V DC supply)(C Version & EC 10) approx.. 340mW(with 5.5V DC supply)
3) Receiver
Configuration : Double Conversion Superheterodyne Double Conversion Superheterodyne
Intermediate Frequency First : 23.05M Hz/Second : 450kHz First : 23.05M H z/Second ; 450kHz
Sensitivity : Better than -15dBn (l2 dB SINAD) Better than -15dB|j (12dB SiNAD)
AF Output : Not less than lOOmW (@ 10% distortion © 8 £i) Not less than lOOmW (@ 10% distortion @ 8 £1)
2.
CIRCUIT DESCRIPTION
1) Receiver System
The receiver system is the double superheterodyne.
The first IF is 23.05MHz and the second IF is 450kHz.
1. Front End
The signal from the antenna is passed through a low-pass filter and input to RF
coil L21.
The signal from L21 is amplified by Q10, Q12 and led to the band pass filter, and
led to the first mixer base of Q7.
2. First Mixer
*
The amplified signal (10) by Qio, QtZ is mixed with the first local oscillator signal
(fO-23.05MHz) from the PLL circuit by the first stage mixer Q7 and so is converted
into the first IF signal.
The unwanted frequency band of the first IF signal is eliminated by the monolithic
crystal filter FL1, and led to IF amplifier Q9.
3. IF Circuit
The first IF signal is amplified by Q9, and input to pin 16 of IC2, where it is mixed
*
with the second local oscillator signal (22.6or23.5MHz) and so is converted into
the second IF signal (450kH2).
The second IF signal is output from pin3 of IC2, and unwanted frequency band of
second IF signal is eliminated by a ceramic filter FL2.
The resulting signal is tnen amplified by the second IF limiting amplifier, and
detected by quadrature circuit The audio signal is output from pin9 of IC2,
4. Audio Circuit
The detected signal from IC2 is passed through the low-pass filter and led to the
amplifier Q307, Q306.
Q308 is switched ON/OFF by AFC signal from CPU.
The audio signal is input to the main volume VR301 and amplified by the power
amplifier IC302 to drive the speaker.
The power supply voltage of IC302 is limited by AF regulator consisting of Q304.
The power supply voltage of IC302 is switched ON/OFF by AFP signal from CPU.
5. Squelch Circuit
The noise in the audio signal from IC2 is passed through the squelch control
variable resistor RT2 and input pin8 of IC2.
IC2 includes filler amplifier, high-pass filter and rectifier.
When squelch circuit is close, pin13 of IC2 goes to "High".
When squelch circuit is open or a signal is received, pin13 of IC2 goes to "Low“,
then the signal of pin13 is led to CPU.
3
2) PLL, VCO Circuit
Output frequency of PLL circuit is set by the serial data from microprocessor.
PLL circuit consists of VCO Q101, buffer amplifier Q102.
The pulse wave output of charge pump is converted to DC voltage by PLL loop
filter circuit, and supplied to D102, D103 of varicap diode in VCO unit.
The frequency modulation is executed when audio signal voltage is supplied to the
varicap D104.
When PLL is unlocked, pin7 of IC1 goes to "High".
3) Transmitter System
1. Microphone Amplifier
The voice from the internal or external microphone is !ed to the pre-emphasis
circuit, and then input to the microphone amplifier IC301, which consists of two
operational amplifiers.
The amplified is signal is input to the low-pass filter IC301.
The output from the microphone amplifier is passed through variable resistors
RT301 for modulation adjustment to varicap diode of the VCO.
2. Power Amplifier
The signal from VCO is passed through Tx/Rx switch circuit D3.
The signal is amplified by Q4 and 05, and input to power amplifier 02, 03, 06,
and then passed through the low-pass filter, the antenna switch circuit and the
output low-pass filter.
The unwanted harmonics frequency signal is eliminated by the low-pass filter and
input to fhe antenna.
4) Terminal function of CPU
No. Nam e I/O D e s c r ip tio n H L
1 UPK I F r e q u e n c y U P k e y in p u t A c tiv e
2 DOW NK I F r e q u e n c y D O W N k e y in p u t A c tiv e
3 T X LO W 0 T X o u tp u t p o w e r s w it c h H ig h / L o w Low pow er H ig h p o w e r
4 ' NC - N o U se
5 LB I L o w v o lt a g e d e te c tio n in p u t
6 RXC o P o w e r s u p p ly c o n t r o l lo r F IX A c tiv e
'7 S M T (C A S ) I S m e t e r s ig n a l in p u t
S SD I S D s ig n a l in p u t A c t iv e
9 EECLK 0 E E P R O M d o c k o u tp u t
10 EEDATA o E E P R O M d a ta o u tp u t
11 CBEEP o N o use
12 BEEP o B e e p s o u n d o u tp u t
13 LBSW o
14 BP1" I B a n d p la n 1 in p u t
15 BP2 I B a n d p la n 2 in p u t
16 PSTB 0 P L L !C s tr o b e o u tp u t
17 DATA 0 P L L 1C d a ta o u tp u l
18 CLK o P L L 1C c lo c k o u tp u t
19 TXD 0 C lo n e T X d a ta o u tp u t
20 RXD I C lo n e F IX d a ta in p u t
21 TXC o P o w e r s u p p ly c o n t r o l ( o r T X o u tp u t A c t iv e
22 C LO o P o w e r s u p p ly c o n t r o l t o r C lo n e o u tp u t N o rm a l C lo n e
23 TXA 0 S w itc h e s V C O o u lp u t to T X A c t iv e
24 UL I P L L u n lo c k s ig n a l in p u t A c tiv e
25 RESET I C P U r e s e t in p u t a t w o r it o n re s e t
26 PLLC 0 P o w e r s u p p ly c o n t r o l lo r V C O o u tp u t A c t iv e
27 LA M P 0 L a m p O N / O F F o u tp u t A c t iv e
28 X IN I I n t e r n a l o s c illa t o r in p u t
29 X OUT o I n t e r n a l o s c illa t o r o u lp u t
30 Vss I GND
31 CALLK ! C a li k e y in p u t A c t iv e
32 SCANK I S c a n k e y in p u t A c t iv e
33 VM K I V /M k fiy in p u t A c t iv e
34 LAM PK I L a m p k e y in p u t A c t iv e
35 FK I F u n c t io n k e y in p u l A c t iv e
36 M O N IK I M o n i k e y in p u t A c t iv e
37 SHIFTC 0 V C O s h if t o u tp u t
38 M .M U T E o M ic r o p h o n e m u t e o u lp u t A c tiv e
N o. Nam e I/O D e s c r ip t io n H L
39 AFP 0 P o w e r s u p p ly c o n t r o l f o r A F a m p A c t iv e
40 AFC 0 A F m u te A c t iv e
41 TONE5 0 S u b tc n e s ig n a l o u tp u t
42 TONE4 0 S u b t o n e s ig n a l o u tp u t
43 TONE3 0 S u b t o n e s ig n a l o u tp u t
44 TONE2 0 S u b t o n e s ig n a l o u tp u t
45 TONE1 0 S u b to n e s ig n a l o u tp u t
46 TONEO 0 S u b to n e s ig n a l o u tp u t
47 PTTK I P T T k e y in p u t
48 REF I P L L r e fe r e n c e s e le c t 2 2 .6 M H z 2 3 .5 M H z
49 OPEN - No use
50 OPEN - No use
51 OPEN - No use
52 OPEN - No use
53 OPEN - No use
54 OPEN - No use
55 OPEN ■ No use
56 Si4 0 LC D S E G 14
57 S13 0 LC D S E G 13
58 S12 0 LC D SEG 12
59 S 11 o L C D SEG 11
60 S10 0 LC D SEG 10
61 S9 0 LC D S E G 9
62 S8 0 LC D SEG 6
63 S7 0 LC D S EG 7
64 S6 0 LC D SEG 6
65 S5 0 LC D S E G 5
66 S4 0 LC D SE G 4
67 S3 0 LC D SE G 3
66 S2 0 LC D SEG 2
69 S1 0 LC D SEG1
70 SO 0 LC D SEG 0
71 V cc I P o w e r s u p p ly te r m in a l 3 V
72 VREF I A / D r e fe r e n c e le v e l 3 V
73 GND I A n a lo g g r o u n d
74 COM3 0 LC D C O M 3
75 COM2 0 LCD CO M 2
77 COMO o LC D COMO
70 VL3 o L C D p o w e r s u p p ly
79 VL2 0 L C D p o w e r s u p p ly
80 VL1 L C D p o w e r s u p p ly
0
SEMICONDUCTOR DATA
1) AN77L03M (XA0230)
Voltage Regulator
Block Diagram
CO CO
LU CO
u J u
O u tp u t C o m m o n In p u i
2) AT24C02N (XA0364)
CMOS Serial EEPROM
Block Diagram
AO 1 8 V cc
!B1Vcc -- >
î*î a»© — —1
OCL -
START A1 £ZZ 2 IO 7 TEST
t»| 5ÜA -
STO P ■U
l o g ;c
S fc ftlA L
C O tfT W X A2 cz 3
O
o
6 SCL
LOG*G
IO
DEVICE
ADDRESS
ccmsJ DATA REGISTER GND tzz 4 Z 5 SDA
COMPARATOR
PI «
•21 A1 DATA WCRD
(I) AO AOWVCOLMTEft
Pin Configurations
1 Y DEC h ~ " Pn Name Function
AO to A2 Address inputs
Dcct/ACK SDA Sefiai Daïa
LOGIC -
SCL S e rial Clock
P Test
NC
Test input (GND or V « )
No Cor.nect
3) M38223M4HP
CPU
n n n o u c o fflw w w c o ftM B
- ■ M U o - j o t J í l T l O O - ' f O C J J i y i C n - s l O D l O
i i i î î l î l i i î î î î î î î î î î
(XA0470)
UPK ~6Ô1 SEG10
DOWNK ~59~| SEG11
TX LOW ce ~ 5 sn P34/SEG12
NC CE 57 P35/SEG13
LB, cm co 56 P 3 6 /S E G 1 4
RXC
CE 00 55 P 3 7 /S E G 1 5
SMT cz: ÏO 54 P D 0 /S E G 1 6
SD CE ro 53 P01/SEG17
EECLK CE co 52 P02/SEG18
EEDATA CE 51 P03/SEG19
CBEEP p fT 5D P Û 4 /S E G 2 0
. BEEP I Ï2 ~ 49 P05/SEG21
LBSW ~ÜT X 48 P06/SEG22
BP1
s X 3D P07/SEG23
BP2 f f i X 46 P 1 0 /S E G 2 4
PSTB 16 P11/SEG25
I
DATA P12/SEG26
CH "0
CLK P13/SEG27
TXD 19 P14/SEG28
RXD ~ 2Ô~ P15/SEG29
i i i î î i n i i t n i i i t t t
TJ "O X U "O XJ XI XI XI XI ■o -D
-v| 'vj
2 S ro ro ro ro ro ro ro _t _1
-* o ^ CD ü l 4^ CO ro —*■ o jn
£ £ 03 co
O O m m
2 O CD O
03 CO
z
4) M64076GP (XA0352)
Dual PLL Synthesizer
Fm-8Û-S20WHz
Locai osGriHifif tevei V ii •20 - -4 dBm
V cc-2.7-5.5V
Vin—20—4<®ni
Local a K ta f a r n i * * f r a i p m y Rn 00 - 520 fcfrü
Vcc--2.7-5.5V
Vcc*«2.7-5.5V
Xin ,npiit tevei Ver F nn -5 0-25M H r 0.4 - Î.4 Vp-p
StnÈwave
V c o 2 .7 -5 .5 V
Xm r p u t frequency Fxin 10 - 25 MHz
V x in * 0 .4 -V ‘W p-p
Equivalent Circuit
— D a t a la tc h (1 7 b it)
I
Local 2
F in 2 ( 1
p r o g r a m m a b le d iv id e r
D a t a la tc h (1 6 b it)
R e fe re n c e fre q u e n c y 2
p r o g r a m m a b le d iv id e r
R e fe r e n c e fre q u e n c y 1
p r o g r a m m a b le d iv id e r
i
D a t a la tc h ( 1 6 b il)
Local 1
p r o g r a m m a b le d iv id e r
' l~ ~
D a t a la tc h ( I 7 b it ) (vj) GND
GND
9
5) NJM2070M (XA0210)
Low Voltage Power Amplifier
Equivalent Circuit
V + - 6 V , T a = 2 5 + /- 2 ° C
S u p p t y v o lt a g e V+ 1 .B - 15 V
IcSe c u r r e n t R L=°o IQ - 4 7 mA
O u t p u ! v o lt a g e Vo - 2 ,7 - V
I n p u t b ia s c u r r e n t Id 200 - nA
T H D = 1 0 % , t= 1 k H z V + - 6 V , R L = 4 il 0 .5 Û .6 - W
V + = 4 .5 V , R L - 4 Ü 0 .3 2 - W
V + = 3 V , R L = 4 fi - 120 - mW
O u tp u ! p o w e r Po
V + = 2 V , R L = * 4 il - ' 30 - mW
T H D -1 % , (.1 k H z V + = 6 V , H L -4 Î1 - 500 - mW
V + -4 .5 V , R L = 4 Ii - 250 - mW
D is to r tio n P O - 0 .4 W , H L = 4 £ Î , f= 1 k H z TH D - 0 .2 5 - %
V o lt a g e g a in f= 1 k H z Av 41 44 47 dB
I n p u t im p e d a n c e f- lk H z Z lN 100 - - k i2
E q u iv a le n t in p u t n o is e R s = 1 0 k il A c u rv e Vn1 - ' 2 .5 - nv
v o lt a g e
B = 2 2 H z to 2 2 k H z Vn2 - 3 - nv
P o w e r s u p p ly v o lt a g e
l= 1 0 0 H z , C x = 1 0 0 m.F SVR 24 30 - dB
re je c t io n ra tio
P o w e r g a in b a n d w id t h
R L -8 a Po=250m W P .B - 2G 0 - kH z
(- 3 d B )
6) NJM2100M (XA0209)
Dual Operational Amplifiers
V- 4
Equivalent Circuit
7) RN5VL25AA-T1 (XA0309)
C-MOS Voltage Detector
Equivalent Circuit
VDD ■
U T T U"
OUT VDD VSS
RL5VL25AA
8) TA31136FN (XA0404)
Low Power FM IF
Block Diagram
//// j//
#1 *
a a T* f I f GW
BB O'
2SA1576 2SC3366 2_SC4Q81_ 2SÇ4213A 2SC 4226 2SC5065 UN511H UN2122
" XTÖ094 XTÛ142 ]X T 0 Q S 5 " " x T û ib ï” ’ x tÔ Ï3 7 " X Ü Ô Î 66 X. Ü
. .Ó
. .Í6
. 7'
C C C ‘ c” ” c” c C
g___ __Q__ J 3 ___ , _Q _ ___ B _ ___S ___
FR R25 BR AA R24 MAO 6P 7B
“H — E T S — S' 'S — B " ■Q— B ~ □ □ S — S ’ ~Q — S LW
B E B E B E B E B E B E B E B E
UN5214 XN_1_1_ 1 M_ X D 0 1 3 .4 .
.XU0052. XÜQÓ46’ H V Ü ’359 "
” c'” 62 E ¡31
□ n a n
8D EK
LB ^ ~S~ S '
B E C2 Cl
10) LCD
LCD Pattern
,M Q o r LOW
!B D B APO Q
f OOcn
S
OO ImJiimJLmfi!S
t n &
BUSY
M1 M2 M3 M4
2 - COM2 - -
3 - - COM3 -
4 - - - COM4
5 B m 0 M
6 2E 2G 2F 1B , C
7 2C 2B 2A 2D
B APO MS LO W M6
9 3F 3G 3E iB U S Y l
10 3A 3B 3C 3D
11 4F 4G 4E M1
12 4A 4B 4C AD
13 5F 5G 5E M2
14 5A 5B 5C 5D
15 6F 6G 6E DP
16 6A 6B 6C 6D
17 7F 7G 7E M3
18 7A 7B 7C 7D
19 75 50 25 M4
EXPLODED VIEW AF0005
1) Front Assembly
AF0005
ST0075Z
AFGG05
MRCL02AA
MBCLQ2AA \
ES0011AZ
FG0164
FG0161 TG0021
NK0053
TW0Û07B FG0221
AN0012
FG0107
s o ld e r
PR0237 (T)
SD0044
AFÛ005
SDO044
M0ALO4GG
YZ0139
FM0150
KZ0065Y{J) KZ0066Y
KZ0066Y(T.T2,C,EC10)
2) Rear Assembly 1
TW 0008
FG 0132
FG 0108 S 00041 1
* T *
TZ0059
FG0132
i
T
EA0062
(D J -S 1 1 )
EA0050A
(D J -S 4 1 .E C 1 0 )
The black-marked side
should be installed upside.
KB0063
3) Rear Assembly 2
DJ-S4I DJS1J
pficaiogj PR03C9(E)
Pfl0303(C.ECl0)
DJS4I DJ-Sll
DscoaafT2j,c) DSQ3a7A0T)
050372EKT) 0S03M(E)
DS0373A(EC 10)
- AX0004
AX0004 KF0032
’f - « — A X 0 0 0 4
AX0004
■FM0066
\b
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Ref. Ref.
d. Distortion M eter
5. Power Meter
Measurable frequency: 1kHz
Measurable frequency: Up to 500MHz
Input level: Up to 40dB
Impedance: 5012
Distortion level: 1% ~ 100%
Power: 1W or more
e. A udio G enerator
6. Speaker Output frequency: 1kHz ~ 10kHz
Impedance: 8Q Output impedance: 600Q
Note:
1. 5.5V of power voltage is supplied from DC jack.
2. The transmitter system should be adjusted or inspected in high power.
2) Adjustment F o r D J -S 4 1 T /T 2 /{J )/(C ) & E C 1 0
M e a s u re m e n t A d ju s tm e n t
Item C o n d itio n Specifics rtions
Equipment Unit Terminal Unit Parts Method
f=435.05 TX(J)(T)
SSG
t=434.05 TX (C)(£Cio)
Squelch Distortion Meter -15dB^>Close
Output: -12dB// RF ANT RF RT2 SQ Open
Oscilloscope -9dB/j <O pen
Mad: ON
Level Meter
(=435.05 RX(J}{T)
f =¡434.05 RX (C)iecio) All digits are lit
S meter CPU RT302
Out put: +l2dB /i up.
Mod: ON
1.7±0.1V(J).
*1:Extend the coil L102 so that the P.D. voltage becomes ■{ 1.3±0.1{C)(EC10).
0.8±0.1 V{T).
*2:Switching to Low power
( J ) ......................... Press RPT key while transmitting.
(T )......................... Press SCAN key while transmitting.
(C)(EC10) ..............NoTX power selector
3) Adjustment Points For DJ-S41T/T2/(J)/(C) & EC10
RF Unit
CN1 (Antenna Connector)
CPU Unit
23
PC BOARD VIEW
1) RF Unit
Component side For DJ-S41 T/T2/(J)/(C) & EC10
zi
Solder side For DJ-S41 T/T2/(J)/(C) & EC10
25
For DJ-S41T/T2/(J)/(C)
SV50-*
SVÎ0Ï
svice
SV30»
sv m
H 5ä?0 ■
«3 5 4
Solder side
For DJ-S41T/T2/(J)/(C)
( N o t l o r ECl 0)
27
3) CPU Unit later version Component side For DJ-S41 T/T2/(J)/(C) & EC10
2&
4)vco unit nxrœ
For DJ-S41T7T2/(J)/(C) & EC 10
Component side
30
CURCUIT DIAGRAM
1) RF Unit
For DJ-S41T/T2/(J)/(C) & EC10
9W
ru*i
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For DJ-S11T/E
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No.
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SSW ! C hasi CJI2 C liS il ChipC. C1BMJB1E223R»
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UP03MC PCB CJM cw eiT ChipC. ci«œcifiH3swa
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CJ)1 C&SJ2 Chip T in u l w a m tm C-iii CUîJH ta«»a CWCalBlKlCKTA
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CSfM CU3CÜ3 ch ip e . ClCeSCHlffLDUTA CJ<9 c iîw ? ChîfC. C tifiJB LE U îK tA
C3ÛS C tüM T Chip C. c m r a iH B im £360 CKQ!3 C fçTm U i THCVAlAîiSVTR
L Ï* essai ChipTorital TMOUÆCÎOÈMTK C3»l ra w s Chef' T ïrL ii racsAicjoanv.
O ff! CÜS6(7 ChipC. CWMJBlffWÎFCTA C352 03017 CüpC. CMOSJBlItlCBKTA
CW CKW C hipïnndjl m c s A ic iæ v r R CÎ53 m m OipC. CJEMCBiHaUTA
OS CUSB5 ChipC. C16WB1HKHKTA CS4 CLr» J ChipC. CI6Û8CU1HEUTA
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C3S3 e tm s ChipC. c t t w jm m r r A J tW ï L’JW U S P J *\
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C3iî CII5H7 " ChipC. C16Û9JB1H103KTA QS1I XTCC« T m n iP st J3A1S7SA T M S
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CPU Unit
Rof. Rof.
For DJ-S11T/E
No. P aris No. D escription Parts Namo Vor. N o. Piirts No. D e s c r ip tio n P jrts Nuxno Vur.
QJOS X tfB H TrirwisUf t w a im R»9 SKSÏÏ6 Chip E. h l b o s h u iiv
Cj ù
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M echanical P a ils / Packing
Ret. Parts No. Description Parts Namo Var. Rei. Vor.
Purls No. Description Parts Name
For DJ-S11T/E
No. No.
tw w a O vir Kutier
m o te B.ittiry K rttr/
TZ0C69 Iniuii-iirr- SF'vi
TKB73 InulltilA
P ackin g
Ss>it fW 1
OSnKi Spfe.Shti! E
IIHWMA Fhture
HttMffl UjwCartm
H.H0I33B Ilint Cjrtu IOx Cs
HP«« ftsWft* Bi,
(WOM Fjçiiinwo Cud T
m ai FCC Part 15Sul T
m m CEL»W E
isnœi lmiruciui Mituil
m ou LitjNmrAit Sul
FP0106 Fill C«p
ftBMK Brti Clip Screw
a sm raw ^ b t
saou Hand Slr.ip
ADJUSTMENT
For DJ-S11T/E
d. Distortion Meter
5. Power Meter
Measurable frequency: 1kHz
Measurable frequency: Up to 500MHz
Input level: Up to 40dB
Impedance: 5 0fi
Distortion level: 1% —100%
Power: 1W or more
e. Audio G enerator
6. Speaker
Output frequency: 1kHz~10kHz
Impedance:
Output impedance: 600Q
Note:
1. 5.5V of power voltage is supplied from DC jack.
2. The transmitter system should be adjusted or inspected in high power.
a
2) Adjustment For DJ-S11T/E
Measurement Adjustm ent
Item Condition
Equipment Unit Terminal Unit Parts Method
f=1 46.00 RX
See *1 0 .9 - 1.1V
Reference f=145.00 TX
Freq. Counter RF TC5 t= 145.00 ±100H z
Frequency
TX Power f=145.00 TX
Poer Meter RF ANT - - Check 340mW or more
Hi
DC=5.5V
f=145.00 TX
f=145.05 RX
f= 145.05 RX
SSG
Squelch Distortion Meter -15dB/i>Close
Output:-12dB/i RF ANT RF RT2 SQ Open
Oscilloscope -9dB/i <Oper>
Mod: ON Level Meter
(=145.05 RX
*1 :Extend the coil L102 so that the P.D. voltage becomes 1.0+0.1 V
39
3) Adjustment Points For DJ-S11T/E
RF Unit
CN1 (Antenna Connector)
L102 (PDAdj.)
TC4 (Sensitivity)
TP2 (PD test point)
CPU Unit
40
PC BOARD VIEW
1) RF Unit
Component side For DJ-S11T/E
Solder side For DJ-S11T/E
2) CPU UNIT
Component side
For DJ-S11T/E
43
For DJ-S11T/E
3) VCO Unit raiTES
Component side Solder side
4) s w Unit ______
For DJ-S11T/E
Component side
CURCUIT DIAGRAM
1) RF Unit BForBDJ-S11T/E
B nB
2) CPU UNIT For DJ-S11T/E
DISPLAY
HKTñ
iW ¡sîï-
«Í3
jo
MÎTÏ
lira
47
3/ius-na joj nun OOA (e
BLOCK DIAGRAM
For DJ-S11T/E
UNIT
CPU
RF UNIT
x a/xt
49
ALINCO, INC.
Head Office : "TW IN 2 1 ” MID Tow er Building 23F
1-61, 2-Chom e, Shiromi, Chuo-ku, O saka 540 Japan
P h o n e :0 6 -9 4 6 -8 1 5 0 F a x :0 6 -9 4 6 -8 1 7 5 Telex: 63086
E -m ail: 101243.1446@ com puserve.com
U.S.A. : 438 Amapola Ave., Suite 130, Torrance, CA 90501-6201, U.S.A.
Phone: 310 -6 18-8616 Fax: 310-618-8758
htt p :// w ww .al inco.co m/
Germ any : Eschborner Landstrasse 55, 60489 Frankfurt am Main, Germany
Phone: 069 -7 86018 Fax: 069-7 89-6076 6
Dealer/Distributor
C o p y r i g h t 1 9 9 7 A l in e o , I n c . O s a k a J a p a n PM0040A
P r i n t e d in J a p a n