Post-Lab:

Circuit of example 2-

Solution of Post-lab problem -1:

Method:
The gain in decibels (dB) is defined as the ratio of the output voltage and input voltage expressed
in logarithmic scale.

dB = 20log ( VV )
out

Now, if we want to plot gain in decibels when the voltage source’s magnitude isn’t unity, then
instead of plotting dB(V 2) ,we have to plot dB(V 2 /V 1).Then for finding out cutoff frequency, we
observe the frequency where the gain if -3dB.
Circuit Image: Using 6V voltage source,

Circuit Netlist:

Output:
 0

(12.711K,-3.0032)

-20

-40
100Hz 300Hz 1.0KHz 3.0KHz 10KHz 30KHz 100KHz 300KHz 1.0MHz
DB(V(2) / V(1))
Frequency

The cutoff frequency is approximately 12.711 KHz.

Checking whether cut-off frequency depends on voltage source or not:
The formula to calculate cut-off frequency in a RC circuit as used in this experiment is,
1
f c=
2 πRC
Where, R is resistance in ohm and C is capacitance value in F.
As seen from the formula, it can be seen that cut-off frequency depends on circuit parameters
like resistance, capacitor and inductors (when present). It does not depend on voltage source. We
shall also see similar outputs from simulation using 1V voltage source.
 1.0V

(12.716K,707.553m)

0.5V

0V
10Hz 100Hz 1.0KHz 10KHz 100KHz 1.0MHz
V(2)
Frequency

From the graph we can see that cut-off frequency is 12.716 kHz in this circuit also. So cut-off
frequency hasn’t changed even after changing the voltage source. From this, we can confidently
conclude that cut-off frequency doesn’t depend on voltage source.

Solution:
Theoretical calculation for cut-off frequency:
1
f =¿
2 πRC
1
¿ −6
2 π ×1.59 ×100 ×10

= 1000.974 Hz
So, the cut-off frequency is 1000.97 Hz.
Determining cut-off frequency from Voltage vs Frequency plot:
Circuit image:

Circuit Netlist:

1.0V

(1.0000K,706.762m)

0.5V

0V
10Hz 30Hz 100Hz 300Hz 1.0KHz 3.0KHz 10KHz 30KHz 100KHz
V(2)
Frequency
Result Analysis:
V1 1
The frequency which results in a voltage drop of ∨ ∨¿0.707V will be the cut-off
√2 √2
frequency of the circuit . 1Krad/s results in a voltage drop of .706762V. Thus the cut-off
frequency is approximately 1000Hz, which is very close to the cut-off frequency we got from the
calculation.

Diagram of Cascaded circuit

Circuit Netlist:
The normalized gain vs frequency plot of the cascaded circuit:

(3.5481K,0.000)
(951.382,-3.0326) (13.352K,-3.0185)

-20

-40
10Hz 100Hz 1.0KHz 10KHz 100KHz 1.0MHz
DB(V(3)/MAX(V(3)))
Frequency

The center frequency is 3.5481 KHz.

The lower cut-off frequency is 951.382(approximately) and higher cut-off frequency is
13.352kHZ (approximately) .
1.Schematic Diagram of Circuit-a:
The value of inductor, capacitor and resistor is chosen arbitrarily to get suitable plot to observe.
Gain(decibel) vs frequency graph using schematics:
0

-40

-80
100Hz 300Hz 1.0KHz 3.0KHz 10KHz 30KHz 100KHz 300KHz 1.0MHz
DB(V(2))
Frequency

Netlist of circuit-a:
Gain(decibel) vs Frequency plot using netlist:
0

(1.3019K,-3.0459)

-40

-80
100Hz 300Hz 1.0KHz 3.0KHz 10KHz 30KHz 100KHz 300KHz 1.0MHz
DB( V(2))
Frequency

Filter Identification: As seen from the graph, the filter has gain value close to zero when
frequency is low and gain decreases as frequency increases. So, it’s a Low-Pass filter.

2.Schematic Diagram of circuit-b:

Gain(decibel) vs frequency plot using schematics:
-0

-40

-80

-120
10Hz 100Hz 1.0KHz 10KHz 100KHz 1.0MHz 10MHz
DB(V(2))
Frequency

Circuit Netlist:
Gain(decibel) vs Frequency plot using netlist:

-0

(48.151K,-3.0387)

-40

-80

-120
10Hz 100Hz 1.0KHz 10KHz 100KHz 1.0MHz
DB(V(2))
Frequency

Filter Identification:
The filter has gain value close to zero when frequency is high and gain value way lower at lower
frequency. So it’s a High-pass filter.

3.Schematic Diagram of circuit-c:

Gain(decibel) vs Frequency plot using schematics:
0

(1.5849K,-3.1613u)
(155.052,-3.0879) (16.298K,-3.0503)

-20

-40
10Hz 100Hz 1.0KHz 10KHz 100KHz 1.0MHz
DB(V(3))
Frequency

Circuit Netlist:
Gain(decibel) vs Frequency plot using netlist:

(1.5849K,-3.1613u)
(157.618,-3.0099) (16.656K,-3.1543)

-20

-40
10Hz 100Hz 1.0KHz 10KHz 100KHz 1.0MHz
DB(V(3))
Frequency

Filter Identification: The filter has two cut-off frequencies and max frequency at 1.5849kHz
which means it allows signals near 1.5849kHz to pass with minimal attenuation while
suppressing others. Thus, this is a band pass filter.
Schematic diagram of circuit-d:
Gain(decibel) vs frequency plot using schematics:

-0

-40

-80

-120
1.0nHz 10nHz 1.0uHz 100uHz 10mHz 1.0Hz 100Hz 10KHz 1.0MHz 100MHz
DB(V(2))
Frequency

Circuit Netlist:
Gain(decibel) vs Frequency Plot using netlist:

-0

(776.247m,-8.6195u)
(158.108u,-3.0392) (1.6592M,-3.1948)

-40

-80

-120
1.0nHz 1.0uHz 1.0mHz 1.0Hz 1.0KHz 1.0MHz 1.0GHz
DB(V(2))
Frequency

Filter Identification: This is a band pass filter.

Schematic diagram of circuit-e:

Gain(decibel) vs Frequency plot:
0

-2.0

(1.5849K,-3.8477)

-4.0
1.0KHz 3.0KHz 5.0KHz 7.0KHz 9.0KHz
DB(V(2))
Frequency

Circuit Netlist:
Gain(decibel) vs Frequency plot using netlist:

-2.0

-4.0
1.0KHz 3.0KHz 5.0KHz 7.0KHz 9.0KHz
DB(V(2))
Frequency

Filter Identification: This is band-stop filter.

Schematic diagram of circuit-f:
Gain(decibel) vs Frequency plot:
0

-40

-80
10Hz 100Hz 1.0KHz 10KHz 100KHz 1.0MHz
DB(V(2))
Frequency

Circuit Netlist:
Gain(decibel) vs Frequency graph using Netlist:
0

-40

-80
100Hz 300Hz 1.0KHz 3.0KHz 10KHz 30KHz 100KHz 300KHz 1.0MHz
DB(V(2))
Frequency

Filter Identification: This is a band stop filter.

Schematics Diagram of the designed RLC (second order) filter:

Circuit Netlist:

Gain(decibel) vs Frequency plot:

0

(5.0463K,-17.355m)
(159.248,-3.0124) (159.248K,-3.0175)

-20

-40
10Hz 100Hz 1.0KHz 10KHz 100KHz 1.0MHz 10MHz
DB(V(2))
Frequency

Determination of cut-off frequency and filter type: The lower cut-off frequency is 159.248Hz
and the higher cut-off frequency is 159.248kHz. The center frequency is 5.0463K. At low
frequencies (below ~100 Hz), the gain is low (around -20 dB), meaning the filter blocks low-
frequency signals. In the mid-frequency range (around 1 kHz to 100 kHz), the gain is high (close
to 0 dB), meaning the filter allows signals in this range to pass with little attenuation. At high
frequencies (above ~1 MHz), the gain again drops (back to -20 dB), blocking high-frequency
signals. This is the nature of a band-pass filter.
Lab Assignments:
Task-1: Designing a Low-pass filter with cut-off frequency 104 Hz .
Schematic Diagram of the circuit:

Netlist of the circuit:

Voltage vs Frequency plot:
0

(4.2170K,-705.820m)

-10

-20

-30
10Hz 30Hz 100Hz 300Hz 1.0KHz 3.0KHz 10KHz 30KHz 100KHz
DB(V(2))
Frequency

Task-2: Designing a High-pass filter with cut-off frequency 102 Hz .

Schematic Diagram of the circuit:
Circuit Netlist:

Voltage vs Frequency plot:

1.0V

(1.0000K,706.762m)

0.5V

0V
10Hz 30Hz 100Hz 300Hz 1.0KHz 3.0KHz 10KHz 30KHz 100KHz
V(2)
Frequency

Task-3: Cascading the HPF and LPF to make a band-pass filter:

Schematic Diagram of the cascaded circuit:

Netlist of the Circuit:

Voltage vs Frequency Plot:

1.0V
(3.1985K,833.321m)

(1.1559K,706.530m) (8.6509K,707.036m)

0.5V

0V
10Hz 30Hz 100Hz 300Hz 1.0KHz 3.0KHz 10KHz 30KHz 100KHz
V(3)
Frequency

Discussion:

While doing this experiment, we explored how to perform a frequency sweep in PSPICE and
used it to identify different types of filters, such as low-pass, high-pass, band-pass, and band-stop
filters. We also had to determine the cutoff frequencies for each type of filters.

The filters acted as non-ideal filters, meaning that instead of an abrupt drop to zero at the cutoff
frequency, the output voltage decreased gradually. During the AC sweep setup in the schematics,
we selected a decade sweep instead of a linear sweep because they result in smoother and more
precise graph. For most circuits, we applied a 1V input voltage, making the gain equivalent to
the output voltage, which made it easier to find cut-off frequencies. However, in circuits with
input voltages other than unity, we calculated the gain by dividing the output voltage by the input
voltage. We plotted the gain in decibels and located the cutoff frequency at the point where the
gain was very close to -3 Db.

When choosing the start and stop frequencies for the sweep, we ensured the range included the
cutoff or center frequencies to correctly identify the filter type from the plot. Sometimes the
range selected had to be done by trial and error process since we had to arbitrarily choose the
value of the passive elements of the circuit. The filters weren’t active since the only had passive
element on them. We also observed that the cutoff frequency depends only on the filter’s
characteristics and not on the input voltage, as gain is a ratio of output to input voltage.
After completing the post lab tasks, we also had to add lab-assignments which included
designing LPF and HPF of given frequency and then cascade those two to make a Band-pass
filter which only allows the passage of a certain range of frequencies. We also had to add the
netlists of the designed filters.

conclusion, the PSPICE results closely matched our theoretical predictions, indicating the
experiment was carried out successfully. This lab enhanced our understanding of various filter
types, their behaviors, and the process of designing basic filter circuits.