18ec62-Module 2 Final
18ec62-Module 2 Final
VI Semester
2018 Scheme
Prepared By:
Dr. Madhumathy P
Associate Professor,
Department of ECE
RVITM, Bengaluru – 560076
Email: madhumathyp.rvitm@rvei.edu.in
RV Institute of Technology and Management®
Module 2
Embedded System Design Concepts
Syllabus:
Characteristics and Quality Attributes of Embedded Systems, Operational quality attributes, non-
operational quality attributes, Embedded Systems-Application and Domain specific, Hardware Software
Co-Design and Program Modeling, embedded firmware design and development.
a designed manner to bring the controlled output variables to the desired level.
The event may be a periodic one or an unpredicted one. If the event is an unpredicted one,
then such system should be designed in such a way that it should be scheduled to capture the
events without missing them.
Embedded systems produce changes in output in response to the changes in the input. So,
they are generally referred as Reactive Systems.
Real Time System operation means the timing behavior of the system should be
deterministic; meaning the system should respond to requests or tasks in a known amount
of time.
A Real Time system should not miss any deadlines for tasks or operations.
It is not necessary that all embedded systems should be Real Time in operations.
Embedded applications or systems which are mission critical, like flight control systems,
Antilock Brake Systems (ABS), etc. are examples of Real Time systems.
The design of an embedded Real Time system should take the worst-case scenario into
consideration.
Distributed:
The term distributed means that, embedded systems may be a part of larger systems.
Many numbers of distributed embedded systems form a single large, embedded control unit.
o An automatic vending machine is a typical example for this. The vending machine
contains a card reader (for pre-paid vending systems), a vending unit, etc. Each of
them is independent embedded units but they work together to perform the overall
vending function.
o Another example is the Automatic Teller Machine (ATM). An ATM contains a card
reader embedded unit, responsible for reading and validating the user's AIM card,
transaction unit for performing transactions, a currency counter for dispatching/
vending currency to the authorized person and a printer for printing transaction details
We can visualize these as independent embedded systems. But they work together to achieve a
common goal.
Another typical example of a distributed embedded system is the Supervisory Control and
Data Acquisition (SCADA) system used in Control & Instrumentation applications, which
contains physically distributed individual embedded control units connected to a
supervisory module.
Power Concerns:
Power management is another important factor that needs to be considered in designing
embedded systems.
Embedded systems should be designed in such a way as to minimize the heat dissipation
by the system.
The production of high amount of heat demands cooling requirements like cooling fans
which in turn occupies additional space and make a system bulky.
Nowadays ultra-low power components are available in the market. Select the design
according to the low power components like low dropout regulators, and controllers/
processors with power saving modes.
Also, power management is a critical constraint in battery operated applications. The more
the power consumption the less is the battery life.
Quality attribute are non-functional requirements that need to be documented properly in any
system design. If the quality attributes are more concrete and measurable, it will give a positive
impact on the system development process and the product.
The various quality attributes that need to be addressed in any embedded system development are
broadly classified into two, namely 'Operational Quality Attributes' and 'Non-Operational Quality
Attributes'.
Response: is a measure of quickness of the system. It gives an idea about how fast your system is
tracking the changes in input variables.
Most of the embedded systems demand fast response which should be almost Real Time.
For example, an embedded system deployed in flight control application should respond in
a Real Time manner. Any response delay in the system will create potential damages to the
safety of the flight as well as the passengers.
It is not necessary that all embedded systems should be Real Time in response.
For example, the response time requirement for an electronic toy is not at all time critical.
There is no specific deadline that this system should respond wit in this particular timeline.
Throughput: deals with the efficiency of a system. Throughput is defined as the rate of production
or operation of a defined process over a stated period of time.
The rates can be expressed in terms of units of products, batches produced, or any other
meaningful measurements.
In case of a Card Reader, throughput means how many transactions the Reader can perform
in a minute or in an hour or in a day.
Throughput is generally measured in terms of 'Benchmark'.
A 'Benchmark' is a reference point by which something can be measured.
Benchmark can be a set of performance criteria that a product is expected to meet or a
standard product that can be used for comparing other products of the same product line.
Reliability: is a measure of how much % you can rely upon the proper functioning of the system
or what is the% susceptibility of the system to failures.
Mean Time Between Failures (MTBF) and Mean Time To Repair (MTTR) are the terms
used in defining system reliability.
MTBF gives the frequency of failures in hours/ weeks/ months.
MTTR specifies how long the system is allowed to be out of order following a failure.
For an embedded system with critical application need, it should be of order of minutes.
Maintainability: deals with support and maintenance to the end user or client in case of technical
issues and product failures or on the basis of a routine system checkup.
Reliability and Maintainability are considered as two complementary disciplines.
A more reliable system means a system with less corrective maintainability requirements
and vice versa. As the reliability of the system increases, the chances of failure and non-
functioning reduces, thereby the need for maintainability is also reduced.
Maintainability is closely related to the system availability. Maintainability can be
VI- Semester, Embedded Systems Page 5 of 41
RV Institute of Technology and Management®
Security: aspect covers ‘Confidentiality’, 'Integrity', and 'Availability' (The term 'Availability'
mentioned here is not related to the term 'Availability' mentioned under the 'Maintainability'
section).
Confidentiality deals with the protection of data and application from unauthorized
disclosure.
Integrity deals with the protection of data and application from unauthorized
modifications.
Availability deals with protection of data and application from unauthorized users.
A very good example of the 'Security' aspect in an embedded product is a Personal Digital
Assistant (PDA). The PDA can be either a shared resource (e.g. PDAs used in LAB setups)
or an individual one.
If it is a shared one, there should be some mechanism in the form of user name and
password to access into a particular person's profile – An example of' Availability.
Also all data and applications present in the PDA need not be accessible to all users. Some
of them are specifically accessible to administrators only. For achieving this, Administrator
and user level s of security should be implemented – An example of Confidentiality.
Some data present in the PDA may be visible to all users but there may not be necessary
permissions to alter the data by the users. That is Read only access is allocated to all users
– An example of Integrity.
Safety: 'Safety' and 'Security' are confusing terms. Sometimes you may feel both of them as a
single attribute. But they represent two unique aspects in quality attributes.
Safety deals with the possible damages that can happen to the operators, public and the
environment;
due to
o the breakdown of an embedded system,
o the emission of radioactive or hazardous materials from the embedded products.
The breakdown of an embedded system may occur due to a hardware failure or a
firmware failure.
Safety analysis is a must in product engineering to evaluate the anticipated damages and
determine the best course of action to bring down the consequences of the damages to an
acceptable level.
Some of the safety threats are sudden (like product breakdown) and some of them are
gradual (like hazardous emissions from the product).
The quality attributes that needs to be addressed for the product 'not ' on-the basis of operational
aspects are grouped under this category.
The important quality attributes coming under this category are listed below:
Testability & Debug-ability: deals with how easily one can test his/ her design,
application; and by which means he/ she can test it.
For an embedded product, testability is applicable to both the embedded hardware and
firmware.
Embedded hardware testing ensures that the peripherals and the total hardware functions
in the desired manner, whereas firmware testing ensures that the firmware is functioning
in the expected way.
Debug-ability is a means of debugging the product as such for figuring out the probable
sources that create unexpected behavior in the total system.
Debug-ability has two aspects in the embedded system development context, namely,
hardware level debugging and firmware level debugging.
Hardware debugging is used for figuring out the issues created by hardware problems
whereas firmware debugging is employed to figure out the probable errors that appear as a
result of flaws in the firmware.
quality attribute 'Evolvability' refers to the ease with which the embedded product
(including firmware and hardware) can be modified to take advantage of new firmware or
hardware technologies.
Time to prototype and market: is the time elapsed between the conceptualization of a product
and the time at which the product is ready for selling (for commercial product) or use (for non-
commercial products).
The commercial embedded product market is highly competitive and time to market the
product is a critical factor in the success of a commercial embedded product. There may be
multiple players in the embedded industry who develop products of the same category (like
mobile phone, portable media players, etc.). If you come up with a new design and
if it takes long time to develop and market it, the competitor product may take advantage
of it with their product.
Also, embedded technology is one where rapid technology change is happening. If you
start your design by making use of a new technology and if it takes long time to develop
and market the product, by the time you market the product, the technology might have
superseded with a new technology.
Product prototyping helps a lot in reducing time-to-market. Whenever you have a product
idea, you may not be certain about the feasibility of the idea.
Prototyping is an informal kind of rapid product development in which the important
features of the product under consideration are developed.
The time to prototype is also another critical factor. If the prototype is developed faster, the
actual estimated development time can be brought down significantly. In order to shorten
the time to prototype, make use of all possible options like the use of off-the-shelf
components, re-usable assets, etc.
Per unit and total cost: is a factor which is closely monitored by both end user (those who buy the
product) and product manufacturer (those who build the product).
Cost is a highly sensitive factor for commercial products. Any failure to position the cost
of a commercial product at a nominal rate, may lead to the failure of the product in the
market. Proper market study and cost benefit analysis should be carried out before taking
a decision on the per-unit cost of the embedded product.
From a designer/ product development company perspective the ultimate aim of a
product is to generate marginal profit. So the budget and total system cost should be
properly balanced to provide a marginal profit.
The Product Life Cycle (PLC): Every embedded product has a product life cycle which starts
with the design and development phase.
The product idea generation; prototyping, Roadmap definition, actual product design and
development are the activities carried out during this phase.
During the design and development phase there is only investment and no returns.
Once the product is ready to sell, it is introduced to the market. This stage is known as the
Product Introduction stage.
During the initial period the sales' and revenue will be low. There won't be much
competition and the product sales and revenue increases with time. In the growth
phase, the product grabs high market share.
During the maturity phase, the growth and sales will be steady and the revenue reaches its
peak.
The Product retirement/ Decline phase starts with the drop in sales volume; market share
and revenue. The decline happens due to various reasons like competition from similar
product
with enhanced features or technology changes, etc. At some point of the decline stage, the
manufacturer announces discontinuing of the product.
The different stages of the embedded products life cycle-revenue, unit cost and profit in each
stage-are represented in the following Figure 4.1
The control part contains a micro- processor/ controller-based board with interfaces to the
sensors and actuators.
The sensor data is fed back to the control unit and the control unit generates the necessary actuator
outputs. The control unit also provides connectivity to user interfaces like keypad for setting the
washing time, selecting the type of material to be washed like light, medium, heavy duty, etc. User
feedback is reflected through the display unit and LEDs connected to the control board
The functional block diagram o washing machine is shown in the following Figure 4.2.
Washing machine comes in two models, namely, top loading and front loading machines.
In top loading models the agitator of the machine twists back and forth and pulls the cloth
down to the bottom of the tub. On reaching the bottom of the tub the clothes work their
way back up to the top of the tub where the agitator grabs them again and repeats the
mechanism.
In the front loading machines, the clothes are tumbled and plunged into the water over
and over again. This is the first phase of washing.
In the second phase of washing, water is pumped out from the tub and the inner tub uses
centrifugal force to wring out more water from the clothes by spinning at several hundred
Rotations Per Minute (RPM). This is called a 'Spin Phase'.
If you look into the keyboard panel of your washing machine you can see three buttons:
Wash, Spin and Rinse. You can use these buttons to configure the washing stages.
As you can see from the picture, the inner tub of the machine contains a number of holes
and during the spin cycle the inner tub spins and forces the water out through these holes to the
stationary outer tub from which it is drained off through the outlet pipe.
It is to be noted that the design of washing machines may vary from manufacturer to manufacturer,
but the general principle underlying in the working of the washing machine remains the same.
The basic controls consist of a timer, cycle selector mechanism, water temperature selector,
load size selector and start button.
The mechanism includes the motor, transmission, clutch, pump, agitator, inner tub, outer
tub and water inlet valve. Water inlet valve connects to the water supply line using at home
and regulates the flow of water into the tub.
The integrated control panel consists of a microprocessor/ controller-based board with I/O
interfaces and a control algorithm running in it. Input interface includes the keyboard which
consists of wash type selector: Wash, Spin and Rinse; clothe selector: Light, Medium,
Heavy duty and washing time setting, etc.
The output interface consists of LED/ LCD displays, status indication LEDs, etc. connected
to the I/O bus of the controller.
The other types of l/O interfaces which are invisible to the end user are different kinds of
sensor interfaces: water temperature sensor, water level sensor, etc., and actuator interface
including motor control for agitator and tub movement control, inlet water flow control,
etc.
High-speed Electronic Control Units (HECUs): are deployed in critical control units requiring fast
response. They include fuel injection systems, antilock brake systems, engine control, electronic
throttle, steering controls, transmission control unit and central control unit.
Low-speed Electronic Control Units (LECUs): are deployed in applications where response time
is not so critical. They generally are built around low cost microprocessors/ microcontrollers and
digital signal processors. Audio controllers, passenger and driver door locks, door glass controls
(power windows), wiper control, mirror control, seat control systems, head lamp and tail lamp
controls, sun roof control unit etc., are examples of LECUs.
2. Local Interconnect Network (LIN): LIN bus is a single master multiple slave (up to 16
independent slave nodes) communication interface.
LIN is a low speed, single wire communication interface with support for data rates up to
20 Kbps and is used or sensor/ actuator interfacing.
LIN bus follows the master communication triggering technique to eliminate the possible
bus arbitration problem that can occur by the simultaneous talking of different slave nodes
connected to a single interface bus.
LIN bus is employed in applications like mirror controls, fan controls, seat positioning
controls, window controls, and position controls where response time is not a critical issue.
3. Media Oriented System Transport (MOST) Bus: MOST is targeted for automotive audio/
video equipment interfacing, used primarily in European cars.
A MOST bus is a multimedia fibre-optic point-to-point network implemented in a star, ring
or daisy- chained topology over optical fibre cables.
The MOST bus specifications define the physical (electrical and optical parameters) layer
as well as the application layer, network layer, and media access control.
MOST bus is an optical fibre cable connected between the Electrical Optical Converter
(EOC) and Optical Electrical Converter (OEC), which would translate into the optical cable
MOST bus.
2. Tool and Platform Providers: are manufacturers and suppliers of various kinds of
development tools and Real Time Embedded Operating Systems for developing and debugging
different control unit related applications.
Tools fall into two categories, namely embedded software application development tools
and embedded hardware development tools.
Some of the leading suppliers of tools and platforms in automotive embedded applications
are listed below:
Selecting the Model: In hardware software co-design, models are used for capturing and describing
the system characteristics.
A model is a formal system consisting of objects and composition rules. It is hard to make
a decision on which model should be followed in a particular system design. Most often designers
switch between varieties of models from the requirements specification to the
implementation aspect of the system design. The reason being, the objective varies with each phase.
For example, at the specification stage, only the functionality of the system is in focus and not the
implementation information. When the design moves to the implementation aspect, the
information about the system component is is revealed and the designer has to switch to a model
capable of capturing the system's structure.
implementing microcode decoder for decoding the CISC instruction. The datapath for the
CISC processor is complex.
The Reduced Instruction Set Computing (RISC) architecture reuses instruction set
representing simple operations and it requires the execution of multiple RISC instructions
to perform a complex operation. The data path of RISC architecture contains a large
register file for storing the operands and output. RISC instruction set is designed to operate
on registers. RISC architecture supports extensive pipelining.
The Very Long Instruction Word (VLIW) architecture implements multiple functional
units (ALUs, multipliers, etc.) in the datapath. The VLIW instruction packages one
standard instruction per functional unit of the datapath.
Parallel Processing architecture implements multiple concurrent Processing Elements
(PEs) and each processing element may associate a datapath containing register and local
memory.
Single Instruction Multiple Data (SIMD) and Multiple Instruction Multiple Data (MIMD)
architectures are examples for parallel processing architecture.
o In SIMD architecture, a single instruction is executed in parallel with the help of
the Processing Element. The scheduling-of the instruction execution and
controlling of each PE is performed through a single controller. The SIMD
architecture forms the basis of reconfigurable processor.
o On the other hand, the processing elements of the MIMD architecture execute
different instructions at a given point of time. The MIMD architecture forms the
basis of multiprocessor systems. The PEs in a multiprocessor system communicates
through mechanisms like shared memory and message passing.
Selecting the Language: A programming language captures a 'Computational Model' and maps it
into architecture. There is no hard and fast rule to specify which language should be used for
capturing this model. A model can be captured using multiple programming languages like C, C++,
C#, Java, etc. for software implementations and languages like VHDL, System C, Verilog, etc. for
hardware implementations. On the other hand, a single language can be used for capturing a variety
of models. Certain languages are good in capturing certain computational model. For example,
C++ is a good candidate for capturing an object-oriented model. The only pre-requisite in selecting
a programming language for capturing a model is that the language should capture the model
easily.
Partitioning System Requirements into Hardware and Software: It may be possible to implement
the system requirements in either hardware or software (firmware). It is a tough decision-making
task to figure out which one to opt. Various hardware software trade-offs are used for making a
decision on the hardware-software partitioning.
Data Flow Graph/ Diagram (DFG) Model: The DFG model translates the data processing
requirements into a data flow graph.
The Data Flow Graph model is a data driven model in which the program execution is
determined by data. This model emphasizes on the data and operations on the data
transform the input data to output data.
Indeed Data Flow Graph is a visual model in which the operation on the data (process) is
represented using a block (circle) and data flow is represented using arrows. An inward
arrow to the process (circle) represents input data and an outward arrow from the process
(circle) represents output data in DFG notation.
Embedded applications which are computational intensive and data driven are modeled
using the DFG model.
Suppose one of the functions in an application contains the computational requirement
X = a + b; and y = x – c. The following Figure 4.4 illustrates the implementation of a DFG model
for implementing these requirements.
In a DFG model, a data path is the data flow path from input to output.
A DFG model is said to be acyclic DFG (ADFG), if it doesn't contain multiple values for
the input variable and multiple output values for a given set of input(s).
Feedback inputs (Output is fed back to Input), events, etc. are examples for non-acyclic
inputs.
A DFG model translates the program as a single sequential process execution.
Control Data Flow Graph/ Diagram (CDFG) Model: In a DFG model, the execution is
controlled by data and it doesn't involve any control operations (conditionals).
The Control DFG (CDFG) model is used for modeling applications involving conditional
program execution. CDFG models contains both data operations and control operations.
The CDFG uses Data Flow Graph (DFG) as element and conditional (constructs) as decision
makers. CDFG contains both data flow nodes and decision nodes, whereas DFG contains
only data flow nodes. Let us have a look at the implementation of the CDFG for the following
requirement.
If flag = 1, x = a + b; else y = a – b; this requirement contains a decision making process.
The CDFG model for the same is given in the above Figure 4.4.
The control node is represented by a 'Diamond' block which is the decision making element
in a normal flow chart based design. CDFG translates the requirement, which is modeled to
a concurrent process model. The decision on which process is to be executed is determined
by the control node.
A real world example for modeling the embedded application using CDFG is the capturing
and saving of the image to a format set by the user in a digital still camera where everything
is data driven starting from the Analog Front End which converts the CCD sensor generated
analog signal to Digital Signal and the task which stores the data from ADC to a frame
buffer for the use of a media processor which performs various operations like, auto
correction, white balance adjusting, etc. The decision on, in which format the image is stored
(formats like JPEG, TIFF, BMP, etc.) is controlled by the camera settings, configured by the
user.
State Machine Model: The State Machine model is used for modeling reactive or event-driven
embedded systems whose processing behavior is dependent on state transitions. Embedded
systems used in the control and industrial applications are typical examples for event driven
systems.
• The State Machine model describes the system behavior with 'States', 'Events', 'Actions'
and 'Transitions'.
State is a representation of a current situation.
An event is an input to the state. The event acts as stimuli for state transition.
Transition is the movement from one state to another.
Action is an activity to be performed by the state machine.
• A Finite State Machine (FSM) model is one in which the number of states are finite. In
other words the system is described using a finite number of possible states.
As an example let us consider the design of an embedded system for driver/ passenger 'Seat
Belt Warning' in an automotive using the FSM model. The system requirements are
captured as.
When the vehicle ignition is turned on and the seat belt is not fastened within 10 seconds
of ignition ON, the system generates an alarm signal for 5 seconds.
The Alarm is turned off when the alarm time (5 seconds) expires or if the driver/ passenger
fasten the belt or if the ignition switch is turned off, whichever happens first.
Here the states are 'Alarm Off', 'Waiting' and 'Alarm On' and the events are 'Ignition Key
ON', 'Ignition Key OFF', 'Timer Expire', 'Alarm Time Expire' and 'Seat Belt ON'.
Using the FSM, the system requirements can be modeled as given in following Figure 4.5.
Fig 4.6 FSM model for Timer
As seen from the FSM, the timer state can be either 'IDLE' or 'READY' or 'RUNNING'.
During the normal condition when the timer is not running, it is said to be in the 'IDLE'
state.
The timer is said to be in the 'READY' state when the timer is loaded with the count
corresponding to the required time delay. The timer remains in the 'READY' state until a
'Start Timer' event occurs.
The timer changes its state to 'RUNNING' from the 'READY' state on receiving a 'Start
Timer' event and remains in the 'RUNNING' state until the timer count expires or a 'Stop
Timer' even occurs. The timer state changes to 'IDLE' from 'RUNNING' on receiving a
'Stop Timer' or 'Timer Expire' event.
Example 1: Design an automatic tea/ coffee vending machine based on FSM model for the
following requirement.
The tea/ coffee vending is initiated by user inserting a 5 rupee coin. After inserting the coin,
the user can either select 'Coffee' or 'Tea' or press 'Cancel' to cancel the order and take back
the coin.
The FSM representation for the above requirement is given in the following Figure 4.7.
The FSM representation contains four states namely; 'Wait for coin' 'Wait for User Input',
'Dispense Tea' and 'Dispense Coffee'.
The event 'Insert Coin' (5 rupee coin insertion), transitions the state to 'Wait for User Input'.
The system stays in this state until a user input is received from the buttons 'Cancel', 'Tea'
or 'Coffee'.
If the event triggered in 'Wait State' is 'Cancel' button press, the coin is pushed out and the
state transitions to 'Wait for Coin'. If the event received in the 'Wait State' is either 'Tea'
button press, or 'Coffee' button press, the state changes to 'Dispense Tea' or 'Dispense
Coffee' respectively.
Once the coffee/ tea vending is over, the respective states transitions back to the 'Wait for
Coin'
Example 2: Design a coin operated public telephone unit based on FSM model for the following
requirements.
1. The calling process is initiated by lifting the receiver (off-hook) of the telephone unit
2. After lifting the phone the user needs to insert a 1 rupee coin to make the call
3. If the line is busy, the coin is returned on placing the receiver back on the hook (on-hook)
4. If the line is through, the user is allowed to talk till 60 seconds and at the end of 45th second,
prompt for inserting another 1 rupee coin for continuing the call is initiated
5. If the user doesn't insert another 1 rupee coin, the call is terminated on completing the 60
seconds time slot
6. The system is ready to accept new call request when the receiver is placed back on the hook
(on- hook)
7. The system goes to the 'Out of Order' state when there is a line fault. The FSM model
shown in the following Figure 4.8 is a simple representation.
Sequential Program Model: In the sequential programming Model, the functions or processing
requirements are executed in sequence. It is same as the conventional procedural programming.
Here the program instructions are iterated and executed conditionally and the data gets
transformed through a series of operations.
FSMs are good choice for sequential program modeling.
Another important tool used for modeling sequential program is Flow Charts.
The FSM approach represents the states, events, transitions and actions, whereas the Flow
Chart models the execution flow.
Fig 4.9 Implementing a Concurrent Model for the 'Seat Belt Warning' system
Object-Oriented Model: The object-oriented model is an object based model for modeling
system requirements. It disseminates a complex software requirement into simple well defined
pieces called objects.
Object-oriented model brings re-usability, maintainability and productivity in system
design.
In the object-oriented modelling, object is an entity used for representing or modeling a
particular piece of the system. Each object is characterized by a set of unique behavior and
state. A class is an abstract description of a set of objects and it can be considered as a
'blueprint' of an object.
A class represents the state of an object through member variables and object behavior
through member functions. The member variables and member functions of a class can be
private, public or protected.
Private member variables and functions are accessible only within the class, whereas public
variables and functions are accessible within the class as well as outside the class.
The protected variables and functions are protected from external access.
However classes derived from a parent class can also access the protected member functions
and variables. The concept of object and class brings abstraction, hiding and protection.
hardware, like various component interfacing, memory map details I/O port details, configuration
and register details of various hardware chips used and some programming language (low level
assembly language or a high level languages like C/C++/JAVA).
Embedded firmware development process starts with the conversion of the firmware requirements
into a program model using modeling skills like UML or flow chart based representation. The
UML diagrams or flow chart gives a diagrammatic representation of the decision items to be taken
and the tasks to be performed.
Task 1 ();
Task 2 ():
:
:
Task n ();
}
}
From the above 'C' code you can see that the tasks 1 to n are performed one after another and when
the last task (nth task) is executed, the firmware execution is again re-directed to Task 1 and it is
repeated forever in the loop. This repetition is achieved by using an infinite loop. This approach is
also referred as
Another major drawback of 'Super loop based design' approach is the lack of real timeliness.
If the number of tasks to be executed within an application increases, the time at which each
task is repeated also increases. This brings the probability of missing out some events.
o For example in a system with Keypads, according to the 'Super loop design', there
will be a task for monitoring the keypad connected I/O lines and this need not be the
task running while you press the keys. In order to identify the key press, you may
have to press the keys for a sufficiently long time, till the keypad status monitoring
task is executed internally by the firmware. This will really lead to the lack of real
timeliness.
There are corrective measures for this also. The best advised option in use interrupts for
external events requiring real time attention.
a target processor/ controller independent language (C, C++, JAVA, etc.) commonly
known as High Level Language or
a combination of Assembly and High level Language.
The sample code given below using 8051 Assembly language illustrates the structured
assembly language programming. Each Assembly instruction should be written in a separate
line. DELAY: MOV R0, #255 ; Load Register R0 with 255.
o DJNE R1, DELAY ; Decrement R1 and loop till R1
= 0. RET ; Return to calling program.
The Assembly program contains a main routine and it may or may not contain subroutines.
The example given above is a subroutine, which can be invoked by a main program by the
Assembly instruction: LCALL DELAY
o Executing this instruction transfers the program flow to the memory address
referenced by the 'LCALL DELAY'.
It is a good practice to provide comments to your subroutines by indicating the purpose of
that subroutine/ instruction.
While assembling the code a ';' informs the assembler that the rest of the part coming in the
line after the ';' symbol is comments and simply ignore it.
In the above example the label DELAY represents the reference to the start of the subroutine
DELAY. The required address is calculated by the assembler at the time of assembling the
program and it replaces the label.
Label can also be directly replaced by putting the desired address first and then writing the
Assembly code, as given below:
ORG 0100H
MOV R0, #255 ; Load Register R0 with 255.
DJNE R1, DELAY ; Decrement R1 and loop till R1
= 0. RET ; Return to calling program.
The statement ORG 0100H in the above example is not an assembly language instruction;
it is an assembler directive instruction. It tells the assembler that the Instructions from here
onward should be placed at location starting from 0100H. The Assembler directive
instructions are known as 'pseudo- ops'.
assembly instructions.
When a program is too complex or too big; the entire code can be divided into sub- modules
and each module can be re-usable (called as Modular Programming). Modular programs are
usually easy to code, debug and alter.
Source File to Object File Translation: Translation of assembly code to machine code is
performed by assembler. The assemblers for different target machines are different. Assemblers
from multiple vendors are available in market. A51 Macro assembler from Keil software is a
popular assembler for the 8051 family microcontroller.
The various steps involved in the conversion of a program written in assembly language to
corresponding binary file/ machine language is illustrated in the following Figure 4.10.
Absolute address allocation is done at the absolute object file creation stage. Each module
can share variables and subroutines (functions) among them.
Exporting a variable/ function from a module (making a variable/ function from a module
available to all other modules) is done by declaring that variable function as PUBLIC in
the source module.
Importing a variable or function from a module (taking a variable or function from any one
of other modules) is done by declaring that variable or function as EXTREN) in the module
where it is going to be accessed.
Library File Creation and Usage: Libraries are specially formatted, ordered program collections
of object modules that may be used by the linker at a later time. When the linker processes a library,
only those object modules in the library that are necessary to create the program are used. Library
files are generated with extension '.lib'.
Library is some kind of source code hiding technique. If you don't want to reveal the source
code behind the various functions you have written in your program and at the same time
you want them to be distributed to application developers for making use of them in their
applications, you can supply them as library files and give them the details of the public
functions available from the library (function name, function input/output, etc). For using a
library file in a project, add the library to the project.
'LIB51' from K eil Software is an example for a library creator and it is used for creating
library files for A51 Assembler/ C51 Compiler for 8051 specific controller.
Linker and Locater: Linker and Locater is another software utility responsible for "linking the
various object modules in a multi-module project and assigning absolute address to each module".
Linker is a program which combines the target program with the code of other programs
(modules) and library routines.
During the process of linking, the absolute object module is created. The object module
contains the target code and information about other programs and library routines that are
required to call during the program execution.
An absolute object file or module does not contain any re-locatable code or data. All code
and data reside at fixed memory locations. The absolute object file is used for creating hex
files
for dumping into the code memory of the processor/ controller.
'BL51' from Keil Software is an example for a Linker & Locater for A51 Assembler/ C51
Compiler for 8051 specific controller.
Object to Hex File Converter: This is the final stage in the conversion of Assembly language
(mnemonics) to machine understandable language (machine code).
• Hex File is the representation of the machine code and the hex file is dumped into the code
memory of the processor/ controller.
The hex file representation varies depending on the target processor/ controller make.
For Intel processors/ controllers the target hex file format will be 'Intel HEX' and for
Motorola, the hex file should be in 'Motorola HEX' format.
HEX files are ASCII files that contain a hexadecimal representation of target application.
Hex file is created from the final 'Absolute Object File' using the Object to Hex File
Converter utility.
'QH51' from Keil software is an example for Object to Hex File Converter utility for A51
Assembler/ C51 Compiler for 8051 specific controller.
Drawbacks of Assembly Language Based Development: Every technology has its own pros and
cons. From certain technology aspects assembly language development is the most efficient
technique. But it is having the following technical limitations also.
High Development Time: Assembly language is much harder to program than high level
languages. The developer must pay attention to more details and must have thorough
knowledge of the architecture, memory organization and register details of the target
processor in use. Learning the inner details of the processor and its assembly instructions
is highly time consuming and it creates a delay impact in product development.
Developer Dependency: There is no common written rule for developing assembly
language based applications, whereas all high level languages instruct certain set of rules
for
VI- Semester, Embedded Systems (18EC62) Page 35 of 41
RV Institute of Technology and Management®
application development. In assembly language programming, the developers will have the
freedom to choose the different memory location and registers. Also the programming approach
varies from developer to developer depending on his/ her taste.
o For example moving data from a memory location to accumulator can be achieved through
different approaches.
o If the approach done by a developer is not documented properly at the development stage,
he/ she may not be able to recollect why this approach is followed at a later stage or when
a new developer is instructed to analyze this code, he/ she also may not be able to
understand. Hence upgrading an assembly program on a later stage is very difficult.
Non-Portable: Target applications written in assembly instructions are valid only for
that particular family of processors (e.g. Application written for Inte x86 family of
processors) and cannot be re-used for another target processors/ controllers (Say ARM
Cortex M family of processors). If the target processor/ controller changes, a complete
re-writing of the application using the assembly instructions for the new target
processor/ controller is required.
Fig 4.11 Steps Involved in the Conversion of a Program Written in High Level Language
The program written in any of the high level language is saved with the corresponding
language extension (.c for C, .cpp for C++ etc). Any text editor like 'notepad' or 'WordPad
' from Microsoft® or the text editor provided by an Integrated Development (IDE) tool
supporting the high level language can be used for writing the program.
Most of the high level languages support modular programming approach and hence you
can have multiple source files called modules written in corresponding high level language.
Translation of high level source code to executable object code is done by a cross- compiler.
The cross-compilers for different high level languages for the same target processor are
different.
C51 is a popular. Cross-compiler available for 'C' language for the 8051 family of micro
controller. Conversion of each module's source code to correspond- ing object file is
performed by the cross compiler.
Rest of the steps involved in the conversion of high level language to target processor's
machine code are same as that of the steps involved in assembly language based
development.
language. Thus the ramp up time required by the developer in understanding the target
hardware and target machine's assembly instructions is waived off by the cross compiler
and it reduces the development time by significant reduction in developer effort.
High level language based development also refines the scope of embedded firmware
development from a team of specialized architects to anyone knowing the syntax of the
language and willing to put little effort on understanding the minimal hardware details.
With high level language, each task can be accomplished by lesser number of lines of code
compared to the target processor/ controller specific Assembly language based
development.
Developer Independency: The syntax used by most of the high level languages are
universal and a program written in the high level language can easily be understood by a
second person knowing the syntax of the language.
High level languages always instruct certain set of rules for writing the code and
commenting the piece of cadet lf the developer strictly adheres to the rules, the firmware
will be 100% developer independent.
Portability: Target applications written in high level languages are converted to target
processor / controller understandable format (machine codes) by cross-compiler.
An application written in high level language for a particular target processor can easily be
converted to another target processor/ controller specific application, with little or less
effort by simply re-compiling/ little code modification followed by re-compiling the
application for the required processor/ controller.
Mixing Assembly with High Level Language (e.g. Assembly Language with ‘C’): Assembly
routines are mixed with 'C' in situations where the entire program is written in 'C' and the cross-
compiler do not have a built in support for implementing certain features like Interrupt Service
Routine functions (ISR) or if the programmer wants to take advantage of the speed and
optimized code offered by machine code generated by hand written assembly rather than cross
compiler generated machine code.
When accessing certain low level hardware, the timing specifications may be very critical and a
cross- compiler generated binary may not be able to offer the required time specifications
accurately. Writing the hardware/ peripheral access routine in processor/ controller specific
Assembly language and invoking it from 'C' is the most advised method to handle such situations.
Mixing 'C' and Assembly is little complicated; in the sense-the programmer must be aware of how
parameters are passed from the 'C' routine to Assembly and values a returned from assembly
routine to 'C' and how 'Assembly routine' is invoked from the 'C' code.
The following steps give an idea how C51 cross-compiler performs the mixing of Assembly code
with 'C':
Write a simple function in C that passes parameters and returns values the way you want
your assembly routine to.
Use the SRC directive ( #PRAGMA SRC at the top of the file) so that the C compiler generates
an .SRC file instead of an .OBJ file.
Compile the C file. Since the SRC directive is specified, the .SRC file is generated. The
.SRC file contains the assembly code generated for the C code you wrote.
Rename the .SRC file to .A51 file.
Edit the .A51 file and insert the assembly code you want to execute in the body of the
assembly function shell included in the .A51 file.
Mixing High level language with Assembly (e.g. 'C' with Assembly Language): Mixing the code
written in a high level language like 'C' and Assembly language is useful in the following scenarios:
The source code is already available in Assembly language and a routine written in a high
level language like 'C' needs to be included to the existing code.
The entire source code is planned in Assembly code for various reasons like optimized code,
optimal performance, efficient code memory utilization and proven expertise in handling the
Assembly, etc. But some portions of the code may be very difficult and tedious to code in
Assembly. For example 16-bit multiplication and division in 8051 Assembly Language.
To include built in library functions written in 'C' language provided by the cross compiler.
For example: Built in Graphics library functions and String operations supported by 'C'.
Inline Assembly: Inline assembly is another technique for inserting target processor/ controller
specific Assembly instructions at any location of a source code written in high level language ‘C’.
This avoids the delay in calling an assembly routine from a ‘C’ code. Special keywords are used
to indicate the start and end of Assembly instructions. C51 uses the keywords #pragmam asm
Compiler versus Cross-Compiler: Compiler is a software tool that converts a source code written
in a high level language on top of a particular operating system running on specific target processor
architecture (e.g. Intel x86/ Pentium). Here the operating system, the complier program and the
application making use of the source code run on the same target processor. The source code is
converted to the target processor specific machine instructions. The development is platform
specific (OS as well as target processor on which the OS is running). Compilers are
generally termed as 'Native Compilers'. A native compiler generates machine code for the same
machine (processor) on which it is running.
NOTE: The term 'Compiler' is used interchangeably with 'Cross-compiler' in embedded firmware
applications. Whenever you see the term 'Compiler' related to any embedded firmware application,
please understand that it is referring the cross-compiler.