Nguyen 2011
Nguyen 2011
1, JANUARY 2011
Abstract—An input filter is necessary for a matrix converter Input filter designs for MC guarantee near-unity power factor
(MC) system to improve the input current quality with low har- operation on the power supply side by improving the main input
monic components, as well as to reduce the input voltage distortion current quality, which has sinusoidal waveforms containing low
supplied to the MC. However, the input filter’s characteristics
make the input power factor (IPF) obtained at unity only in the harmonic components, and by reducing distortion of input volt-
presence of high output loads, and the IPF degrades significantly ages that are supplied to the MC module [5], [6]. The presence
under light-load conditions. In this paper, we propose a new direct of input filter in the direct ac–ac power conversion, which has
space vector modulation (DSVM) method to achieve the required no energy storage, can cause the instability during operations
displacement angle between the input voltage and input current [7]–[11]. In [12] and [13], the input filter design for sliding
of the MC. A new switching strategy is introduced based on the
maximum compensated angle. Then, power factor compensation mode controlled MC considered the maximum allowable dis-
algorithms using the new DSVM method to achieve the maximum placement angle introduced by the filter and the controllable
IPF are presented, in which compensation algorithm I is based on IPF capability, as well as the ripple presented in capacitor
using the input filter and power supply parameters to estimate voltages. The authors in [14] proposed an integration of MC
the optimal compensated angle. Compensation algorithm II is with filters that provides lower electromagnetic interference,
subsequently proposed using a proportional–integral controller
to overcome drawbacks presented in compensation algorithm I. lower common-mode current, and lower shaft voltage.
Simulation and experimental results are shown to validate the However, the basic hardware limitation of the input filter
effectiveness of the proposed compensation algorithms. still exists, which results in a displacement angle between input
Index Terms—Direct space vector modulation (DSVM) method, line-to-neutral voltage and input line current at the main power
input filter, matrix converter (MC). supply. Consequently, the IPF at the power supply could be far
from the desired power factor of unity. In particular, in the case
I. I NTRODUCTION of low-output-power condition, the IPF at the power supply
would decrease significantly.
TABLE I By similar analysis, the SCs selected to obtain vo are +1 (d3 )
P OSSIBLE SC S AND V ECTORS U SED IN THE MC
and −3 (d4 ) with the following duty ratios:
2q sin kv π3 − αo sin π6 − αi − δ − (ki − 1) π3
d3 = √
3 cos(δ)
(12)
π π
2q sin kv 3 − αo sin 6 + αi − δ − (ki − 1) 3
π
d4 = √ .
3 cos(δ)
(13)
d5 = 1 − (d1 + d2 + d3 + d4 )
(2kv −1)π (ki −1)π
2q cos αo − 6 cos αi − δ − 3
= √ (14)
3 cos(δ)
Fig. 3. (a) Output line-to-neutral voltage vector. (b) Input line current vector.
TABLE II
S WITCHING PATTERNS FOR THE I NPUT VOLTAGE AND C URRENT V ECTORS L OCATED IN THE S AME S ECTOR
Fig. 4. (a) Output line-to-neutral voltage vector. (b) Input current and voltage vectors at different sectors.
Table III shows all possible switching patterns if the desired As seen from (20), corresponding to each voltage transfer
input current vector and input voltage vector are located in ratio q, there exists a possible maximum compensated displace-
different sectors. ment angle between the desired input current vector and the
input voltage vector. However, the new DSVM method is only
C. Maximum Compensated Angle validated if the input voltage vector leads the input current
vector to one sector, i.e., δ ≤ π/3. The maximum compensated
The duty ratio of the zero SC has to be positive to validate angle is given by
the DSVM method. Considering the fact that d5 ≥ 0, we obtain
(20) from (14) and (19) √ √
√ cos−1 2q
√
3
, 4
3
≤q≤ 2
3
δmax = √ (21)
3 cos(δ)
q≤ . (20) π/3, 0<q≤ 3
4 .
2
From
√ (20), the maximum voltage transfer ratio is inferred to Fig. 5 shows the relationship between the maximum com-
be 3 cos(δ)/2,
√ and the well-known maximum voltage transfer pensated angle and the voltage transfer ratio representing the
ratio becomes 3/2 at δ = 0. reference output voltage of the load demands.
236 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 58, NO. 1, JANUARY 2011
TABLE III
S WITCHING PATTERNS FOR THE I NPUT VOLTAGE AND C URRENT V ECTORS L OCATED IN THE D IFFERENT S ECTORS
Fig. 12. IPFs and compensated angles under constant V /f . (a) IPF. (b) Compensated angle.
power supply is in phase with the line-to-neutral input voltage, than the maximum allowable compensated angles shown in
while the MC satisfies the reference output voltage presented in Fig. 5. Therefore, the desired unity power factor can be
the figure by the output currents and line-to-line output voltage. obtained.
Fig. 10(a)–(c) shows the steady-state performances at refer- The simulation results of reference output voltage q = 0.25,
ence output voltage q = 0.4, fo = 40 Hz of the conventional fo = 25 Hz are shown in Fig. 11. As plotted in Fig. 5, the
DSVM method, compensation algorithm I, and compensation required optimal compensated angle is higher than the max-
algorithm II, respectively. The input currents and voltage wave- imum compensated angle π/3. Consequently, the maximum
forms in Fig. 10(a) present the IPF at 0.589. The input currents compensated angle is applied to compensate the IPF, and the
and voltage waveforms in Fig. 10(b) and (c) describe the MC highest IPF (0.445) can be obtained, while only 0.27 is obtained
operations with the optimal compensated angle for compensa- with no compensation in the conventional DSVM method.
tion algorithms I and II, respectively. The power factors for both Observing our new DSVM method’s results, we can see that
algorithms are achieved at unity. the magnitude of the input current decreases significantly due
As easily seen in the two cases (q = 0.7, fo = 70 Hz and q = to the minimum reactive power supply utilization resulting from
0.4, fo = 40 Hz), the optimal compensated angles are smaller the proposed IPF compensation algorithms.
NGUYEN et al.: INPUT POWER FACTOR COMPENSATION ALGORITHMS USING A NEW DSVM METHOD FOR MC 239
TABLE IV
C OMPARISON B ETWEEN C OMPENSATION A LGORITHMS I AND II
Fig. 20. Steady state of the MC’s input waveforms at reference output voltage
q = 0.4, fo = 40 Hz. (a) Conventional DSVM method. (b) Compensation
algorithm II.
Fig. 17. Block diagram of the MC hardware configuration and laboratory in Fig. 12(a). With the high output voltage region q ≥ 0.35,
MC prototype. the IPFs obtained from compensation algorithms I and II are
significantly increased to almost unity compared to the lower
Comparison of the IPFs obtained from the conventional values obtained from the conventional DSVM method. The
DSVM method and the compensation algorithms using our difference of the optimal compensated angles obtained from
new DSVM method is shown in Fig. 12. With a constant the two compensation algorithms is very small, approximately
V /f for the RL load, the higher output load corresponds to 0.02 rad shown in Fig. 12(b).
the higher voltage transfer ratio (q). The compensated angles For the middle output voltage region 0.2 ≤ q < 0.35, the
at steady state from both compensation algorithms are shown IPF is much higher compared to the one obtained from the
240 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 58, NO. 1, JANUARY 2011
Fig. 24. Input/output waveforms of the induction motor operating at speed 1200 r/min and load torque 2 N · m. (a) Conventional DSVM method (pf = 0.804).
(b) Compensation algorithm II (pf = 1.0).
voltage), an input filter (L = 1.4 mH, C = 22.5 μF, and The main input current ias leads the input line-to-neutral volt-
Y connection), and a three-phase RL load (R = 26 Ω and age due to the input filter effect. Fig. 19 shows the experimental
L = 12 mH), which are identical to the simulation parameters. results using compensation algorithm II. Moreover, it is evident
Moreover, the MC module implemented was an FM35R12KE3 that the main input current ias is in phase with the line-to-
insulated-gate bipolar transistor module produced by Eupec. neutral voltage vas , and a unity power factor is obtained. In
Fig. 17 shows the block diagram of the MC hardware config- addition to the power factor improvement, it is observed from
uration and laboratory MC prototype. The system configuration Figs. 18 and 19 that the sinusoidal output current waveforms
consists of two 32-bit DSPs type TMS320F2812 operating remain unchanged in the new DSVM method. Furthermore,
at a clock frequency of 150 MHz, which communicate with Fig. 20(a) and (b) shows the MC’s input waveforms at the refer-
each other through a dual-port RAM (CY7C028). One of ence output voltage q = 0.4, fo = 40 Hz with the conventional
the DSPs (DSP1) is the main controller which executes the and new DSVM methods, respectively. Lastly, the IPF of unity
main control programs, including reading A/D converters, en- obtained by using the new DSVM method is identical to the
coding pulses, processing the MC’s proposed compensation simulation results.
algorithms, and communicating with PC through serial commu- Fig. 21 shows the input/output waveforms of the MC at
nication interface (SCI), and another DSP (DSP2) is dedicated reference output voltage q = 0.25, fo = 25 Hz. The maximum
to PWM signal generation. It receives the final switching pat- compensated angle π/3 was applied, and the simulation results
terns every sampling period from the main controller (DSP1) were verified by experiment.
through a dual-port RAM and subsequently generates space Fig. 22(a) and (b) shows the experimental results during the
vectors and their duty ratios according to the new DSVM compensating transient state of compensation algorithms I and
method. A complex programmable logic device (CPLD) board II, respectively. The output current representing the output load
is implemented using an Altera EPM7218 for four-step com- remains unchanged during the compensation process.
mutation and logical protection circuits and safe operation Fig. 23 shows the MC dynamic performance as the load
modes: The CPLD receives the space vector patterns changed changes, which is represented by changing the reference output
from the DSP2 and the output current directions which are voltage from q = 0.4, fo = 40 Hz to q = 0.7, fo = 70 Hz.
used for the well-known four-step current commutation [16]; The input currents are kept in phase with the line-to-neutral
the protection signal from the overvoltage and overcurrent voltage as the load changes. This is a very important operation
protection circuits will input the CPLD for safe operation. as applied to the motor control area.
Furthermore, the CPLD can receive the command from the Our new DSVM method was applied to induction motor con-
main controller (DSP1) for safe, starting-up, turning-off, and trol to validate the effectiveness of the compensation algorithm,
running modes of the MC system. An analog board uses a 12-b and in this case, compensation algorithm II was examined
four-channel A/D converter (AD7864AS) to measure input in the experiment. The indirect field-oriented control method
currents and voltages for higher accuracy; the load currents are in combination with the new DSVM method for MC was
measured by internal 12-b A/D channels of the DSP1. All con- implemented on the same MC hardware design to control a
trol modes and commands of the main controller are monitored 5-hp induction motor. The motor parameters are given in the
by GUI in PC through an SCI standard, and data can be viewed Appendix.
by either a PC through a controller–area network or an oscil- The experiment was carried out at a rotor speed of 1200 r/min
loscope. The new DSVM strategies were operated at a PWM and a load torque of 2 N · m in Fig. 24. With the same load
frequency of 10 kHz with a double-side switching pattern. conditions, which are represented by motor speed and stator
The experimental results shown in Fig. 18 are the input/ current waveforms, the new DSVM method [Fig. 24(b)] can
output waveforms of the MC at the reference output voltage improve the IPF to be unity as compared to 0.804, obtained by
q = 0.7, fo = 70 Hz using the conventional DSVM method. the conventional DSVM method [Fig. 24(a)].
242 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 58, NO. 1, JANUARY 2011
Fig. 25. Input/output waveforms of the MC as the induction motor speed changes from 1000 to 500 r/min at load torque 3 N · m.
Fig. 25 shows the experimental results of the induction motor Mutual inductance 153 mH.
operation when the rotor speed is gradually changed from 1000 Number of pole pair 2.
to 500 r/min at a constant load torque of 3 N · m. The proposed Rated speed 1730 r/min.
compensation algorithm guarantees the unity power factor at
the power supply side throughout dynamic performances. R EFERENCES
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The following are the 5-hp induction motor parameters. and L. Zarri, “Large-signal model for the stability analysis of matrix
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Rated voltage 220/380 V. Apr. 2007.
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NGUYEN et al.: INPUT POWER FACTOR COMPENSATION ALGORITHMS USING A NEW DSVM METHOD FOR MC 243
[13] S. F. Pinto and J. F. Silva, “Direct control method for matrix converters Hong-Hee Lee (S’88–M’91) received the B.S.,
with input power factor regulation,” in Proc. 35th IEEE Power Electron. M.S., and Ph.D. degrees in electrical engineering
Spec. Conf., Jun. 2004, vol. 3, pp. 2366–2372. from Seoul National University, Seoul, Korea, in
[14] K. Yamada, T. Higuchi, E. Yamamoto, H. Hara, T. Sawa, M. M. Swamy, 1980, 1982, and 1990, respectively.
and T. Kume, “Filtering techniques for matrix converters to achieve en- From 1994 to 1995, he was a Visiting Professor
vironmentally harmonics drives,” in Proc. 11th EPE, Dresden, Germany, with Texas A&M University, College Station. Since
2005. 1985, he has been with the Department of Electri-
[15] H.-H. Lee, H. M. Nguyen, and T.-W. Chun, “New direct-SVM method for cal Engineering, University of Ulsan, Ulsan, Korea,
matrix converter with main input power factor compensation,” in Proc. where he is currently a Professor with the School of
34th IEEE IECON, Nov. 10–13, 2008, pp. 1281–1286. Electrical Engineering. He is also the Director of the
[16] N. Burany, “Safe control of four quadrant switches,” in Conf. Rec. IEEE Network-based Automation Research Center, which
IAS Annu. Meeting, 1989, pp. 1190–1194. is sponsored by the Ministry of Knowledge Economy. His research interests are
power electronics, network-based motor control, and control networks.
Dr. Lee is a member of the Korean Institute of Electrical Engineers, the
Korean Institute of Power Electronics, and the Institute of Control, Robotics
and Systems.
Hoang M. Nguyen was born in Nha Trang, Vietnam, Tae-Won Chun was born in Korea in 1959. He
in 1979. He received the B.S. degree in electrical received the B.S. degree in electrical engineering
engineering from Ho Chi Minh City University of from Pusan National University, Busan, Korea, in
Technology, Ho Chi Minh City, Vietnam, in 2002 1981 and the M.S. and Ph.D. degrees in electrical
and the M.S. and Ph.D. degrees from the Univer- engineering from Seoul National University, Seoul,
sity of Ulsan, Ulsan, Korea, in 2005 and 2010, Korea, in 1983 and 1987, respectively.
respectively. Since 1986, he has been a Member of the Faculty
He is currently with the School of Electrical En- of the Department of Electrical Engineering, Univer-
gineering, University of Ulsan. His research interests sity of Ulsan, Ulsan, Korea, where he is currently a
are electrical drives, industrial networks, renewable Full Professor. His current research interests are con-
energy, and modern power converters, particularly trol of electrical machines, power converter circuits,
matrix converters. and industrial applications.