ASSOCIATION CONNECTING

ELECTRONICS INDUSTRIES ®

IPC-4554

Specification for Immersion

Tin Plating for Printed
Circuit Boards

IPC-4554
January 2007 A standard developed by IPC

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 IPC-4554
ASSOCIATION CONNECTING
ELECTRONICS INDUSTRIES ®

Specification for
Immersion Tin Plating
for Printed Circuit Boards

Developed by the Plating Processes Subcommitte (4-14) of the

Fabrication Processes Committee (4-10) of IPC

Users of this publication are encouraged to participate in the

development of future revisions.

Contact:

IPC
3000 Lakeside Drive, Suite 309S
Bannockburn, Illinois
60015-1249
Tel 847 615.7100
Fax 847 615.7105
IPC-4554 January 2007

Acknowledgment
Any document involving a complex technology draws material from a vast number of sources. While the principal members
of the Plating Processes Subcommittee (4-14) of the Fabrication Processes Committee (4-10) are shown below, it is not pos-
sible to include all of those who assisted in the evolution of this standard. To each of them, the members of the IPC extend
their gratitude.

Fabrication Processes Plating Processes Technical Liaisons of the

Committee Subcommittee IPC Board of Directors
Chair Co-Chair
George Milad George Milad Peter Bigelow
UIC/Uyemura International Corp. UIC/Uyemura International Corp. IMI Inc.
Vice Chair Co-Chair Sammy Yi
Gary C. Roper Gerard A. O’Brien Flextronics International
One Source Group, Eagle Circuits Inc. Photocircuits Corporation

Plating Processes Subcommittee

Franklin D. Asbell, Consultant Hollese Galyon, Merix Corporation Randy R. Reed, Merix Corporation
Gail Auyeung, Celestica International Marion Graybeal, Consultant Gary C. Roper, One Source Group,
Inc. Michael R. Green, Lockheed Martin Eagle Circuits Inc.
Martin W. Bayes, Rohm and Haas Space Systems Company Stan Sappington, S/G Electronics Inc.
Electronic Materials Donald Gudeczauskas, UIC/Uyemura Daryl Sato, Intel Corporation
Mumtaz Y. Bora, Kyocera Wireless International Corp. Michael Schneider, ECI Technology,
Corporation Lorianne Hamoline, Alcatel-Lucent Inc.
Trevor Bowers, Adtran Inc. David D. Hillman, Rockwell Collins Tom Selby, ThermoFinnigan LLC
Peter Bratin, ECI Technology, Inc. Kuldip Johal, Atotech USA Inc. Atamjit Singh, Unitech Industries
Lee Burger, Electrochemicals Inc. Jack Y. Josefowicz, TTM Inc.
Dennis J. Cantwell, Printed Circuits Technologies Joseph T. Slanina, Honeywell Inc.
Inc. Thomas E. Kemp, Rockwell Collins Joseph Smetana, Alcatel-Lucent
Michael V. Carano, Electrochemicals John Konrad, Endicott Interconnect Polina Snugovsky, Celestica
Inc. Technologies Inc International Inc.
Peter Marc Carter, Rockwell Collins Bridget Lawrence, Pentaplex Inc. Bill Starmann, Raytheon Company
Phillip Chen, L-3 Communications Gary B. Long, Intel Corporation Michael Toben, Rohm and Haas
Electronic Systems Electronic Materials
David McQuinn, Solectron
David J. Corbett, Defense Supply Donald E. Walsh, UIC/Uyemura
John D. Meyers, Electrochemicals
Center Columbus International Corp.
Inc.
G. Sidney Cox, E. I. du Pont de Michael K. Walsh, OMG Fidelity
Ramesh Mohabir, Celestica
Nemours and Co.
International Inc. Timothy L. Wells, Endicott
Donald P. Cullen, MacDermid, Inc. Interconnect Technologies Inc
Keith G. Newman, Sun Microsystems
Gordon Davy, Northrop Grumman Inc. Karl F. Wengenroth, Enthone Inc. -
Corporation Cookson Electronics
Mario Orduz, UIC/Uyemura
Steve Dunford, Nokia Networks International Corp. John E. Williams, Raytheon
C. Don Dupriest, Lockheed Martin Anders P. Pedersen, Harris Company
Richard M. Edgar, Tec-Line Inc. Corporation, GCSD Yung-Herng Yau, Enthone Inc. -
Theodore Edwards, Dynaco Corp. Mike Pfeifer, Motorola Inc. ACES Cookson Electronics
Dennis Fritz, MacDermid, Inc. Jim R. Reed, Dell Inc.

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January 2007 IPC-4554

Table of Contents
1 Scope ........................................................................ 1 APPENDIX 7 Solder Spread Test Protocol .......... 20
1.1 Description ........................................................... 1
APPENDIX 8 Standard Development Efforts
1.2 Objective .............................................................. 1 for IPC-4554, Specification for
Immersion Tin Plating for Printed
1.3 Performance Functions ........................................ 1
Circuit Boards .................................... 21
1.3.1 Solderability ......................................................... 1
1.3.2 Contact Surface .................................................... 1
1.3.3 Electromagnetic Interference (EMI) Shielding ... 1
Figures
1.3.4 Connectors ........................................................... 1
Figure 3-1 Example of Uniform Plating ............................ 2
1.3.4.1 Press-Fit ............................................................... 1
Figure 3-2 Example of Uniform Plating ............................ 3
1.3.4.2 Edge Tab .............................................................. 1
Figure 3-3 Example of Improper ISn Deposit Showing
1.3.5 Wire Bonding ....................................................... 2 Inconsistent Plating ......................................... 3
1.4 Definition of Terms .............................................. 2 Figure 3-4 Coupon for Surface Mount Solderability
Testing ............................................................. 4
2 APPLICABLE DOCUMENTS .................................... 2 Figure 3-5 Rating of 1 As Measured at 100 X ................. 6
2.1 IPC ....................................................................... 2 Figure 3-6 Rating of 4 As Measured at 100X ................... 6
2.2 Telcordia™ ........................................................... 2 Figure 3-7 Rating of 7 As Measured at 100X ................... 6
Figure 3-8 Rating of 5 As Measured at 100X ................... 6
3 REQUIREMENTS ...................................................... 2
Figure A5-1 Auger vs. X-ray Emission Process ............... 14
3.1 Visual ................................................................... 2
Figure A5-2 Coulometric Stripping Analysis Using Test
3.2 Finish Thickness .................................................. 2 Coupon (A) .................................................... 14
3.2.1 Immersion Tin Thickness .................................... 3 Figure A5-3 Coulometric Stripping Analysis Using a
3.3 Porosity ................................................................ 3 Tube with a Gasket (B) ................................. 15

3.4 Adhesion .............................................................. 4 Figure A5-4 Coulometric Stripping of Tin on Copper

in Diluted Sulfuric Acid (Area = 5 cm2;
3.5 Solderability ......................................................... 4 Stripping Current = 25.30 mA; Stainless
3.5.1 Solder Spread Test ............................................... 4 Steel Cathode) .............................................. 15
Figure A5-5 Coupons after Coulometric Stripping ............ 16
3.6 Cleanliness ........................................................... 4
Figure A5-6 SNMS Measurement for an Untreated
3.6.1 Electrolytic Corrosion .......................................... 4 Deposit (initial thickness approximately
3.7 Chemical Resistance ............................................ 4 0.8 µm) .......................................................... 17
3.8 High Frequency Signal Loss ............................... 5 Figure A5-7 SNMS Measurement of a Deposit; Storage
of Four Hours at 155 °C and 2X Reflow
3.9 Whisker Issues ..................................................... 5 Oven (initial thickness approximately
0.8°µm) .......................................................... 17
4 QUALITY ASSURANCE PROVISIONS .................... 7
Figure A5-8 Comparison of Coulometric Measurements
4.1 Qualification ......................................................... 7 (MacDermid p-test) with Chemical Analysis
4.1.1 Sample Test Coupons .......................................... 7 (AAS) ............................................................. 18

4.2 Quality Conformance Testing .............................. 7 Figure A6-4 Whisker in an Immersion Tin Plated 0.46
micron (0.018 in) Diameter Via Hole ............ 19
APPENDIX 1 Chemical Process Definitions .......... 8 Figure A8-1 Industry Survey for ISn Deposit
Recommendations ......................................... 22
APPENDIX 2 Typical Process Sequence ................ 9 Figure A8-2 Sample of XRF Measurements for the Five
Suppliers to the Round Robin Testing .......... 23
APPENDIX 3 Qualification of ISn Process by the
Board Supplier ................................. 10 Figure A8-3 Impact of Age on 0.6 Micron Average
Thickness Deposit Through 265 Days .......... 23
APPENDIX 4 XRF Measurement Techniques ......... 11 Figure A8-4 Comparison of Impact of Aging On a
1.0 Micron Average Deposit Through
APPENDIX 5 Auger/XPS and Coulometric 239 Days ....................................................... 24
Stripping Techniques ......................... 14
Figure A8-5 Wetting Balance Coupon .............................. 24
APPENDIX 6 Tin Whiskers ....................................... 19 Figure A8-6 Solder Spread Test Vehicle ........................... 25

iii
IPC-4554 January 2007

Figure A8-7 Wetting Balance Results for Vendor A Figure A8-23 Vendor C at 20 Å - Note Large Carbon
Through 400 Days of Normal Storage .......... 25 Rich Areas ..................................................... 36
Figure A8-8 Wetting Balance Data for Vendor B Figure A8-24 Vendor E Surface Scan ................................. 37
Through 182 Days of Normal Storage .......... 26 Figure A8-25 Vendor E at 1000 Å ....................................... 38
Figure A8-9 Wetting Balance Data for Vendor C Figure A8-26 Comparison of Vendor C (top) to Vendor E
Through 149 Days of Normal Storage .......... 26 (bottom) at 100 Å - Significant Difference
Figure A8-10 Wetting Balance Data for Vendor D in the Deposits .............................................. 39
Through 229 Days in Storage ....................... 27 Figure A8-27 Contact Wetting Angles for the Four
Figure A8-11 Wetting Balance Data for Vendor E Suppliers Tested with SnPb in a Normal
Through 239 Days of Normal Storage .......... 27 (Air) Atmosphere - All Four Showed
Figure A8-12 Impact of Test Temperature on Wetting Excellent Wetting ........................................... 40
Times for Vendor A Through 229 Days Figure A8-28 Contact Wetting Angles for the Four
of Normal Storage - Test Temperature Suppliers Tested with SnPb in an Nitrogen
of 215 °C ........................................................ 28 Atmosphere - Again, All Four Showed
Figure A8-13 Impact of Test Temperature on Wetting Excellent Wetting ........................................... 40
Times for Vendor B Through 182 Days Figure A8-29 Contact Wetting Angles for the Four
of Normal Storage - Test Temperature Suppliers Tested with SAC305 in a
of 215 °C ....................................................... 29 Normal (Air) Atmosphere - All Four
Figure A8-14 Vendor B Post 1260 Days of Storage ........... 30 Exhibit Excellent Wetting ............................... 40

Figure A8-15 Vendor E Post 1260 Days ............................. 31 Figure A8-30 Contact Wetting Angles for the Four
Suppliers Tested with SAC305 in a
Figure A8-16 Vendor C Post 1260 Days ............................ 31 Nitrogen Atmosphere - Again, All Four
Figure A8-17 Surface Morphology of Vendor B Post Exhibit Excellent Wetting ............................... 41
1260 Days ..................................................... 32 Figure A8-31 Comparison of Contact Angles for
Figure A8-18 Surface Morphology of Vendor C - Post Vendor A - All Tests ....................................... 41
1260 Days ..................................................... 32 Figure A8-32 Average SEC Values for the Five Vendors ... 41
Figure A8-19 Surface Morphology of Vendor E - Post
1260 Days ..................................................... 32
Figure A8-20 Surface Scan Showing Cu, C, Sn and Tables
O for Vendor B .............................................. 33
Figure A8-21 Chemical Map of Surface for Vendor B ........ 34 Table 3-1 Requirements of Immersion Tin Plating .............. 5

Figure A8-22 Surface Map for Vendor C - Note a Table 3-2 ISn Whisker Rating Scheme Using 100 X
Greater Presence of Copper on the Magnification ....................................................... 6
Surface .......................................................... 35 Table 4-1 Qualification Test Coupons ................................. 7

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January 2007 IPC-4554

Specification for Immersion Tin

Plating for Printed Circuit Boards

1 Scope the deposit thickness. This diffusion also has a negative

This specification sets the requirements for the use of impact on the correct thickness measurement of the
Immersion Tin (ISn) as a surface finish for printed circuit deposit.
boards. It is intended for use by supplier, manufacturer, The ability to measure and differentiate the tin species in
contract manufacturer (CM) and original equipment manu- the deposit is imperative to ensure the manufacture and
facturer (OEM). receipt of parts with this useable shelf life. The use of cor-
rect XRF standards is imperative. The use of foils over
1.1 Description ISn is a metallic finish deposited by a
polyester (Mylar® is very common) prevents the impact of
chemical displacement reaction that is applied directly over
basis metal diffusion and should be the XRF ‘‘standards of
the basis metal of the PCB, that is, copper. ISn is primarily
choice’’ - see Appendix 4 for detailed recommendations.
used as a solderable surface. It has been used in press fit
connections and as the interface for Zero Insertion Force 1.3.2 Contact Surface Immersion tin is not recom-
(ZIF) edge connectors. mended as a finish for soft membrane switch applications.
The ISn protects the underlying copper from oxidation over
its intended shelf life. Copper and tin however have a 1.3.3 Electromagnetic Interference (EMI) Shielding A
strong affinity for one another. The diffusion of one species key characteristic for this application is a consistent metal
into the other will occur inevitably, directly impacting the interface between the PCB and the shield material. Due to
shelf life of the deposit and the performance of the finish. the dynamic nature of the ISn deposit and the basis metal
(Cu) of the PCB, the interface between the EMI shield and
Various ISn formulations designed specifically for use as the deposit is NOT consistent. The growth of intermetallic
surface finishes for PCBs utilize various methods of retard- compounds (IMCs) will change the electrical characteris-
ing the diffusion process, including the use of tics of the interface between the EMI shield and the
co-deposition of organics, the use of another metal as a deposit. It has however been demonstrated to be a suitable
diffusion barrier or the use of grain structure refining. It is interface for EMI shielding for certain specific applica-
recommended that the user of the deposit clearly under- tions. Testing for suitability is recommended.
stand the different methods of copper migration retardation
and that the supplier know the positive and negative 1.3.4 Connectors
impacts of the system chosen.
1.3.4.1 Press-Fit The use of ISn as a deposit suitable for
1.2 Objective This specification sets the requirements press-fit requirements shall meet Telcordia GR-1217-
specific to ISn as a surface finish. As other finishes require CORE. It should be noted that changing to a thin immer-
specifications, they will be addressed by the IPC Plating sion deposit such as ISn from HASL may require a
Processes Subcommittee as part of the IPC-4550 specifica- re-evaluation of the pre-fabrication hole sizes to ensure the
tion family. As this and other applicable specifications are correct interference fit required for press-fit applications.
under continuous review, the Subcommittee will add
appropriate amendments and make necessary revisions to The possibility of tin whisker formation, as a direct conse-
these documents. quence of stresses induced on the deposit as a function of
press-fit insertion, exists. The end user shall determine the
1.3 Performance Functions impact of whisker formation on the reliability of the mod-
ule in its end use application.
1.3.1 Solderability The primary function of ISn is to
provide a solderable surface finish, suitable for all surface 1.3.4.2 Edge Tab The use of ISn as a surface finish for
mount and through-hole assembly applications and with an edge connectors utilizing a zero insertion force (ZIF) con-
appropriate shelf life. The deposit has demonstrated the nector, i.e., for memory modules, has been successfully
ability to meet a Category 3 durability per J-STD-003 demonstrated.
when produced per this specification’s requirement.
Whisker formation is a concern particularly in fine pitch
Due to the diffusion of the copper through the tin deposit devices. The end user shall determine the impact of whis-
and its impact on solderability, the ability to meet the ker formation on the reliability of the module in its end use
greater than six months shelf life is DIRECTLY related to application.

1
IPC-4554 January 2007

1.3.5 Wire Bonding ISn is not suitable as a surface fin- 2.2 Telcordia™ 3
ish for either aluminum or gold wire bonding due to the
GR-1217-CORE Generic Requirements For Separable
instability and metallurgical incompatibility of the deposit.
Electrical Connectors Used In Telecommunications Hard-
ware
1.4 Definition of Terms The definition of all terms used
within this specification shall be as specified in IPC-T-50 3 REQUIREMENTS
and as defined below:
3.1 Visual ISn surfaces shall be inspected in accordance
Solvent Extract Conductivity (SEC) Surface ionic con- with the visual examination sections of the IPC-6011
taminants may be extracted/dissolved by solvents. The bulk series, and specifically IPC-6012 which specifies three
ionic cleanliness of an item is then quantified by measur- diopters (a nominal magnification of 1.75X). If confirma-
ing the solution of extracted contaminants with an iono- tion of a suspected defect cannot be made at three diopters,
graph instrument and reported in units of micrograms of it should be verified at progressively higher magnifications
sodium chloride equivalent per unit surface area of the (up to 40X) to confirm that it is a defect. The coverage
tested item. shall be complete and the finish shall be uniform on the
Useable Tin Tin that has not reacted to form intermetal- surface to be plated (see Figures 3-1 and 3-2 for uniform
lic compounds. coverage and Figure 3-3 for improper coverage, as visualIy
identified with ISn-plated surfaces).
X-ray Fluorescence (XRF) or Energy Dispersive X-ray
Fluorescence (EDS-XRF) Nondestructive chemical ISn appearance, like all thin immersion deposits, is directly
analysis techniques that use an X-ray beam aimed at an influenced by the surface preparation of the underlying
object’s surface. The incident beam causes secondary (fluo- copper. Depending on the micro-etch chemistry used, the
rescent) X-rays to be generated. These fluorescent X-rays color of the deposit will vary from a white matte appear-
are then measured to determine the identity of metal or ance to a shiny silver appearance. All colors are acceptable
other high density elements and their quantity (thickness) provided that the appearance is uniform through-out the
present. product supplied. The coverage shall be complete and the
finish shall be uniform on the surface to be plated. There
2 APPLICABLE DOCUMENTS shall be no extraneous plating, skip plating, edge pull back,
dark or discolored pads or mis-registered solder mask on
2.1 IPC1 the plated surface for all classes of product.

J-STD-003 Solderability Tests for Printed Boards

IPC-2221 Generic Standard on Printed Board Design

IPC-6012 Qualification and Performance Specification for

Rigid Printed Boards

IPC-6013 Qualification and Performance Specification for

Flexible Printed Boards

IPC-6018 Microwave End Product Board Inspection and

Test

IPC-TM-650 Test Method Manual2

2.3.25 Detection and Measurement of Ionizable Surface
Contaminants by Resistivity of Solvent Extract Figure 3-1 Example of Uniform Plating
(ROSE)
3.2 Finish Thickness Thickness of the ISn shall be mea-
2.4.1 Adhesion, Tape Testing
sured and verified following the ISn plating step in the
2.6.14.1 Electrochemical Migration Resistance Test PCB fabrication process. The use of X-ray fluorescence
2.6.3.5 Bare Board Cleanliness by Surface Insulation methodology for thickness determination shall be in accor-
Resistance. dance with Appendix 4 of this document and shall employ

1. www.ipc.org
2. Current and revised IPC Test Methods are available on the IPC Web site (www.ipc.org/html/testmethods.htm).
3. www.telcordia.com

2
January 2007 IPC-4554

1.5 mm X 1.5 mm [0.060 in X 0.060 in] or equivalent area

of 2.25 mm2 [3.600 E-3 in2] and where the typical values
range from 1.15 µm to 1.3 µm. While ISn deposit rates may
not be as susceptible to pad geometry/feature size as com-
pared to other immersion metallic finishes, the use of a
recommended pad size is to ensure accurate XRF measure-
ment by forcing the 30% rule for collimator size relative to
feature size (Appendix 4). Excessively thick deposits,
while not impacting solderability, may impact other board
fabrication processes negatively, e.g., solder mask and leg-
end adhesion. This minimum deposit thickness is to ensure
greater than six months of shelf life (Category 3) and to
meet the acceptance criteria of IPC/EIA J-STD-003.
There is sufficient data, both test and anecdotal, to show
Figure 3-2 Example of Uniform Plating that ISn deposits below the 1 micron minimum work pro-
vided there is either a) sufficient useable tin to meet the
assembly processing requirements including expected shelf
life or b) the PCBs are consumed in a very short period of
time, i.e., below 30 days from manufacturing. The supplier
of the ISn-coated PCBs has the option of supplying either
to the 1 micron minimum specification OR providing data,
via coulometric stripping or Auger, that there is sufficient
useable tin in the deposit.
Coating durability categories are defined as follows (per
the IPC/EIA J-STD-003). The following categories are
guidelines for determining the needed coating durability –
These are not product performance classes.
Category 1 – Minimum Coating Durability
Figure 3-3 Example of Improper ISn Deposit Showing Intended for boards which will be soldered within 30 days
Inconsistent Plating
from the time of PCB fabrication and will experience
X-ray fluorescence (XRF) instrumentation equipped with minimum-to-moderate thermal exposures. A deposit that
software and hardware specific for ISn measurement. Due contains a minimum useable tin of 0.4 microns is recom-
to the dynamic nature of the deposit and its interaction with mended.
the basis metal, a clear distinction between ‘‘useable’’ tin Category 2 – Average Coating Durability
and total deposit thickness needs to be made. It is recom- Intended for boards likely to experience up to 180 days
mended that the use of coulometric stripping or similar storage from the time of PCB fabrication and will experi-
techniques, e.g., Auger or XPS, be employed at a minimum ence minimum-to-moderate thermal exposures. A deposit
during qualification and at a regular interval for confirma- that contains a minimum useable tin of 0.5 microns is rec-
tion as agreed between user and supplier (AABUS). See ommended.
Appendix 5 of this document regarding the use of coulom-
etric stripping and other accepted techniques. Category 3 – Maximum Coating Durability
Intended for boards likely to experience long storage
3.2.1 Immersion Tin Thickness The growth of copper- (greater than six months) from the time of PCB fabrication
tin intermetallic compounds (copper-tin IMCs) consume and/or severe thermal or solder processing steps. A deposit
the useable tin in the deposit. Their growth is time- and that contains a minimum useable tin of 0.6 microns is rec-
temperature-dependent. Thermal excursions in assembly ommended. It should be noted that, while the storage dura-
advance the growth of the IMCs, thus further consuming tion is specified greater than six months, it is not implied
the useable tin. If insufficient useable tin is available to to be solderable forever and that some common sense be
survive all thermal process steps in assembly, solderability used if excessive long term storage has been applied to the
issues may result, dependent on the flux activation levels PCBs (see Appendix 8).
used.
Note: Coating durability levels other than ‘‘Category 3’’
In order to insure sufficient useable tin, the minimum ISn
may be specified AABUS.
deposit thickness shall be 1 micron (40 micro inches) at -4
sigma from the process mean when measured on a pad of 3.3 Porosity Porosity testing of ISn is not applicable.
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IPC-4554 January 2007

3.4 Adhesion The purpose of adhesion testing for ISn

finished boards is two fold. The first is for testing the plat-
ing adhesion of the immersion Sn to the underlying copper.
The second is for testing the adhesion of the solder mask
to both traces and laminate after exposure to the ISn pro-
cess. In both cases testing should be conducted on regions
of high density on the board such as BGA sites, dams
between fine pitch leaded devices or over areas of high
PCB TEST BRD
trace density. The tape testing will be in accordance with
IPC-TM-650, Method 2.4.1, using a strip of pressure sen-
sitive tape. There shall be no evidence of any portion of
the surface finish or the soldermask being removed, as
shown by particles of plating/pattern or soldermask adher- IPC-4554-3-4
ing to the tape. If tested immediately after ISn plating,
Figure 3-4 Coupon for Surface Mount Solderability
there exists the possibility for some mask lifting. If there is
Testing
mask lifting but no evidence of ISn lifting, it is recom-
mended to allow the product to normalize for four to six deemed it to be an acceptable method for verifying the sol-
hours and repeat the test. If mask lifting is still evident then derability of the deposit as a function of contact angle
the parts shall be rejected. achieved. The test protocol used by the committee can be
found in Appendix 7 along with the coupon design as seen
If overhanging metal (slivers) or soldermask undercut
in Appendix 8, Figure A8-6. Results from a series of round
breaks off and adheres to the tape, it is evidence of over-
robin tests may also be found in Appendix 8.
hang or slivers, but not of adhesion failures.
Because of the requirement to test in high density areas, the 3.6 Cleanliness The nature of the ISn chemical process
potential to leave tape residue that could interfere with sol- and/or board design features may lead to excessive entrap-
dering exists, especially if the wrong type of tape is used. ment of process chemistry. This, in turn, may require spe-
Verification of zero impact to solderability must be demon- cial post-tin application rinsing/cleaning in order for the
strated for the areas tested. deposit to meet current industry requirements for both SEC
and SIR testing. The process shall be installed and main-
3.5 Solderability This thickness specification contained tained using IPC-TM-650, Method 2.3.25 ‘‘Detection and
herein shall meet the coating durability requirements of Measurement of Ionizable Surface Contaminants by Resis-
Category 3 in IPC/EIA J-STD-003, i.e., intended for boards tivity of Solvent Extract’’ and Method 2.6.3.5 ‘‘Bare Board
likely to experience long storage (e.g., greater than six Cleanliness by Surface Insulation Resistance.’’ The SEC
months). Caution needs to be exercised pertaining to the results shall meet the values given in IPC-6010 series that
storage and packing of the ISn boards to ensure that the requires 1.56 µg/cm2 NaCl equivalent. The SIR results will
growth of copper-tin IMCs is minimized and will thus meet be as specified in Table 3-1. Failure to meet this cleanliness
the Category 3 requirements. Exposure to high storage specification should trigger immediate corrective action.
temperatures will accelerate the formation rate of copper-
Note: Good SIR values do not necessarily equate to good
tin intermetallics. Storage in a high humidity environment
SEC values due to the absorption of the contaminants into
with the PCBs removed from their original packaging may
the board materials. The use of both techniques is recom-
increase the oxide thickness and/or species and also have a
mended until a sufficiently large data base exists to demon-
detrimental effect on solderability. Recommended storage
strate process control for cleanliness.
conditions should not exceed 25 °C [77.0 °F] and 50%
R.H.
3.6.1 Electrolytic Corrosion The ISn process both con-
Note: The use of steam conditioning is not an applicable tains and produces by-products from the reaction that may
accelerated stress method for ISn. The use of 72 °C [162 be detrimental to long term module reliability as a function
°F] / 85% R.H. for eight hours is the recommended stress of dendritic growth between adjacent conductors or pads.
condition for this deposit. (See Figure 3-4 for surface The use of IPC-TM-650, Method 2.6.14.1 ‘‘Electrochemi-
mount solderability test coupon.) cal Migration Resistance Test’’ is recommended for high
reliability applications or designs of high density. The
3.5.1 Solder Spread Test The use of a spread test for resistance values shall not drop more than one decade after
verifying solderability of ISn using a solder paste has been the test has been completed.
used since the reintroduction of this deposit as a solderable
surface. The committee has evaluated extensively the use 3.7 Chemical Resistance Chemical resistance testing of
of this test method and the results obtained and have the ISn finish may be detailed AABUS. This is typically

4
January 2007 IPC-4554

Table 3-1 Requirements of Immersion Tin Plating

Requirement
Tests Test Method Paragraph Class 1 Class 2 Class 3
General:
Visual Visual 3.1 Uniform plating and complete coverage of surface to be plated.
Immersion Tin Thickness Appendix 4 3.2.1 1 µm (40 µin) minimum at -4 sigma from the process mean as
(as plated) measured on a pad of 2.25 mm2 [3.600 E-3 in2]; typical values
of 1.15 to 1.3 µm for Coating Durability Category 3.
Note: Less than 1 µm may be used for Coating Durability
Categories 1 and 2, AABUS.
XRF Standards Appendix 4 Use foils over Mylar. Standards must be calibrated yearly.
Porosity N/A N/A
Physical:
Adhesion/Tape Test IPC-TM-650, 3.4 No evidence of plating removal.
Method 2.4.1 No evidence of mask removal (not all masks will meet this
requirement).
Solderability J-STD-003 3.5 Meets solderability requirements of Category 3 durability
(greater than six months shelf life). The storage conditions
are critical if the deposit is to meet this performance level.
Other durability levels acceptable AABUS.
Chemical:
Coulometric Stripping Appendix 5 3.2 Qualification and AABUS frequency.
Auger / XPS Appendix 5 3.2 Qualification and AABUS frequency.
Chemical Resistance N/A 3.7 AABUS
Electrical:
High Frequency N/A 3.8 N/A
Signal Loss
Contact Resistance N/A 1.4.2 N/A
Environmental:
Whiskers N/A 3.9 ISn may experience whisker growth under certain use condi-
tions. The end user is responsible to determine likelihood of
whisker growth and their potential impact on module’s long
term reliability.
Cleanliness IPC-TM-650, 3.6 Maximum 1.56 µg/cm2
Method 2.3.25
SIR IPC-TM-650, 3.6 1.0E+02 Megohms
Method 2.6.3.5
Electrochemical Migration IPC-TM-650, One decade loss.
Method 2.6.14.1

used for harsh end use environments where the possibility electrolytic tin. The industry continues to work on a test-
of chemical/environmental attack of nonsoldered pads/vias method designed to quickly indicate the susceptibility of a
may occur. deposit to whisker growth. The deposit will be used with
the understanding that the responsibility to verify the
3.8 High Frequency Signal Loss The performance of impact of potential whisker growth on a module’s long
ISn in high frequency applications can be acceptable, but term reliability is the end users’. See the excerpt from the
depends on a variety of factors, including interconnect joint JEDEC/IPC JP002 guideline document and an
structure (i.e., strip line vs micro strip, interconnect geom- example of an OEM’s requirements in Appendix 6.
etry, trace length) and dielectric materials. Note: The com- Table 3-2 is provided as a rating scheme for the severity of
mittee seeks further information on high frequency applica- whisker growth in a via/plated-through hole or on a SMT
tions. pad of a PWB. It does not imply pass/fail or accept/reject
criteria. The end user shall determine the impact of the
3.9 Whisker Issues Immersion tin has been shown to be severity of the whiskers as per this rating on the end use
susceptible to whisker growth under certain conditions. application of the module/assembly. Examination of the
However ISn has NOT been shown to produce whiskers board shall be at 100X magnification (see Figures 3-5
when exposed to the classic acceleration methods used for through 3-8).

5
IPC-4554 January 2007

Table 3-2 ISn Whisker Rating

Scheme Using 100 X Magnification
Number of
Rating Whisker Size Whiskers Observed
0 0 0
1 ≤10 microns ≤5
2 ≤10 microns ≤10
3 ≤10 microns >10
4 ≤50 microns ≤5
5 ≤50 microns ≤10
6 ≤50 microns >10
7 >50 microns ≤5
8 >50 microns ≤10
9 >50 microns >10
Figure 3-7 Rating of 7 As Measured at 100X

Figure 3-5 Rating of 1 As Measured at 100 X

Figure 3-8 Rating of 5 As Measured at 100X

Figure 3-6 Rating of 4 As Measured at 100X

6 --`,```,,,``,,,,,``,,,,```,,,-`-`,,`,,`,`,,`---
January 2007 IPC-4554

4 QUALITY ASSURANCE PROVISIONS mance testing be included in the user’s qualification pro-
General Quality Assurance Provisions are specified in IPC- cess of the PCB supplier. Meeting the thickness specifica-
6011 and each sectional specification. Additional require- tion but not being able to solder to the PCB product shall
ments for PCB with immersion tin (ISn) plating are speci- always be considered cause for rejection.
fied herein for qualification, acceptance and quality Note: The following caveat is critical for the user: Know
conformance. your supplier, know their process and verify that they are
4.1 Qualification Qualification of a PCB product is following the recommendations of their ISn chemistry sup-
agreed upon by the user and supplier (see IPC-6011). The plier.
process capability of a supplier of PCB with ISn finish Appendix 3 describes recommended qualification aspects
shall be evaluated. ISn is a unique deposit whose shelf life of the ISn process by a PCB supplier.
is consumed by the naturally occurring growth of copper-
tin IMCs. Thickness of the deposit, as measured by XRF, 4.1.1 Sample Test Coupons Test specimens used for the
will not change significantly as a function of shelf life and qualification of a PCB with ISn finish, shall be as specified
storage conditions, whereas the useable tin (non-IMCs) in IPC-6011 and each sectional specification. The
does change with shelf life and storage conditions. It is specimens/test coupons for an additional testing require-
imperative that, during qualification, the distinction ment for multiple types are listed in Table 4-1.
between ‘‘useable tin’’ supplied versus ‘‘total tin’’ remain-
ing be made. This will require the use of analytical equip- Table 4-1 Qualification Test Coupons
ment that may not be found in every PCB fabrication facil- Types Types
Test Type 1 2,3,5 4,6 Board
ity and will require the PCB supplier to send samples to an
independent source for useable tin verification. Testing for Physical Requirements
useable tin shall be made over the life of the ISn bath. This Plating Thickness M2, M5 M2, M5 M2, M5 X
will insure that, throughout the bath life, a minimum
amount of useable tin, to meet the thermal requirements of Acceptance Tests
assembly and/or over the product’s shelf life, is always The sampling plan and frequency of acceptance testing,
supplied. except the solderability and plating thickness inspections,
shall be in accordance with IPC-6011 and each sectional
Further, it is strongly recommended that the PCB supplier
specification. The sampling plan of the solderability and
determine their process capability and the useable tin
thickness of ISn finish shall be AABUS.
deposit thickness over the life of a bath during their instal-
lation of the specific ISn chemistry bath in their own facil-
4.2 Quality Conformance Testing Quality conformance
ity. Having the data set of useable tin versus total deposit
testing shall consist of inspections as specified in IPC-6011
thickness, over the full anticipated bath life, may greatly
and each sectional specification, with the addition of regu-
reduce the qualification process imposed on the PCB sup-
lar thickness inspections. The frequency of thickness
plier by the end user.
inspection shall be one inspection (5 XRF measurements)
It should be noted that suppliers of lower deposit thick- per lot for Classes 1 and 2, and AABUS for Class 3 prod-
nesses may produce an ISn deposit that is, in the majority, ucts.
free of IMCs and will meet the toughest assembly require-
Any rejection of an ISn-finished lot because of it failing to
ments with no difficulties. It should also be noted that sup-
meet incoming solderability testing requirements and/or it
plying 1 micron [40 microinches] of total thickness does
resulting in manufacturing line defects that are proven to
not guarantee defect-free assembly with extensive shelf
be associated with insufficient useable tin, will likely
life.
require (AABUS) the supplier on subsequent lots, to pro-
Since the primary function of the ISn deposit is solder- vide verification (data) that the ‘useable tin’-to-‘total tin’
ability, it is further recommended that soldering perfor- relationship developed during qualification still exists.

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7
IPC-4554 January 2007

APPENDIX 1
Chemical Process Definitions

Electroless Process This chemical process promotes the PWB. The copper substrate dissolves, donating elec-
continuous deposition of a metal onto the PCB surface trons that reduce the tin ions present in solution to metallic
through an oxidation-reduction chemical reaction, without tin.
the use of an external electrical potential. A reducing agent,
Additives in the solution modify the electrochemical poten-
such as sodium hypophosphite, donates electrons to the
tial difference between copper and tin, allowing copper to
positively charged metal ions in solution, thereby reducing
displace tin from solution. The effect of the additives is to
the metal and promoting its deposition onto the catalyzed
reverse the normal positions of copper and tin in the Elec-
metal surfaces of the PCB. This reaction is considered
tromotive Series (which indicates the relative tendency of
auto-catalytic because it will continue to plate in the pres-
metals to be oxidized or reduced).
ence of source metal ions and a reducing agent until the
board is removed from the plating bath. The thickness of Immersion films will continue to grow while dissolution of
plated deposits varies according to temperature, chemical the substrate is possible. As the thickness of immersion
parameters and the amount of time spent in the plating deposits increase, they become less and less porous and the
bath. rate of deposition falls. When the deposit porosity falls to
very low values, the deposition rate falls to essentially zero
Immersion Process The tin deposit is formed by a and a constant thickness of deposit is reached. This behav-
chemical displacement reaction with the copper surface of ior is described as self-limiting.

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8
January 2007 IPC-4554

APPENDIX 2
Typical Process Sequence

1 Cleaner The purpose of this step is to clean the copper 4 Immersion Tin
surface in preparation for processing. The cleaner removes
oxides, and light surface contaminants and ensures that the 5 Post Dip / Cleaner – (optional) pH controlled rinse
copper surface will be in a condition to be uniformly bath, saponifier / complexer to remove tin salts.
micro-etched. Vendor specifications of temperature, dwell
time, agitation and bath chemical control should be fol- 6 Rinsing The purpose of this step is to remove residual
lowed. process chemicals from the PCB surface after each chemi-
cal processing step. This may be achieved in a single or
2 Microetch The purpose of this step is to micro-etch the multiple rinse steps. In some instances pre-dip and/or post-
copper and to produce a surface that may be uniformly dip process steps may also be required for optimum pro-
activated and plated with good deposit adhesion. A variety cess performance. Vendor specifications of temperature,
of different etchant types may be used (for example: dwell time, agitation and turn over rate should be followed.
sodium persulfate, peroxide/sulfuric). Vendor specifications
of temperature, dwell time, agitation and bath chemical 7 Drying The purpose of this step is to ensure the boards
control should be followed. are completely dry. This may be achieved by on-line verti-
cal or off-line horizontal drying. Off-line horizontal drying
3 Pre Dip Similar materials to tin bath, moderating initial should be preceded by a horizontal rinsing step and should
deposition of the tin, providing more controlled uniform be dedicated to the ISn process. The time and temperature
deposit. have to be optimized to suit the type of product.

9
IPC-4554 January 2007

APPENDIX 3
Qualification of ISn Process by the Board Supplier

During process qualification, the following aspects shall be pre- and with post-process steps and material. Solder mask
required: and legend ink are good examples of process or material
compatibility concerns.
Solderability Solderability shall meet the requirements of
J-STD-003, Category 3 throughout the life of the tin bath. Processability Follow vendor instructions for process
Qualification to lesser durability category ratings, such as 1 control to include: temperature & dwell time, frequency of
or 2, shall be AABUS. Due to the affinity of tin for copper, analysis, dump and remake schedules, controllers, etc. The
special attention should be paid to copper loading and its use of automatic dialysis systems to maintain both a con-
effect on the solderability performance stant and maximum copper loading is an option for high
Thickness Distribution Characterize thickness distribu- volume production facilities.
tion from panel to panel and within the different features of
SEC / SIR / Electrolytic Corrosion Testing ISn chemical
the panel. Establish acceptance criteria. Determine ‘‘use-
able tin’’ versus ‘‘total tin’’ deposit thickness over the life processes may have high ionic content that will produce
of the bath by use of either coulometric stripping or Auger corrosion failures in very short use time periods unless
analysis. great detail is paid to the cleanliness of the final product.
Multiple tests for SEC, SIR and Electrolytic corrosion are
Compatibility Due to the chemically aggressive nature of recommended over the useable bath life of a particular
the ISn process, verification of material compatibility is chemistry being qualified. Periodic conformance testing
very important. Verify that the process is compatible with should also be requested.

10
January 2007 IPC-4554

APPENDIX 4
XRF Measurement Techniques
Frank Ferrandino, Matrix Metrologies Inc.

Background and Measurement Considerations Mea- cence signal intensity from IAg and ISn is on the same
surement of the thickness of immersion silver (IAg) or order of magnitude as this background scatter, such varia-
immersion tin (ISn) plating on PCBs is an important opera- tions in background due to changes in Cu thickness can
tion in the manufacture of printed circuit boards. The thick- result in 10% to 50% error in thickness measurement.
ness of the finish has a direct impact on the solderability
Recommended XRF Configuration By employing back-
and the shelf life of the product. Thickness measurement
ground compensation software which attempts to model
by X-Ray Fluorescence (XRF) is a suitable choice as it is
the background noise on a sample by sample basis, and by
nondestructive, relatively fast, and lends itself well to pro-
using extra long measuring times (example 120 - 180 sec-
duction environments. However, measurement of thin ISn
onds), measurement of IAg and ISn is possible using the
and IAg deposits present some unique challenges to XRF
typical low cost XRF instrument configuration.
instrumentation. If not properly configured and/or cali-
brated, XRF measurements can be both inaccurate and In addition, with the use of a modified X-ray beam genera-
imprecise. tion column, one can excite the more efficient L- series
x-ray lines for IAg and ISn. Such cost effective modifica-
XRF tools all provide a source of x-rays (beam generation
tions are offered by some suppliers for standard XRF tools
column) and some method of x-ray detection of the result-
used by the PCB industry to measure plating thickness.
ant fluorescence from the sample being measured. Mea-
surement precision depends largely on the intensity of the The use of the L-series x-ray lines provides three benefits,
sample fluorescence (signal), the signal-to-background which improve accuracy and measurement precision:
ratio and the change in signal intensity with respect to 1. The fluorescence intensities for the L series x-ray lines
change in thickness. Measurement accuracy depends on the can be made to be higher than the K lines for the thick-
accuracy of the calibration standards, and the effectiveness ness range under consideration. Higher intensity auto-
of the calibration model used, as well as any spectrum pro- matically provides for better measurement precision.
cessing algorithms, which may be used to extract net inten-
2. Because the x-ray L line series are much lower in
sity data from the acquired sample spectrum.
energy than corresponding K lines for IAg and ISn, the
In the case of typical, lower cost XRF tools used to mea- maximum measurement range is drastically reduced
sure plating thickness in production environments, X-Ray (typically 60 microinches for Ag and 100 microinches
sources using tubes with W or Mo anodes are coupled with for Sn). By virtue of this reduced scale, the change in
proportional counter detectors. In most cases, this is a good L line fluorescence intensity with respect to change in
solution for most plating thickness measurement. plating thickness is significantly increased relative to
the K line series.
However, with respect to measurement of ISn and IAg on
PCBs there are two primary issues, which emerge when 3. Since the L-series are in the low energy part of the x-ray
using this typical XRF configuration, namely signal level spectrum, low energy scatter from the epoxy board
and background noise. material cannot penetrate the Cu layer to affect the
detector. Therefore, background noise levels in this
First, measurement precision is often poor because the sig- region of the spectrum are much lower than the higher
nal levels (i.e., fluorescence intensities) are low. In addi- energy portion of the spectrum. The significantly
tion, because such instruments typically detect the Ag and improved signal-to-noise ratios result again in better
Sn ‘‘K’’ series x-ray lines, the change in signal per change precision. Measurement accuracy is also improved, as
in thickness is often small. The result is a thickness mea- there is no background noise variation due to Cu thick-
surement which is not precise, and which is not sensitive to ness variation from sample to sample.
small changes in plating thickness. Gauge R&R studies
By making a simple configuration change, measurement
typically exceed 50% or more.
accuracies can be improved to ± 5% or ± 0.25 microinches,
The second issue relates to the high energy x-ray scatter regardless of copper laminate thickness. Gauge R&R
originating from the epoxy board material. This scatter will results are typically in the range of 10 to 20%, depending
provide excessive background noise in the IAg and ISn on measurement time used and process tolerances. This
spectral regions, which further degrades measurement pre- solution provides adequate measurement of ISn and IAg
cision. This background noise also varies with respect to coatings on larger pad areas (15 mil or larger) and traces
the laminate copper thickness. Since the plating fluores- which are at least 6 mils wide.

11
IPC-4554 January 2007

Further improvements to measurement precision can be the thin nature of these layers, concerns about intermetallic
achieved by more costly hardware modifications, namely formation and the stability and life expectancy of the stan-
solid-state detectors and optical focusing elements: dard must be considered. An elegant solution to these con-
cerns is the use of thin foil standards. Such foils are made
Solid-state detectors such as PIN diodes, Si (Li) or silicon
by vacuum deposition onto thin plastic carrier foils (typi-
drift, SDD detectors, can be used to further improve signal-
cally Mylar®). The result is a stable film, which is isolated
to-noise ratios and therefore measurement precision. Such
from any substrate and cannot form intermetallic layers.
detectors are often more sensitive than proportional
counters to low energy radiation such as IAg and ISn L line The thicknesses of such standards are typically calculated
fluorescence by virtue of their superior energy resolution on the basis of weight per area (as determined by a sensi-
and typically closer proximity to the sample. However, tive balance or other suitable analytical method) and then
used alone with standard XRF systems, this solution is converted to equivalent thickness by dividing by the hand-
beneficial only for measurement of relatively large sample book density for the layer.
areas (pads >30 mils square or traces >20 mils wide).
Measurement Interpretation Density variability and
By coupling these detectors with x-ray optics known as intermetallic formation have a direct effect on measurement
focusing elements, very precise measurement of immer- and must be understood for proper interpretation of the
sion coatings can be made on areas as small as 4 mils results.
square. X-ray optics focus x-rays from the x-ray source,
providing a high intensity beam to the sample. The result Density of the Deposit The XRF method does not mea-
is high intensity fluorescence. In addition, the optic will sure film thickness directly. Instead, XRF intensity relates
filter the x-ray spectrum from the source, favoring the low to the mass per area of the film. Linear thickness is calcu-
energy portion of the spectrum, which favors further lated by dividing mass per area units by film density. All
enhancement of L line fluorescence from ISn and IAg. A XRF instrument suppliers use the same convention in this
minimum detection limit of 0.1 microinches is possible case. That is, film density is assumed to be that given in
using such configurations. Gauge R&R values of <10% are published element reference tables and used to display
possible even on areas as small as 4 mils square. measurements in common thickness units such as micro-
inches, microns, nanometers and angstroms.
Instrumentation Configuration and Calibration Calibra-
In cases where the plating density is known to differ from
tion is achieved by using calibration standards in the range
conventional handbook densities, most XRF instruments
of 4 to 40 microinches. Calibration does not require the use
provide density correction software. As described previ-
of background subtraction software (however, if available
ously, calibration standards for IAg and ISn, are generally
it does not detract from the measurement to use such soft-
produced by vacuum deposition rather than chemical depo-
ware). Calibration schemes can include simple nonlinear
sition. XRF responds to plating mass per area. As long as
empirical curve fitting models or single layer fundamental
the immersion plating process deposits essentially pure Sn
parameters calibration models. The latter is preferred if one
or Ag layers, then XRF measurements will be accurate
is attempting to measure immersion plating thicknesses
since the calibration standards produced by vacuum depo-
>40 microinches.
sition are also essentially pure.
In either case, intensity information should be collected
Factors such as surface finish, surface oxidation, and crys-
from that part of the spectrum in which the L line series of
tal structure will not affect in any appreciable way, XRF
the plating element (Sn or Ag) appears. This configuration
measurements of plating thickness. Only differences in
will provide adequate precision and accuracy for immer-
density between the certified standards (using assumed,
sion Ag and Sn when using measurement times on the
handbook density values) and the density of immersion
order of 30 to 90 seconds when measuring sample pads
plating will influence thickness measurement calculation.
>15 mils square or traces >6 mils wide.
Such differences may be caused by deviations in the crys-
Measurement of smaller sample areas will either require tal structure of the deposit or porosity variations. In such
longer measurement time or the use of higher cost XRF cases, unless compensated for using a density correction,
products utilizing focusing elements and solid state detec- there will be systematic differences between XRF thickness
tors with significant improvements in the form of better measurements and measurements using other techniques
measurement precision, reduction in measurement time and such as SEM micrographs, which measure true linear film
reduction in minimum detectable limits. thickness.
Thickness Standards Certified thickness standards are Intermetallic Formation Especially in the case of ISn, it
needed, either to calibrate the XRF tool or in the case of is well established that migration of Sn and Cu will form
certain fundamental parameters (‘‘standard less’’) calibra- intermetallic layers with various species of Sn-Cu combi-
tions, to verify that measurements are accurate. Because of nations. This intermetallic growth can potentially produce
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12
January 2007 IPC-4554

a significant effect on XRF measurements. Sn signal inten- immersion palladium (IPd) measurements. However, mea-
sity will change as a result of intermetallic formation. This surement of other plating metal deposits, such as Au and
is due to the absorption (i.e., shielding) influence of Cu tin/lead (SnPb), are not as precise using these same con-
atoms on Sn x-rays fluoresced in the intermetallic zone. figurations. As such, the user who needs to measure ISn or
This effect reduces overall Sn signal when compared to the IAg as well as immersion gold (IAu) and solder alloy
equivalent number of Sn atoms if they were to all lie on top deposits, must consider trade-offs in precision and deter-
of the Cu substrate. This would translate into an apparent mine which applications are more critical to control.
reduction in Sn plating thickness measurement, even
though no Sn atoms are lost or removed from the sample. The above recommended XRF configurations provide a
much greater improvement benefit for ISn, IAg and IPd
Qualitatively speaking, this effect is to be expected; render- compared to the relatively smaller decline in measurement
ing measurements of immersion Sn-plated PCBs biased on precision for IAu plating and solder plating. The latter is
the low side. On the other hand, if one wanted to consider only evident when smaller x-ray beams are used (<12 mils
only the thickness of the ‘‘free’’ Sn layer, the bias in XRF or 0.3 mm) and can be compensated for with longer mea-
thickness measurement would be on the high side, since surement times. It should be noted that declines in mea-
some Sn X-Rays from the intermetallic zone are counted surement performance for IAu and solder plating, using the
and included in the thickness calculation. In either case, the above XRF are restricted to measurement precision. Mea-
magnitude of the bias will be determined by the magnitude surement accuracy in any case for these applications will
of the intermetallic formation. not decline using the above XRF configuration.
While such measurements have limited merit in terms of
absolute accuracy, they provide the user with a relative In any case, when considering the optimum XRF configu-
measure for process control. ration for a given set of plating measurement applications,
one should consult with the XRF supplier for specific
Other Applications The same XRF configurations recom- recommendations.
mended above for IAg and ISn are also effective for

13
IPC-4554 January 2007

APPENDIX 5
Auger/XPS and Coulometric Stripping Techniques
Dr. Peter Meeh, MacDermid GmbH,
David D. Hillman, Rockwell Collins,
Gerard A. O’Brien, Photocircuits Corporation and
Trevor Bowers, Adtran Inc.

Auger Electron Spectroscopy (AES) Auger electron

spectroscopy (AES) identifies elemental compositions of Auger Process X-Ray Process
surfaces by measuring the energies of emitted Auger elec-
Fermi
trons. Auger electron emission is stimulated by bombarding Level Auger (eV)
the sample with an electron beam. The Auger electron Electron
0
energies are characteristic of the elements from which the 3d M4,5 3.7
electrons come. Auger electron spectroscopy is a wide-
spread method for analysis of surfaces, thin films, and 3p M2,3 34.6
interfaces.
3s M1 60.3
The basic Auger process starts with removal of an inner
shell atomic electron to form a vacancy. Several processes
are capable of producing the vacancy, but bombardment
with an electron beam is the most common. The inner shell X-Ray
2p L3 455.5
vacancy is filled by a second atomic electron from a higher
2p L2 461.5
shell. Energy must be simultaneously released. A third
2s L1 563.7
electron, termed the Auger electron, escapes carrying the
excess energy in a radiationless process. The process of an
excited ion decaying into a doubly charged ion by ejection
1s 4966.4
of an electron is called the Auger process. Alternatively, an
X-ray photon removes the energy. For low atomic number IPC-4554-a-5-1

elements, the most probable transitions occur when a Figure A5-1 Auger vs. X-ray Emission Process
K-level electron is ejected by the primary beam, an L-level
electron drops into the vacancy, and another L-level elec-
tron is ejected. Higher atomic number elements have LMM
constant current source
and MNN transitions that are more probable than KLL (see
Figure A5-1).
current I
Figure A5-1 illustrates two competing paths for energy dis-
sipation with titanium as an example. The illustrated LMM
U
Auger electron energy is ~423 eV (EAuger = EL2 - EM4 - voltage U t
EM3) and the X-ray photon energy is ~457.8 eV (Ehv = EL2 voltage/time recorder
- EM4).
conductive track
width << width of sample area
Thickness Measurement of Immersion Tin on Copper by
Coulometric Stripping Analysis Coulometric stripping
analysis is a low cost but still very precise method for the
measurement of the thickness of thin immersion tin depos- diluted
sulphuric acid
its on copper.
stainless steel cathode sample area A on pcb coupon,
The principle setups of commercially available measure- plated with immersion tin
ment devices are shown in Figures A5-2 and A5-3. IPC-4554-a-5-2

Setup (A) uses test coupons with a defined area (e.g., 1 cm2 Figure A5-2 Coulometric Stripping Analysis Using Test
to 10 cm2). This method is preferably used for the control Coupon (A)
of immersion tin process solutions.

14
January 2007 IPC-4554

the manual skill of the operator is only low. It is also pos-

sible to include a test coupon in the layout of a pcb panel.
constant current source The test area required is preferably in the range of 1 cm3
to 10 cm3.
current I
The method with the test tube is only recommended for a
research environment. Because the test area is defined by
U
voltage U t the gasket one has to be very careful that the gasket is
voltage/time recorder properly placed and no test solution is leaking. If this is the
glass or
sample area A, plastic case the error of the method becomes unpredictable. On the
defined by the tube diluted sulphuric acid
aperture of the other hand it might be possible to use the method on dedi-
gasket gasket aperture cated test areas of production pcb. In this case one has to
0.5 mm to 10mm
be very careful avoiding a contamination of other areas on
the board by the corrosive test solution.

pcb with conductive track, Principles of the Measurement The sample with the
plated with immersion tin immersion tin deposit is attached to the positive connector
IPC-4554-a-5-3
of the current source (anode). The electrolyte solution con-
Figure A5-3 Coulometric Stripping Analysis Using a Tube sists of diluted sulfuric acid (preferably 1% to 15% by vol-
with a Gasket (B) ume of concentrated sulfuric acid in water) - (see Figure
A5-4). If the current is switched on the tin deposit is oxi-
Setup (B) uses a small tube with a volume of some cubic
dized by the electric current and dissolved according to the
centimeters made of plastic or glass with a nozzle and a
formal reaction equation:
gasket at the bottom. The test area is defined by the aper-
ture of the gasket. Sn → Sn2+ + 2 e-
Both methods are destructive, the tin deposit on the test Where e- is the electric charge that is ‘‘consumed’’ by the
area is dissolved during the analysis. current source (=time x current).
The reproducibility of method A is mainly determined by The other electrode (cathode) is attached to the negative
the accuracy of the area on the test coupon. If the width of connector of the current source. Materials like graphite,
the conductive track that connects the test area to the cur- stainless steel, copper or platinum may be used (stainless
rent source is small enough the error that is caused by the steel is preferred, it is cheap and of adequate chemical
immersion of this track is very small. This method is there- resistance). As long as there is no or only a slight change
fore safe to be used in a production area. The demand on of the differential resistance of this electrode during the

endpoint t=265 s
0.8 corresponding to 1.131 µm

0.6 current off

0.4
sample immersed
0.2 endpoint
Voltage U/V

current off
0.0
-50 0 50 100 150 200 250 300
-0.2
current on t=0
-0.4
untreated (age < 1h)
-0.6 2 x reflow oven

-0.8 IPC-4554-a-5-4

Figure A5-4 Coulometric Stripping of Tin on Copper in Diluted Sulfuric Acid (Area = 5 cm2; Stripping Current = 25.30 mA;
Stainless Steel Cathode)

15
IPC-4554 January 2007

measurement there is no special requirement for the mate-

rial used. In most cases the reaction that takes place at the
cathode will be the production of small amounts of hydro-
gen.
2 H30+ + 2 e- → H2 + 2 H20

The measurement is based on the assumption that the mass

of the tin that is stripped from the surface is proportional
to the charge that passes through the sample area and the
test solution. If a constant current source is used the charge
and hence the amount of tin that is stripped is proportional
to the time.

In the case of a tin deposit a well defined change of the

differential resistance of the interface of the test area and
the solution is observed when the tin is just completely
stripped. Therefore it is very easy to detect the endpoint of
the stripping reaction. Figure A5-5 Coupons after Coulometric Stripping

The total resistance of the cell according to method A with Figures A5-6 and A5-7. The sputter time of an SNMS mea-
a test area of 5 cm2 and a stainless steel cathode is in the surement is approximately proportional to the thickness of
range of 6 Ohm and changes abruptly to about 28°Ohm the respective layers.
when the tin is completely stripped. That means that the Possible designs of coulometric measurement devices:
voltage across the cell changes from about 0.15 V to 1) A very simple design of a constant current source is
approximately 0.7 V if a current of 25 mA is applied. In made of a power supply with approximately constant
this way current and time are convenient to measure with high dc voltage (danger!) and a large series resistor
the required precision (better than 1%). Requirements for compared to the differential resistance of the cell (e.g.,
the voltage measurements are very simple (only low inner 250 V; 10,000 Ohm; high power resistor). The voltage
resistance and low precision are necessary). across the cell is observed visually on a simple voltme-
The blue line in the diagram shows the voltage time graph ter and the time until the voltage change occurs is mea-
for a new deposit (one hour after the plating process) for a sured with a stopwatch.
test area of 5 cm2 and a constant current of 25.3°mA. A 2) A constant voltage regulator and a high precision resis-
sample that was processed with immersion tin at the same tor are used as a constant current source. The endpoint
time and conditions was passed through a reflow oven two is detected by an analog differentiator followed by a
times (peak temperature 250 °C, time above 221 °C comparator that triggers an optical or acoustic signal at
approximately 60 s). Now the thickness measurement the endpoint. The time is measured manually with a
result looks like the pink diagram. During the reflow pro- stopwatch or with a clock that is electrically triggered
cess the immersion tin deposit is almost completely con- by the current switch and the comparator. Sometimes
verted to intermetallic tin / copper (Sn5Cu6 and SnCu3). false measurements may occur because of contamina-
Obviously the coulometric stripping analysis is only detect- tions on the cathode. These false measurements are gen-
ing the pure tin deposit. Intermetallic tin copper phases are erally far away from reasonable results and are therefore
not attacked under these conditions. easy to detect.

Figure A5-5 shows the surfaces of coupons after the strip- 3) The same constant current source as in 2), is used. A
ping analysis. On the left coupon, the typical color of pure microprocessor is used to control all functions. Many
copper appears where the sample has an untreated tin sur- micro-controllers are equipped with simple eight-bit AD
face. If the coupon is treated in the oven, the surface converters which are accurate enough to detect the end-
remains silver colored after stripping, which is typical for point by calculating the first derivative of the voltage
the residual intermetallic tin/copper alloy. over time. An auxiliary electrode can be used to condi-
tion the cathode by applying a current before starting
The assumption that intermetallic tin copper phases are the measurement. Hence highly accurate and reliable
responsible for the behaviour observed above is proven by results are obtained with a relatively simple fully auto-
SNMS analysis (secondary neutral particle mass spectros- matic device. The operator just has to insert the test
copy, measurements done by IFOS, Universität Kaiserslau- coupon in a sample clamp and press a button. The result
tern, Germany). Again the results for untreated samples and is shown on a display or transferred to a printer or com-
samples after having passed a reflow oven are shown in puter.

16
January 2007 IPC-4554

100
90 Tin
Copper
80
70
60
Atom %

50
40
30
20
10
0
0 100 200 300 400 500 600 700 800 900 1000
Sputter Time/s IPC-4554-a-5-6

Figure A5-6 SNMS Measurement for an Untreated Deposit (initial thickness approximately 0.8 µm)

100
90 Copper
80
70
60
Atom %

50
Sn5Cu6 (45.5% Sn)
40
30
SnCu3 (25% Sn)
20
10
0
0 200 400 600 800 1000 1200 1400 1600

Sputter Time/s IPC-4554-a-5-7

Figure A5-7 SNMS Measurement of a Deposit; Storage of Four Hours at 155 °C and 2X Reflow Oven (initial thickness
approximately 0.8°µm)

--`,```,,,``,,,,,``,,,,```,,,-`-`,,`,,`,`,,`---
17
IPC-4554 January 2007

Assumptions and Results:

1.20
1) The current efficiency at the tin surface is 100%. AAS
1.00 p-test
2) The spontaneous oxidation of the tin is slow compared

Thickness [µm]
to the electrochemical oxidation. If tin is immersed into 0.80
a sulfuric acidic solution the following reaction occurs 0.60
spontaneously and tin sulfate and hydrogen are formed.
0.40
Sn + H2SO4 → SnSO4 + H2 0.20
Practically this reaction is slow if the solution is not 0.00
2 4 6 8 10 12
stirred or moved. The time between immersion of a
Immersion Time in the Tin Bath at 71ºC/min
sample and switching on the current should be short IPC-4554-a-5-8
(less than 60 s).
Figure A5-8 Comparison of Coulometric Measurements
3) The macroscopic surface area of the sample is equal to
(MacDermid p-test) with Chemical Analysis (AAS)
the real microscopic surface area of the tin deposit.
4) The density of the immersion tin deposit is equal to the
Intermetallic Growth of Tin/Copper (Sn/Cu) with Immer-
bulk density of tin.
sion Tin: Disclaimer: In order for the following to be use-
Assumptions 3) and 4) are also necessary for all other ful, two assumptions must be made:
measurement methods. If these assumptions are not correct (1) Intermetallic growth in immersion tin (ISn)/Cu couples
it would not be recognized if one of the methods is cali- is diffusion-controlled, and growth is proportional to:
brated against one of the others. (time)1/2. That is, the growth follows Arrhenius behav-
ior, which is (most likely) a good assumption.
Calculation of the Thickness:
(2) Activation energies and diffusivities for Sn/Cu couples
The tin mass (m) that is stripped is: hold regardless of whether the Sn was applied by an
m = i x t x M / (F x 2) electroplating or immersion process.
where: The Intermetallic Growth (z) is defined by the following
i = current equation:
t = stripping time z2 = (D0t) e-Q/RT
F = Faraday’s constant = 96,478 Amps/mol
M = molar mass of tin = 118.69 g/mol WHERE:
z ~ intermetallic growth [m] after time t and temperature
Finally the deposit thickness (s) is:
T
s = m / (A x D)
D0 ~ diffusivity [m2/s]
where: t ~ time [s]
A = sample area Q ~ activation energy of diffusion [J]
D = density of tin = 7.29 g/cm3 R ~ universal gas constant [8.314 J/mol-°K]
T ~ temperature [K]
The only parameter that has to be calibrated in this calcu-
lation is the constant current i. Currents in the range of For electroplated Sn over Cu, Dr. Chris Hunt of the NPL
some 10 mA are easy to measure with a high precision. (UK) gives these values:
Current sources with a precision of 1% or better and a good Q = 70,000 J
stability are simple and cheap devices. All other constants D0 = 3.0 x 10-8 m2/s
in the calculation are fundamental physical constants.
Example:
Figure A5-8 shows a comparison of thickness measure-
ments calculated from chemical analysis [Atomic Absorp- At a temperature of 155 °C for six hours, the additional
tion Spectroscopy (AAS) after complete chemical dissolu- intermetallic growth thickness expected would be:
tion of the tin] and coulometric results. z = {[3.0x10-8 m2/s] - [21,600 s] -
[e-70,000 J / (8.314 J/mol-K) (428K)]}1/2 = 1.36 µm [53.54 µin]
One should take into consideration that the absolute preci-
sion of the analysis of tin by AAS is limited to about 2%. Note: The time and temperature associated with a reflow
In the limits of this precision, the assumption of a current profile is obviously not fixed, as in the above example.
efficiency of 100% is proven. The reproducibility of coulo- However, the same formula could be applied for intervals
metric measurements with proper equipment was shown to within the profile that are nearly fixed, and then those
be better that 1%. results could be summed.

18
January 2007 IPC-4554

APPENDIX 6
Tin Whiskers
Excerpt from JP002†
Joseph Smetana, Alcatel - One OEM’s Practice Concerning Tin Whiskers‡

†JP002, Current Tin Whisker Theory and Mitigation Prac-

tices Guideline 5.10.1 Immersion Tin
Immersion tin is a chemical displacement process that
results in a relatively thin (approximately 1 micron or
approximately 40 micro-inches) and stress-free tin film.
Immersion tin’s primary purpose as a surface finish for
PCB applications, is solderability protection for the under-
lying copper basis metal.
As previously mentioned above, a potentially significant
source for whisker formation are stresses induced from the
formation of CuSn IMCs. While whisker formation is a
concern, the primary concern is migration of the IMCs
through the deposit and subsequent oxidation at the sur-
face, thus rendering the deposit nonsolderable. To this end
it is imperative that the specification for a minimum
deposit thickness of 1 micron be recommended - the
thicker deposit improves shelf life, as a significant layer Figure A6-4 Whisker in an Immersion Tin Plated 0.46
through which the IMCs must travel, before solderability is micron (0.018 in) Diameter Via Hole
impaired [49].
The use of annealing procedures of 150 °C for one hour is sequently plated over with copper/immersion tin (consid-
not practical for printed circuit boards due to the potential ered at this stage a round SMT pad) and then soldered, will
negative impact of this temperature on warp and twist char- help mitigate whisker formation but still provide test point
acteristics. capability.

Whiskers have been grown on immersion tin conductive [49] Thomas A. Woodrow and Eugene A. Ledbury, ‘‘Evalu-
features To date, these whiskers have appeared at ambient ation of Conformal Coatings as a Tin Whisker Mitigation
conditions with time and not as a result of exposure to heat, Strategy,’’ IPC/JEDEC 8th International Conference on
vacuum, pressure, humidity or bias voltage [49]. This Lead-Free Electronic Components and Assemblies, San
would seem to indicate that the primary source is CuSn Jose, CA, April 18-20, 2005.
migration stress. Whisker length has been reported to be ‡One OEM’s Practice Concerning Tin Whiskers
significant in vias, with lengths measured at 150 microns It is further accepted that, once the deposit is consumed by
(see Figure A6-4). Whiskers of much smaller length have the natural formation of CuSn intermetallics, the possibil-
been recorded growing off the edge of surface mount ity of a whisker growth is minimized to a level of no longer
(SMT) component pads, as well [49]. being a concern.
Immersion tin is a suitable minimum risk selection that has ISn users both CMs and OEMs may have their own
been successfully used by some companies in below giga- requirements pertaining to whisker growth susceptibility
hertz frequency applications. It is a potentially viable lead testing. An example of one such requirement is given
free finish option for some PCB applications. below:
From a mitigation view point, there are several options that - ‘‘that Immersion tin finishes should be tested and
should be reviewed if assembling a PWB with an Immer- inspected for tin whisker growth (on pad edges and plated
sion Tin surface finish. The first option should be to ensure through holes) using the room temperature aging require-
that all surfaces plated with tin be soldered, including vias. ments (30°C/60%RH) of JEDEC JESD22A121 for a mini-
The consumption of the deposit as a function of soldering mum of 3000 hours’’
will all but eliminate any potential for whisker growth [49].
Where it is not possible to solder all vias, the use of hole- The IPC 4-14 Plating Processes Subcommittee welcomes
fill materials should be investigated. For vias used as test additional data pertaining to whisker testing and results
points, the use of conductive hole-fill material that is sub- obtained.

19
IPC-4554 January 2007

APPENDIX 7
Solder Spread Test Protocol

Spread Factor: Evaluate the Samples:

a. Use a micrometer to measure the total thickness of the
1. Condition samples at 75 °F, 30-60% RH for 24 hours.
coupon and solder (T) and the coupon thickness (t).
2. Handle with cotton or nylon gloves. Calculate the solder height (H) using:
H=T-t
3. Weigh each coupon to the nearest milligram (w). b. Measure the combined weight of the coupon and the
solder (W) to the nearest milligram. Calculate the solder
4. Place 0.065 inch thick by 0.25 inch diameter deposit of
weight (M) using:
solder paste to be tested in the center of the coupon
M=W-w
using the appropriate stencil.
c. Calculate the volume of solder (V) using:
5. Reflow the samples using the manufacturer’s recom- V = M/ρ
mended profile or AABUS. d. Calculate the contact angle using this equation:
θc = √(3πH3) (√(6V - πH3)) / (3V - 2πH3)
6. Clean the samples.
e. Enter all formulas and data into a spreadsheet, such as
7. Condition samples at 75 °F, 30-60% RH for 24 hours. Excel.

20
January 2007 IPC-4554

APPENDIX 8
Standard Development Efforts for IPC-4554,
Specification for Immersion Tin Plating for Printed Circuit Boards
Gerard O’Brien, Photocircuits Corporation and
George Milad, Uyemura International Corporation

Introduction Immersion Tin (ISn) has existed and been the mating metallurgy has been exempted from the RoHS
used for many decades in the PCB industry. In the 1960s, directives. ISn has also been used for Zero Insertion Force
it was used as a shiny coating or brightener for SnPb plated (ZIF) connectors for memory modules. Caution for its use
reflowed PCB’s that looked dull. Its use was purely cos- in this application, due to the potential for whisker growth,
metic. The potential use of ISn as a surface finish has been should be exercised.
evaluated many times in the last four decades. The conclu-
As mentioned above, the phenomenon of copper migration
sion prior to the current generation of tin products was that
through the tin deposit is of primary concern, as this
it was suitable for a very finite shelf life - number of weeks
impacts the shelf life of the product. The ratio of copper-
- due to the migration of Cu through the Sn deposit. The
tin intermetallic compounds in the deposit to the useable
current generation of tin still has to deal with this naturally
tin in the deposit dictates the shelf life of the deposit.
occurring phenomenon but the formulations retard the
Thickness of the deposit that does not take into account
migration to a point where a very useable shelf life is eas-
useable tin, CuSn IMCs and total deposit thickness may
ily achieved. Twelve months of shelf life is generally not
result in PWBs that meet the thickness specification but in
an issue.
fact have limited to no solderability. Determination of use-
Soldering to tin is relatively easy, especially considering able tin requires the use of test equipment that may not be
the majority of assembly solders contain tin as the domi- typically found in the PWB fab house or at the assembly
nant metal. It is a flat planar surface that forms a copper tin location. If ISn is the surface finish of choice the availabil-
intermetallic compound similar to HASL and does not ity of such equipment is mandatory to ensure consistent
require a change in assembly profiles. Unlike HASL how- reliable deposits.
ever, the ISn deposit does not melt during typical reflow
assembly, which means that the surface is soldered to The IPC Plating Subcommittee 4-14 took on the task of
rather than fusing similar molten metals. creating an IPC specification that could be called out by
designers, manufacturers and buyers [Original Equipment
The ISn process, while appearing on the outside to be a
Manufacturers (OEMs) and assemblers / Contract Manu-
rather simple one, compared with ENIG, is actually equally
facturers (CMs or EMS providers). The project attracted
challenging and has the potential for many problems that
participation from a representative cross section of the
directly impact the performance of the final product. The
industry. The active members were compromised of per-
use of the correct analytical tools both in process and as a
sonnel from OEMs, EMS providers, PCB fabricators,
QC check cannot be overstated. Ignoring the recommended
chemical suppliers and others.
process guidelines from the chemical suppliers or using
FAB houses with less than demonstrated process excel- This paper is a report on the activities of the 4-14 Plating
lence is done at the user’s peril. The product as supplied to Processes Subcommittee in producing the specification.
the end user MUST have a useable tin layer, free of con-
taminants and process byproducts, for successful assembly. Process Definition ISn is a thin immersion deposit over
copper. It is primarily a solderable surface finish. It has
Immersion Tin produces Whiskers! This is a fact. The
been used for press fit connections and as a suitable surface
degree of whisker growth may be contained or mitigated
for ZIF connectors. The immersion tin protects the under-
but the fact remains that they do occur and the impact of
lying copper from oxidation over its intended shelf life.
their growth on the reliability of the end product is the
responsibility of the designer specifying the use of ISn as a Industry Survey As the committee had done for the other
surface finish. documents in the 45XX series, based on the fact that there
ISn is primarily used as a solderable surface. It may also be was no industry specification, an informal survey of suppli-
used for press fit applications. It was thought initially to be ers, manufacturers and end users was undertaken. Figure
an ideal surface finish for Pb-free press fit (compliant pin) A8-1 shows the results of this survey. From the data, the
applications but of late there have been reports of tin whis- OEM’s are typically looking for a thicker deposit to ensure
ker formation when used for press fit applications, the longer shelf life. The suppliers and PCB houses are recom-
result of the compressive forces applied to the deposit as a mending a slightly thinner deposit, to increase throughput
function of insertion. As a consequence the use of SnPb as and minimize any chance of solder mask attack. Also

21
IPC-4554 January 2007

as per the definition in J-STD-003. This recommended

65 thickness remained unchallenged until the document was
60 sent out for ballot. The majority of ISn is used in Europe
and, based on ballot ‘‘technical’’ input and practical expe-
55 rience, an alternate non-Category 3 durability deposit was
50 proposed. This deposit would meet Category 1 and 2 as per
the J-STD-003 and the associated coating thickness is
45
I Sn

stated as follows:
40 1) The minimum immersion tin thickness shall be 0.6
micron (24 micro-inches) at -4 sigma from the process
35 mean when measured on a pad of 1.5 mm X 1.5 mm [60
30 mil X 60mil] or equivalent area of 2.25 mm2 [3600
mils2] and where the typical values range from 0.65 µm
25 to 0.8 µm.
20 As can be seen from Figure A8-2, supplier C had submit-
OEM’s PWB Suppliers ted to the committee samples for the long term solderabil-
Group ity shelf life test with a mean deposit thickness of 0.6
microns. Why supplier C submitted this thickness is
Means and Std Deviations unknown and may have been in error on his part. It was
Level Number Mean Std Dev Std Err Mean
fortuitous for our committee to have an otherwise ‘‘good’’
deposit with useable tin at this thickness for the long term
OEM’s 8 40.6250 14.2522 5.0389
shelf life study. Reduction in wetting forces were recorded
PWB 5 34.0000 14.7479 6.5955
approximately 147 days into real time testing with a con-
Suppliers 11 38.4545 13.8084 4.1634
tinuing reduction as the test continued, consistent with the
IPC-4554-a-8-1
shelf life durability of Category 1 or 2. Given the overall
Figure A8-1 Industry Survey for ISn Deposit otherwise excellent performance of supplier C, it is
Recommendations assumed that that reduction in wetting performance was a
evident is a general consensus that on average 35+ micro- function of a thin deposit and subsequently a shorter time
inches would be an acceptable place to start. for the Cu migration to the surface. See Figure A8-3 for the
wetting balance curves for vendor C and Figure A8-4 for a
This subcommittee prides itself on having data to back up comparison to a thicker, 1 micron deposit.
any numeric value and so performance testing was com-
menced. Wetting balance and solder spread coupons were The ability to measure ISn is not as challenging as the
created and tested to determine deposit thickness with a 12 other immersion deposits covered in the 455X series. The
month shelf life being the target. deposition rate is not as adversely affected by the feature
size on the board. However it is imperative that the 30%
Tin Thickness The typical degradation of solderability rule be adhered to in order to minimize erroneous readings
performance for ISn is the inevitable migration and expo- due to background contributions from the laminate (bro-
sure of the CuSn IMC onto the surface. Once on the sur- mine) and/or solder mask. By specifying the pad size in the
face this IMC oxidizes to a nonsolderable IMC Cu3Sn. thickness specifications, it is the intent of the committee to
This migration of the copper through the deposit is a func- enforce this rule, the majority of XRF units being fitted
tion of time and temperature and follows an Arrhenius with a 20 mil collimator.
equation. The deposit thickness therefore plays a direct part
XRF Thickness Measurements and Coulometric Strip-
in defining shelf life, all things being equal. The thickness
ping The ability to accurately measure useable tin as
specification was initially proposed as the following:
opposed to the metallic deposit that is on the surface of the
1) The minimum immersion tin thickness shall be 1 PCB cannot be overstated. It is the useable tin that provides
micron (40 micro-inches) at -4 sigma from the process shelf life for the deposit. The XRF is only as good as the
mean when measured on a pad of 1.5 mm X 1.5 mm [60 standards against which it was calibrated. ISn standards
mil X 60 mil] or equivalent area of 2.25 mm2 [3600 used for XRF calibration may be plated directly over cop-
mils2] and where the typical values range from 1.15 µm per. Standards thus manufactured are considered ‘‘active’’
to 1.3 µm. and have a finite shelf life - the mechanism of copper
This deposit thickness guarantees 12 months of shelf life migration through the tin is exactly the same as for the
provided that, as supplied to the end user, the majority of PCB. Calibration of CuSn IMCs instead of virgin Sn will
the deposit contains useable tin and not CuSn IMCs. Per- have a negative impact on accuracy. The preferred stan-
formance durability rating of the deposit was a Category 3 dards should be tin plated over Mylar™, the absence of

22
January 2007 IPC-4554

copper in intimate contact with the tin providing a standard

that can be recertified on an annual basis and if not dam-
45
aged by handling should provide years of service.

40 The XRF cannot differentiate between useable tin and IMC

compounds that will exist in the deposit. As such, the use
35
of XRF should be for process control at the FAB house
where the measurement of the deposit should occur at a
time where the presence of CuSn IMCs are negligible. It
30
may be used as an incoming test method to verify overall
deposit thickness. It will most certainly differentiate
25 between 0.6 microns for Category 1 or 2 versus 1 micron
Vendor A Vendor B Vendor C Vendor D Vendor E for Category 3 durability.
Supplier To determine the amount of useable tin in a given deposit
Means and Std Deviations requires the use of alternate test methods. These can range
from very sophisticated, expensive and generally not found
Level Number Mean Std Dev Std Err Mean
Vendor A 30 41.2050 1.72908 0.31569
at the FAB house or EMS providers such as Auger or XPS
Vendor B 30 40.2000 1.62587 0.29684
to the more common, less expensive more practical Coulo-
Vendor C 30 25.8000 0.99481 0.18163
metric stripping techniques such as SERA. It is recom-
Vendor D 30 40.2500 1.81195 0.33082 mended that when qualifying a vendor, whether chemical
Vendor E 30 41.3333 1.69550 0.30955 supplier or FAB house, the ability to demonstrate useable
IPC-4554-a-8-2 tin, the impact of shelf life on useable tin, impact of bath
age and copper concentration in the bath (as a function of
Figure A8-2 Sample of XRF Measurements for the Five
Suppliers to the Round Robin Testing contamination) on the useable tin be demonstrated and

0.25

0.2

0.15
Wetting Force in mN/mm

control
day 59
0.1 day 78
day 95
day 106
day 124
0.05
day 134
day 149
day 167
0
day 185
5
0. 5

5
5

5
5

8. 5
5

5
5

5
75

25
25

75
1. 5

8. 5

75
5

7. 5
5
0

9
37
37

62

12
12

87
37

87
62

12

62
87

37
7

2
4.

7.
1.

day 220
3.

5.
2.

6.

9.
9.
0.

5.

7.
4.
3.
2.

4.
1.

6.

day 240
-0.05
day 265

-0.1

-0.15
Time in Seconds
IPC-4554-a-8-3

Figure A8-3 Impact of Age on 0.6 Micron Average Thickness Deposit Through 265 Days

--`,```,,,``,,,,,``,,,,```,,,-`-`,,`,,`,`,,`---

23
IPC-4554 January 2007

Vendor E immersion tin average wetting force results, real time testing, Actiec 2 flux

0.25

0.2
Wetting Force in mN/mm

0.15

control
0.1 day 28
day 46
0.05 day 59
day 73
day 88
0 day 177
5

8. 5
5
1. 5

5
5

5
0. 5

5
75

75
25

75
25

25
5

5
5

day 205

9
3

6
0

87

62

37

87
37
7

12
12

12

62
37

37
87

62
1.

7.
4.
3.

9.
5.

6.
2.
1.

2.

6.

7.
3.

7.
4.

5.
0.

9.
4.

8.
day 239
-0.05

-0.1

-0.15
Time in Seconds
IPC-4554-a-8-4

Figure A8-4 Comparison of Impact of Aging On a 1.0 Micron Average Deposit Through 239 Days

measured. Testing should be performed on a regular basis panel into strips containing 14 wetting balance test coupons
in order to reduce the possibility of assembly defects. similar to Figure A8-5 below.

Round Robin Testing For the performance testing of the

ISn deposits, it was decided that, to level the playing field,
each supplier would supply the test vehicle coupons plated
to the ‘‘normal’’ recommended parameters, but in a bath at
25% of its life. This would provide a deposit from a work-
ing bath, containing a certain level of copper as a byprod-
uct of the reaction, as well as looking at the impact of any
breakdown products from the thiourea, which is a natural
PCB TEST BRD
component of ISn baths. Thiourea can break down and
co-deposit sulfur with the tin which has a negative impact
on solderability.
Five suppliers of ISn participated in the round robin test-
IPC-4554-a-8-5
ing. As in previous 455X round robin tests, acid copper
plated wetting balance coupon panels were sent to the five Figure A8-5 Wetting Balance Coupon
ISn suppliers. In addition, a solder spread test vehicle, also
acid copper plated, was submitted for plating. The use of The solder spread test vehicle was likewise identified and
solder spread tests are becoming more popular and the sup- scored into 1 inch square coupons, as shown in Figure
pliers and users of ISn appear to prefer spread testing to A8-6.
other documented solderability test methods for PCBs as
Solderability As mentioned in the opening section of this
defined by the J-STD-003 document.
paper, the thickness specification is based on performance
Upon receipt of the plated panels, they were identified by results, the primary measure of performance for ISn is
vendor code A through E, scored and routed out of the solderability. Because no preconditioning regime exists to

24
January 2007 IPC-4554

As can be seen from the data, the vendor C samples were

significantly lower in thickness compared to the other sup-
pliers which provided an excellent source of data for what
SSS381 BCP would become the Category 1 and 2 durability product.

Shelf Life/Packaging Samples once received at Photocir-

cuits Corporation from the five vendors were identified-
,scored and routed into strips of 14 coupons/strip. They
were then placed into plastic tote bins and stacked one on
another. Their relative position in the stack was rotated on
a regular basis. Initial testing consisted of pulling a strip at
random from the pile and testing 10 coupons from the
14/strip per the J-STD-003 using Actiec 2 flux. The two
coupons at each end of the strip were not tested in order to
remove the possibility of ‘‘handling’’ issues.
In addition to testing at 235 °C as per the specification,
Figure A8-6 Solder Spread Test Vehicle some additional testing was performed at 215 °C, typical
reflow temperature for SnPb assembly. This was done to
replicate actual shelf life conditions for the alternate
examine the impact of wetting time as a function of CuSn
finishes, this committee again undertook the task of testing
IMC growth and migration through the deposit as com-
solderability in real time using a wetting balance. The same
pared to testing at the Liquidus point of pure tin. Figure
test vehicle used for the IPC-4552 specification was again
A8-7 through Figure A8-13 detail the relative performance
the vehicle of choice and panels were sent to multiple
of the vendors at the early stages of the test; all at 235 °C.
sources for ISn plating. The thickness of the deposit was
- Test Temperature of 215 °C
measured using the reference XRF ‘‘micron X’’ unit, the
results are detailed in Figure A8-2.

0.25 control

0.2 day 47
Wetting Force in mN/mm

day 138
0.15
day 157
0.1
day 174
0.05 day 185

0 day 203
5
1.21

5
0.5

1.7.5
5

5.5
3.5

5
5

9.5
8.28
5

5
5

6.5
2.5

7.5
5

8.75
5

10
2.22

4.5

5
4.24
3
0.20
5

9.29
7
3.7
0.7

4.7

5.7

6.7

9.7
7.2
3.2

5.2
2.7

7.7

8.
6.2
1

day 228
-0.05
day 238
-0.1
day 311
-0.15 day 327

-0.2 day 400

Time in Seconds
IPC-4554-a-8-7

Figure A8-7 Wetting Balance Results for Vendor A Through 400 Days of Normal Storage

--`,```,,,``,,,,,``,,,,```,,,-`-`,,`,,`,`,,`---

25
IPC-4554 January 2007

0.25

0.2 control

day 22
0.15
Wetting Force in mN/mm

day 92

0.1 day 111

day 128
0.05
day 139

0 day 157

5
2.5

5
5

5
5

10
5
5
2.22

4.5

6.5
3.2 3

5.5

5
7.5

8
5

5
5

7.27
1.21

5.25

9.75
5
5

4.24
0.5

1.5

6.26
15

3.5

8.5

9.29
0.20
5

4.7

5.7

6.7

7.7
3.7

8.2
1.7

8.7

9.
2.7
0.7

day 171
-0.05
day 182

-0.1

-0.15
Time in Seconds IPC-4554-a-8-8

Figure A8-8 Wetting Balance Data for Vendor B Through 182 Days of Normal Storage

0.25

0.2
Wetting Force in mN/mm

0.15
control
0.1 day 59
day 78
0.05 day 95
day 106
0 day 124
5
1.21

5
0.5

1.7.5
5

5.75
3.5

5
5

9.5
5
8.28
5

5
5

6.5
2.5

5
7.5

8.5
5

10
2.22

4.5

9
4.24
3
0.20
5

day 134
3.7
0.7

5.
4.7

6.7

9.2

9.7
7.2

8.7
3.2

5.2
2.7

7.7
6.2
1

day 149
-0.05

-0.1

-0.15
Time in Seconds IPC-4554-a-8-9

Figure A8-9 Wetting Balance Data for Vendor C Through 149 Days of Normal Storage

--`,```,,,``,,,,,``,,,,```,,,-`-`,,`,,`,`,,`---

26
 January 2007 IPC-4554

0.25

0.2
Wetting Force in mN/mm

0.15
control
day 17
0.1 day 28
day 46
day 59
0.05 day 73
day 88
day 137
0 day 177
5
1.21

5
0.5

1.7.5
5

3.75

5.5
5

5
5

9.5
8.28
5

5
5

6.5
2.75

7.5
5

8.75
5.25

10
2.22

4.5

5
4.24
3.23
0.20
5

9.29
7
day 205
0.7

3.

4.7

5.7

6.7

9.7
7.2
2.

7.7

8.
6.2
1

day 239
-0.05

-0.1

-0.15
Time in Seconds IPC-4554-a-8-10

Figure A8-10 Wetting Balance Data for Vendor D Through 229 Days in Storage

0.25

0.2

0.15
Wetting Force in mN/mm

0.1
control
day 28
day 46
0.05
day 59
day 88
day 177
0 day 205
5
1.21

5
0.5

1.7.5
5

5.75
3.5

5
5

9.75
8.28
5

5
5

6.5
5
2.5

7.5
5

8.5
5.25

10
2.22

4.5

5
4.24
3
0.20
5

9.29
7
3.7
0.7

5.
4.7

6.7

7.2

9.

day 73
3.2
2.7

7.7
6.2

8.7
1

day 239
-0.05

-0.1

-0.15
Time in Seconds IPC-4554-a-8-11

Figure A8-11 Wetting Balance Data for Vendor E Through 239 Days of Normal Storage
--`,```,,,``,,,,,``,,,,```,,,-`-`,,`,,`,`,,`---

27
IPC-4554 January 2007

0.25

0.2

0.15
Wetting Force in mN/mm

0.1

0.05
control
day 174
0
day 186
5
1.21

5
0.5

1.7.5
5

5.5
3.5

5
5

9.5
8.28
5

5
5

6.5
2.5

7.5
5

8.5
5

10
2.22

4.5

5
4.24
3
5
0.20

9.29
7
3.7
0.7

4.7

5.7

6.7

9.7
7.2
3.2

5.2
2.7

7.7
6.2

8.7
1

day 228
-0.05

-0.1

-0.15

-0.2
Time in Seconds IPC-4554-a-8-12

Figure A8-12 Impact of Test Temperature on Wetting Times for Vendor A Through 229 Days of Normal Storage - Test
Temperature of 215 °C

28 --`,```,,,``,,,,,``,,,,```,,,-`-`,,`,,`,`,,`---
January 2007 IPC-4554

0.25

0.2

0.15
Wetting Force in mN/mm

0.1

day 22
0.05 day 92
day 128
day 140
0
day 182
5
5

5
1.21

5
0.5

1.75
5

5.5
3.75

5
5

9.75
8.28
5

5
5

6.5
2.75

5
7.5

8.75
5.25

10
4.5

5
4.24
2

3.23
0.20
5

9.29
7
2.2
1.
0.7

3.

4.7

5.7

6.7

7.2

9.
2.

7.7

8.
6.2
-0.05

-0.1

-0.15
Time in Seconds IPC-4554-a-8-13

Figure A8-13 Impact of Test Temperature on Wetting Times for Vendor B Through 182 Days of Normal Storage - Test
Temperature of 215 °C

--`,```,,,``,,,,,``,,,,```,,,-`-`,,`,,`,`,,`---

29
IPC-4554 January 2007

At the time of writing this paper, samples from the long performance between the three vendors. An initial scan of
term groups were tested again, having been 1260 days the surface was taken and then using a plasma gun, the
(3.45 years) in storage with no protection. Initial testing surface was ablated to 20 Å, 100 Å, 1000 Å, 2000 Å and
was with the same standard 0.2% activated flux, the results, 4000 Å. At each depth a scan was made.
as expected, were poor (see Figures A8-14 through A8-16).
The surface scan for all three samples tested showed the
The flux activation was increased to 0.5%, which will be presence of copper which is to be expected after such a
the standard test flux in the Pb-free world, and some long storage period! As the samples were sputtered, the
improvement was made in wetting performance. The flux signal of O2 went away at a depth of between 100 Å and
activation was again increased to a 2% VOC containing 1000 Å. There was some C detected, significant in one of
NO-CLEAN production flux - Vendor E produced excellent the samples, which may be either an integral component of
wetting! the formulation or a source of contamination.
Samples from the above 1260 day old sets were sent for
Auger Analysis in an effort to quantify the difference in

Fr(mN/mm)
0.25

0.20

0.15

0.10

0.05
2%
0.00 t(s)

–0.25

–0.10

–0.15

–0.20

–0.25 0.5%4 0. 2%
1 2 3 5 6 7 8 9 10
Standard: NF-A-89 400P
IPC-4554-a-8-14

Figure A8-14 Vendor B Post 1260 Days of Storage

30
January 2007 IPC-4554

Fr(mN/mm)
0.25

0.20 6

0.15

0.10
2%
0.05

0.00 t(s)
4
–0.25
1
–0.10

–0.15
0.5% 0.2%
–0.20

–0.25
1 2 3 4 5 6 7 8 9 10
Standard: NF-A-89 400P
IPC-4554-a-8-15

Figure A8-15 Vendor E Post 1260 Days

Fr(mN/mm)
0.25

0.20

0.15
2%
0.10

0.05

0.00 t(s)
6
–0.25

–0.10

–0.15
4
–0.20
0.2%
–0.25
1 2 3 4 5 6 7 8 9 10
Standard: NF-A-89 400P 0.5%
IPC-4554-a-8-16

Figure A8-16 Vendor C Post 1260 Days

31
IPC-4554 January 2007

It should also be noted that the structure of the deposits

were similar for samples B and C and quite different for
Sample E which, as shown above, tested the best. Figures
A8-17 through A8-26 show some of the information gener-
ated from the Auger analysis.

Figure A8-19 Surface Morphology of Vendor E - Post

1260 Days

From the Auger analysis mapping of the deposit, it is evi-

dent that the migration rates of copper and the formation of
CuSn IMCs are quite different for the three vendors. Even
Figure A8-17 Surface Morphology of Vendor B Post 1260 removing vendor C from the equation, known thin deposit,
Days there is a significant difference between Vendor B and E
which was evident in the solderability testing.

Figure A8-18 Surface Morphology of Vendor C - Post

1260 Days

32
January 2007 IPC-4554

Sample B at 0A. – full area (24May063.spe)

x 10 4
3

Atomic %
C 58.3
1
O 26.8
Sn 14.2
Cu 0.7
0
C/S

Cu
-1

-2
C

-3
O
Sn

-4
200 300 400 500 600 700 800 900 1000
Kinetic Energy (eV) IPC-4554-a-8-20

Figure A8-20 Surface Scan Showing Cu, C, Sn and O for Vendor B

--`,```,,,``,,,,,``,,,,```,,,-`-`,,`,,`,`,,`---

33
IPC-4554 January 2007

Figure A8-21 Chemical Map of Surface for Vendor B

34
January 2007 IPC-4554

Figure A8-22 Surface Map for Vendor C - Note a Greater Presence of Copper on the Surface

35
IPC-4554 January 2007

Figure A8-23 Vendor C at 20 Å - Note Large Carbon Rich Areas

36
 January 2007 IPC-4554

Figure A8-24 Vendor E Surface Scan

--`,```,,,``,,,,,``,,,,```,,,-`-`,,`,,`,`,,`---

37
IPC-4554 January 2007

Figure A8-25 Vendor E at 1000 Å

38
January 2007 IPC-4554

Figure A8-26 Comparison of Vendor C (top) to Vendor E (bottom) at 100 Å - Significant Difference in the Deposits
--`,```,,,``,,,,,``,,,,```,,,-`-`,,`,,`,`,,`---

39
IPC-4554 January 2007

Solder Spread Testing As mentioned above the use of

Contact Wetting Angle in Degree

solder spread testing has become popular of late, especially 40
so with users of ISn. Rockwell Collins provided the test
35
protocol, detailed in the appendix of the standard. Samples
were sent to both Rockwell Collins and Celestica for test- 30
ing. Two solder alloys were used for the tests - SnPb Eutec- 25
tic and SAC305. In addition the use of ‘‘normal atmo-
20
sphere’’ and a ‘‘Nitrogen Atmosphere’’ were used to see if
any impact on the results could be made. Four of the five 15
vendors (A, B, D and E) supplied spread test coupons.
10
There is excellent correlation between contact angles and
solderability performance - the lower the angle the better 5
A B D E
the wetting and therefore solderability. Convention from Vendor
the Europeans is a ranking as follows: Means and Std Deviations
Level Number Mean Std Dev Std Err Mean
Contact angle <30 degrees – excellent.
A 20 14.6060 2.10320 0.4703
Contact angle between 30 to 40 degrees –
B 20 13.3300 1.86272 0.4165
good wetting.
D 20 12.8938 1.17984 0.2638
Contact angle between 40 to 55 degrees –
E 18 14.4099 6.37542 1.5027
acceptable wetting. IPC-4554-a-8-28
Contact angle greater than 55 degrees –
Figure A8-28 Contact Wetting Angles for the Four
unacceptable. Suppliers Tested with SnPb in an Nitrogen Atmosphere -
Again, All Four Showed Excellent Wetting
The results of the wetting angle tests with both Normal
Note: There is no great improvement on any of the groups
(Air) and Nitrogen atmospheres crossed with SnPb and
when tested in an N2 atmosphere.
SAC305 solders are seen in Figures A8-27 through A8-31.

20
22
19
Contact Wetting Angle in Degree

20 18
17
18
16
_Stacked_

16 15
14
14
13
12 12
11
10
10
8 9
6 8
A B D E A B D E
Vendor Vendor
Means and Std Deviations Means and Std Deviations
Level Number Mean Std Dev Std Err Mean Level Number Mean Std Dev Std Err Mean
A 20 14.4783 1.82085 0.40716 A 20 12.6738 2.43232 0.54388

B 20 13.1461 2.13968 0.47845 B 20 10.0793 1.15372 0.25798

20 D 20 12.8050 2.17799 0.48701
D 14.2377 1.09607 0.24509
E 19 9.6866 1.28804 0.29550
E 20 13.4033 2.60967 0.58354
IPC-4554-a-8-29
IPC-4554-a-8-27
Figure A8-29 Contact Wetting Angles for the Four
Figure A8-27 Contact Wetting Angles for the
Suppliers Tested with SAC305 in a Normal (Air)
Four Suppliers Tested with SnPb in a Normal (Air)
Atmosphere - All Four Exhibit Excellent Wetting
Atmosphere - All Four Showed Excellent Wetting
Note: There is a some variation inter-group compared
From the solder spread testing, excellent results were to soldering with SnPb. Lower contact angles were also
produced.
obtained for all four Vendors tested. This corresponded

40
January 2007 IPC-4554

with the excellent wetting balance results generated for

14
testing the as received samples.
13 The solderability testing has shown:
Contact Angle in Degrees

12 1) ISn is a very solderable deposit.

2) ISn with a deposit thickness approximately 1 micron
11 will easily meet a one year shelf life.
3) Exposure to air did not appear to have an excessive
10
impact on the solderability but it is recommended to
keep exposure to moisture and temperature to a mini-
9
mum.
8 4) The performance of the 0.6 micron tin is very accept-
able for Categories 1 and 2 durability classifications.
7
A B D E
Vendor Cleanliness of the Deposit - SEC and SIR Testing A
Means and Std Deviations major challenge for ISn is to meet the industry require-
Level Number Mean Std Dev Std Err Mean ments for Solvent Extract Conductivity (SEC) and Surface
A 20 10.0965 1.30063 0.29083 Insulation Resistance (SIR). The dwell time in the tin bath
B 20 9.0824 1.23776 0.27677 is long compared to other immersion finishes and in com-
D 20 11.2187 1.04411 0.23347 bination with the chemical constituents, the solder mask is
E 18 9.1770 0.77388 0.18240 susceptible to absorbing ionic contaminants that may be
IPC-4554-a-8-30 detrimental to a modules reliability. The challenges of
removing all such contaminants have community in the
Figure A8-30 Contact Wetting Angles for the Four
Suppliers Tested with SAC305 in a Nitrogen Atmosphere - majority but it must be said that only one of the five sup-
Again, All Four Exhibit Excellent Wetting pliers tested met the SEC specification of 1.56 µg/ cm2
This group produced the lowest contact angles and had less with three of the five producing values in the 1.6 to 1.8 µg/
spread in the data for the nitrogen atmosphere with SAC305 cm2 and one supplier producing a value 2.89 µg/ cm2 (see
solder. Figure A8-32).

22 3.5
Micro Grams / sq cm NaCl eq
Contact Wetting Angle in Degree

20 3

2.5
18
Pass value
2
16
1.5
14 1

12 0.5

0
10 vendor A vendor B Vendor C Vendor D Vendor E
IPC-4554-a-8-32
8
Pb free N2 Pb free air SnPb N2 SnPb air Figure A8-32 Average SEC Values for the Five Vendors
Test Condition
Means and Std Deviations What is very interesting with ISn is the fact that, while four
Level Number Mean Std Dev Std Err Mean of the five suppliers recorded SEC values that would be
Pb free N2 20 10.0965 1.30063 0.29083 failures in the industry, none of the five failed SIR testing.
Pb free air 20 12.6738 2.43232 0.54388 The ability of a standard SIR test run at 35 °C/92% R.H.
SnPb N2 20 14.6060 2.10320 0.47029 or 65 °C/85% R.H or even 85 °C/85% R.H to ‘‘unlock’’ the
SnPb air 20 14.4783 1.82082 0.40716 ionic contaminants from the mask was just not there. So,
IPC-4554-a-8-31
while the SEC values may fail due to the ability of a hot
Figure A8-31 Comparison of Contact Angles for Vendor extract to solubilize the contaminants, in the real world this
A - All Tests may never happen and the reliability of the module is as
good as if it met all specifications for cleanliness.

41
IPC-4554 January 2007

Tin Whiskers This subject, more than any other, impacted is imperative that thickness alone NOT be used as the
the release of this document. What was originally con- determining factor for acceptability or as a means for deter-
ceived as a relatively simple solderability-only specifica- mining the number of assembly process steps the deposit
tion with no issues pertaining to whiskers was killed dead can survive. A good 0.6 micron deposit with a majority of
in its tracks when the infamous Bosch tin whisker photo useable tin will out perform a 1 micron deposit that has
was sent around the world. The committee members con- negligible free tin. The data from vendor C in the study
curred that the possibility of whiskers existed, confirmed shows that a 0.6 micron deposit easily met a six month
by examining the long-term solderability samples and this shelf life and would therefore meet the intent of Category
in effect stopped the specification. A great deal of discus- 2 durability. The Auger analysis further showed the varia-
sion and some testing ensued while monitoring closely the tion in migration and formation of CuSn IMC compounds
work on-going from iNEMI, NASA, IPC and JEDEC. In that have a negative impact on performance, the morphol-
the end it was decided that, since no accelerated test ogy of the deposit may have a direct impact on perfor-
method had been developed to predict possibility of whis- mance as evident in Vendor E’s outstanding shelf life com-
ker formation and that all testing proposed began with pared to the other suppliers.
4000 hours etc, not releasing this specification was in fact
more serious than waiting for a tin whisker test protocol. At In addition, the committee has discovered and documented
the time of release of this document, there are now docu- the proper way to measure ISn by XRF techniques as well
ments available from IPC/JEDEC that address whisker as the use of Mylar backed tin foils. The use of coulomet-
mitigation strategies and testing. From a PWB surface fin- ric stripping to differentiate useable tin from IMCs is also
ish viewpoint, tin whiskers exist and the end user needs to recommended.
be aware of them. They may never occur, or occur at such
The authors want to acknowledge the members of the com-
a small level that they do not impact module reliability, but
mittee that kept this effort moving forward with participa-
they must not be discounted.
tion, suggestions, open discussion, testing and analysis of
Conclusions The data presented here indicates that the data. The members supplied chemicals, manufactured parts
Subcommittee has substantiated its thickness specifications designed test vehicles, assembled parts and have done
for solderability with data. extensive simulations and evaluations. A listing of active
committee members will be included in the specification
The durability categories as per the JSTD-003 allow for
when issued.
deposit thickness less than the recommended 1 micron. It

42
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--`,```,,,``,,,,,``,,,,```,,,-`-`,,`,,`,`,,`---
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addition, IPC can set up a mailing list for your individual Chapter so that your chapter can share information about upcoming
meetings, events and issues related specifically to your chapter.

Trainingnews@ipc.org
This is an announcement forum where subscribers can receive notice of new IPC Training Products.

leadfree.ipc.org
This forum acts as a peer interaction resource for staying on top of lead elimination activities worldwide and within IPC.

IPC_New_Releases@ipc.org
This is an announcement forum where subscribers can receive notice of new IPC publications, updates and standards.

ADMINISTERING YOUR SUBSCRIPTION STATUS:

All commands (such as subscribe and signoff) must be sent to listserv@ipc.org. Please DO NOT send any command to the
mail list address, (i.e.<mail list> @ipc.org), as it would be distributed to all the subscribers.
Example for subscribing: Example for signing off:
To: LISTSERV@IPC.ORG To: LISTSERV@IPC.ORG
Subject: Subject:
Message: subscribe TechNet Joseph H. Smith Message: signoff DesignerCouncil
Please note you must send messages to the mail list address ONLY from the e-mail address to which you want to apply
changes. In other words, if you want to sign off the mail list, you must send the signoff command from the address that you
want removed from the mail list. Many participants find it helpful to signoff a list when travelling or on vacation and to
resubscribe when back in the office.
How to post to a forum:
To send a message to all the people currently subscribed to the list, just send to <mail list>@ipc.org. Please note, use the mail
list address that you want to reach in place of the <mail list> string in the above instructions.
Example:
To: TechNet@IPC.ORG
Subject: <your subject>
Message: <your message>
The associated e-mail message text will be distributed to everyone on the list, including the sender. Further information on
how to access previous messages sent to the forums will be provided upon subscribing.
For more information, contact Keach Sasamori
tel: 847-597-2815 fax: 847-615-5615
e-mail: sasako@ipc.org www.ipc.org/emailforums
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 Education and Training
IPC conducts local educational workshops and national conferences to help you better understand conventional and
emerging technologies. Members receive discounts on registration fees. Visit www.ipc.org to see what programs are
coming to your area.

IPC Certification Programs

IPC provides world-class training and certification programs based on several widely-used IPC standards, including
IPC-A-600, IPC-A-610, IPC/WHMA-A-620, J-STD-001 and IPC-7711A/7721A Rework and Repair. IPC-sponsored
certification gives your company a competitive advantage and your workforce valuable recognition.
For more information on these programs:
tel: 847-597-2814 fax: 847-615-7105
e-mail: certification@ipc.org www.ipc.org/certification

Designer Certification (C.I.D.)/Advanced Designer Certification (C.I.D.+)

Contact:
tel: 847-597-2827 fax: 847-615-5627
BENEFITS OF IPC MEMBERSHIP

e-mail: christipoulsen@ipc.org http://dc.ipc.org

EMS Program Manager Certification

Contact:
tel: 847-597-2884 fax: 847-615-5684
e-mail: susanfilz@ipc.org www.ipc.org/certification

IPC Video Tapes and CD-ROMs

IPC video tapes and CD-ROMs can increase your industry know-how and on the job effectiveness. Members receive
discounts on purchases.
For more information on IPC Video/CD Training, contact Mark Pritchard
tel: 505/758-7937 ext. 202 fax: 505/758-7938
e-mail: markp@ipcvideo.org http://training.ipc.org

IPC Printed Circuits Expo, APEX and the Designers Summit

This yearly event is the largest electronics interconnection event in North America. With technical
paper presentations, educational courses, standards development meetings networking opportunities
and designers certification, there’s something for everyone in the industry. The premier technical
conference draws experts from around the globe. 500 exhibitors and 6,000 attendees typically
participate each year. You’ll see the latest in technologies, products and services and hear about the trends that affect us
all. Go to www.GoIPCShows.org or contact shows@ipc.org for more information.

Exhibitor information:
Mary Mac Kinnon Alicia Balonek
Director, Show Sales Director, Trade Show Operations
847-597-2886 847-597-2898
MaryMacKinnon@ip c.org AliciaBalonek@ipc.org

How to Get Involved

The first step is to join IPC. An application for membership can be found in the back of this publication. Once you
become a member, the opportunities to enhance your competitiveness are vast. Join a technical committee and learn
from our industry’s best while you help develop the standards for our industry. Participate in market research programs
which forecast the future of our industry. Participate in Capitol Hill Day and lobby your Congressmen and Senators for
better industry support. Pick from a wide variety of educational opportunities: workshops, tutorials, and conferences.
More up-to-date details on IPC opportunities can be found on our web page: www.ipc.org.
For information on how to get involved, contact:
Jeanette Ferdman, Membership Director
tel: 847-597-2809 fax: 847-597-7105
e-mail: JeanetteFerdman@ipc.org www.ipc.org
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 Application for Site Membership
ASSOCIATION CONNECTING
ELECTRONICS INDUSTRIES ®

Thank you for your decision to join IPC members on the “Intelligent Path to Competitiveness”!
IPC Membership is site specific, which means that IPC member benefits are available to all
individuals employed at the site designated on the other side of this application.
To help IPC serve your member site in the most efficient manner possible, please tell us what
your facility does by choosing the most appropriate member category. (Check one box only.)

Independent Printed Board Manufacturers

This facility manufactures and sells to other companies, printed wiring boards (PWBs) or other electronic
interconnection products on the merchant market. What products do you make for sale?

One-sided and two-sided rigid
Multilayer printed boards
Other interconnections

printed boards

Flexible printed boards

Name of Chief Executive Officer/President________________________________________________________

Independent Electronic Assembly EMSI Companies

This facility assembles printed wiring boards, on a contract basis, and may offer other electronic interconnection
products for sale.

Name of Chief Executive Officer/President________________________________________________________

OEM–Manufacturers of any end product using PCB/PCAs or Captive Manufacturers of PCBs/PCAs

This facility purchases, uses and/or manufactures printed wiring boards or other interconnection products for
use in a final product, which we manufacture and sell.

What is your company’s primary product line? ______________________________________________________

Industry Suppliers
This facility supplies raw materials, machinery, equipment or services used in the manufacture or assembly of
electronic interconnection products.

What products do you supply?__________________________________________________________________

Government Agencies/Academic Technical Liaisons

We are representatives of a government agency, university, college, technical institute who are directly
concerned with design, research, and utilization of electronic interconnection devices. (Must be a non-profit
or not-for-profit organization.)
 Application for Site Membership
ASSOCIATION CONNECTING
ELECTRONICS INDUSTRIES ®

Site Information:

Company Name

Street Address

City State Zip/Postal Code Country

Main Switchboard Phone No. Main Fax

Name of Primary Contact

Title Mail Stop

Phone Fax e-mail

Company e-mail address W

Please Check One:

$1,000.00 Annual dues for Primary Site Membership (Twelve months of IPC
membership begins from the time the application and payment are received)

$800.00 Annual dues for Additional Facility Membership: Additional membership for a site within an
organization where another site is considered to be the primary IPC member.

$600.00** Annual dues for an independent PCB/PWA fabricator or independent EMSI provider with
annual sales of less than $1,000,000.00. **Please provide proof of annual sales.

$250.00 Annual dues for Government Agency/not-for-profit organization

TMRC Membership
Please send me information about membership in the Technology Market
Research Council (TMRC)

Payment Information:
Enclosed is our check for $________________
Please bill my credit card: (circle one) MC AMEX VISA DINERS
Card No.___________________________________________________________Exp date_______________
Authorized Signature
________________________________________________________________________________

Mail application with check or money order to:

IPC
3491 Eagle Way
Chicago, IL 60678-1349
Please attach business card
Fax/Mail application with credit card payment to:
of primary contact here
IPC
3000 Lakeside Drive, Suite 309 S
Bannockburn, IL 60015-1249
Tel: 847-615-7100
Fax: 847-615-7105
http://www.ipc.org

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 ASSOCIATION CONNECTING
ELECTRONICS INDUSTRIES ®

Standard Improvement Form IPC-4554

The purpose of this form is to provide the Individuals or companies are invited to If you can provide input, please complete
Technical Committee of IPC with input submit comments to IPC. All comments this form and return to:
from the industry regarding usage of will be collected and dispersed to the IPC
the subject standard. appropriate committee(s). 3000 Lakeside Drive, Suite 309S
Bannockburn, IL 60015-1249
Fax 847 615.7105
E-mail: answers@ipc.org

1. I recommend changes to the following:

Requirement, paragraph number
Test Method number , paragraph number

The referenced paragraph number has proven to be:

Unclear Too Rigid In Error
Other

2. Recommendations for correction:

3. Other suggestions for document improvement:

Submitted by:

Name Telephone

Company E-mail

Address

City/State/Zip Date

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ASSOCIATION CONNECTING
ELECTRONICS INDUSTRIES ®

3000 Lakeside Drive, Suite 309S, Bannockburn, IL 60015-1249

Tel. 847.615.7100 Fax 847.615.7105
www.ipc.org