0% found this document useful (0 votes)
16 views10 pages

Addressing Modes of 8086

The document provides an overview of the addressing modes used in the 8086 microprocessor, categorizing them into immediate, register, memory, and I/O port addressing modes. It explains the differences between implicit and explicit operands, as well as various memory addressing techniques such as direct, register indirect, based, indexed, and combinations of these modes. Additionally, it outlines examples and rules for using these addressing modes effectively in programming.

Uploaded by

Ranju samanta
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
0% found this document useful (0 votes)
16 views10 pages

Addressing Modes of 8086

The document provides an overview of the addressing modes used in the 8086 microprocessor, categorizing them into immediate, register, memory, and I/O port addressing modes. It explains the differences between implicit and explicit operands, as well as various memory addressing techniques such as direct, register indirect, based, indexed, and combinations of these modes. Additionally, it outlines examples and rules for using these addressing modes effectively in programming.

Uploaded by

Ranju samanta
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 10

Addressing Modes of 8086 2020

Addressing Modes of 8086


Content:

Addressing Modes - an overview and classification of 8086


Immediate addressing
Register addressing
Memory addressing and its classification

(i)Direct , (ii)Register indirect


(iii)Based , (iv)Indexed
(v)Based-indexed ,(vi)Based-indexed with displacement

Addressing Modes of 8086 – An overview…


Definition: An instruction acts on any number of operands. The way an instruction
accesses its operands is called its Addressing modes.

Operands may be of three types :

Implicit
Explicit
Both Implicit and Explicit.

Implicit operands mean that the instruction by definition has some specific operands.
The programmers do NOT select these operands.

Example: Implicit operands


XLAT ; automatically takes AL and BX as
operands

Prof. S. Maiti Page 1


Addressing Modes of 8086 2020

AAM ; it operates on the contents of AX.

Explicit operands mean the instruction operates on the operands specified by the
programmer.

Example: Explicit operands


MOV AX, BX; it takes AX and BX as
operands
XCHG SI, DI; it takes SI and DI as operands

Implicit and explicit operands

Example: Implicit/Explicit operands


MUL BX; automatically multiply BX explicitly times
AX

The location of an operand value in memory space is called the Effective Address (EA)

Classification of 8086:
We can classify the addressing modes of 8086 into four groups:

Immediate addressing
Register addressing
Memory addressing
I/O port addressing

Immediate addressing mode


In this addressing mode, the operand is stored as part of the instruction. The immediate
operand, which is stored along with the instruction, resides in the code segment -- not in

Prof. S. Maiti Page 2


Addressing Modes of 8086 2020

the data segment. This addressing mode is also faster to execute an instruction because
the operand is read with the instruction from memory. Here are some examples:

Example: Immediate Operands


MOV AL, 20 ; move the constant 20 into register AL
ADD AX, 5 ; add constant 5 to register EAX
MOV DX, offset msg ; move the address of message to
register DX

Register addressing mode


In this addressing mode, the operands may be:

• reg16: 16-bit general registers: AX, BX, CX, DX, SI, DI, SP or BP.
• reg8 : 8-bit general registers: AH, BH, CH, DH, AL, BL, CL, or DL.
• Sreg : segment registers: CS, DS, ES, or SS. There is an exception: CS cannot be
a destination.

For register addressing modes, there is no need to compute the effective address. The
operand is in a register and to get the operand there is no memory access involved.

Example: Register Operands


MOV AX, BX ; mov reg16, reg16
ADD AX, SI ; add reg16, reg16
MOV DS, AX ; mov Sreg, reg16

Some rules in register addressing modes:

1. You may not specify CS as the destination operand.

Example: mov CS, 02h –> wrong

2. Only one of the operands can be a segment register. You cannot move data from one
segment register to another with a single mov instruction. To copy the value of cs to ds,
you would have to use some sequence like:

Prof. S. Maiti Page 3


Addressing Modes of 8086 2020

mov ds,cs -> wrong


mov ax, cs
mov ds, ax -> the way we do it

You should never use the segment registers as data registers to hold arbitrary values.
They should only contain segment addresses.

Memory Addressing Modes


Memory (RAM) is the main component of a computer to store temporary data and
machine instructions. In a program, programmers many times need to read from and
write into memory locations.

There are different forms of memory addressing modes

1. Direct Addressing
2. Register indirect addressing
3. Based addressing
4. Indexed addressing
5. Based indexed addressing
6. Based indexed with displacement

Direct Addressing Mode & Register Indirect Addressing Mode


Direct Addressing Mode

The instruction mov al,ds:[8088h] loads the AL register with a copy of the byte at
memory location 8088h. Likewise, the instruction mov ds:[1234h],dl stores the value in
the dl register to memory location 1234h. By default, all displacement-only values
provide offsets into the data segment. If you want to provide an offset into a different
segment, you must use a segment override prefix before your address. For example, to
access location 1234h in the extra segment (es) you would use an instruction of the form
mov ax,es:[1234h]. Likewise, to access this location in the code segment you would use
the instruction mov ax, cs:[1234h]. The ds: prefix in the previous examples is not a
segment override.

Prof. S. Maiti Page 4


Addressing Modes of 8086 2020

The instruction mov al,ds:[8088h] is same as mov al, [8088h]. If not mentioned DS
register is taken by default.

Register Indirect Addressing Mode

The 80x86 CPUs let you access memory indirectly through a register using the register
indirect addressing modes. There are four forms of this addressing mode on the 8086,
best demonstrated by the following instructions:

mov al, [bx]


mov al, [bp]
mov al, [si]
mov al, [di]

Code Example

MOV BX, 100H


MOV AL, [BX]

Prof. S. Maiti Page 5


Addressing Modes of 8086 2020

The [bx], [si], and [di] modes use the ds segment by default. The [bp] addressing mode
uses the stack segment (ss) by default. You can use the segment override prefix symbols
if you wish to access data in different segments. The following instructions demonstrate
the use of these overrides:

mov al, cs:[bx]


mov al, ds:[bp]
mov al, ss:[si]
mov al, es:[di]

Intel refers to [bx] and [bp] as base addressing modes and bx and bp as base registers (in
fact, bp stands for base pointer). Intel refers to the [si] and [di] addressing modes as
indexed addressing modes (si stands for source index, di stands for destination index).
However, these addressing modes are functionally equivalent. This text will call these
forms register indirect modes to be consistent.

Based Addressing Mode and Indexed Addressing Modes


Based Addressing Mode

8-bit or 16-bit instruction operand is added to the contents of a base register (BX or BP),
the resulting value is a pointer to location where data resides.

Mov al, [bx],[si]


Mov bl , [bp],[di]
Mov cl , [bp],[di]

Prof. S. Maiti Page 6


Addressing Modes of 8086 2020

Code Example

If bx=1000h
si=0880h
Mov AL, [1000+880]
Mov AL,[1880]

Indexed Addressing Modes

The indexed addressing modes use the following syntax:

mov al, [bx+disp]


mov al, [bp+disp]
mov al, [si+disp]
mov al, [di+disp]

Code Example

MOV BX, 100H


MOV AL, [BX + 15]
MOV AL, [BX + 16]

If bx contains 1000h, then the instruction mov cl, [bx+20h] will load cl from memory
location ds:1020h. Likewise, if bp contains 2020h, mov dh, [bp+1000h] will load dh from
location ss:3020. The offsets generated by these addressing modes are the sum of the
constant and the specified register. The addressing modes involving bx, si, and di all use
the data segment, the [bp+disp] addressing mode uses the stack segment by default. As
with the register indirect addressing modes, you can use the segment override prefixes to
specify a different segment:

mov al, ss:[bx+disp]


mov al, es:[bp+disp]
mov al, cs:[si+disp]
mov al, ss:[di+disp]

Example: MOV AX, [DI + 100]

Prof. S. Maiti Page 7


Addressing Modes of 8086 2020

Based Indexed Addressing Modes & Based Indexed Plus


Displacement Addressing Mode
Based Indexed Addressing Modes

The based indexed addressing modes are simply combinations of the register indirect
addressing modes. These addressing modes form the offset by adding together a base
register (bx or bp) and an index register (si or di). The allowable forms for these
addressing modes are:

mov al, [bx+si]


mov al, [bx+di]
mov al, [bp+si]
mov al, [bp+di]

Code Example

MOV BX, 100H


MOV SI, 200H
MOV AL, [BX + SI]
INC BX
INC SI

Prof. S. Maiti Page 8


Addressing Modes of 8086 2020

Suppose that bx contains 1000h and si contains 880h. Then the instruction mov al,[bx][si]
would load al from location DS:1880h. Likewise, if bp contains 1598h and di contains
1004, mov ax,[bp+di] will load the 16 bits in ax from locations SS:259C and SS:259D.
The addressing modes that do not involve bp use the data segment by default. Those that
have bp as an operand use the stack segment by default.

Based Indexed Plus Displacement Addressing Mode

These addressing modes are a slight modification of the base/indexed addressing modes
with the addition of an eight bit or sixteen bit constant. The following are some examples
of these addressing modes

mov al, disp[bx][si]


mov al, disp[bx+di]
mov al, [bp+si+disp]
mov al, [bp][di][disp]

Code Example

Prof. S. Maiti Page 9


Addressing Modes of 8086 2020

MOV BX, 100H


MOV SI, 200H
MOV AL, [BX + SI +100H]
INC BX
INC SI

Prof. S. Maiti Page 10

You might also like