FTKEE

Lab Arithmetic Logic Unit (ALU)

1
Part 1
Preliminary
BTS3122
COMPUTER ARCHITECTURE
LABORATORY
Lab Objectives

By the end of this lab, students should be able to:

1. Build half-adder circuit.

2. Build full-adder circuit.
3. Build 4-bit OR circuit.
4. Build 4-bit AND circuit.

Student names Student ID Section Group

Due Date: Delivery Date:

 COMPUTER ARCHITECTURE LABORATORY Lab Sheet 1

BACKGROUND

CPU consists of three main sections: memory for variables (registers), control circuitry (microcode), and the
ALU. The ALU (Arithmetic Logic Unit) is the part of a CPU that actually does calculations and condition
testing. To build 4-bit ALU, you need have 4-bit Adder/Subtractor, 4-bit AND and 4-bit OR.

For example, if you wish to add two binary numbers, it is the ALU that is responsible for producing the
result. If your program needs to execute some code if two values are equal it is the ALU that performs the
comparison between the values and then sets flags if the condition is met or not.

Representation of an ALU. Image courtesy of Jim Lamberson via Wikimedia Commons.

Binary Addition

Two fundamental ALU operations are addition and subtraction.

The Theory
Adding binary digits (individual bits) is rather easy and is shown in the list below (all the possible combinations):

 0+0=0
 0+1=1
 1+0=1
 1 + 1 = 10 (This is also 0 + carry bit)

But how do we add binary numbers that are more than one digit long? This is where the carry bit comes into
play and we need to use long addition.

Carry bits are used as shown below where "0(c)" means "no carry bit" and "1(c)" means "carry bit".

 0 + 0 +0(c) = 0
 COMPUTER ARCHITECTURE LABORATORY Lab Sheet 1
 0 + 1 +0(c) = 1
 1 + 0 +0(c) = 1
 1 + 1 +0(c) = 10
 0 + 0 +1(c) = 1
 0 + 1 +1(c) = 10
 1 + 0 +1(c) = 10
 1 + 1 +1(c) = 11

If we wish to add 10 and 10 in binary form, we would start by writing them down in the form of long
addition. We add the bits up in columns using the rules above starting from the far right and moving to the
left. When we have a carry from a bit addition, we move it one column to the left, where it gets included in
the addition as a bit.

Long addition of binary numbers

In this example, we are adding 1011 and 0001 (11 + 1 = 12). Starting from the far right we add 1 + 1, which
gives us 10 (0 and a carry bit). Then we move to the next column (the second from the right) and add all the
bits. Notice how the carry bit is also included in this addition operation. This means we are adding three
digits: 1 (the carry bit), 1, and 0.

The Circuit

The half adder has two inputs and two outputs as shown in the diagram below. The two inputs represent two
individual bits, the Sum output represents the sum of the two bits in the form of a single bit and the Carry
output is the carry bit from the addition.
 COMPUTER ARCHITECTURE LABORATORY Lab Sheet 1

Half adder circuit , which uses an AND gate and an exclusive-OR (XOR) gate

A B Sum Carry
0 0 0 0
0 1 1 0
1 0 1 0
1 1 0 1

Truth table for half adder

However, this circuit cannot take in a carry from a previous operation. So, if two of these adders and an OR
gate are used, full adder circuit will be created that has two bit inputs, a carry in, a sum out, and a carry out.
COMPUTER ARCHITECTURE LABORATORY Lab Sheet 1

A full adder made by using two half adders and an OR gate

COMPUTER ARCHITECTURE LABORATORY Lab Sheet 1

EXPERIMENT 1.1

A. Building Full Adder

1. Complete the following truth table for Full Adder.

Table 1: Full Adder Truth Table

Carry Carry
A B Sum
in (Cin) out (Cout)
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1

2. Start Logisim and complete the following steps to draw a half adder circuit.
a. Insert 2 inputs (A & B) by setting the attribute ‘Label’ in the attribute table.
b. Note that both inputs have now 0s inside their green spots. These are the current bit value of
the input.
COMPUTER ARCHITECTURE LABORATORY Lab Sheet 1

c. Insert one XOR gate and one AND gate into the canvas. The two gates are located inside the
‘Gates’ library in the explorer pane. Change the ‘Number of Inputs’ in the attribute table to 2.

d. Insert 2 outputs. Label the outputs as S and C. Note that both outputs have X inside the dots.
X indicates and invalid value for the output.

e. Connects the inputs to the XOR gate. Connect the inputs to the AND gate. Connect the
outputs to the gates. Note that the X mark was replaced by 0 in the circuit outputs. These are
the output values of S and C corresponding to the current input values of A and B (currently 0
COMPUTER ARCHITECTURE LABORATORY Lab Sheet 1
and 0 respectively.)

f. Try other input values and see how the outputs change. Select the poke tool. Place the pointer
finger on the input and click the mouse.
COMPUTER ARCHITECTURE LABORATORY Lab Sheet 1
g. Use the developed half-adder circuit to construct a full-adder circuit that consist of 2 half-
adder with input of A, B and Cin and output of S and Cout. Verify the circuit using the truth
table.

B. Building 4-bit OR

1. Create another circuit name as 4-bit OR. Add 2 inputs, A and B, with 4 data bits. Add 4 OR
gates with 2 inputs each. Add two splitters with 4 bits. Add 1 splitter with 4 bits. Add and
output pin, Result with 4 bits.

C. Building 4-bit AND

1. Create another circuit name as 4-bit AND. The 4-bit AND is similar to the 4-bit OR, except
replace the OR gates with AND gates.
 EXPERIMENT 1.2

A. Building 4-bit Adder/Subtractor

Figure 1: 4-bit Adder/Subtractor

1. Make use the Full Adder that has been built previously to build 4-bit Adder/Subtractor as in Figure 1.
2. Drag and drop 4 of the Full Adders built earlier onto the canvas and arrange them vertically as in
Figure 2.

Figure 2
3. Add an East-facing pin called Add/Subtract Control to the top left of the canvas. Refer Figure 3.

Figure 3

4. Add a North-facing pin called B, with 4 data bits and a South-facing pin called A, with 4 data bits.
Refer Figure 4.

Figure 4

5. Add 4 East-facing XOR gates, each with 2 inputs. Refer Figure 5.

Figure 5

6. Add 3 South-facing NOT gates, each 1 data bit. Refer Figure 6.

Figure 6

7. Add 2 East-facing AND gates, each 1 data bit and 3 inputs. Refer Figure 7.
 Figure 7

8. Add 3 splitters with 4 inputs. Refer Figure 8.

Figure 8

9. Add output pins for Carry out and Overflow. Refer Figure 9.

Figure 9

10. Connect them all above elements to complete the 4-bit Adder/Subtractor as in Figure 1.
 B. Building 4-bit ALU

1. Add two Input Pins. Drop two East-facing input pins on the canvas. Label them A and B, and please
ensure that each input is 4-bits as shown in Figure 10.

Figure 10

2. Add the previously built 4-bit Adder/Subtractor, OR gates and AND gates. Select the circuits under
the main project folder and add them onto the canvas as shown in Figure 11.

Figure 11
3. Now, add Multiplexers. An ALU needs multiplexers (MUX) to take on or more data inputs and
generate a single output. In Logisim, multiplexers are under the Plexers folder. Click the Multiplexer
icon and drop two of them onto our canvas. Each multiplexer should have one Select Bit and 4 Data
Bits. Refer Figure 12.

Figure 12

4. Add controls pins for the multiplexers by dropping two pins on the canvas, north-facing, with 1 data
bit. Label them as 0 and 1, respectively. Refer Figure 13.

Figure 13
5. Add a splitter into the circuit that takes one line from the second multiplexer and split to 4 inputs to an
OR gate as shown in Figure 14.

Figure 14

6. Add an OR gate after the splitter, which has 4 inputs. Need to add lines from the splitter. Then add a
NOT gate to the right of the OR gate. Finally, add a single-bit pin after the NOT gate to store result.
Label it as ZERO. Refer Figure 15.

Note: This arrangement will result zero (0) output when ALL bits result in zero (0) because of the NOT
and OR gate.

Figure 15

7. Add a West-facing 4-bit pin to the right of the MUX. This Result Pin for the Multiplexers to account
for the valid combinations of inputs from A, B, and the Control inputs. Refer Figure 16.

Figure 16
8. Add Negative, Carry and Overflow Pins below the Zero pin and allow space to connect them all. Refer
Figure 17.

Note: When the most significant bit is 1, the final result is negative. In situations where the result is
large enough to not fit into our bit allowance, we get a carry. Finally, if our signs are mixed up and you
get a result of -1, you need a catch for overflow

Figure 17

9. Connect all the parts to complete the 4-bit ALU as shown in Figure 18. Make the connections
carefully.

Note: Remember you can Undo if something goes awry! You may have to shift some of the components
around the canvas; this might make your lines look funny. There's no harm in deleting and re-adding
the lines. Also, you can click on the middle of any line and start a new one (see the line from Input A
down to the 4-bit Adder as an example).
 Figure 18

10. Test the built ALU by using the following steps while watching the output of Result pins:

i) Click the hand icon in the toolbar. Click the input pin A, selecting individual bits, changing from
0000 to 1111 according to Table 2. Fixed the value of input B (Notes: You can choose any value
of B. But need to be fixed for all 4 Tables). What happens? Record the results in Table 2(a), Table
2(b), Table 2(c) and Table 2(d).
ii) Click the Control inputs 0 and 1 to change values. Discuss the function of control unit in your
discussion section.
 Table 2 (a) Control Unit (0,0)

A B Result Zero Negative Carry Overflow

0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111

Table 2 (b) Control Unit (0,1)

A B Result Zero Negative Carry Overflow

0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111

Table 2 (c) Control Unit (1,0)

 A B Result Zero Negative Carry Overflow
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111

Table 2 (d) Control Unit (1,1)

A B Result Zero Negative Carry Overflow

0000
0001
0010
0011 1011 1000 0 1 0 1
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111

Note: If you messed up any connections, or didn't set the bit values right, the lines change their color
to red, and you might get errors. Be sure to check your gates and inputs so that the bits are accurate.
 11. Write a complete report to report your finding. Your report should include the screenshot of your full
circuit (combination from Experiment 1.1 and 1.2, completed Table 1 and completed Table 2. Your
Lab Report should include the following and will be assessed based on the following rubric:

i) Page Cover (Name and student ID of each group members)

ii) Introduction
iii) Components and/or Methods
iv) Results
v) Discussion (Relate with what you have learnt in theory class)
vi) Conclusions

Introduction 5 4 3 2 1
Introduction Introduction is Some Very little background No introduction
complete and well- nearly complete, introductory information provided or is presented
written; provides missing some minor information, information is incorrect
all necessary points but still missing
background some major
principles points
for the experiment
Components 10 8 6 4 2
and Methods Well-written in Written in paragraph Written in paragraph Missing several No components
paragraph format, all format, important format, still missing important and methods are
experimental details experimental details some important experimental details or presented
are covered are covered, some experimental details not written in paragraph
minor details format
missing
Results 10 8 6 4 2
All figures, graphs, All figures, graphs, Most figures, graphs, Figures, graphs, tables No result is
tables are correctly tables are correctly tables contain errors or are presented
drawn, are numbered drawn, but some have OK, some still poorly constructed, have
and contain minor problems or missing some missing titles, captions
titles/captions. could still be important or required or numbers, units
improved features missing
or incorrect, etc.
Discussion 10 8 6 4 2
All-important trends Almost all of the Some of the results Very incomplete or No discussion
and data comparisons results have been have been correctly incorrect interpretation is presented
have been interpreted correctly interpreted interpreted and of trends and
correctly and and discussed, only discussed; partial but comparison
discussed, good minor improvements incomplete of data indicating a lack
understanding of are needed understanding of of understanding of
results is conveyed results is still evident results
Conclusions 5 4 3 2 1
All-important All-important Conclusions Conclusions missing or No conclusion
conclusions conclusions have been regarding major missing the important is presented
have been clearly drawn, could be points are drawn, points
made, student shows better stated but
good understanding many are misstated,
indicating a lack of
understanding

Total Marks: 40

ALL THE BEST!!!!!!!