UNIT 2 [ MPI ]

Addressing Modes of 8086 The way of specifying data to be operated by an instruction is known
as addressing modes. This specifies that the given data is an immediate data or an address. It also specifies whether
the given operand is register or register pair.
Types of addressing modes:
Register mode – In this type of addressing mode both the operands are registers.
Example: MOV AX, BX XOR AX, DX ADD AL, BL
Immediate mode – In this type of addressing mode the source operand is a 8 bit or 16 bit data. Destination operand
can never be immediate data.
Example: MOV AX, 2000 MOV CL, 0A ADD AL, 45 AND AX, 0000
Note that to initialize the value of segment register an register is required. MOV AX, 2000 MOV CS, AX
Displacement or direct mode – In this type of addressing mode the effective address is directly given in the
instruction as displacement.
Example: MOV AX, [DISP] MOV AX, [0500]
Register indirect mode – In this addressing mode the effective address is in SI, DI or BX.
Example: Physical Address = Segment Address + Effective Address
MOV AX, [DI] ADD AL, [BX] MOV AX, [SI]
Based indexed mode – In this the effective address is sum of base register and index register.
Base register: BX, BP Index register: SI, DI
The physical memory address is calculated according to the base register.
Example: MOV AL, [BP+SI] MOV AX, [BX+DI]
Indexed mode – In this type of addressing mode the effective address is sum of index register and displacement.
Example:MOV AX, [SI+2000] MOV AL, [DI+3000]
Based mode – In this the effective address is the sum of base register and displacement.
Example: MOV AL, [BP+ 0100]
Based indexed displacement mode – In this type of addressing mode the effective address is the sum of index
register, base register and displacement.
Example: MOV AL, [SI+BP+2000]
String mode – This addressing mode is related to string instructions. In this the value of SI and DI are auto
incremented and decremented depending upon the value of directional flag.
Example: MOVS B MOVS W
Input/Output mode – This addressing mode is related with input output operations.
Example: IN A, 45 OUT A, 50
Relative mode – In this the effective address is calculated with reference to instruction pointer.
Example: JNZ 8 bit address IP=IP+8 bit address
Addressing modes of 8085 –
Immediate Addressing Mode –
In immediate addressing mode the source operand is always data. If the data is 8-bit, then the instruction will be of
2 bytes, if the data is of 16-bit then the instruction will be of 3 bytes.
Examples: MVI B 45 (move the data 45H immediately to register B)
LXI H 3050 (load the H-L pair with the operand 3050H immediately)
JMP address (jump to the operand address immediately)
Register Addressing Mode – In register addressing mode, the data to be operated is available inside the register(s)
and register(s) is(are) operands. Therefore the operation is performed within various registers of the
microprocessor. Examples: MOV A, B (move the contents of register B to register A)
ADD B (add contents of registers A and B and store the result in register A)
INR A (increment the contents of register A by one)
Direct Addressing Mode – In direct addressing mode, the data to be operated is available inside a memory
location and that memory location is directly specified as an operand. The operand is directly available in the
instruction itself. Examples: LDA 2050 (load the contents of memory location into accumulator A)
LHLD address (load contents of 16-bit memory location into H-L register pair)
IN 35 (read the data from port whose address is 35)
Register Indirect Addressing Mode – In register indirect addressing mode, the data to be operated is available
inside a memory location and that memory location is indirectly specified by a register pair.
Examples: MOV A, M (move the contents of the memory location pointed by the H-L pair to the accumulator)
LDAX B (move contents of B-C register to the accumulator)
STAX B (store accumulator contents in memory pointed by register pair B-C)
Implied/Implicit Addressing Mode – In implied/implicit addressing mode the operand is hidden and the data to be
operated is available in the instruction itself.
Examples: CMA (finds and stores the 1’s complement of the contents of accumulator A in A)
RRC (rotate accumulator A right by one bit)
RLC (rotate accumulator A left by one bit)
Relative Addressing Mode: In this mode, the operand is a memory location specified by the contents of the
program counter plus a constant value. Example: MOV R0,#05H
8086 Instruction Format:The 8086 Instruction 8086 Instruction Format vary from 1 to 6 bytes in length. Fig.
6.8 shows the instruction formats for 1 to 6 bytes instructions. As shown in the Fig. 6.8, displacements and operands
may be either 8-bits or 16-bits long depending on the instruction. The opcode and the addressing mode is specified
using first two bytes of an instruction.

The opcode/addressing mode byte(s) may be followed by :

1) No additional byte 2)Two byte EA (For direct addressing only). 3) One or two byte displacement 4) One or two
byte immediate operand 5) One or two byte displacement followed by a one or two byte immediate operand 6)
Two byte displacement and a two byte segment address (for direct intersegment addressing only). 7) Most of the
opcodes in 8086 has a special 1-bit indicates. They are : W-bit : Some instructions of 8086 can operate on byte or a
word. The W-bit in the opcode of such instruction specify whether instruction is a byte instruction (W = 0) or a word
instruction (W = 1).D-bit : The D-bit in the opcode of the instruction indicates that the register specified within the
instruction is a source register (D = 0) or destination register (D =1). S-bit : An 8-bit 2’s complement number can be
extended to a 16-bit 2’s complement number by making all of the bits in the higher-order byte equal the most
significant bit in the low order byte. This is known as sign extension. The S-bit along with the W-bit indicate :
V-bit : V-bit
decides the number
of shifts for rotate
and shift
instructions. If V =
0, then count = 1; if
V = 1, the count is
in CL register. For
example, if V = 1 and CL = 2 then shift or rotate instruction
shifts or rotates 2-bits
Z-bit : It is used for string primitives such as REP for
comparison with ZF Flag. (Refer Appendix A for instruction
formats)

As seen from the Fig. 6.8 if an instruction has two opcode/addressing mode bytes, then the second byte is of one of the
following two forms .where Mod, Reg and R/M fields specify operand as described in the following tables.

INSTRUCTION EXECUTION AND TIMING DIAGRAM:

Instruction Cycle: The time taken by the processor to complete the execution of an instruction. An instruction cycle
consists of one to six machine cycles.
Machine Cycle: The time required to complete one operation; accessing either the memory or I/O device. A machine
cycle consists of three to six T-states.
T-State: Time corresponding to one clock period. It is the basic unit to calculate execution of instructions or programs
in a processor.
Data transfer instructions Data transfer instructions in the 8086 microprocessor are used to move data
between memory locations, registers, and input/output (I/O) devices. These instructions are essential for
manipulating data within a program, as well as for communicating with external devices.
ypes of Data transfer instructions :
1. Move instructions: These instructions are used to move data from one memory location to another or between
a memory location and a register. They include the following instructions:
• MOV: Moves data from a source operand to a destination operand.
• XCHG: Swaps the contents of two operands.
• XLAT: Translates a byte in memory using a lookup table pointed to by the contents of the AL register.
• LEA: Loads a 16-bit offset address into a register.
2. Load instructions: These instructions are used to load data from a memory location or I/O device into a
register. They include the following instructions:
• LDS: Loads a 16-bit pointer value from a memory location into a register pair and loads the 8-bit value
from the next memory location into another register.
• LSS: Loads a 16-bit pointer value from a memory location into a register pair and loads the 16-bit value
from the next memory location into another register.
• LXI: Loads a 16-bit value into a register pair.
• MOV with memory operand: Loads data from a memory location into a register.
3. Store instructions: These instructions are used to store data from a register into a memory location or I/O
device. They include the following instructions:
• MOV with memory operand: Stores data from a register into a memory location.
• STA: Stores the contents of the accumulator register (AL or AX) in memory.
• STAX: Stores the contents of a register pair (BC, DE, or HL) in memory using either the indirect
addressing
• mode or the direct addressing mode.
• SHLD: Stores a 16-bit data word from registers H and L in memory using the direct addressing mode.
• PUSH: Stores the contents of a register onto the stack.
 4. Input/Output instructions: These instructions are used to communicate with external input/output (I/O)
devices. They include the following instructions:
• IN: Reads a byte or word of data from an I/O port into a register.
• OUT: Writes a byte or word of data from a register to an I/O port.
• INS: Reads a block of data from an I/O port into a memory location.
• OUTS: Writes a block of data from a memory location to an I/O port.

5. String instructions: These instructions are used for manipulating strings of data, such as moving, copying, or
comparing strings. They operate on consecutive bytes or words in memory, and can be used for fast and efficient
string processing. Some examples of string instructions include:

• MOVS: Moves a byte or word from a source location to a destination location, and updates the index
registers to point to the next byte or word.
• CMPS: Compares a byte or word in memory to a byte or word in a register, and updates the index
registers accordingly.
• LODS: Loads a byte or word from a memory location into a register, and updates the index registers to
point to the next byte or word.
• STOS: Stores a byte or word from a register into a memory location, and updates the index registers to
point to the next byte or word.
• OPCODE OPERAND EXPLANATION EXAMPLE

MOV D, S D=S MOV AX, [SI]

PUSH D pushes D to the stack PUSH DX

POP D pops the stack to D POP AS

PUSHA none put all the registers into the stack PUSHA

POPA none gets words from the stack to all registers POPA

XCHG D, S exchanges contents of D and S XCHG [2050], AX

IN D, S copies a byte or word from S to D IN AX, DX

OUT D, S copies a byte or word from D to S OUT 05, AL

XLAT none translates a byte in AL using a table in the memory XLAT

LAHF none loads AH with the lower byte of the flag register LAHF

SAHF none stores AH register to lower byte of the flag register SAHF

PUSHF none copies the flag register at the top of the stack PUSHF

POPF none copies a word at the top of the stack to the flag register POPF

Here D stands for destination and S stands for source.

D and S can either be register, data or memory address.
Arithmetic Instructions in 8086: Arithmetic Instructions in 8086 are follows
a) Addition Instructions : ADD ADC INC AAA DAA

ADD/ADC Instruction : ADD destination, source / ADC destination, source. These instructions add a number from
source to a number from destination and put the result in the destination. The ADC, instruction also adds the status of
carry flag into the result. The source may be an immediate number, a register, or a memory location. The source and
the destination in an instruction cannot both be memory locations. The source and destination both must be a word or
byte. If you want to add a byte to a word, you must copy the byte to a word location and fill the upper byte of the word
with zeroes before adding. Flags affected : AF, CF, OF, PF, SF, ZF.

INC Instruction : Increment destination. The INC instruction adds 1 to the specified destination. The destination may
be a register or memory location. The AF, OF, PF, SF and ZF flags are affected.

AAA Instruction : ASCII Adjust for Addition. The numbers from 0-9 are represented as 30H-39H in ASCII code.
When you want to add two decimal digits which are represented in ASCII code, it is necessary to mask upper nibble
(3) from the code before addition. The Arithmetic Instructions in 8086 allows you to add the ASCII codes for two
decimal digits without masking off the “3” in the upper nibble of each digit. The AAA instruction can be used after
addition to get the current result in unpacked BCD form.

DAA Instruction : Decimal Adjust Accumulator. This instruction is used to make sure the result of adding two
packed BCD numbers is adjusted to be a legal BCD number.

Instruction works as follows :

1. If the value of the low-order four bits (D3-D0) in the AL is greater than 9 or if AF is set, the instruction
adds 6 (06) to the low-order four bits.
2. If the value of the high-order four bits (D7-D4) in the AL is greater than 9 or if carry flag is set, the
instruction adds 6 (60) to the high-order four bits.
b) Subtraction Instructions: SUB SBB DEC NEG CMP AAS DAS

SUB/SBB Instruction : SBB destination, Source.

These instructions subtract the number in the source from the number in the desfinafion and put result in the
desfinafion. The SBB, instruction also subtracts the status of carry flag from the result. The source may be an
immediate number, a register, or a memory location. The destination maybe a register or a memory location. The
source and the desfinafion both cannot be memory locafions. The source and destination both mustbeword or byte. If
you want to subtract a byte from a word, you must copy the byte to a word location and fill the upper byte of the word
with zeroes before subtracting. Flags affected : AF, CF, OF, PF,SF,andZE.
DEC Instruction : Decrement destination. The DEC instruction subtract 1 from the specified destination. The
destination may be a register or a memory location. The AF, OF, PF, SF and ZF flags are affected.
NEG Instruction : Form 2’s complement.nThis, instruction replaces the number in a destination with the 2’s
complement of that number. The destination can be a register or a memory location. This instruction can be
implemented by inverting each bit and adding 1 to it. The negate instruction updates the AF, CF, SF, PF, ZF and OF
flags.
CMP Instruction : CMP destination, source. This instruction compares a byte/word from the specified source with a
byte/word from the specified destination. The source and destination both must be byte or word. The ‘source may be
an immediate number, a register, or a memory location. The destination may be a register or a memory location.
However the source and destination both can’t be memory locations. The comparison is done by subtracting the
source byte or word from the destination byte or word. But the result is not stored in the destination. Source and
destination remain unchanged, only flags are updated. Flags : The AF, OF, SF, ZF, PF and CF are updated by the
CMP instruction.
AAS Instruction : ASCII Adjust after subtraction.The numbers from 0-9 are represented as 30-39 in ASCII code.
When you want to subtract two decimal digits which are represented in ASCII code, it is necessary to mask upper
nibble (3) from the code before subtraction. The Arithmetic Instructions in 8086 allows you to subtract the ASCII
codes for two decimal digits without masking off the “3” in the upper nibble of each digit. The AAS instruction can be
.used after subtraction to get the current result in unpacked BCD form.
DAS Instruction : Decimal Adjust After Subtraction. This instruction is used after subtracting two packed BCD
numbers to make sure the result is correct packed BCD. Instruction works as follows :

1. If the value of the low-order four bits (D3-D0) in the AL is greater than 9 o AF is set; the instruction
subtracts 6 (06) from the low-order four bits.
 2. If the value of the high-order four bits (D7-D4) in the AL is greater than 9 or if carry flag is set, the
instruction subtracts 6 (60) from the high-order four bits.
c) Multiplication Instructions: MUL IMUL AAM

MUL Instruction : MUL source. This instruction multiplies an unsigned byte from source and unsigned byte in AL
register or unsigned word from source and unsigned word in AX register. The source can be a register or a memory
location. When the byte is multiplied by the contents of AL, the result is stored in AX. The most significant byte is
stored in AH and least significant byte is stored in AL. When a word is multiplied by the contents of AX, the most
significant word of result is stored in DX and least significant word of result is stored in AX.
Flags : MUL instruction affect AF, PF, SF, and ZF flags.
IMUL Instruction : This instruction multiplies a signed byte from some source and a signed byte in AL, or a signed
word from some source and a signed word in AX. The source can be register or memory location. When a signed byte
is multiplied by AL a signed result will be put in AX. When a signed word is multiplied by AX, the high-order word
of the signed result is put in DX and the low-order word of the signed result is put in AX. If the upper byte of a 16-bit
result or the upper word of 32-bit result contains only copies of the sign bit (all 0’s or all 1’s), then the CF and the OF
flags will both be 0’s. The AF, PF, SF, and ZF flags are undefined after IMUL. To multiply a signed byte by a signed
word it is necessary to move the byte into a word location and fill the upper byte of the word with copies of the sign
bit. This can be done using CBW instruction.
AAM Instruction : BCD Adjust After Multiply. After the two unpacked BCD digits are multiplied, the AAM
instruction is used to adjust the product to two unpacked BCD digits in AX.

d) Division Instructions: DIV IDIV AAD

DIV Instruction : DIV source This instruction is used to divide an unsigned word by a byte or to divide an unsigned
double word by a word When dividing a word by a byte, the word must be in AX register. After the division AL will
contain an 8-bit quotient and AH will contain an 8-bit remainder. If an attempt is made to divide by 0 or the quotient is
too large to fit in AL (greater than FFH), the Arithmetic Instructions in 8086 will automatically execute a type 0
interrupt. When a double word is divided by a word, the most significant word of the double word must be in DX and
the least-significant word must be in AX. After the division AX will contain a 16-bit quotient and DX will contain a
16-bit remainder. Again, if an attempt is made to divide by 0 or the quotient is too large to fit in AX register (greater
than FFFFH), the Arithmetic Instructions in 8086 will do a type 0 interrupt. For DIV instruction source may be a
register or memory location. To divide a byte by a byte, it is necessary to put the dividend byte in AL and fill AH with
all 0’s. Similarly, to divide a word by a word, it is necessary to put the dividend word in AX and fill DX with all 0’s.
Flags : All flags are undefined after a DIV instruction.
IDIV Instruction : IDIV source. This instruction is used to divide a signed word by a signed byte, or to divide
a signed double word (32-bits) by a signed word. Rest all is similar to DIV instruction.
AAD Instruction : Binary Adjust before division. AAD converts two unpacked BCD digits in AH and AL to
the equivalent binary number in AL. This adjustment must be made before dividing the two unpacked BCD digits in
AX by an unpacked BCD byte. After the division AL will contain the unpacked BCD quotient and AH will contain
the unpacked BCD remainder. The PF, SF and ZF are updated. The AF, CF and OF are undefined after AAD.

In the 8086 microprocessor, branch instructions are used for conditional and unconditional branching, while
looping instructions are used for implementing loops. Here are some examples of branch and looping instructions in
the 8086 microprocessor:

Branch Instructions:
- JMP: Unconditional Jump. Transfers program control to the specified destination. Example: JMP Label ; Jumps
to the instruction labeled "Label".
- JZ / JE: Jump if Zero / Jump if Equal. Jumps to the specified destination if the Zero/Equal flag is set. Example:
JZ Label ; Jumps to the instruction labeled "Label" if the Zero flag is set.
- JNZ / JNE: Jump if Not Zero / Jump if Not Equal. Jumps to the specified destination if the Zero/Equal flag is not
set. Example: JNZ Label ; Jumps to the instruction labeled "Label" if the Zero flag is not set.
- JC / JB: Jump if Carry / Jump if Below. Jumps to the specified destination if the Carry flag is set.
Example: JC Label ; Jumps to the instruction labeled "Label" if the Carry flag is set.
- JNC / JNB: Jump if Not Carry / Jump if Not Below. Jumps to the specified destination if the Carry flag is not set.
Example: JNC Label ; Jumps to the instruction labeled "Label" if the Carry flag is not set.
- JA: Jump if Above. Jumps to the specified destination if the Carry and Zero flags are not set (unsigned
comparison). Example: JA Label ; Jumps to the instruction labeled "Label" if the Carry and Zero flags are not set.
- JAE: Jump if Above or Equal. Jumps to the specified destination if the Carry flag is not set (unsigned
comparison). Example: JAE Label ; Jumps to the instruction labeled "Label" if the Carry flag is not set.
- JB / JC: Jump if Below / Jump if Carry. Jumps to the specified destination if the Carry flag is set (unsigned
comparison). Example: JB Label ; Jumps to the instruction labeled "Label" if the Carry flag is set.
- JBE: Jump if Below or Equal. Jumps to the specified destination if the Carry or Zero flag is set (unsigned
comparison). Example: JBE Label ; Jumps to the instruction labeled "Label" if the Carry or Zero flag is set.

Looping Instructions:
- LOOP: Decrement the CX register by 1 and jumps to the specified destination if CX is not zero.
Example: LOOP Label ; Decrements CX and jumps to the instruction labeled "Label" if CX is not zero.
- LOOPE / LOOPZ: Loop if Equal / Loop if Zero. Decrement CX by 1 and jumps to the specified destination if
CX is not zero and the Zero flag is set. Example: LOOPE Label ; Decrements CX and jumps to the instruction
labeled "Label" if CX is not zero and the Zero flag is set.
- LOOPNE / LOOPNZ: Loop if Not Equal / Loop if Not Zero. Decrement CX by 1 and jumps to the specified
destination if CX is not zero and the Zero flag is not set. Example: LOOPNE Label ; Decrements CX and
jumps to the instruction labeled "Label" if CX is not zero and the Zero flag is not set.

Shift and Rotate Instructions

As we know that any machine (system) works on machine language, which consists of binary numbers. In the 8086
microprocessor, we have 16-bit registers to handle our data. Sometimes, the need to perform some necessary shift and
rotate operations on our data may occur according to the given condition and requirement. So, for that purpose, we
have various Shift and Rotate instructions present in the 8086 microprocessor. They are :-
1) SHR : Shift Right 2) SAR : Shift Arithmetic Right 3)SHL : Shift Left 4) SAL : Shift Arithmetic Left
5) ROL : Rotate Left 6) ROR : Rotate Right 7) RCL : Rotate Carry Left 8) RCR : Rotate Carry Right
1) SHR : Shift Right This instruction simply shifts the mentioned bits in the register to the right side one by one by
inserting the same number (bits that are being shifted) of zeroes from the left end. The rightmost bit that is being
shifted is stored in the Carry Flag (CF).
Syntax: SHR Register, Bits to be shifted Example: SHR AX, 2
2) SAR : Shift Arithmetic Right This instruction shifts the mentioned bits in the register to the right side one
by one, but instead of inserting the zeroes from the left end, the MSB is restored. The rightmost bit that is being
shifted is stored in the Carry Flag (CF). Syntax: SAR Register, Bits to be shifted Example:SAR BX, 5
3) SHL : Shift Left This instruction simply shifts the mentioned bits in the register to the left side one by one by
inserting the same number (bits that are being shifted) of zeroes from the right end. The leftmost bit that is being
shifted is stored in the Carry Flag (CF). Syntax: SHL Register, Bits to be shifted Example:SHL AX, 2
4) SAL : Shift Arithmetic Left The SAL instruction is an abbreviation for ‘Shift Arithmetic Left’. This instruction is
the same as SHL. Syntax: SAL Register, Bits to be shifted Example: SAL CL, 2
5) ROL : Rotate Left This instruction rotates the mentioned bits in the register to the left side one by one such that
leftmost bit that is being rotated is again stored as the rightmost bit in the register, and it is also stored in the Carry
Flag (CF). Syntax:ROL Register, Bits to be shifted Example:ROL AH, 4
6) ROR : Rotate Right This instruction rotates the mentioned bits in the register to the right side one by one such
that rightmost bit that is being rotated is again stored as the MSB in the register, and it is also stored in the Carry Flag
(CF). Syntax: ROR Register, Bits to be shifted Example: ROR AH, 4
7) RCL : Rotate Carry Left This instruction rotates the mentioned bits in the register to the left side one by one
such that leftmost bit that is being rotated it is stored in the Carry Flag (CF), and the bit in the CF moved as the LSB in
the register. Syntax: RCL Register, Bits to be shifted Example: RCL CH, 1
8) RCR : Rotate Carry Right This instruction rotates the mentioned bits in the register to the right side such that
rightmost bit that is being rotated it is stored in the Carry Flag (CF), and the bit in the CF moved as the MSB in the
register. Syntax: RCR Register, Bits to be shifted Example: RCR BH, 6

Logical instructions Logical instructions in the 8086 microprocessor are instructions that perform logical
operations on data stored in registers or memory locations. These instructions can manipulate bits within a byte, set
or clear individual bits, or perform Boolean operations such as AND, OR, XOR, and NOT.
Some of the commonly used logical instructions in the 8086 microprocessor include:
1. AND – Performs a bitwise logical AND operation between two operands and stores the result in the
destination operand.
2. OR – Performs a bitwise logical OR operation between two operands and stores the result in the
destination operand.
3. XOR – Performs a bitwise logical XOR (exclusive OR) operation between two operands and stores the
result in the destination operand.
 4. NOT – Performs a bitwise logical NOT (negation) operation on the operand and stores the result in the
destination operand.
5. TEST – Performs a bitwise logical AND operation between two operands, but does not store the result.
Instead, it sets the condition code flags based on the result of the operation.
Logical instructions are used in many applications, including bit manipulation, data encryption, and data
compression. They are an important part of the instruction set of the 8086 microprocessor and are used extensively
in assembly language programming. Logical instructions are the instructions which perform basic logical
operations such as AND, OR, etc. In 8086 microprocessor, the destination operand need not be the accumulator.
Following is the table showing the list of logical instructions:
OPCODE OPERAND DESTINATION EXAMPLE
AND D, S D = D AND S AND AX, 0010
OR D, S D = D OR S OR AX, BX
NOT D D = NOT of D NOT AL
XOR D, S D = D XOR S XOR AL, BL
TEST D, S performs bit-wise AND operation and affects the flag register TEST [0250], 06
SHR D, C shifts each bit in D to the right C times and 0 is stored at MSB position SHR AL,
04
SHL D, C shifts each bit in D to the left C times and 0 is stored at LSB position SHL AX, BL
ROR D, C rotates all bits in D to the right C times ROR BL, CL
ROL R, C rotates all bits in D to the left C times ROL BX, 06
RCR D, C rotates all bits in D to the right along with carry flag C times RCR BL, CL
RCL R, C rotates all bits in D to the left along with carry flag C times RCL BX, 06
Here D stands for destination, S stands for source and C stands for count. They can either be register, data or
memory address.
Flag Manipulation and Processor Control Instructions
Instruction Description
CLC Clear Carry Flag: This instruction resets the carry flag CF to 0.
CLD Clear Direction Flag: This instruction resets the direction flag DF to 0.
CLI Clear Interrupt Flag: This instruction resets the interrupt flag IF to 0.
CMC This instruction take complement of carry flag CF.
STC Set carry flag CF to 1.
STD Set direction flag to 1.
STI Set interrupt flag IF to 1.
HLT Halt processing. It stops program execution.
NOP Performs no operation.
ESC Escape: makes bus free for external master like a coprocessor or peripheral device.
WAIT When WAIT instruction is executed, the processor enters an idle state in which the processor does no processing.
LOCK It is a prefix instruction. It makes the LOCK pin low till the execution of the next instruction.

NOP (No operation) : NOP is used when no operation is performed. It is commonly used to fill in time delay or to
delete and insert instructions while troubleshooting. During the execution of NOP, no flags are affected.
Opcode- 00 Operand- None Length- 1 byte M-Cycles- 1 T-states- 4 Hex code- 00
HLT (Halt) HLT is used to stop the execution of the program temporarily. The microprocessor finishes executing
the current instruction and halts any further execution. The contents of the registers are unaffected during the HLT
state. HLT can be used to enter a wait state in which the microprocessor waits for a specific event to occur before
resuming execution. Opcode- 76 Operand- None Length- 1 byte
M-Cycles- 2 or more T-states- 5 or more Hex code- 76

Assembler Directives of 8086 Microprocessor It control the organization if the program and provide
necessary information to the assembler to understand the assembly language programs to generate necessary machine
codes. They indicate how an operand or a section of the program is to be processed by the assembler.
An assembler supports directives to define data, to organise segments to control procedure, to define macros. It
consists of two types of statements: instructions and directives. The instructions are translated to the machine code by
the assembler whereas directives are not translated to the machine codes.
Assembler Directives of the 8086 Microprocessor (a) The DB directive (b) The DW directive (c) The DD
directive (d) The STRUCT (or STRUC) and ENDS directives (counted as one) (e)The EQU Directive (f)The
COMMENT directive (g)ASSUME (h) EXTERN (i) GLOBAL (j) SEGMENT (k)OFFSET (l) PROC
(m)GROUP (n) INCLUDE
Data declaration directives:
1. DB – The DB directive is used to declare a BYTE -2-BYTE variable – A BYTE is made up of 8 bits.
Declaration examples:Byte1 DB 10h Byte2 DB 255 ; 0FFh, the max. possible for a BYTE
2. DW – The DW directive is used to declare a WORD type variable – A WORD occupies 16 bits or (2 BYTE).
Declaration examples:Word DW 1234h Word2 DW 65535; 0FFFFh, (the max. possible for a WORD)
3. DD – The DD directive is used to declare a DWORD – A DWORD double word is made up of 32 bits =2 Word’s
or 4 BYTE. Declaration examples: Dword1 DW 12345678h Dword2 DW 4294967295 ;0FFFFFFFFh.
4. STRUCT and ENDS directives to define a structure template for grouping data items.
(1) The STRUCT directive tells the assembler that a user defined uninitialized data structure follows. The uninitialized
data structure consists of a combination of the three supported data types. DB, DW, and DD. The labels serve as zero-
based offsets into the structure. The first element’s offset for any structure is 0. A structure element is referenced with
the base “+” operator before the element’s name. A Structure ends by using the ENDS directive meaning END of
Structure. DECLARATION: STRUCT Byte1 DB? Byte2 DB? Word1 DW? Word2 DW?
Dword1DW? Dword2 DW? ENDS

Use OF STRUCT: The STRUCT directive enables us to change the order of items in the structure when, we reform a
file header and shuffle the data. Shuffle the data items in the file header and reformat the sequence of data declaration
in the STRUCT and off you go. No change in the code we write that processes the file header is necessary unless you
inserted an extra data element.
6.The EQU Directive The EQU directive is used to give name to some value or symbol. Each time the assembler
finds the given names in the program, it will replace the name with the value or a symbol. The value can be in the
range 0 through 65535 and it can be another Equate declared anywhere above or below.
The following operators can also be used to declare an Equate: THIS BYTE THIS WORD THIS DWORD
A variable – declared with a DB, DW, or DD directive – has an address and has space reserved at that address for it in
the .COM file. But an Equate does not have an address or space reserved for it in the .COM file.

7. Extern: It is used to tell the assembler that the name or label following the directive are I some other assembly
module. For example: if you call a procedure which is in program module assembled at a different time from that
which contains the CALL instructions ,you must tell the assembler that the procedure is external the assembler will
put information in the object code file so that the linker can connect the two module together.
Example: PROCEDURE -HERE SEGMENT EXTERN SMART-DIVIDE: FAR ; found in the segment;
PROCEDURES-HERE PROCEDURES-HERE ENDS
(8) GLOBAL: The GLOBAL directive can be used in place of PUBLIC directive .for a name defined in the current
assembly module; the GLOBAL directive is used to make the symbol available to the other modules. Example:
GLOBAL DIVISOR:WORD tells the assembler that DIVISOR is a variable of type of word which is in another
assembly module or EXTERN.
(9) SEGMENT: It is used to indicate the start of a logical segment. It is the name given to the the segment. Example:
the code segment is used to indicate to the assembler the start of logical segment.
(10) PROC: (PROCEDURE) It is used to identify the start of a procedure. It follows a name we give the procedure.
After the procedure the term NEAR and FAR is used to specify the procedure Example: SMART-DIVIDE PROC
FAR identifies the start of procedure named SMART-DIVIDE and tells the assembler that the procedure is far.
(11) NAME:It is used to give a specific name to each assembly module when program consists of several
modules.Example: PC-BOARD used to name an assembly module which contains the instructions for controlling a
printed circuit board.
(12) INCLUDE:It is used to tell the assembler to insert a block of source code from the named file into the current
source module. This shortens the source module. An alternative is use of editor block command to cop the file into the
current source module.
(13) OFFSET:It is an operator which tells the assembler to determine the offset or displacement of a named data item
from the start of the segment which contains it. It is used to load the offset of a variable into a register so that variable
can be accessed with one of the addressed modes. Example: when the assembler read MOV BX.OFFSET PRICES, it
will determine the offset of the prices.
(14) GROUP:It can be used to tell the assembler to group the logical segments named after the directive into one
logical group. This allows the contents of all he segments to be accessed from the same group. Example: SMALL-
SYSTEM GROUP CODE, DATA, STACK-SEG.
Operators in 8086- Operator can be applied in the operand which uses the immediate data/address.
- Being active during assembling and no machine language code is generated. - Different types of operators are:

1) Arithmetic: + , - , * , / 2) Logical : AND, OR, XOR, NOT 3) SHL and SHR: Shift during assembly
4) [ ]: index 5) HIGH: returns higher byte of an expression 6) LOW: returns lower byte of an
expression. E.g. NUM EQU 1374 H MOV AL HIGH Num ; ( [AL] 13 )
7) OFFSET: returns offset address of a variable 8) SEG: returns segment address of a variable
9) PTR: used with type specifications BYTE, WORD,
RWORD, DWORD, QWORD
E.g. INC BYTE PTR [BX]
10) Segment override MOV AH, ES: [BX] 11) LENGTH:
returns the size of the referred variable
12) SIZE: returns length times type E.g.: BYTE VAR DB?
WTABLE DW 10 DUP (?)
MOV AX, TYPE BYTEVAR ; AX = 0001H

FLAGS The Flag register is a Special

Purpose Register. Depending upon the value of the result after any arithmetic and logical operation, the flag bits
become set (1) or reset (0). In 8085 microprocessor, the flag register consists of 8 bits and only 5 of them are useful.
The 5 flags are:
1)Sign Flag (S) – After any operation if the MSB (B(7)) of the result is 1, it indicates the number is negative and
the sign flag becomes set, i.e. 1. If the MSB is 0, it indicates the number is positive and the sign flag becomes reset
i.e. 0. from 00H to 7F, sign flag is 0 from 80H to FF, sign flag is 1 1- MSB is 1 (negative) 0- MSB is 0 (positive)
Example: MVI A 30 (load 30H in register A) MVI B 40 (load 40H in register B) SUB B (A = A – B) These set of
instructions will set the sign flag to 1 as 30 – 40 is a negative number. MVI A 40 (load 40H in register A) MVI B
30 (load 30H in register B) SUB B (A = A – B) These set of instructions will reset the sign flag to 0 as 40 – 30 is a
positive number.
2)Zero Flag (Z) – After any arithmetical or logical operation if the result is 0 (00)H, the zero flag becomes set i.e.
1, otherwise it becomes reset i.e. 0. 00H zero flags is 1. from 01H to FFH zero flag is 0 1- zero-result 0- non-zero
result Example: MVI A 10 (load 10H in register A) SUB A (A = A – A) These set of instructions will set the zero
flag to 1 as 10H – 10H is 00H
3)Auxiliary Carry Flag (AC) – This flag is used in the BCD number system(0-9). If after any arithmetic or logical
operation D(3) generates any carry and passes it on to D(4) this flag becomes set i.e. 1, otherwise, it becomes reset
i.e. 0. This is the only flag register that is not accessible by the programmer 1-carry out from bit 3 on addition or
borrows into bit 3 on subtraction 0-otherwise Example: MVI A 2BH (load 2BH in register A) MVI 39H (load 39H
in register B) ADD B (A = A + B) These set of instructions will set the auxiliary carry flag to 1, as on adding 2B
and 39, the addition of lower-order nibbles B and 9 will generate a carry.
4)Parity Flag (P) – If after any arithmetic or logical operation the result has even parity, an even number of 1 bit,
the parity register becomes set i.e. 1, otherwise it becomes reset i.e. 0. 1-accumulator has an even number of 1 bits
0-accumulator has odd parity Example: MVI A 05 (load 05H in register A) This instruction will set the parity flag
to 1 as the BCD code of 05H is 00000101, which contains an even number of ones i.e. 2.
5)Carry Flag (CY) – Carry is generated when performing n bit operations and the result is more than n bits, then
this flag becomes set i.e. 1, otherwise, it becomes reset i.e. 0. During subtraction (A-B), if A>B it becomes reset,
and if (A<B) it becomes set. Carry flag is also called the borrow flag. 1-carry out from MSB bit on addition or
borrow into MSB bit on subtraction 0-no carry out or borrow into MSB bit. Example: MVI A 30 (load 30H in
register A) MVI B 40 (load 40H in register B) SUB B (A = A – B) These set of instructions will set the carry flag to
1 as 30 – 40 generates a carry/borrow. MVI A 40 (load 40H in register A) MVI B 30 (load 30H in register B) SUB
B (A = A – B) These set of instructions will reset the carry flag to 0 as 40 – 30 does not generate any carry/borrow.

In 8086 there are 4 different flags which are used to enable or disable some basic operations of the microprocessor.
These flags and their functions are listed below.
Flag Bit Function
O The overflow flag is set to 1 when the result of a signed operation is too large to fit.
D This is directional flag. This is used in string related operations. D = 1, then the string will be
accessed from higher memory address to lower memory address, and if D = 0, it will do the reverse.
I This is interrupt flag. If I = 1, then MPU will recognize the interrupts from peripherals. For I = 0, the
interrupts will be ignored
T This trap flag is used for on-chip debugging. When T = 1, it will work in a single step mode. After
each instruction, one internal interrupt is generated. It helps to execute some program instruction by instruction.