Opuating poit 4on the valus o colle etor
The pt whch i ebtaind
Vee
Coluctor - Emi teY Votau
le
because vauabon of le and veE taku pla
opuain pt i applied st is alio
auound this pt when simal
called as a-point qu'esed point
toad line, -
toad lines oue used to maku suu that tansútos aue
sta
’ lohen temp changeu, teo chanqes so le alio changu and
So
opeuating pt changu e it wil not be in achue rgion.
’ There au a types ol load lins i:e, e load ling &
De toad ine.
Satwat
pt 4-pt
loadi.
pt
’ DC load line u the load tine draw by lceeping AC inp
Vee
1Re Vee -le Re-Vee 0
J leRe Vec-VeE
Vec-Ve E
Re
le
-L VeE Vec
Re
(o RL
BAC load tine is the line draun wlen both Ac De hipnal
[Capacitor in De act as pen cieuit gin te
pascd. aets as elosed crcui t.
C
Rac
SR2
Vcea +leea: kac
le
Rac
final output
Deloadline
SAc toad fine
- le. 4he yawuist or work cs aithyul amplitier, The &-pt
achue menn i , EmitHer base should be in fB
Transistor Biasing &Need of biasing
Biasing in electronics means establishing predetermined
voltages or currents at various_ points of an electronic
circuit for the purpose of establishing proper operating
conditions in electronic components
Need of Biasing :
1. To stabilize the operating point Q.
2. To set operating point Q at center of DC load line.
3. To reduce the value of stability factor (S)
4. Stabilize the collector current against temperature
variations.
5. To operate the transistor in active region as an amplifier OR
To operate the transistor as a switch
T
siab?lit9actoo
OPesating point 3if t
wrHk 4hesmal sto bl:ty
-. biagihq nef wok should be proided
mainte nance of O- iS specifed by
Gindica iey degee of Change in oP with chohge ih
temp
In c.uoe hove J, :PIgt(1+p) Ico (8hould be mal to have beBfes the) bat
,(1+8)
S =
JtabF3ation ’The poocess of making opexating poiht inde pende nt of temp
change and Vabiaticn of tohuistoo propes tieg
Biasing Techníques
(: ixed bias
2- Gmitt u feed back biay
3" Colircip y tt base bias
4 sell bi as.
we haue only t'ned and sellbia.
|. FtxED BIAS -
Vcc
Vee- lB Re -VBE 0
de
| Vcc -V8e
VBE Re -)
Vec -leRe - Vec 0
Vec - VcE
Re
-)
le plB
-The baye cuet u cont rolled by
Rensane Rg- J s
elatd to 't6 by constant B
The may o le is not contolled by colleor 1eutne'R
>Changing o Re vale to any teud oill not e{kct the leol
Yenaio io achu enm.
Advanda
Simple crcuit ohich has ey Bew comp
tpe atng pt can be a myuhe in achve' regi om of
chaalc nha by simply chong1n q the
oitaduautage
le
> he stabili ty of p u uy poor in ixed bi'ating cir euit
Vec
>Ri Rz fonn a voltae dividu netuoonk [o
-hiu is alro caled Veltag dividu bias
Ve ) VE le RE
Ri+R L
RE prepuly selicted, hen
acuo base can be mn aintaincd
volkay acYs emjer
highu than veltau
F-B
Vec Vz > Ve; Junchon EB u in
poply seucted then vetag
Ra t Re s
cotlector can be maintained queatu
at
base
than voltae at
Ve >Ve CB Tunchon u io RB
Advaut aA:
Excetlent stabilty in 8-pt.
Stabilby jackor dseyrit dpend on Re sey biasing
Can be biased in any cni'suafon in
hsadvant ags
becauye ot -ue feedback cate d b
>Velt ae qain deeuases
b)Exp latn dfode compehsa fion ci3cuit
Rg
HE
In a tansistos ampl:fer ctrcu,a diode is connectej
across the baye-emtte junction to stabize he I
against temp Vaia tions. his d'ode,made -from the sane
material the tagstor, is devese btaged by Vee alowing
e verse Satuati on cussent To. to ,flo w th0ug ht
Bye cusrent Ig
wheye I total Cuzdent entesng the bye.
As tem p dises,the collectox satuation CuDTe nt Tc
Ofthe tag's tor incae oJCg, which would nomally
Dequte a 7eduction in bage (urre ht Ig to mastatn
a stable Tc.
The diode Com pe ngaateg fo this by incxe
leakage aying
Current I. th temP effective ly ded ucihg
and counfe oct ehg h balance
the ihcege in
Tco
keeps the collector cusrent î¢ conS tant. The key adiatage
s
that both To and Tco change at 3inmilas afes th
se
Sel+ om pensating mechanism to
Leme , asl ouwtn9 this
temp
peofosnance without mahua
maintatn cony tant amplifie
adjustments.
opeatfon un dex Fi xed & Je f biay
5Expla in JFET
bia:
JFET Opesation undes fined
Voo
R
Vout
Vos
Vaa
Fixed DC bias ?s obtained uging a battey. This battey
ens uses thot he gate is alays -ve wrt Sour ce and no
CuvTent f lows thaough R and gate fe mì hal that s TG-0:
ohile an AC Signal develop acdoss the DC
Voltage dop ac30ss Ra S e ual to eRa ie., 0.
-O= -VG G
The dain- sowce cuwdeht I, (S then fixed bu
the gafe-sou)ce voltage as detemine d by lans.
Cu3dent then cawer a Volt age dop aco Oss the
dain Nisto Ro and s gven
=îpRo
Jp Tos1-Vos
Yout Vo IpRD Vp
Self biog:
Ro
Voo
Vo
ince no gatecusrent flor th ough the reve dse- bi
aed
Jate-so uace, I o=0
with dasn
the voltage at S is
Vp
the gate SovTce vo ltage
Vag- -Ip Rs
Ip (RptRS)
Thie. DC conditioN of JFET amplifea ave fully
Speciied selt -bioing of a JfeT stabrlizey ts cpeo tig
Po;nt agairJt any Change n s padame ters ,lrke
4Dans onductance.
