SP3222EU / SP3232EU

3.3V, 1000 kbps RS-232 Transceivers

FEATURES
■ Meets true EIA/TIA-232-F Standards EN 1 18 SHDN
from a +3.0V to +5.5V power supply
■ Minimum 1000kbps Data Rate C1+ 2 17 VCC
■ 1µA Low Power Shutdown with V+ 3 16 GND
Receivers active (SP3222EU)
■ Interoperable with RS-232 down to a C1- 4 15 T1OUT
+2.7V power source C2+ 5 SP3222EU 14 R1IN
■ Enhanced ESD Specifications:
C2- 6 13 R1OUT
+15kV Human Body Model
+15kV IEC61000-4-2 Air Discharge V- 7 12 T1IN
+8kV IEC61000-4-2 Contact Discharge
■ Ideal for Handheld, Battery Operated T2OUT 8 11 T2IN
Applications R2IN 9 10 R2OUT

nSOIC
Now Available in Lead Free Packaging

DESCRIPTION
The SP3222EU and the SP3232EU are 2 driver, 2 receiver RS-232 transceiver solutions
intended for portable or hand-held applications such as notebook or palmtop computers.
Their data transmission rate of 1000 kbps meets the demands of high speed RS-232 ap-
plications. The SP3222EU/SP3232EU series has a high-efficiency, charge-pump power
supply that requires only 0.1µF capacitors in 3.3V operation. This charge pump allows the
SP3222EU/SP3232EU series to deliver true RS-232 performance from a single power supply
ranging from +3.0V to +5.5V. The ESD tolerance of the SP3222EU/SP3232EU devices are
over +/-15kV for both Human Body Model and IEC61000-4-2 Air discharge test methods. The
SP3222EU device has a low-power shutdown mode where the devices' driver outputs and
charge pumps are disabled. During shutdown, the supply current falls to less than 1µA.

SELECTION TABLE
MODEL Power RS-232 RS-232 External Shutdown TTL # of
Supplies Drivers Receivers Components 3-State Pins
SP3222EU +3.0V to +5.5V 2 2 4 Capacitors Yes Yes 18, 20
SP3232EU +3.0V to +5.5V 2 2 4 Capacitors No No 16

1
 ABSOLUTE MAXIMUM RATINGS

These are stress ratings only and functional operation

of the device at these ratings or any other above those
indicated in the operation sections of the specifications
below is not implied. Exposure to absolute maximum
rating conditions for extended periods of time may
affect reliability and cause permanent damage to the
device.

VCC.......................................................-0.3V to +6.0V Power Dissipation per package

V+ (NOTE 1).......................................-0.3V to +7.0V 20-pin SSOP (derate 9.25mW/oC above +70oC)..............750mW
V- (NOTE 1)........................................+0.3V to -7.0V 18-pin SOIC (derate 15.7mW/oC above +70oC)..............1260mW
V+ + |V-| (NOTE 1)...........................................+13V 20-pin TSSOP (derate 11.1mW/oC above +70oC).............890mW
ICC (DC VCC or GND current).........................+100mA 16-pin SSOP (derate 9.69mW/oC above +70oC)...............775mW
16-pin PDIP (derate 14.3mW/oC above +70oC)...............1150mW
Input Voltages 16-pin Wide SOIC (derate 11.2mW/oC above +70oC)........900mW
TxIN, EN, SHDN.........................-0.3V to Vcc + 0.3V 16-pin TSSOP (derate 10.5mW/oC above +70oC)..............850mW
RxIN...................................................................+15V 16-pin nSOIC (derate 13.57mW/oC above +70oC)...........1086mW
Output Voltages
TxOUT.............................................................+13.2V
RxOUT, .......................................-0.3V to (VCC +0.3V)
Short-Circuit Duration
TxOUT....................................................Continuous
Storage Temperature......................-65°C to +150°C

NOTE 1: V+ and V- can have maximum magnitudes of 7V, but their absolute difference cannot exceed 13V.

ELECTRICAL CHARACTERISTICS
Unless otherwise noted, the following specifications apply for VCC = +3.0V to +5.5V with TAMB = TMIN to TMAX, C1 to
C4 = 0.1µF. Typical values apply at Vcc = +3.3V and TAMB = 25°C

PARAMETER MIN. TYP. MAX. UNITS CONDITIONS

DC CHARACTERISTICS
Supply Current 0.3 1.0 mA no load, VCC = 3.3V,
TAMB = 25oC, TxIN = GND or VCC
Shutdown Supply Current 1.0 10 µA SHDN = GND, VCC = 3.3V,
TAMB = 25oC, TxIN = Vcc or GND
LOGIC INPUTS AND RECEIVER OUTPUTS
Input Logic Threshold LOW GND 0.8 V TxIN, EN, SHDN, Note 2

Input Logic Threshold HIGH 2.0 V Vcc = 3.3V, Note 2

Input Logic Threshold HIGH 2.4 Vcc V Vcc = 5.0V, Note 2
Input Leakage Current +0.01 +1.0 µA TxIN, EN, SHDN,
TAMB = +25oC, VIN = 0V to VCC
Output Leakage Current +0.05 +10 µA Receivers disabled, VOUT = 0V to VCC
Output Voltage LOW 0.4 V IOUT = 1.6mA
Output Voltage HIGH VCC -0.6 VCC -0.1 V IOUT = -1.0mA
DRIVER OUTPUTS
Output Voltage Swing +5.0 +5.4 V All driver outputs loaded with 3kΩ to
GND, TAMB = +25oC

205-32xxEUDSR00 Rev. 1.0.4

2
 ELECTRICAL CHARACTERISTICS
Unless otherwise noted, the following specifications apply for VCC = +3.0V to +5.5V with TAMB = TMIN to TMAX, C1 to
C4 = 0.1µF. Typical values apply at Vcc = +3.3V and TAMB = 25°C
PARAMETER MIN. TYP. MAX. UNITS CONDITIONS

DRIVER OUTPUTS (continued)

Output Resistance 300 Ω VCC = V+ = V- = 0V, TOUT=+2V
Output Short-Circuit Current +35 +60 mA VOUT = 0V
Output Leakage Current +25 µA VCC = 0V or 3.0V to 5.5V,
VOUT = +12V, Drivers disabled
RECEIVER INPUTS
Input Voltage Range -15 +15 V
Input Threshold LOW 0.6 1.2 V Vcc = 3.3V
Input Threshold LOW 0.8 1.5 V Vcc = 5.0V
Input Threshold HIGH 1.5 2.4 V Vcc = 3.3V
Input Threshold HIGH 1.8 2.4 V Vcc = 5.0V
Input Hysteresis 0.3 V
Input Resistance 3 5 7 kΩ
TIMING CHARACTERISTICS
Maximum Data Rate 1000 kbps RL = 3kΩ, CL = 250pF, one driver
switching
Receiver Propagation Delay, tPHL 0.15 µs Receiver input to Receiver
output, CL = 150pF
Receiver Propagation Delay, tPLH 0.15 µs Receiver input to Receiver
output, CL = 150pF
Receiver Output Enable Time 200 ns
Receiver Output Disable Time 200 ns
Driver Skew 100 ns | tPHL - tPLH |, TAMB = 25°C

Receiver Skew 50 ns | tPHL - tPLH |

Transition-Region Slew Rate 90 V/µs Vcc = 3.3V, RL = 3kΩ,

CL =150pF, TAMB = 25°C,
measurements taken from -3.0V
to +3.0V or +3.0V to -3.0V

NOTE 2: Driver input hysteresis is typically 250mV.

205-32xxEUDSR00 Rev. 1.0.4

3
 TYPICAL PERFORMANCE CHARACTERISTICS
Unless otherwise noted, the following performance characteristics apply for VCC = +3.3V, 1000kbps data rate, all
drivers loaded with 3kΩ, 0.1µF charge pump capacitors, and TAMB = +25°C.

6 120
4 T1 at 1Mbps
Output Voltage (V)

100
T1 at 1Mbps T2 at 62.5Kbps

Slew Rate (V/µs)

All TX loaded 3K // CLoad
2
Transmitter

T2 at 62.5Kbps 80

0 60

-2 40

-4 20

-6 0
0 250 500 1000 1500 2000
0 250 500 1000 1500
Load Capacitance (pF) Load Capacitance (pF)

Figure 1. Transmitter Output Voltage vs Load Figure 2. Slew Rate vs Load Capacitance for the
Capacitance for the SP3222EU and SP3232EU SP3222EU and SP3232EU

20
35
Supply Current (mA)
30
Supply Current (mA)

15
20
T1 at 1Mbps
15 10 T2 at 62.5Kbps

10 T1 at 1Mbps
T2 at 62.5Kbps
5
5

0 0
0 250 500 1000 1500 2.7 3 3.5 4 4.5 5
Load Capacitance (pF)
Supply Voltage (V)

Figure 3. Supply Current VS. Load Capacitance Figure 4. Supply Current VS. Supply Voltage for the
when Transmitting Data for the SP3222EU and SP3222EU and SP3232EU
SP3232EU

6 200

4
Transmitter Output

150
2
Skew (nS)
Voltage (V)

T1 at 1Mbps
0 T2 at 62.5Kbps
100

-2 T1 at 500Kbps
50 T2 at 31.2Kbps
-4 All TX loaded 3K // CLoad

-6 0
2.7 3 3.5 4 4.5 5 0 250 500 1000 1500 2000
Supply Voltage (V) Load Capacitance (pF)

Figure 5. Transmitter Output Voltage vs Supply Figure 6. Transmitter Skew VS. Load Capacitance
Voltage for the SP3222EU and SP3232EU for the SP3222EU and SP3232EU

205-32xxEUDSR00 Rev. 1.0.4

4
 PIN FUNCTION

PIN NUMBER
SP3222EU SP3232EU
NAME FUNCTION
SOIC SSOP
TSSOP
Receiver Enable. Apply Logic LOW for normal operation.
EN 1 1 -
Apply logic HIGH to disable the receiver outputs (high-Z state)
C1+ Positive terminal of the voltage doubler charge-pump capacitor 2 2 1
V+ +5.5V output generated by the charge pump 3 3 2
C1- Negative terminal of the voltage doubler charge-pump capacitor 4 4 3
C2+ Positive terminal of the inverting charge-pump capacitor 5 5 4
C2- Negative terminal of the inverting charge-pump capacitor 6 6 5
V- -5.5V output generated by the charge pump 7 7 6
T1OUT RS-232 driver output. 15 17 14
T2OUT RS-232 driver output. 8 8 7
R1IN RS-232 receiver input 14 16 13
R2IN RS-232 receiver input 9 9 8
R1OUT TTL/CMOS receiver output 13 15 12
R2OUT TTL/CMOS receiver output 10 10 9
T1IN TTL/CMOS driver input 12 13 11
T2IN TTL/CMOS driver input 11 12 10
GND Ground 16 18 15
VCC +3.0V to +5.5V supply voltage 17 19 16
Shutdown Control Input. Drive HIGH for normal device operation.
SHDN Drive LOW to shutdown the drivers (high-Z output) and the on- 18 20 -
board power supply
N.C. No Connect - 11, 14 -
Table 1. Device Pin Description

205-32xxEUDSR00 Rev. 1.0.4

5
 PINOUT

EN 1 20 SHDN EN 1 18 SHDN
C1+ 2 19 VCC
C1+ 2 17 VCC
V+ 3 18 GND
V+ 3 16 GND
C1- 4 17 T1OUT
C1- 4 15 T1OUT
C2+ 5 SP3222EU 16 R1IN
C2+ 5 SP3222EU 14 R1IN
C2- 6 15 R1OUT
C2- 6 13 R1OUT
V- 7 14 N.C.

13 T1IN
V- 7 12 T1IN
T2OUT 8
R2IN 9 12 T2IN T2OUT 8 11 T2IN
R2OUT 10 11 N.C. R2IN 9 10 R2OUT

SSOP/TSSOP nSOIC
Figure 7. Pinout Configurations for the SP3222EU

C1+ 1 16 VCC
V+ 2 15 GND
C1- 3 14 T1OUT
C2+ 4 SP3232EU 13 R1IN

C2- 5 12 R1OUT
V- 6 11 T1IN

T2OUT 7 10 T2IN
R2IN 8 9 R2OUT

Figure 8. Pinout Configuration for the SP3232EU

205-32xxEUDSR00 Rev. 1.0.4

6
 TYPICAL OPERATING CIRCUITS
VCC VCC

+ 19 +
C5 0.1µF 17
C5 0.1µF
VCC VCC
2 C1+ 3 2 C1+ 3
+ V+ + + V+ +
C1 0.1µ F *C3 0.1µF C1 0.1µF *C3 0.1µF
4 C1- 4 C1-
5 C2+ SP3222EU V- 7 5 C2+ SP3222EU V- 7
+ +
C2 0.1µF SSOP C4 0.1µF C2 0.1µF WSOIC C4 0.1µF
6 C2- TSSOP + 6 C2- +

13 T1IN T1OUT 17 12 T1IN T1OUT 15

LOGIC RS-232 LOGIC RS-232
INPUTS 12 T2IN T2OUT 8 OUTPUTS INPUTS 11 T2IN T2OUT 8 OUTPUTS

15 R1OUT R1IN 16 13 R1OUT R1IN 14

LOGIC 5kΩ RS-232 5kΩ
LOGIC RS-232
OUTPUTS INPUTS OUTPUTS INPUTS
10 R2OUT R2IN 9 10 R2OUT R2IN 9
5kΩ 5kΩ
1 EN 20 1 EN 18
SHDN SHDN
GND GND
*can be returned to *can be returned to
18 either VCC or GND 16 either VCC or GND

Figure 9. SP3222EU Typical Operating Circuits WSOIC version is obsolete

VCC

+ 16
C5 0.1µF
VCC
1 C1+ 2
+ V+ +
C1 0.1µF *C3 0.1µF
3 C1-
4 C2+ SP3232EU V-
6
+
C2 0.1µF C4 0.1µF
5 C2- +

11 T1IN T1OUT 14
LOGIC RS-232
INPUTS 10 T2IN T2OUT 7 OUTPUTS

12 R1OUT R1IN 13

LOGIC 5kΩ RS-232

OUTPUTS INPUTS
9 R2OUT R2IN 8
5kΩ

GND
*can be returned to
15 either VCC or GND

Figure 10. SP3232EU Typical Operating Circuit

205-32xxEUDSR00 Rev. 1.0.4

7
 DESCRIPTION
The SP3222EU/SP3232EU transceivers The drivers have a minimum data rate of
meet the EIA/TIA-232 and ITU-T V.28/V.24 1000kbps fully loaded with 3kΩ in parallel
communication protocols and can be imple- with 250pF, ensuring compatability with PC-
mented in battery-powered, portable, or to-PC communication software.
hand-held applications such as notebook
or palmtop computers. The SP3222EU/ Figure 11 shows a loopback test circuit
SP3232EU devices feature Exar's propri- used to test the RS-232 Drivers. Figure
etary on-board charge pump circuitry that 12 shows the test results of the loopback
generates ±5.5V for RS-232 voltage levels circuit with all drivers active at 250kbps
from a single +3.0V to +5.5V power supply. with RS-232 loads in parallel with a
This series is ideal for +3.3V-only systems, 1000pF capacitor. Figure 13 shows the
mixed +3.3V to +5.5V systems, or +5.0V- test results where one driver was active
only systems that require true RS-232 at 1000kbps and all drivers loaded with an
performance. The SP3222EU/SP3232EU RS-232 receiver in parallel with 250pF
devices can operate at a minimum data rate capacitors.
of 1000kbps.
The SP3222EU driver's output stages are
The SP3222EU and SP3232EU are 2- turned off (tri-state) when the device is in
driver/2- receiver devices ideal for portable shutdown mode. When the power is off, the
or hand-held applications. The SP3222EU SP3222EU device permits the outputs to be
features a 1µA shutdown mode that reduces driven up to +/-12V. The driver's inputs do
power consumption and extends battery life not have pull-up resistors. Designers should
in portable systems. Its receivers remain connect unused inputs to Vcc or GND.
active in shutdown mode, allowing external
devices such as modems to be monitored In the shutdown mode, the supply current
using only 1µA supply current. falls to less than 1µA, where SHDN = LOW.
When the SP3222EU device is shut down,
the device's driver outputs are disabled (tri-
THEORY OF OPERATION
stated) and the charge pumps are turned off
The SP3222EU/SP3232EU series is made with V+ pulled down to Vcc and V- pulled to
up of three basic circuit blocks: GND. The time required to exit shutdown is
1. Drivers typically 100µs. Connect SHDN to Vcc if the
2. Receivers shutdown mode is not used.
3. The Exar proprietary charge pump
Receivers
Drivers The Receivers convert EIA/TIA-232 levels
The drivers are inverting level transmitters to TTL or CMOS logic output levels. The
that convert TTL or CMOS logic levels to SP3222EU receivers have an inverting
+5.0V EIA/TIA-232 levels with an inverted tri-state output. These receiver outputs
sense relative to the input logic levels. (RxOUT) are tri-stated when the enable
Typically, the RS-232 output voltage swing control EN = HIGH. In the shutdown mode,
is +5.4V with no load and +5V minimum fully the receivers can be active or inactive. EN
loaded. The driver outputs are protected has no effect on TxOUT. The truth table logic
against infinite short-circuits to ground with- of the SP3222EU driver and receiver outputs
out degradation in reliability. Driver outputs can be found in Table 2.
will meet EIA/TIA-562 levels of +/-3.7V with
supply voltages as low as 2.7V.
205-32xxEUDSR00 Rev. 1.0.4

8
 DESCRIPTION
VCC Since receiver input is usually from a trans-
mission line where long cable lengths and
C5
+
0.1µF system interference can degrade the signal,
VCC
C1+
the inputs have a typical hysteresis margin
+ V+ +
C1 0.1µF C3 0.1µF of 300mV. This ensures that the receiver
C1- is virtually immune to noisy transmission
C2+ SP3222EU V- lines. Should an input be left unconnected,
+ SP3232EU C4 0.1µF
C2 0.1µF
C2-
+ an internal 5kΩ pulldown resistor to ground
will commit the output of the receiver to a
LOGIC TxIN TxOUT
INPUTS HIGH state.

LOGIC RxOUT RxIN

OUTPUTS SHDN EN TxOUT RxOUT
5kΩ
EN*
*SHDN VCC 0 0 Tri-state Active
GND 0 1 Tri-state Tri-state
250pF or 1000pF 1 0 Active Active
* SP3222EU only 1 1 Active Tri-state
Figure 11. SP3222EU/SP3232EU Driver Loopback Table 2. SP3222EU Truth Table Logic for Shutdown
Test Circuit and Enable Control

Charge Pump
The charge pump is an Exar-patended
design (U.S. 5,306,954) and uses a unique
approach compared to older less-efficient
designs. The charge pump still requires four
external capacitors, but uses a four-phase
voltage shifting technique to attain sym-
metrical 5.5V power supplies. The internal
power supply consists of a regulated dual
charge pump that provides output voltages
of +/-5.5V regardless of the input voltage
(Vcc) over the +3.0V to +5.5V range.

Figure 12. Loopback Test results at 250kbps In most circumstances, decoupling the
power supply can be achieved adequately
using a 0.1µF bypass capacitor at C5 (refer
to figures 9 and 10). In applications that are
sensitive to power-supply noise, decouple
Vcc to ground with a capacitor of the same
value as charge-pump capacitor C1. Physi-
cally connect bypass capcitors as close to
the IC as possible.

Figure 13. Loopback Test results at 1000kbps

205-32xxEUDSR00 Rev. 1.0.4

9
 DESCRIPTION

The charge pump operates in a discontinu- to VCC and the negative side is con-
ous mode using an internal oscillator. If the nected to GND, allowing the charge
output voltages are less than a magnitude pump cycle to begin again. The charge
of 5.5V, the charge pump is enabled. If the pump cycle will continue as long as the
output voltages exceed a magnitude of 5.5V, operational conditions for the internal
the charge pump is disabled. This oscillator oscillator are present.
controls the four phases of the voltage shift-
ing. A description of each phase follows. Since both V+ and V– are separately gener-
ated from VCC, in a no–load condition V+
Phase 1 and V– will be symmetrical. Older charge
— VSS charge storage — During this phase pump approaches that generate V– from
of the clock cycle, the positive side of capaci- V+ will show a decrease in the magnitude
tors C1 and C2 are initially charged to VCC. of V– compared to V+ due to the inherent
Cl+ is then switched to GND and the charge inefficiencies in the design.
in C1– is transferred to C2–. Since C2+ is con-
nected to VCC, the voltage potential across The clock rate for the charge pump typically
capacitor C2 is now 2 times VCC. operates at greater than 250kHz. The exter-
nal capacitors can be as low as 0.1µF with
Phase 2 a 16V breakdown voltage rating.
— VSS transfer — Phase two of the clock
connects the negative terminal of C2 to the VSS
storage capacitor and the positive terminal of
C2 to GND. This transfers a negative gener-
ated voltage to C3. This generated voltage is
regulated to a minimum voltage of -5.5V.
Simultaneous with the transfer of the volt-
age to C3, the positive side of capacitor C1
is switched to VCC and the negative side is
connected to GND.

Phase 3
— VDD charge storage — The third phase of
the clock is identical to the first phase — the
charge transferred in C1 produces –VCC in
the negative terminal of C1, which is applied
to the negative side of capacitor C2. Since
C2+ is at VCC, the voltage potential across C2
is 2 times VCC.

Phase 4
— VDD transfer — The fourth phase of
the clock connects the negative terminal
of C2 to GND, and transfers this positive
generated voltage across C2 to C4, the
VDD storage capacitor. This voltage is
regulated to +5.5V. At this voltage, the in-
ternal oscillator is disabled. Simultaneous
with the transfer of the voltage to C4, the
positive side of capacitor C1 is switched

205-32xxEUDSR00 Rev. 1.0.4

10
 DESCRIPTION

VCC = +5V

+5V C4
+ – VDD Storage Capacitor
+ +
C1 C2
– – – +
VSS Storage Capacitor
–5V –5V C3

Figure 14. Charge Pump — Phase 1

VCC = +5V

C4
+ – VDD Storage Capacitor
+ +
C1 C2
– – – +
VSS Storage Capacitor
C3
-5.5V

Figure 15. Charge Pump — Phase 2

[ T ]

+6V

a) C2+

GND 1 T

GND 2

b) C2-

T
-6V
Ch1 2.00V Ch2 2.00V M 1.00µs Ch1 5.48V

Figure 16. Charge Pump Waveforms

VCC = +5V

+5V C4
+ – VDD Storage Capacitor
+ +
C1 C2
– – – +
VSS Storage Capacitor
–5V –5V C3

Figure 17. Charge Pump — Phase 3

VCC = +5V

+5.5V C4
+ – VDD Storage Capacitor
+ +
C1 C2
– – – +
VSS Storage Capacitor
C3

Figure 18. Charge Pump — Phase 4

205-32xxEUDSR00 Rev. 1.0.4

11
 DESCRIPTION
ESD TOLERANCE 61000-4-2 is that the system is required to
The SP3222E/SP3232E series incorpo- withstand an amount of static electricity when
rates ruggedized ESD cells on all driver ESD is applied to points and surfaces of the
equipment that are accessible to personnel
output and receiver input pins. The ESD
during normal usage. The transceiver IC
structure is improved over our previous
receives most of the ESD current when the
family for more rugged applications and
ESD source is applied to the connector pins.
environments sensitive to electro-static
The test circuit for IEC 61000-4-2 is shown
discharges and associated transients. The
on Figure 20. There are two methods within
improved ESD tolerance is at least +15kV
IEC 61000-4-2, the Air Discharge method
without damage nor latch-up.
and the Contact Discharge method.

There are different methods of ESD testing With the Air Discharge Method, an ESD
applied: voltage is applied to the equipment under
a) MIL-STD-883, Method 3015.7 test (EUT) through air. This simulates an
b) IEC 61000-4-2 Air-Discharge
c) IEC 61000-4-2 Direct Contact electrically charged person ready to connect
a cable onto the rear of the system only to
The Human Body Model has been the find an unpleasant zap just before the person
generally accepted ESD testing method touches the back panel. The high energy
for semi-conductors. This method is also potential on the person discharges through
specified in MIL-STD-883, Method 3015.7 an arcing path to the rear panel of the system
for ESD testing. The premise of this ESD test before he or she even touches the system.
is to simulate the human body’s potential to This energy, whether discharged directly or
store electro-static energy and discharge it through air, is predominantly a function of the
to an integrated circuit. The simulation is discharge current rather than the discharge
performed by using a test model as shown voltage. Variables with an air discharge such
in Figure 19. This method will test the IC’s as approach speed of the object carrying the
capability to withstand an ESD transient ESD potential to the system and humidity
during normal handling such as in manu- will tend to change the discharge current.
facturing areas where the ICs tend to be For example, the rise time of the discharge
handled frequently. current varies with the approach speed.

The IEC-61000-4-2, formerly IEC801-2, is The Contact Discharge Method applies the
generally used for testing ESD on equipment ESD current directly to the EUT. This method
and systems. For system manufacturers, was devised to reduce the unpredictability
they must guarantee a certain amount of of the ESD arc. The discharge current rise
ESD protection since the system itself is time is constant since the energy is directly
exposed to the outside environment and transferred without the air-gap arc. In situ-
human presence. The premise with IEC ations such as hand held systems, the ESD
charge can be directly discharged to the
RC RS

SW1 SW2

Device
DC Power CS Under
Source Test

Figure 19. ESD Test Circuit for Human Body Model

205-32xxEUDSR00 Rev. 1.0.4

12
 DESCRIPTION

Contact-Discharge Model

RC RS RV

SW1 SW2

Device
DC Power CS Under
Source Test

R S and RV add up to 330Ω for IEC61000-4-2.

Figure 20. ESD Test Circuit for IEC61000-4-2

equipment from a person already holding The higher CS value and lower RS value in
the equipment. The current is transferred the IEC61000-4-2 model are more stringent
on to the keypad or the serial port of the than the Human Body Model. The larger
equipment directly and then travels through storage capacitor injects a higher voltage
the PCB and finally to the IC. to the test point when SW2 is switched on.
The lower current limiting resistor increases
The circuit models in Figures 19 and 20 rep- the current charge onto the test point.
resent the typical ESD testing circuit used for
all three methods. The CS is initially charged
with the DC power supply when the first
switch (SW1) is on. Now that the capacitor
I→

is charged, the second switch (SW2) is on

while SW1 switches off. The voltage stored 30A
in the capacitor is then applied through RS,
the current limiting resistor, onto the device
under test (DUT). In ESD tests, the SW2
switch is pulsed so that the device under 15A
test receives a duration of voltage.

For the Human Body Model, the current

0A
limiting resistor (RS) and the source capacitor
(CS) are 1.5kΩ an 100pF, respectively. For t = 0ns t = 30ns
IEC-61000-4-2, the current limiting resistor t→
(RS) and the source capacitor (CS) are 330Ω
an 150pF, respectively. Figure 21. ESD Test Waveform for IEC61000-4-2

DEVICE PIN HUMAN BODY IEC61000-4-2

TESTED MODEL Air Discharge Direct Contact Level

Driver Outputs +15kV +15kV +8kV 4

Receiver Inputs +15kV +15kV +8kV 4

Table 3. Transceiver ESD Tolerance Levels

205-32xxEUDSR00 Rev. 1.0.4

13
 PACKAGE: 16 PIN SSOP

205-32xxEUDSR00 Rev. 1.0.4

14
 PACKAGE: 18 PIN WSOIC

WSOIC18 version is obsolete

205-32xxEUDSR00 Rev. 1.0.4

15
 PACKAGE: 16 PIN nSOIC

205-32xxEUDSR00 Rev. 1.0.4

16
 PACKAGE: 16 PIN TSSOP

205-32xxEUDSR00 Rev. 1.0.4

17
 PACKAGE: 20 PIN TSSOP

205-32xxEUDSR00 Rev. 1.0.4

18
 ORDERING INFORMATION)
Part Number Temp. Range Package Packaging Lead-
Method Free
SP3222EUCY-L/TR 0°C to +70°C 20 Pin TSSOP Tape and Reel Yes
SP3222EUEY-L/TR -40°C to +85°C 20 Pin TSSOP Tape and Reel Yes
NOTES:
• For most up-to-date ordering information and additional information on environmental rating,
go to www.maxlinear.com/SP3222EU
• 18-pin WSOIC versions are obsolete.

Part Number Temp. Range Package Packaging Lead-

Method Free(2)
SP3232EUCN-L 0°C to +70°C 16 Pin NSOIC Tube Yes
SP3232EUCN-L/TR 0°C to +70°C 16 Pin NSOIC Tape and Reel Yes
SP3232EUCY-L/TR 0°C to +70°C 16 Pin TSSOP Tape and Reel Yes
SP3232EUEA-L/TR -40°C to +85°C 16 Pin SSOP Tape and Reel Yes
SP3232EUEY-L/TR -40°C to +85°C 16 Pin TSSOP Tape and Reel Yes
NOTES: For most up-to-date ordering information and additional information on environmental rating,
go to www.maxlinear.com/SP3232EU.

205-32xxEUDSR00 Rev. 1.0.4

19
 REVISION HISTORY
DATE REVISION DESCRIPTION
02/31/06 -- Legacy Sipex Datasheet

12/08/10 1.0.0 Convert to Exar Format and update ordering information.

06/17/11 1.0.1 Remove EOL devices per PDN 110510-05
03/14/13 1.0.2 Correct type error to RX input voltage range and driver transition region slew
rate test condition.
03/19/20 1.0.3 Update to MaxLinear logo. Update ordering information.
Sept 30, 2021 1.0.4 Updated:
• In the "Electrical Characteristics " table, CL =1000pF replaced with
CL =150pF, for the "Transition-Region Slew Rate" parameter.

Corporate Headquarters:
5966 La Place Court, Suite 100
Carlsbad, CA 92008
Tel.: +1 (760) 692-0711
Fax: +1 (760) 444-8598
www.maxlinear.com

The content of this document is furnished for informational use only, is subject to change without notice, and should not be construed as a commit-
ment by MaxLinear, Inc. MaxLinear, Inc. assumes no responsibility or liability for any errors or inaccuracies that may appear in the informational con-
tent contained in this guide. Complying with all applicable copyright laws is the responsibility of the user. Without limiting the rights under copyright, no
part of this document may be reproduced into, stored in, or introduced into a retrieval system, or transmitted in any form or by any means (electronic,
mechanical, photocopying, recording, or otherwise), or for any purpose, without the express written permission of MaxLinear, Inc.

Maxlinear, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can rea-
sonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use
in such applications unless MaxLinear, Inc. receives, in writing, assurances to its satisfaction that: (a) the risk of injury or damage has been minimized;
(b) the user assumes all such risks; (c) potential liability of MaxLinear, Inc. is adequately protected under the circumstances.

MaxLinear, Inc. may have patents, patent applications, trademarks, copyrights, or other intellectual property rights covering subject matter in this
document. Except as expressly provided in any written license agreement from MaxLinear, Inc., the furnishing of this document does not give you any
license to these patents, trademarks, copyrights, or other intellectual property.

MaxLinear, the MaxLinear logo, any MaxLinear trademarks (MxL, Full-Spectrum Capture, FSC, G.now, AirPHY, Puma, and AnyWAN), and the
MaxLinear logo on the products sold are all property of MaxLinear, Inc. or one of MaxLinear’s subsidiaries in the U.S.A. and other countries. All rights
reserved. Other company trademarks and product names appearing herein are the property of their respective owners.

© 2021 MaxLinear, Inc. All rights reserved.

205-32xxEUDSR00 Rev. 1.0.4

20