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Electricity 05 00031

This paper discusses the design and validation of a predictive controller for a DC-DC boost converter using real-time simulation with FPGA technology. The study compares the performance of a model-based predictive controller (MBPC) and a digital PI controller, demonstrating that the MBPC offers improved stabilization time and reduced overvoltage. The methodology and results validate the effectiveness of the proposed control strategy in enhancing voltage regulation for renewable energy applications.
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0% found this document useful (0 votes)
27 views20 pages

Electricity 05 00031

This paper discusses the design and validation of a predictive controller for a DC-DC boost converter using real-time simulation with FPGA technology. The study compares the performance of a model-based predictive controller (MBPC) and a digital PI controller, demonstrating that the MBPC offers improved stabilization time and reduced overvoltage. The methodology and results validate the effectiveness of the proposed control strategy in enhancing voltage regulation for renewable energy applications.
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
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Article

Harnessing Field-Programmable Gate Array-Based Simulation


for Enhanced Predictive Control for Voltage Regulation
in a DC-DC Boost Converter
Sara J. Ríos * , Elio Sánchez G., Andrés Intriago and Síxifo Falcones

Faculty of Electrical and Computer Engineering, ESPOL Polytechnic University, Campus Gustavo Galindo,
Guayaquil 09-01-5863, Ecuador; eliansan@espol.edu.ec (E.S.G.); aeintria@espol.edu.ec (A.I.);
sixifo@espol.edu.ec (S.F.)
* Correspondence: srios@espol.edu.ec

Abstract: This paper presents the design of a predictive controller for a boost converter and validation
through real-time simulation. First, the boost converter was mathematically modeled, and then the
electronic components were designed to meet the operation requirements. Subsequently, a model-
based predictive controller (MBPC) and a digital PI (Proportional–Integral) controller were designed,
and their performance was compared using MATLAB/SIMULINK® . The controls were further
verified by implementing test benches based on an FPGA (Field-Programmable Gate Array) with an
OPAL-RT real-time simulator, which included the RT-LAB and RT-eFPGAsim simulation packages.
These tests were successfully carried out, and the methodology used for this design was validated.
The results showed a better response obtained with MBPC, both in terms of stabilization time and
lower overvoltage.

Keywords: DC-DC boost converter; digital control; predictive control; real-time simulation

Citation: Ríos, S.J.; Sánchez G., E.; 1. Introduction


Intriago, A.; Falcones, S. Harnessing
The sustained increase in global temperature is a significant concern globally. NASA
Field-Programmable Gate Array-
Based Simulation for Enhanced
(the National Aeronautics and Space Administration) reports that from 1880 to 2020, the
Predictive Control for Voltage
global temperature increased by 1.02 ◦ C [1]. Humans cause global warming by creating the
Regulation in a DC-DC Boost
greenhouse effect by burning fossil fuels, highlighting the importance of renewable energy
Converter. Electricity 2024, 5, 622–641. in mitigating excessive temperatures and severe climatic variations [2,3].
https://doi.org/10.3390/ According to IRENA (the International Renewable Energy Agency), from 2000 to 2015,
electricity5030031 photovoltaic (PV) energy experienced a growth of up to 18,461% in installed capacity [4].
With a growth rate of around 40%, PV panels and other derivatives have become cheaper,
Academic Editor: Andreas Sumper
making them accessible for residential, commercial, and industrial applications. The electri-
Received: 1 July 2024 cal network uses the surplus of PV energy to distribute it to various places of consumption.
Revised: 14 August 2024 In addition, PV panels have a life cycle of 25 to 30 years, making them profitable and
Accepted: 3 September 2024 efficient overall [5]. Irradiance, temperature, and the appropriate choice of semiconductors
Published: 6 September 2024 are some variables that can affect power quality in PV systems.
The power generated by the PV panels is injected into a DC bus using a DC-DC power
converter for its consumption by DC loads or stored using a battery bank. Among the
available DC-DC converters, the boost converter is one of the most common topologies
Copyright: © 2024 by the authors.
for this task. A comparative study is required to select the best control method for a
Licensee MDPI, Basel, Switzerland.
boost converter.
This article is an open access article
Regarding related works, various classical and advanced control methods have been
distributed under the terms and
employed for a boost converter. In [6], a PD (Proportional–Derivative) controller was
conditions of the Creative Commons
designed based on fuzzy logic and tested in two different DC-DC converters. In [7],
Attribution (CC BY) license (https://
creativecommons.org/licenses/by/
a feedback controller was developed, and its parameters were obtained with optimiza-
4.0/).
tion techniques such as the Genetic Algorithm (GA) and Bacterial Foraging Optimization

Electricity 2024, 5, 622–641. https://doi.org/10.3390/electricity5030031 https://www.mdpi.com/journal/electricity


Electricity 2024, 5 623

Algorithm (BFOA). Similarly, in [8], another optimization technique, Particle Swarm Opti-
mization (PSO), was used. Additionally, in [9], a non-linear control technique, Sliding Mode
Control (SMC), was employed. In [10], an SMC combined with a fuzzy logic controller
was developed. Finally, in [11], two types of robust controllers were designed. The first
was a PID (Proportional–Integral–Derivative) controller with hysteresis, while the second
was combined with SMC. Table 1 summarizes the types of controllers mentioned and
their respective parameters of interest, including efficiency, which is an important factor in
DC-DC converters [12]. Thus, the PD-like Fuzzy Logic controller with an 8 V input voltage
is the fastest.

Table 1. Some control strategies applied to boost converters.

Input Output Load Stabilization


Controller Type Efficiency
Voltage (V) Voltage (V) (Ω) Time (ms)
PD-Fuzzy logic [6] 8 25 93.6% 100 15
PD-Fuzzy logic [6] 20 25 96.44% 100 50
GA [7] 12 24 95.71% 120 27.6
BFOA [7] 12 24 95.71% 120 20.4
PSO [8] 16.97 30 96.52% 110 43
SMC [9] 48 60 95.18% 25 30
Fuzzy logic + SMC [10] 110 220 99.35% 490 35
PID + Hysteresis [11] 24 48 96.99% 100 450
PID + SMC [11] 24 48 96.99% 100 450

A comprehensive review of the state of the art of MBPC was carried out in [13], and
the use of some MBPC variants in PV-based DC microgrids was analyzed using, among
other things, a boost converter. It was found that that the oscillations around the MPPT
(Maximum Power Point Tracking) were significantly reduced depending on the predictive
control method.
With some predictive methods with a discrete observer, a better response under rapidly
changing weather conditions is obtained, and with others, MBPC generates optimal energy
management and power-sharing applied to hybrid networks [14].
Based on a review of the state of the art of DC microgrids, a boost converter and an
MBPC are proposed to study and reduce the stabilization features.
In addition, comparisons of our proposal with classic and mixed controllers will be
developed. The proposal will also be tested in a real-time simulator with an FPGA-based
library. Among its other characteristics, we intend to take advantage of its high operating
frequencies to regulate the DC output voltage.

2. Proposed Topology and System Modeling


2.1. PV Modules and Arrays
Typically, PV panels comprise numerous interconnected PV cells, which are mechani-
cally protected and suitable for sites with high solar radiation. Their principle of operation
is based on the photoelectric effect, which explains that electrons are released when photons
hit the PV panel.
Installing a single PV panel, such as for swimming pool heating, is sufficient in
applications requiring only small amounts of energy. However, implementing PV arrays
is necessary for more significant PV generation scenarios. In this case, PV panels are
connected in series to achieve a greater voltage, in parallel to achieve a higher current, and
in a mixed configuration to achieve higher power.
Figure 1 presents some connection topologies for a PV array, these being the Series–
Parallel (SP), Bridge-linked (BL), Honeycomb (HC), and Total-Cross-Tied (TCT) [15]. This
paper considers the SP array. Its size depends on the maximum operating conditions of
each connected PV panel and the manufacturer’s data.
Electricity
Electricity 2024,
2024, 5,
5, FOR
FOR PEER
PEER REVIEW
REVIEW 33

Electricity 2024, 5 paper


paper considers
considers the
the SP
SP array.
array. Its
Its size
size depends
depends on
on the
the maximum
maximum operating
operating conditions of
conditions624
of
each connected PV panel and the manufacturer’s data.
each connected PV panel and the manufacturer’s data.

(a)
(a) (b)
(b) (c)
(c) (d)
(d)
Figure
Figure 1.
1. Some
Some topologies
topologies for
for aa 55 ×× 44 PV
PV array:
array: (a)
(a) SP,
SP, (b)
(b) BL,
BL, (c)
(c) HC,
HC, and
and (d)
(d) TCT.
TCT.
Figure 1. Some topologies for a 5 × 4 PV array: (a) SP, (b) BL, (c) HC, and (d) TCT.
Conventionally,
Conventionally, these these are
are operated
these are operated at at the
the maximum
maximum power power point
point (MPP)
(MPP) to to extract
extract the
the
maximum Conventionally,
available PV power. operated
The MPP at the maximum
depends on power
several point
conditions,(MPP) to
such extract
as the the
PV
maximum available PV power. The MPP depends on several conditions, such as the PV
maximum available PV power. The MPP depends on several conditions, such as the PV
panels’
panels’ properties,
properties, climatic
climatic changes
changes likelike light
light intensity
intensity decreasing
decreasing due due to to the
the appearance
appearance
panels’ properties, climatic changes like light intensity decreasing due to the appearance
of
of clouds,
clouds, or or unforeseen
unforeseen weather
weather changes
changes [16].[16]. MPP
MPP tracking can be
be implemented
implemented in the
of clouds, or unforeseen weather changes [16]. MPP tracking
tracking can
can be implemented in the
in the
control
control circuit
circuit of
of the
the DC-DC
DC-DC converter
converter to
to match
match the
the impedance
impedance of
of the
the PV
PV array.
array. This
This way,
way,
control circuit of the DC-DC converter to match the impedance of the PV array. This way,
its
its operation
operation cancan
can be be stabilized
bestabilized
stabilizedat at the
atthe maximum
themaximum
maximumpower power
powerpoint point
point (MPP)
(MPP) or as close as possible
its operation (MPP) ororasas close
close as as possible
possible to
to
to it.
it. This
This power
power peak
peak can
can be
be seen
seen in
in Figure
Figure 2
2 in
in the
the current/power
current/power characteristic
characteristic curves
curves of
of
it. This power peak can be seen in Figure 2 in the current/power characteristic curves of PV
PV
PV panels
panels as aa function of
of the voltage at
at their terminals. These characteristic curves indi-
panels as aas function
function of the the voltage
voltage at theirtheir terminals.
terminals. These
These characteristic
characteristic curves
curves indi-
indicate
cate
cateMPPthe MPP
the MPP values
values for the
forPV PV
thearrays’arrays’
PV arrays’ sizing. Their parameters are the I MPP current and
the values for the sizing.sizing.
Their Their
parametersparameters
are theare thecurrent
IMPP IMPP current
and PMPPand
PPMPP power at
MPP power
aa V MPP voltage or remarkably close values [17]. Additionally, the ranges of
power at a VatMPP V MPP voltage
voltage or or remarkably
remarkably close close
values values
[17]. [17]. Additionally,
Additionally, the the
ranges ranges
of of
these
these
these curves
curves are
are limited
limited by the
the short-circuit current IISC and the
the open-circuit voltage VOC.
curves are limited by theby short-circuit
short-circuit current current
ISC and and
SCthe open-circuit
open-circuit voltage voltage
VOC . VOC.

MPP
MPP
ISC MPP PMPP
ISC MPP PMPP
IMPP
IMPP
power
PVpower
current
PVcurrent

PV
PV

00 PV
PV voltage
voltage
VMPP
VMPP
VOC
VOC 00 PV
PV voltage
voltage
VMPP
VMPP
VOC
VOC

Figure
Figure 2.
Figure 2. MPP
2. MPP location
MPP location in
location in I-V
in I-V and
I-V and P-V
and P-V curves
P-V curves at
curves at constant
at constant temperature.
constant temperature.
temperature.

2.2. Boost
2.2. Boost Converter DesignDesign and Modeling
Modeling
2.2. Boost Converter
Converter Design and and Modeling
Power electronics-based
Power energy conversion systems areare used to optimize and efficiently
Power electronics-based
electronics-based energy energy conversion
conversion systemssystems are used used to to optimize
optimize and and effi-
effi-
use energy
ciently use from
energy PVfrom systems.
PV Since
systems. their
Since output
their voltage
output is DC,
voltage isa DC-DC
DC, a converter
DC-DC such
converter
ciently use energy from PV systems. Since their output voltage is DC, a DC-DC converter
as theasboost
such converter can becan employed. When largerlarger DC voltages are needed with lower
such as the the boost
boost converter
converter can be be employed.
employed. When When larger DC DC voltages
voltages are are needed
needed with with
input
lower voltages and high efficiency, these converters are used in battery power applications,
lower input
input voltages
voltages and and high
high efficiency,
efficiency, these these converters
converters are are used
used in in battery
battery power
power ap- ap-
automotiveautomotive
plications, applications, industrial drives,
applications, industrialand drives,
adaptive control
and applications
adaptive control [18].
applications
plications, automotive applications, industrial drives, and adaptive
Figure 3a shows the power circuit of a boost converter, which is characterized by two control applications
[18].
[18].
operating
Figure states:
3a In the “On-state”, shown in Figure 3b, the Q semiconductor acts as a
switch,Figure
and 3a shows
when shows
it is
the
the power
power
closed, an
circuit
circuit of
increase ofinaathe
boost
boost converter,
levelconverter,
of the
which is
is characterized
which current
inductor characterized
L is
by
by two
experienced.two
operating
operating states:
states: In
In the
the “On-state”,
“On-state”, shown
shown in
in Figure
Figure 3b,
3b, the
the Q
Q semiconductor
semiconductor acts
acts as
as aa
In contrast,
switch, and the
whenswitch
it is opens
closed,during
an the “Off-state”
increase in the shown
level of in Figure
the inductor 3c. current
The onlyL possibility
is experi-
switch,
for and when
inductor current it is
toclosed,
flow is an increase
through diodein the levelthe
D and of parallel
the inductor current L of
configuration is experi-
output
enced. In contrast, the switch opens during the “Off-state” shown in Figure 3c. The only
capacitor C and load resistor R. This leads to the capacitor transferring energy, The
enced. In contrast, the switch opens during the “Off-state” shown in Figure 3c. which only
is
possibility
possibility for
for inductor
inductor current
current to
to flow
flow is
is through
through diode
diode D
D and
and the
the parallel
parallel configuration
configuration
acquired by it during the “On-state”. Additionally, the PV-generated power will oscillate
of
of output
output capacitor
capacitor C
C and
and load
load resistor
resistor R. This
This leads to
to the capacitor transferring energy,
due to a PV voltage ripple, resulting in a R.
reduced leads
average the capacitor
power output, transferring energy,
and this is because
of the installation of a CPV capacitor for smoothing voltage ripples [19].
Electricity 2024, 5, FOR PEER REVIEW 4

which is acquired by it during the “On-state”. Additionally, the PV-generated power will
Electricity 2024, 5 oscillate due to a PV voltage ripple, resulting in a reduced average power output, and this
625
is because of the installation of a CPV capacitor for smoothing voltage ripples [19].

(a)

10

(b)

(c)

Figure
Figure3.3.Boost
Boostconverter
converterpower
powercircuit:
circuit:(a)
(a)typical,
typical,(b)
(b)On-state,
On-state,and
and(c)
(c)Off-state.
Off-state.

Due
Duetotothe
theoperation
operationofofthe thesemiconductor
semiconductorQ, Q,thetheoutput
outputload
loadvoltage
voltageisischopped
chopped
according
accordingtotoan
anoperating
operatingduty
dutycycle
cycleDD00atataahigh
highswitching
switchingfrequency
frequencyfSW
fSWand
andisiscalculated
calculated
according
accordingtoto(1),
(1),where
whereVVG Gisisthe
thePV
PVvoltage,
voltage,andandVV0 is the
0 is output
the voltage.
output voltage.

V𝑉
D𝐷0 ==11−− 𝑉G (1)(1)
V0
Continuous conduction mode (CCM) operation is desired in DC-DC switching con-
Continuous conduction mode (CCM) operation is desired in DC-DC switching con-
verters. This means that the primary current, which is the inductor current in the con-
verters. This means that the primary current, which is the inductor current in the converter,
verter, is not canceled out. The minimum values of its passive components R, L, and C
is not canceled out. The minimum values of its passive components R, L, and C together
together must be determined, along with its associated series resistances, considering pri-
must be determined, along with its associated series resistances, considering primarily
marily the power Pn of the converter. In (2), the minimum inductance for the CCM current
the power Pn of the converter. In (2), the minimum inductance for the CCM current is
is determined according to [20]. On the other hand, the minimum output capacitance can
determined according to [20]. On the other hand, the minimum output capacitance can
be
bedetermined
determinedby by(3),
(3),according
accordingtoto[20],
[20],where
wherethe
theoutput
outputvoltage
voltageripple
ripplespecification
specificationisis
usually between 1% and
usually between 1% and 5%.5%.
𝐷 (1 − 𝐷 ) 𝑉
𝐿 =D0 (1 − D0 )2 V0 2 (2)
Lmin = 2𝑓 𝑃 (2)
2 f SW Pn
𝐷𝑃
𝐶 = D0 Pn
Cmin =  ∆𝑉 2 (3)(3)
∆V 𝑉 𝑓
𝑉0 V0 2 f
V0 SW
Using a Schottky diode as a natural switching device and an IGBT as a forced switching
device was considered to reduce power losses due to its higher current rating compared to
a MOSFET.
Using a Schottky diode as a natural switching device and an IGBT as a forced sw
ing device was considered to reduce power losses due to its higher current rating
Electricity 2024, 5 626
pared to a MOSFET.
The principle of DC-DC converter control is PWM (Pulse Width Modulation), w
is generated
The principle through
of DC-DC theconverter
comparisoncontrolofisa PWM
constant modulating
(Pulse signal and
Width Modulation), whicha is
sawtooth
rier signal
generated vst at atheswitching
through comparison frequency
of a constantof fmodulating
SW [21], or signal
at a switching period
and a sawtooth of TSW. Fig
carrier
signal v st at a switching frequency of f
shows these waveforms together with their comparative results. Depending4 on wh
SW [21], or at a switching period of TSW . Figure
shows these waveforms
the nominal duty cycle together
D0 iswith their comparative
increased results.the
or decreased, Depending on whether
resulting square the
signal pul
nominal duty cycle D0 is increased or decreased, the resulting square signal pulse vQ will
will either be broader or narrower at a constant frequency comparable to fSW. It is
either be broader or narrower at a constant frequency comparable to fSW . It is important
portant
to note that to the
note that the
control control
signal D0 willsignal
come D 0 will come from the implemented digital or
from the implemented digital or predictive
dictive controller, and in some cases, it
controller, and in some cases, it may come directly from may come andirectly from an MPPT controller.
MPPT controller.

vst
1

D0
d

0 TSW 2TSW 3TSW t


ON ON ON
Switch vQ
control
signal OFF
OFF OFF

t
Figure
Figure 4. 4.
PWMPWM pulse
pulse generation
generation comparing
comparing sawtooth
sawtooth carrier
carrier signal withsignal
controlwith control signal.
signal.

This technique has variations, such as the control signal being compared against
This technique has variations, such as the control signal being compared again
an unbiased triangle wave instead of a sawtooth wave. Another novel method is estab-
unbiased triangle wave instead of a sawtooth wave. Another novel method is establis
lishing boundary voltages for the control signal, thus achieving an improved dynamic
boundary
response [22].voltages for the control signal, thus achieving an improved dynamic resp
[22].Once the parameters of the boost converter have been determined, the mathematical
modelOnce of thethe
system may be derived,
parameters with the
of the boost averagedhave
converter model state
been theAmathema
space matrixes
determined, p,
Bmodel
, C , and D , the state vector x = [i v ]T , V as an input, and V as an output. V is
p p of the p system may be derived, L C with G the averaged model 0 state space Gmatrixes A
considered only as an input because we aim to find the system dynamics only in the power
Cp, and Dp, the state vector x = [iL vC] , VG as an input, and V0 as an output. VG is consid
T
stage. In this type of system, the input does not have a direct influence on the outputs, and
only
for thisas an input
reason, the Dbecause we aim to find the system dynamics only in the power stag
p matrix is considered null.
thisFigure
type of 3b system,
shows thethe input
power does
circuit notOn-state
in the have a[13],
direct influence
where on current/voltage
Kirchhoff’s the outputs, and fo
reason,
laws the Dp in
are applied matrix isinstance
the first considered null.
together with the laws of each energy storage compo-
nent, thus obtaining (4) and (5):
Figure 3b shows the power circuit in the On-state [13], where Kirchhoff’s
rent/voltage laws are applied indithe first instance together with the laws of each en
L L =
storage component, thus obtaining VG − r(5):
L iL (4)
dt (4) and
Rio = rc ic𝑑𝑖
+ vC (5)
𝐿 =𝑉 − 𝑟𝑖
Considering the output mesh: 𝑑𝑡

dvC 𝑅𝑖 = 𝑟 𝑖 + 𝑣
C = ic = −io (6)
dt
Considering the output mesh:
With these expressions, the system behavior is obtained:
𝑑𝑣!   
−r L 𝐶 = 𝑖 = −1𝑖
!
di L 0
dt = L
− 1
𝑑𝑡 i L + L VG (7)
dvC 0 vC 0
dt C ( R +r c )
With these expressions, the system behavior is obtained:
𝑑𝑖 −𝑟
0 1
𝑑𝑡 𝐿 𝑖
= −1 + 𝐿 𝑉
𝑑𝑣 𝑣
0 0
𝑑𝑡 𝐶(𝑅 + 𝑟 )
Electricity 2024, 5 627

By applying a voltage divider on the output mesh, the output voltage in the On-state
will be:
  i 
R L
v o = 0 R +r c (8)
vC
Similarly, the following expression in the first mesh for the boost converter in the
Off-state [13] will be:
di
L L = VG − r L i L − vo (9)
dt
The second mesh is analyzed as follows:

dvC
vo = vc + rC C (10)
dt
dvC vo
io = i L − C= (11)
dt R
In this case, first, the output expression will be determined by replacing (11) in (10):

vC + rC i L
vo = (12)
1 + rRC


Considering (12) in the previous expressions, the following system behavior in a


steady state is obtained:
−r L R −r L r c − r c R −R
! !
di L  1
dt L ( R +r c ) L ( R +r c ) iL L
dvC = R −1 + VG (13)
C ( R +r c ) C ( R +r c )
vC 0
dt

  i 
Rrc R L
vo = R +r c R +r c (14)
vC
Representation of the average model in steady space is performed for both switching
periods. For tON during a duty cycle d and tOFF during a complementary duty cycle 1 − d,
the following average Ap , Bp , and Cp matrixes are obtained:

A p = AON d + AOFF (1 − d)
B p = BON d + BOFF (1 − d) (15)
C p = CON d + COFF (1 − d)

With these matrixes, a system with two inputs, u = [d VG ]T , two states, x = [iL vC ]T ,
and one output, V 0 , for the voltage regulation of the converter, as a function of slight duty
cycle changes, is obtained.
 
− r L R+rLL(rRc ++rrccR) (1−d) − LR( R(1+−drc))
Ap = 
 
R (1− d )
C ( R+ rc )
− 1  C ( R+ rc )
h iT (16)
1
Bp = L 0
h i
Rrc (1−d) R
Cp = R +r c R +r c

3. Digital and Predictive Control


The state matrixes referring to the system that describes the boost converter’s dynamics
have non-linear components. For this reason, these matrixes must be linearized around an
operating point whose parameters can be determined by solving x0 ’ = [iL0 vC0 ]T from the
nominal data V 0 and D0 . With the linearized state matrixes Ap0 , Bp0 , and Cp0 , two transfer
functions, V 0 (s)/d(s) and V 0 (s)/VG (s) [23] can be determined, thus achieving direct voltage
control (DVC) from d and VG variations.
mentary duty cycle 1 − d. Around operating point p0, the averaged function described by
(17) is obtained:
𝑉 (𝑠) 𝑅(1 − 𝐷 )(𝑟 𝐶𝑠 + 1)
= (17)
𝐼 (𝑠) (𝑅 + 𝑟 )𝐶𝑠 + 1
Electricity 2024, 5 628
Within the theory of predictive control, some variations have been developed, among
which we have Dynamic Matrix Control (DMC), Generalized Predictive Control (GPC),
Non-Linear
However,Model Predictive
the transfer Control
function V 0(NMPC),
(s)/d(s) isExtended Prediction Self
in the non-minimum Adaptive
phase; Con-
therefore,
trol (EPSAC), and Model Predictive Control with Autoregressive Disturbance (MPC-AR),
even if a controller with good regulation performance is implemented, the voltage V 0 will
among
have others
a wide [13].voltage.
ripple There are differences
Figure 5a shows between
a DVCseveral
schemetypes
usingof controllers,
a digital which lie in
PI (Proportional–
Integral) controller. These control diagrams show components whose functions will are
how the model is approached, the kind of optimization applied, whether restrictions be
consideredbelow.
explained when optimizing, and even whether disturbances are included or not [24].

Electricity 2024, 5, FOR PEER REVIEW 8

(a) (b)

(c) (d)
Figure 5. Some control techniques applied to a boost converter: (a) DVC, (b) digital cascade control,
Figure 5. Some control techniques applied to a boost converter: (a) DVC, (b) digital cascade control,
(c) cascade control with combined loops, and (d) MBPC cascade control.
(c) cascade control with combined loops, and (d) MBPC cascade control.

3.1. Digital Controlfeedback control structure is reliable for controlling DC-DC and DC-AC
The cascade
power Digital signaland
converters processors are widely
electric drives. The innerusedcontrol
in power loopconversion
regulates thesystems sincecurrent.
converter semi-
conductor
In contrast,pulse
in thesignals
external are control
transmitted
loop,atthe high speeds,
primary either variable
desired to IGBTsisorcontrolled—for
MOSFETs. As
previously mentioned,
example, voltage in addition
or active power intomicrogrids,
these external suchcomponents, DC-DC converters
as the boost converter have
output voltage.
a PWM Thestage
key whose
to the pulse
successgeneration
of cascade cancontrol
be implemented
lies in thewith digital electronic
difference between schemes
the time
such as a free-running
constants of both loopscounter,
so that thean current
up/down counter,
response andwill
time a hardware
be much accumulator [25]. In
faster. Some cascade
control topologies
microprocessor have beenthe
applications, developed
operatinginvoltage
this paper,
dropssuch
fromas5 Vthetodigital
3.3 V orcontrol loops
even lower,
shown
and thein Figure
load 5b, and
current the combined
switches from sleep control
mode loops shown in Figure
to high-speed 5c, where
computation mode the faster.
internal
one is predictive,
For while solutions
these reasons, the external one on
based is digital,
digital with both
control predictive
are appropriatecontrol loops shown
for DC-DC con-
in Figure
verters, 5d. the implementation of analog and digital signal converters and vice versa for
with
To implement
the execution this control
of control actions.scheme,
Signal in the first
scaling instance, it is blocks
or conditioning necessary are to determine
often imple-
the transfer functions
mented for processing. L I (s)/d(s) and IL (s)/V G (s) [23] for the internal loop control with the
matrixes of linearized states
The conversion of signals p0 A and B at the operating point, and since
referringp0to boost converter current/voltage Lmeasurementsi is intended to
be the output variable, we consider
is usually carried out using zero-order C = [10].
p0 hold circuits (ZOH) at a sampling time of Ts and,
in someAfter this,digital
cases, the transfer
low pass filters V
function 0 (s)/ILto
(DLPF) (s)mitigate
must bestochastic
determined for In
noise. theaddition
control toof
the outer sizing
correctly loop [23].
the This can be
inductor L, achieved
it must bebyensured
finding thatthis transfer
the boostfunction
converter averaged over
conduction
the boost
mode has aconverter outputit loop
direct current; thistON
is forfor during
reason thata aduty cycle
digital d and for
controller tOFF to
is used during the
regulate
the current iL, and an external control is used in cascade for the regulation of output volt-
age V0, this being the variable of interest, as shown in Figure 5b.
It is necessary to apply a Zeta transform to the transfer functions IL(s)/d(s) and
IL(s)/VG(s) for the tuning of the digital controllers, where it is also considered that the var-
iations in the voltage VPV due to climatic changes would be control system disturbances.
An essential point for tuning the voltage controller in the system’s external loop,
whether using digital or predictive control, is that the transfer function of the current in-
Electricity 2024, 5 629

complementary duty cycle 1 − d. Around operating point p0 , the averaged function


described by (17) is obtained:

V0 (s) R(1 − D0 )(rC Cs + 1)


= (17)
IL (s) ( R + rC )Cs + 1

Within the theory of predictive control, some variations have been developed, among
which we have Dynamic Matrix Control (DMC), Generalized Predictive Control (GPC),
Non-Linear Model Predictive Control (NMPC), Extended Prediction Self Adaptive Con-
trol (EPSAC), and Model Predictive Control with Autoregressive Disturbance (MPC-AR),
among others [13]. There are differences between several types of controllers, which lie in
how the model is approached, the kind of optimization applied, whether restrictions are
considered when optimizing, and even whether disturbances are included or not [24].

3.1. Digital Control


Digital signal processors are widely used in power conversion systems since semi-
conductor pulse signals are transmitted at high speeds, either to IGBTs or MOSFETs. As
previously mentioned, in addition to these external components, DC-DC converters have a
PWM stage whose pulse generation can be implemented with digital electronic schemes
such as a free-running counter, an up/down counter, and a hardware accumulator [25]. In
microprocessor applications, the operating voltage drops from 5 V to 3.3 V or even lower,
and the load current switches from sleep mode to high-speed computation mode faster.
For these reasons, solutions based on digital control are appropriate for DC-DC
converters, with the implementation of analog and digital signal converters and vice
versa for the execution of control actions. Signal scaling or conditioning blocks are often
implemented for processing.
The conversion of signals referring to boost converter current/voltage measurements
is usually carried out using zero-order hold circuits (ZOH) at a sampling time of Ts and,
in some cases, digital low pass filters (DLPF) to mitigate stochastic noise. In addition to
correctly sizing the inductor L, it must be ensured that the boost converter conduction
mode has a direct current; it is for this reason that a digital controller is used to regulate the
current iL , and an external control is used in cascade for the regulation of output voltage
V 0 , this being the variable of interest, as shown in Figure 5b.
It is necessary to apply a Zeta transform to the transfer functions IL (s)/d(s) and
IL (s)/VG (s) for the tuning of the digital controllers, where it is also considered that the
variations in the voltage VPV due to climatic changes would be control system disturbances.
An essential point for tuning the voltage controller in the system’s external loop,
whether using digital or predictive control, is that the transfer function of the current
internal loop is considered to be approximately unitary; this is because the current of the
inductor iL reaches its reference value iL * very quickly.

3.2. Predictive Control


The MBPC comprises a set of control methods with common characteristics, such as
using the system model to calculate the output at future times and using an optimal control
action calculated from a cost function [26]. This control technique slides the horizon toward
the future at each instant, and a new optimized prediction is calculated in each iteration.
Various constraints on the process variables of interest can also be implemented. Among its
benefits, SISO (Single Input, Single Output) and MIMO (Multiple Input, Multiple Output)
systems can be handled.
The steps in the hierarchical predictive structure are as follows: measurements are
needed initially; then, model outputs are computed; and lastly, a control method resolves a
quadratic programming or classical optimization issue. Figure 6a presents this prediction
process, and Figure 6b displays a microgrid’s control sequence.
Electricity 2024, 5, FOR PEER REVIEW 9

Electricity 2024, 5 a quadratic programming or classical optimization issue. Figure 6a presents this 630
predic-
tion process, and Figure 6b displays a microgrid’s control sequence.

(a)

(b)

Figure 6. Predictive
Figure control
6. Predictive features:
control (a)(a)
features: function
functionprinciple
principleand
and (b)
(b) process schemeininaamicro-
process scheme microgrid
node.
grid node.

In this paper,
In this paper,the representation
the representation of of
thethe system
system is carried
is carried out through
out through statewith
state spaces, spaces,
the state x(k) = [i (k) v
with the state x(k) L= [iL(k) (k)] and the input vector and u(k) = [d(k) V (k)]. Additionally,
C vC(k)] and the input vector and u(k) = i[d(k) Vi(k)]. Additionally, the
the operational
operationaloutputs
outputs V 0Ve0 IeL0IL0
areare
considered.
considered. BasedBasedon the
onsliding horizon
the sliding principle,
horizon it is
principle, it
assumed that u(k) does not affect y(k) simultaneously. Therefore, the discrete system with
is assumed that u(k) does not affect y(k) simultaneously. Therefore, the discrete system
average matrixes will be represented by:
with average matrixes will be represented by:
(
x𝑥(𝑘
(k ++1)1)==A p𝐴x (k𝑥(𝑘)
) + B+p u𝐵(k𝑢(𝑘)
)
(18) (18)
y(k) = C p x (k)
𝑦(𝑘) = 𝐶 𝑥(𝑘)
As As
cancan
bebe seen,the
seen, theoutput
outputpredictions
predictions are
aremade
madefromfromthethe
present state
present variables
state and and
variables
the the present
present andfuture
and future control
controlsignal increments.
signal For this,
increments. the vectors
For this, ∆U and∆U
the vectors Y are defined,
and Y are de-
where
fined, the dimensions
where the dimensionsof theof
vectors are N and
the vectors areP,Nrespectively:
and P, respectively:
∆𝑈 == [∆𝑢(𝑘) ∆𝑢(𝑘
(k + +
1) 1). . . …∆u∆𝑢(𝑘
(k + N+−𝑁1−) 1)]
( T
∆U ∆u(k) ∆u

(19) (19)
𝑌== [𝑦(𝑘
y(k ++1)1) y(𝑦(𝑘
k + 2+) 2). . . …
y(k𝑦(𝑘
+ P)+ 𝑃)]
 T
Y
TheThe
general
generalequation
equation represented
represented inin matrix
matrix format
format will
will be Y=beFx(k)
Y =+Fx(k)
G∆U,+where
G∆U,the
where
the respective
respectivematrixes
matrixes are:
are:

⎧ 𝐹 h= 𝐶 𝐴 𝐶 𝐴 … 𝐶 𝐴 iT

 F = Cp A p Cp A p 2 . . . Cp A p P
 ⎪ 𝐶 𝐵

0
0 0

⎪ 00 00

C p B⎡p ⎤

0
 
𝐶 𝐴 𝐵 𝐶 𝐵

 C p A p⎢B p 0 ⎥  00

00

Cp Bp 0 (20)

⎢ 𝐶 𝐴 𝐵 𝐶 𝐵 ⎥  00
(20)
⎨ 𝐺 = 2 𝐶 𝐴 𝐵 00

G =  C p A p ⎢B p Cp A p Bp Cp Bp
⎥ 
 
⎪ ⋮ ⋮.

⋮ ⋮ .. ⋱

. .. ..
 ⎪ .. ⎢

⎥  ..
  
.… 𝐶 𝐵

𝐵 P𝐶
. 𝐴 𝐵 𝐶 . 𝐴 𝐵

⎩ P−⎣1𝐶 𝐴 C p B p⎦


−2 P −3

Cp A p Bp Cp A p Bp Cp A p Bp ...

The cost function or objective function that weights the system error and the control
The cost function or objective function that weights the system error and the control
actions of the MBPC [27] is given by (21), where N1 is when a sample occurs after the delay
actions of the MBPC [27] is given by (21), where N1 is when a sample occurs after the delay
if the system has one. In addition, δ and λ are the weighting weights of the error and the
control action, respectively.
Electricity 2024, 5 631

if the system has one. In addition, δ and λ are the weighting weights of the error and the
control action, respectively.

P N
J= ∑ δ( j)[ŷ(k + j/k) − w(k + j)]2 + ∑ λ( j)[∆u(k + j − 1)]2 (21)
j= N1 j =1

As can be seen, the control action acts at a lower instant and is used to calculate the
new output, and is represented in matrix format as follows:

J = (ŷ − w) T δ ŷ − w) + λ∆U T ∆U (22)

Finally, to find the cost function in vector format, we calculate:



J = ( G∆U + Fx (k) − w) T δ G∆U + Fx (k) − w) + λ∆U T ∆U (23)

In the case without restrictions, the minimum of J is analytically expressed in (24). It


can be noticed that everything with W − Fx(k) is a matrix, called K for simplicity, whose
values will be calculated only once and from which the first row will be used.
 −1
∆U = ( G T δG + λI G T δ T (W − Fx (k )) (24)

The law control obtained without restrictions will be:

∆U = K (W − Fx (k)) (25)

The prediction stage can be summarized in the prediction process of the electrical
variable of interest, where the objective is to reduce the errors of this variable between its
reference value and the values measured in the converter, as later, a cost function from
these measurements’ errors is minimized. In the case of iL and V 0 , the cost functions Ji and
Jv , respectively, would be defined by (26):

Ji = |∆IL (k + 1)| = | IL ∗ (k) − IL (k + 1)| Jv = |∆Vo (k + 1)| = |Vo ∗ (k ) − Vo (k + 1)| (26)

4. System Loop Control Design


As a first step, a power value was chosen that would be supplied by the PV array for
its sizing. The manufacturer of the selected PV panels was AE SOLAR, from Königsbrunn,
Germany, with part number AE340SMM6-72. These PV panels have electrical characteristics
that were obtained with tests under standard conditions, with 1 kW/m2 at 25 ◦ C, shown in
Table 2. Additionally, it should be noted that each PV panel comprises 72 cells, with VOC
and ISC temperature coefficients of −0.29%/◦ C and 0.05%/◦ C, respectively. Choosing a PV
array power of 15 kW, the same as the power in the MPP (Maximum Power Point), and
a voltage in the MPP close to the reference value V 0 * = 370 V, a quantity of seven panels
connected in series were obtained, and seven of these arrays were connected in parallel.
With these values, the specifications of the PV array were found, which are also shown in
Table 2.

Table 2. PV panel and array standard condition specifications.

Parameter Description PV Panel PV Array


PMPP MPP power 340 W 16.66 kW
V MPP MPP voltage 39.09 V 273.63 V
IMPP MPP current 8.7 A 60.9 A
VOC Open-circuit voltage 46.94 V 328.58 V
ISC Short-circuit current 9.48 A 66.36 A
Electricity 2024, 5 632

Table 3 shows the components of the chosen boost converter. Initially, the converter
load resistance was sized based on the required power/voltage parameters. Subsequently,
the operating duty cycle was calculated according to (1) considering the input/output
voltage requirements. In addition, fSW = 5 kHz was chosen for the minimum component
sizing of the boost converter, the same ones found following (2) and (3). Commercial values
above the minimum estimated values were considered when determining capacitances,
and a value ten times higher than the minimal calculated inductance was considered when
choosing an inductance. On the other hand, standard values were considered for the
converter components’ series resistances.

Table 3. Parameters found in the boost converter.

Parameter Description Value


VG Input voltage 273.63 V
V0 Output voltage 370 V
D0 Nominal duty cycle 0.2605
Lmin Minimum inductance 0.13 mH
L Inductance 1.3 mH
rL Inductor series resistance 0.1 µΩ
Cmin Minimum output capacitance 570.77 µF
C Output capacitance 1000 µF
rC Output capacitance series resistance 0.1 µΩ
CPV Input capacitance 1000 µF
rCPV Input capacitance series resistance 0.1 µΩ
R Load resistance 9.13 Ω

With the considered values of the converter parameters, the obtained state matrixes
are indicated in (27).   
 A = −0.001 −568.8342

p0
739.5405 −109.569 (27)
 B = 284, 590 −54, 820 T

p0

From these matrixes, transfer functions iL (s)/d(s) and V 0 (s)/iL (s) were obtained. Then,
these transfer functions were discretized for tuning the digital controllers. When testing
and adjusting several controllers using MATLAB/SIMULINK control tools during the
manual tuning process, the best parameters for current/voltage regulation were those
indicated in Table 4 considering a control sampling time equivalent to Ts = 100 µs.

Table 4. Digital controllers’ parameters.

Parameter Description For iL For V 0


KP Proportional gain 0.000551 0.204
KI Integral gain 0.312 15.6

On the other hand, these transfer functions will also be helpful for the design of MBPC
controllers, both for current and voltage regulation. This could be achieved by considering
both the prediction horizons P = 10 and control horizons N = 3, together with a control
sampling time of Ts = 200 µs. In these controllers’ designs, the operating values of the boost
converter were also considered.
Regardless of the applied type of control, be it digital PI or MBPC, it is worth mention-
ing that, in the design of the current controller, the restriction of a control action between
0 and 1 was considered, this being the value of the duty cycle sent to the PWM pulse
generator. It should be noted that for the design of the voltage controller, the transfer
function V 0 (s)/iL (s) was considered, and that the closed-loop transfer function iL (s)/iL *(s)
was unitary since the reference current was quickly reached.
Electricity 2024,
Electricity 5 5, FOR PEER REVIEW
2024, 63312

5.5.Real-Time
Real-TimeSimulation
Simulationfor forBoost
BoostConverter
Converter
Real-time
Real-time (RT) simulation is necessarywhen
(RT) simulation is necessary when aa CPU
CPU requires
requires aa similar operation to
similar operation to a
a physical
physical system.
system. AnAn RT simulator achieves deterministic responses by connecting
RT simulator achieves deterministic responses by connecting real real
hardware
hardwareororimplementing
implementinga ahardware-in-the-loop
hardware-in-the-loop(HIL) (HIL)scheme.
scheme.ItItisiscrucial
crucialtotoindicate
indicate
that
that the RT concept can be applied strictly according to the requirementsofofeach
the RT concept can be applied strictly according to the requirements eachsystem’s
system’s
restrictions.
restrictions.This
Thisimplies
impliesthat
thatthe
thesampling
samplingwould
wouldnotnotbebethe
thesame
samefor
forananelectronic
electronicsystem
system
asasfor a thermal or mechanical system. This type of simulation is carried out
for a thermal or mechanical system. This type of simulation is carried out according according to ato
sampling time Ts_CPU that can be adjusted according to the implemented system.
a sampling time Ts_CPU that can be adjusted according to the implemented system.
ESPOL possesses the tools to conduct R&D projects in innovative academic and
ESPOL possesses the tools to conduct R&D projects in innovative academic and com-
commercial solutions for power electronics and power systems industries. The RT-LAB
mercial solutions for power electronics and power systems industries. The RT-LAB devel-
development package includes a 32-core OPAL-RT RT simulator, a processor based on
opment package includes a 32-core OPAL-RT RT simulator, a processor based on the Xil-
the Xilinx VC707 Virtex-7 FPGA (San José, CA, USA) architecture capable of exchang-
inx VC707 Virtex-7 FPGA (San José, CA, USA) architecture capable of exchanging volt-
ing voltage/current I/Os, and an OMICRON CMS 356 power amplifier to exchange
age/current I/Os, and an OMICRON CMS 356 power amplifier to exchange voltage/cur-
voltage/current signals with protection relays. It is also completely integrated with
rent signals with protection
® . Figure relays. It is also completely integrated with MATLAB/Sim-
MATLAB/Simulink 7 shows part of the equipment in the RT simulation lab-
ulink®. Figure 7 shows part of the equipment in the RT simulation laboratory in ESPOL,
oratory in ESPOL, with an AMETEK 90 kVA power amplifier for high AC and DC power
with an AMETEK 90 kVA power amplifier for high AC and DC power systems applica-
systems applications.
tions.

Figure 7. An example of tests with RT simulation equipment in ESPOL.


Figure 7. An example of tests with RT simulation equipment in ESPOL.

InInpower
powerelectronics-based
electronics-basedapplications,
applications,RT RTsimulation
simulationpresents
presentssome
somechallenges
challengesinin
HILimplementations,
HIL implementations,such suchasasthe
theability
abilitytotocapture
captureI/O I/OasasPWM
PWMpulsepulsesignals
signalsatathigh
high
frequenciesand
frequencies andthethe mathematical
mathematical resolution
resolution of coupled
of coupled semiconductors
semiconductors and switches
and switches [28].
[28].OPAL-RT offers the eFPGAsim library, ensuring all FPGA-based models exhibit ex-
tremely OPAL-RT
low loopoffers the This
latency. eFPGAsim
library library,
uses anensuring
FPGA solver all FPGA-based modelsHardware
called the Electric exhibit ex-
tremely low loop latency. This library uses an FPGA solver called
Solver (eHS) to customize power electronics stages. The sampling time Ts_FPGA , which the Electric Hardware
is a
Solver (eHS)
parameter to customize
dependent on thepower electronics
complexity of thestages.
circuitThe
to besampling time T[28],
implemented , which
s_FPGAfrom is a
ns to
parameter
ms, is typicallydependent on thethan
much smaller complexity
Ts_CPU . of the circuit to be implemented [28], from ns to
ms,Inis offline
typically much smaller
simulations than Ts_CPU. executed purely in software, the switches are
or simulations
In offline
typically simulations
calculated or simulations
using conductance executed
matrixes. purely
Therefore, anin software,
optimal theofswitches
value the switch-are
typically calculated using conductance matrixes. Therefore, an
ing conductance GS should be obtained since the switches are represented by the Pejovic optimal value of the
switching
method conductance
in the GS should
FPGA simulation [29].beThis
obtained
method since the switches
replaces the switcharewith
represented
an inductor by Lthe
s
when it conducts
Pejovic method and a capacitor
in the Cs when it [29].
FPGA simulation does This
not conduct
methodinreplaces
the nodalthe
matrix,
switch resulting
with an
GS not changing.
ininductor Ls when itThis parameter
conducts and is a defined
capacitor inC(28).
s when it does not conduct in the nodal

matrix, resulting in GS not changing. This parameter is defined in (28).


T Cs
Gs = S_FPGA = (28)
Ls TS_FPGA
𝑇_ 𝐶
𝐺 = =
𝐿 𝑇_
Electricity 2024, 5
Another challenge in RT simulations is the control of the conduction 634 and cut-o
the switches. Pulse generation using typical Simulink blocks causes the comparison r
to beAnother
relatedchallenge
to the Tin RT sampling
s_CPU simulationstime;
is the the switching
control state willand
of the conduction change
cut-outonly when a r
of the
edge of Pulse
switches. Ts_CPUgeneration
occurs, using
with typical
the possible
Simulinkloss of causes
blocks statesthe [29]. For thisresult
comparison reason,
to be it is rec
related
mended to the Ts_CPU
that PWM sampling
pulsestime; the switching
be generated by state will change
configuring only when
a digital a rising
output of edge
the FPGA, s
of T
ifying
s_CPU occurs, with the possible loss of states [29]. For this reason,
the switching frequency and operating duty cycle, and consequently connecte it is recommended
that PWM pulses be generated by configuring a digital output of the FPGA, specifying the
a digital input. This technique, called loopback, is a solution to generate high-frequ
switching frequency and operating duty cycle, and consequently connected to a digital
triggers
input. Thisbetween
technique, Ts_CPU
calledtransitions.
loopback, is a solution to generate high-frequency triggers
between This RT simulation
Ts_CPU transitions. project consists of two subsystems. The first subsystem, called
masterThis subsystem,
RT simulationhas an consists
project eHS stage where
of two the power
subsystems. circuit
The first of thecalled
subsystem, converter
the is im
master
mented subsystem,
and a stagehas an in
eHSthestage
CPUwhere the power
where the circuit
cascade of the converter
control is implemented along
is implemented
and
blocksa stage
for in
thethetriggering
CPU where ofthe
thecascade
PWM control
pulses.isAimplemented
second subsystem,along with blocks
called forconsole
the
the triggering of the PWM pulses. A second subsystem, called the console subsystem,
system, displays the current/voltage measurements in the converter. An overall sim
displays the current/voltage measurements in the converter. An overall simulation scheme
istion scheme
shown is shown
in Figure 8, where inall
Figure 8, where all
the CPU/FPGA the CPU/FPGA
boundaries boundaries
are indicated. Additionally,are indicated
an
ditionally, an oscilloscope is used to more accurately
oscilloscope is used to more accurately monitor voltage/current signals. monitor voltage/current signals

Scope V0* CPU


Core 1

iL* D0* PWM


Cascade Controller generation

Host PC
console eHS
FPGA
V0, iL Virtex-7
DC-DC vQ VC707
Converter

vQ

Analog Digital Digital


output input output

Oscilloscope
gate pulses

Figure8.8.Boost
Figure Boost converter
converter RT simulation
RT simulation diagram.
diagram.

6. Simulation and Results


6. Simulation and Results
6.1. Boost Converter Non-Linear Behavior
6.1. Power
Boost Converter
stage modelingNon-Linear Behaviorthe system’s DC behavior around an operating
aims to represent
point PPower
0 (D , V
0 stage
0 ). Figure
modeling aims non-linear
9 shows the to represent behavior of the boost
the system’s DCconverter
behavioroutput
around an o
voltage V 0 as a function of its duty cycle d. A tangent line has been drawn around the
ating point P0 (D0, V0). Figure 9 shows the non-linear behavior of the boost converter
calculated operating duty cycle D0 , representing the linearization of the system. These
put voltage V0 as a function of its duty cycle d. A tangent line has been drawn around
graphs demonstrate that the duty cycle and voltage setpoint V0 * variations should be kept
calculated
small aroundoperating
the operating duty cycle
point. If theDoperation
0, representing
conditionsthewere
linearization
significantlyof the system. T
displaced
graphs
from P0 , demonstrate
the variations that
in the the duty cycle
non-linear andwould
model voltage setpoint
seriously V0* the
affect variations should be
converter’s
response.
small around On thetheother hand, for point.
operating high-duty cycles
If the greater than
operation 0.9, the converter’s
conditions voltage displ
were significantly
gain
fromandP0,output voltage would
the variations in thebe non-linear
so high that the
model converter
would would not have
seriously the capacity
affect the converter’
to supply them. It should be noted that the linearized output voltage vˆo as a function of the
sponse. On the other hand, for high-duty cycles greater than 0.9, the converter’s vo
linearized duty cycle dˆ is described by (29), which also depends on the input voltage VG .
gain and output voltage would be so high that the converter would not have the cap
 output voltage 𝑣 as a functio
" #
to supply them. It should be noted that
V the linearized

vˆo ∼ ∗
= Vo +
G
dˆ − Do (29)
the linearized duty cycle 𝑑 is described (1 − Dbyo)
2 (29), which also depends on the input vo
VG.
𝑉
𝑣 ≅𝑉∗+ 𝑑−𝐷
(1 − 𝐷 )
Electricity 2024, 5, FOR PEER REVIEW 15

Electricity 2024, 5, FOR PEER REVIEW 14


Electricity 2024, 5 𝑉𝐺 635
𝑣 ∗
̂𝑜 ≅ 𝑉𝑜 + [ ] (𝑑̂ − 𝐷𝑜 ) (29)
(1 − 𝐷𝑜 )2

Voltage [V]

P0
P0

Figure 9. Boost converter output voltage versus duty cycle.


Figure 9. Boost
Figure9. Boost converter
converter output
output voltage
voltage versus
versus duty
duty cycle.
cycle.
6.2. Boost Converter Offline Simulations
6.2.
6.2. Boost
Boost Converter
Converter Offline
Offline Simulations
Simulations
This section shows the results of offline simulations, in which the DVC experiment
This
has yet section
to be shows
considered the results
it is of offlinethe
simulations, of in which the DVC experiment has
This section shows since
the results outside
of offline context
simulations, this
inpaper.
whichThis type
the DVC of control
experimentis
yet
slow tocompared
be considered since it based
to schemes is outsidecascade
the context of this paper. This typetheof control is slow
has yet to be considered since it isonoutside thecontrol.
contextFigure
of this10 shows
paper. This boost
type ofconverter
control is
compared
output to schemes
voltage based
V0schemes
and on cascade
inductor control.
current Figure 10when
iL control.
behavior shows the cascade
boost converter output
slow compared to based on cascade Figure 10the
shows the boost control-based
converter
voltage V 0 and inductor current iL behavior when the cascade control-based schemes
schemes control the
output voltage converter.
V0 and Thecurrent
inductor simulation lasts six seconds.
iL behavior when the cascade control-based
control the converter. The simulation lasts six seconds.
schemes control the converter. The simulation lasts six seconds.

(a) (b) (c)


(a) (b) (c) employing (a) digital
Figure 10. Offline simulation result from output voltage and inductor current
Figure 10. Offline simulation result from output voltage and inductor current employing (a) digital
PI + PI, 10.
Figure (b) Offline
combined scheme, result
simulation and (c) MBPC
from + MBPC.
output voltage and inductor current employing (a) digital
PI + PI, (b) combined scheme, and (c) MBPC + MBPC.
PI + PI, (b) combined scheme, and (c) MBPC + MBPC.
Initially, aa load
Initially, load variation
variation ofof ±
±10
10 V was considered,
V was considered, but but this
this displaced
displaced the the operation
operation
conditions
conditions from
Initially,
from the
a load operating point
variationpoint
the operating P . With
of ±10P V. With
0 this, steady-state
was considered, errors
but this
this, steady-state appeared,
displaced
errors appeared, and
the and to fix
fix
operation
to
0
this
this anomaly,
conditions
anomaly, fromthethe
the load
load variationpoint
operating
variation was decreased,
was decreased,
P acting
0. With this, asaadisturbance
steady-state
acting as disturbance variation.and to fix
errors appeared,
variation.
During
this anomaly, the 2nd and 4th seconds, the forced load voltage varies
During the 2nd and 4th seconds, the forced load voltage varies by 1variation.
the load variation was decreased, acting as a disturbanceby 1 V;
V; subsequently,
subsequently,
the load voltage
During the varies
2nd and by −1
4th V. The
seconds, overshoot
the forced levels
load (OS)
voltage
the load voltage varies by −1 V. The overshoot levels (OS) and stabilization and stabilization
varies by 1 V; times (T
(TSS))
subsequently,
times SS
were
the evaluated
load voltage in each
varies simulation
by −1 V. section.
The These
overshoot load
levelsvariations
(OS) and were like disturbances
stabilization
were evaluated in each simulation section. These load variations were like disturbances times in
(Tin
SS)

the
were
the DC-DC converter,
evaluated
DC-DC and
in eachand
converter, with
simulationthis, the
with this,section. results
These
the results detailed in Table
load variations
detailed 5
in Table 5werewere
werelike obtained.
disturbances in
obtained.
the DC-DC
Table 6converter,
shows alland the with
ripplethis,
andtheaverage
results detailed
data in V in0 Table
and iL5 were obtained.
for each cascade con-
trol scenario. In the voltage case, the average data are close to V 0 * ; in the current case,
the average values are approximate in all cases. These data were kept constant during
the simulations.
Table 5. Output voltage response specification data in offline simulations.

Electricity 2024, 5 Parameter 0<t<2s 2s<t<4s 4s<t<6s 636


Digital PI + PI
OS 5.61% 1% 0.98%
Table 5.TOutput
SS voltage response
62 msspecification data in offline
51 mssimulations. 74 ms
Parameter 0 < t < 2Combined
s scheme
2s<t<4s 4s<t<6s
OS 6% 0.97% 0.85%
Digital PI + PI
TSS 23 ms 20 ms 28 ms
OS 5.61% 1% 0.98%
MBPC + MBPC
TSS 62 ms 51 ms 74 ms
OS 7.15% 3.71% 0.96%
Combined scheme
TSS 36 ms 22.1 ms 25.8 ms
OS 6% 0.97% 0.85%
TSS 23 ms 20 ms 28 ms
Table 6 shows all the ripple and average data in V0 and iL for each cascade control
MBPC
scenario. In the voltage case, the average + MBPC
data are close to V0*; in the current case, the av-
erage values
OS are approximate in all cases. These data3.71%
7.15% were kept constant during
0.96% the sim-
ulations. TSS 36 ms 22.1 ms 25.8 ms

Table 6. Output voltage and inductor current ripple and average data in offline simulations.
Table 6. Output voltage and inductor current ripple and average data in offline simulations.
Parameter Digital PI + PI Combined Scheme MBPC + MBPC
Parameter Digital PI + PI Combined Scheme MBPC + MBPC
∆V0 2.744 V 3.509 V 2.819 V
∆V 2.744 V 3.509 V 2.819 V
V0(avg.) 0 369.759 V 369.7185 V 370.0255 V
V0(avg.) 369.759 V 369.7185 V 370.0255 V
∆iL ∆i 12.9717 A
12.9717 A 13.1608 A A
13.1608 12.6679
12.6679AA
L
iL(avg.)
iL(avg.) 54.6185 A
54.6185 A 55.36 A A
55.36 55.38125
55.38125AA

6.3. Boost
6.3. Boost Converter
Converter RT Simulations
RT Simulations
Electrical SCADA
Electrical SCADA(Supervisory
(SupervisoryControl
ControlandandData
Data Acquisition)
Acquisition) systems
systems useuse
thethe con-
console
sole output from RT simulation equipment to display the voltage/current
output from RT simulation equipment to display the voltage/current RMS readings for RMS readings
for many
many applications.
applications. As previously
As previously discussed,
discussed, an oscilloscope
an oscilloscope is necessary
is necessary to better
to better vis-
visualize
ualize signals
signals in converter
in converter circuits,circuits, even though
even though they are they
alsoare also commonly
commonly employedemployed
in power in
power electronics
electronics applications.
applications. The I/OThe I/O channels
channels of the simulator,
of the simulator, which are which are
scaled byscaled byofa
a factor
factor
0.1, of 0.1,
were usedwere used tothis
to connect connect this equipment.
equipment. This isextra
This is because because extra
scaling is scaling
possibleiswhen
possible
the
when the base circuit is built in the eHS block; these channels offer acceptable
base circuit is built in the eHS block; these channels offer acceptable security. Scaling for V0 security.
Scaling
was for0.01
set at V0 was set atwhereas
units/V, 0.01 units/V, whereas
scaling scaling
for it was for0.01
set at it was set at 0.01 units/A.
units/A.
This section presents the RT simulation results. Figure 11 shows the behavior of the
converter output
boost converter output voltage
voltage V V00 and inductor current iLL with an oscilloscope, which was
implemented within the OPAL-RTOPAL-RT FPGA. FPGA.

(a) (b) (c)


Figure 11. RT simulations result from output voltage and inductor current employing (a) digital PI
Figure 11. RT simulations result from output voltage and inductor current employing (a) digital PI +
+ PI, (b) combined scheme, and (c) MBPC + MBPC.
PI, (b) combined scheme, and (c) MBPC + MBPC.
Similarly to the previous section, this simulation lasted six seconds, and the load volt-
Similarly to the previous section, this simulation lasted six seconds, and the load
age was changed
voltage was by ±1
changed by V±1after the the
V after 2nd2nd
andand
4th 4th
seconds, producing
seconds, thethe
producing results shown
results in
shown
in Table 7. It can be noticed that with the forced variation of ±1 V, V0 was not affected no
matter the cascade control scenario.
Electricity 2024, 5 637

Table 7. Output voltage response specification data in RT simulations.

Parameter 0<t<2s 2s<t<4s 4s<t<6s


Digital PI + PI
OS 5.44% 0.98% 0.95%
TSS 62.5 ms 52 ms 76 ms
Combined scheme
OS 5.8% 1.01% 0.87%
TSS 72 ms 15 ms 27.6 ms
MBPC + MBPC
OS 6.84% 3.65% 0.72%
TSS 26 ms 20.8 ms 25.2 ms

In the same way as offline simulations, Table 8 shows all the ripple and average
data for the voltage/current measurements. These data were kept constant during the RT
simulations, and the results are similar to those obtained in offline simulations.

Table 8. Output voltage and inductor current ripple and average data in RT simulations.

Parameter Digital PI + PI Combined Scheme MBPC + MBPC


∆V 0 5.662 V 4.204 V 4.001 V
V0(avg.) 370.455 V 369.786 V 370.0945 V
∆iL 14.7024 A 18.416 A 17.7422 A
iL(avg.) 55.8731 A 55.5625 A 55.8936 A

7. Discussion
Table 9 shows the collection of data, including renewable the energy integration,
design of the DC-DC converter parameters, validation, efficiency (η), and output volt-
age response parameters, between the current work and the control techniques adopted
for boost converters in related works. Based on the data obtained, some related works
did not carry out an experimental validation, unlike the current work developed in an
RT simulator.

Table 9. Comparison between current work and related works.

DC-DC
Offline Exp.
Reference PV Feed Converter η TSS (ms) Min. OS
Validation Validation
Design

PD-Fuzzy logic#1 [6] √ 93.6% 15 7%
PD-Fuzzy logic#2 [6] √ √ 96.44% 50 7%
GA [7] √ √ 95.71% 27.6 20.92%
BFOA [7] √ √ √ 95.71% 20.4 23.38%
PSO [8] √ √ 96.52% 43 -
SMC [9] √ √ 95.18% 30 -
Fuzzy logic + SMC [10] √ √ 99.35% 35 4.5%
PID + Hysteresis [11] √ √ 96.99% 450 4%
PID + SMC [11] √ √ √ √ 96.99% 450 -
Current work 95.69% 15 1.01%

The output voltage response was the fastest, with a minimum overshoot. Based on the
reported works, whose parameters are presented in Table 9, the efficiency values exceed
90%, while our designed converter, with 15 kW power, has 95% efficiency.
On the other hand, Tables 10 and 11 detail the relative errors between offline and RT
simulation data. Time limitations, external interferences, and model simplifications are
some of the reasons why offline and RT simulations differ in accuracy. RT simulations must
On the other hand, Tables 10 and 11 detail the relative errors between offline and RT
simulation data. Time limitations, external interferences, and model simplifications ar
Electricity 2024, 5 some of the reasons why offline and RT simulations differ in accuracy. RT simulation 638
must work under tight time constraints, which might result in approximations and de
creased accuracy, whereas offline simulations frequently rely on idealized conditions and
work under tight time
higher-precision constraints, which might result in approximations and decreased
computations.
accuracy, whereas offline simulations frequently rely on idealized conditions and higher-
precision
Table 10.computations.
Relative error data between offline and RT simulations for output voltage response pa
rameters.
Table 10. Relative error data between offline and RT simulations for output voltage response
Parameter
parameters. 0<t<2s 2s<t<4s 4s<t<6 s
Parameter 0<t<2s
Digital PI + PI
2s<t<4s 4s<t<6s
OS 3.13% Digital PI + PI
2.04% 3.16%
TSS 0.80% 1.92% 2.63%
OS 3.13% 2.04% 3.16%
TSS 0.80% Combined scheme 1.92% 2.63%
OS 3.45% Combined scheme 3.96% 2.30%
TSSOS 68.06%
3.45% 33.33%
3.96% 2.30% 1.45%
TSS 68.06% MBPC + MBPC 33.33% 1.45%
OS 4.53% MBPC + MBPC 1.64% 33.33%
TSSOS 38.46%
4.53% 6.25%
1.64% 33.33% 2.38%
TSS 38.46% 6.25% 2.38%
Table 11. Relative error data between offline and RT simulations for ripples and average data.
Table 11. Relative error data between offline and RT simulations for ripples and average data.
Parameter Digital PI + PI Combined Scheme MBPC + MBPC
Parameter
∆V0 Digital
51.54%PI + PI Combined Scheme
16.53% MBPC + MBPC
29.54%
∆V 0
V0(avg.) 0.19%
51.54% 0.02%
16.53% 29.54% 0.02%
V0(avg.) 0.19% 0.02% 0.02%
∆iL 11.77% 28.54% 28.60%
∆iL 11.77% 28.54% 28.60%
iL(avg.)
iL(avg.) 2.25%
2.25% 0.36%
0.36% 0.92% 0.92%

InInaddition,
addition, a SWOT
a SWOT (Strengths,
(Strengths, Weaknesses,
Weaknesses, Opportunities,
Opportunities, and Threats)
and Threats) matrix wa
matrix was
developedtoto
developed better
better comprehend
comprehend the current
the current work’s
work’s features
features and strategic
and strategic planning.
planning. Based Based
on the SWOT analysis shown in Figure 12, the most notable characteristic
on the SWOT analysis shown in Figure 12, the most notable characteristic is the low-cost is the low-cos
RTimplementation,
RT implementation, even
even with
with a hardware-in-the-loop
a hardware-in-the-loop test, which
test, which uses theuses the high-frequency
high-frequency
channels
channelsavailable
availableononthethe
equipment.
equipment.

Figure12.
Figure 12.SWOT
SWOT analysis
analysis for for
the the current
current work.work.
Electricity 2024, 5 639

8. Conclusions
After analyzing how the boost converter operates, it is notable that the sizing of its
components is crucial since they must be accurately predicted to meet the load requirements.
Additionally, the mathematical model of the boost converter depends on its components.
Even the PWM generation stage’s settings must be carefully chosen and kept constant.
PI controllers should be utilized in digital control systems rather than PID controllers
due to their more straightforward design and high reliability. In some circumstances, cost
savings could be achieved when the hardware benefits the controlled system.
MBPC is advantageous for forced-commutation-based power converters in power
electronics applications because its model is crucial. It can forecast future events and adapt
the current control strategy optimally. MBPC can manage SISO and MIMO systems, making
it a more straightforward and suitable control solution. Another of its advantages is its
digital implementation, so it is feasible to develop controllers in digital signal processors.
For this reason, DLPF and ZOH are used in all cascade control schemes.
The MBPC’s computational load is high, but when operating in a real-time simulator,
with its high frequency, this weakness is compensated and does not affect the voltage
response. Depending on the complexity of the optimization algorithm used, the cost
function could provide an adequate response, but obtaining it would take longer.
In the MBPC stage, choosing an initial prediction horizon of less than 50 is good
practice, except when the sampling time is minimal. A small control horizon demands
more controller computations due to quadratic programming.
This paper illustrates that with some cascade control techniques (digital PI + digital
PI, digital PI + MBPC, and MBPC + MBPC), the output voltage reaches better stabilization
compared to the other control techniques mentioned in the Introduction. It can even be seen
that the inductor current settles faster than the output voltage in all cases. After comparing
the outcomes and assessing each technique’s efficacy, the MBPC + MBPC scheme is found
to be the most successful option in offline and RT simulations.
Real-time simulation offers low implementation costs compared to the actual costs of
implementing a microgrid. In addition, using a real-time simulator allows many tests to
validate solutions that present minimal defects when implemented.
An FPGA can implement any MPPT algorithm and the PWM control stage that
produces the commutation pulses. The RT equipment can execute an FPGA-in-the-loop
simulation. In this case, boost converter testing with an embedded controller is feasible
due to the deployment of the MATLAB/Simulink® platform for any existing code based
on the Hardware Description Language.

Author Contributions: Conceptualization, S.J.R. and S.F.; methodology, S.J.R. and A.I.; software,
E.S.G.; validation, S.J.R. and S.F.; formal analysis, S.F.; investigation, S.J.R., E.S.G., A.I. and S.F.;
resources, S.F.; data curation, E.S.G.; writing—original draft preparation, S.J.R., E.S.G. and A.I.;
writing—review and editing, S.J.R., E.S.G. and S.F.; visualization, S.J.R. and E.S.G.; supervision, S.F.;
project administration, S.J.R.; funding acquisition, S.J.R. All authors have read and agreed to the
published version of the manuscript.
Funding: The present research was supported by the R&D Project [GI-GISE-FIEC-01-2018].
Data Availability Statement: The original contributions presented in the study are included in the
article, further inquiries can be directed to the corresponding author.
Acknowledgments: The authors thank ESPOL Polytechnic University for supporting this work.
Conflicts of Interest: The authors declare no conflicts of interest regarding this paper’s publication.
Electricity 2024, 5 640

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