MTFC256GAVATTC
MTFC256GAVATTC
UFS Memory
MTFC128GAVATTC-AAT ES , MTFC128GAVATTC-AIT ES,
MTFC256GAVATTC-AAT ES, MTFC256GAVATTC-AIT ES
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‡Products and specifications discussed herein are for evaluation and reference purposes only and are subject to change by
Micron without notice. Products are only warranted by Micron to meet Micron's production data sheet specifications.
Micron Confidential and Proprietary Advance
MT FC xxxx xx xx xx -xx
Notes: 1. All the above MPNs can be ordered in the shipping form of tray and tape and reel.
2. Products and specifications discussed herein are for evaluation and reference purposes only and are subject
to change by Micron without notice. Products are only warranted by Micron to meet Micron’s production
data sheet specifications.
Device Marking
Due to the size of the package, the Micron-standard part number is not printed on the top of the device. Instead,
an abbreviated device mark consisting of a 5-digit alphanumeric code is used. The abbreviated device marks are
cross-referenced to the Micron part numbers at the FBGA Part Marking Decoder site: www.micron.com/decoder.
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Contents
Important Notes and Warnings ......................................................................................................................... 6
General Description ......................................................................................................................................... 7
UFS Performance and Current Consumption .................................................................................................... 8
Signal Descriptions ........................................................................................................................................... 9
Signal Assignments ......................................................................................................................................... 10
Package Dimensions ....................................................................................................................................... 11
Architecture ................................................................................................................................................... 12
UFS M-PHY Attributes .................................................................................................................................... 13
UPIU Transaction Codes ................................................................................................................................. 16
UFS Descriptors ............................................................................................................................................. 17
UFS Flags, Attributes, and Commands ............................................................................................................. 34
UFS Supported Pages ..................................................................................................................................... 42
UFS Vital Product Data Parameters ................................................................................................................. 48
Electrical Specifications .................................................................................................................................. 57
Revision History ............................................................................................................................................. 58
Rev. B – 05/2020 ......................................................................................................................................... 58
Rev. A – 03/2020 .......................................................................................................................................... 58
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List of Figures
Figure 1: UFS Part Numbering ......................................................................................................................... 2
Figure 2: 153-Ball JEDEC -5Vss (Top View, Ball Down) ..................................................................................... 10
Figure 3: 153-Ball LFBGA – 11.5mm × 13.0mm × 1.3mm (Package Code: TC) .................................................... 11
Figure 4: UFS Functional Block Diagram ........................................................................................................ 12
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List of Tables
Table 1: Ordering Information ......................................................................................................................... 2
Table 2: Performance ...................................................................................................................................... 8
Table 3: Active Current Consumption ............................................................................................................... 8
Table 4: Low-Power Mode ................................................................................................................................ 8
Table 5: Signal Descriptions ............................................................................................................................. 9
Table 6: Recommended Capacitor Values ....................................................................................................... 12
Table 7: PHY M-TX Capability Attributes ........................................................................................................ 13
Table 8: PHY M-RX Capability Attributes ........................................................................................................ 13
Table 9: UPIU Transaction Codes ................................................................................................................... 16
Table 10: Descriptor Identification Values ...................................................................................................... 17
Table 11: Configuration Descriptor ................................................................................................................ 17
Table 12: Device Descriptor ........................................................................................................................... 18
Table 13: Geometry Descriptor ...................................................................................................................... 23
Table 14: Unit Descriptor ............................................................................................................................... 27
Table 15: RPMB Unit Descriptor ..................................................................................................................... 29
Table 16: Power Parameters Descriptor .......................................................................................................... 29
Table 17: Interconnect Descriptor .................................................................................................................. 30
Table 18: Manufacturer Name String Descriptor ............................................................................................. 30
Table 19: Product Name String Descriptor ...................................................................................................... 31
Table 20: OEM ID String Descriptor ............................................................................................................... 31
Table 21: Serial Number String Descriptor ...................................................................................................... 32
Table 22: Product Revision Level String Descriptor ......................................................................................... 32
Table 23: Device Health Descriptor ................................................................................................................ 32
Table 24: Flags .............................................................................................................................................. 34
Table 25: Attributes ....................................................................................................................................... 35
Table 26: SCSI Commands ............................................................................................................................. 41
Table 27: UFS Supported Pages ...................................................................................................................... 42
Table 28: Control Mode Page ......................................................................................................................... 42
Table 29: Read – Write Error Recovery Mode Page ........................................................................................... 44
Table 30: Caching Mode Page ......................................................................................................................... 45
Table 31: Supported VPD Pages ...................................................................................................................... 48
Table 32: Unit Serial Number VPD Page .......................................................................................................... 48
Table 33: Device Identification VPD Page ....................................................................................................... 49
Table 34: Mode Page Policy VPD Page ............................................................................................................. 50
Table 35: Block Limits VPD Page .................................................................................................................... 51
Table 36: Block Device Characteristics ............................................................................................................ 53
Table 37: Logical Block Provisioning ............................................................................................................... 53
Table 38: Standard Inquiry Data ..................................................................................................................... 54
Table 39: Extended Inquiry Data .................................................................................................................... 55
Table 40: Power Supply Parameters ................................................................................................................ 57
Table 41: Reference Clock Parameters ............................................................................................................ 57
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General Description
Micron universal flash storage (UFS) is a communication and mass data storage device
that includes an M-PHY interface, one or more NAND Flash components, and a con-
troller on an advanced 6-signal bus, which is compliant with the UFS system specifica-
tion. Its cost per bit, small package sizes, and high reliability make it an ideal choice for
automotive applications, including information and entertainment, navigation tools,
advanced driving assistance systems, and a variety of other industrial and portable
products.
The nonvolatile UFS draws no power to maintain stored data, delivers high perform-
ance across a wide range of operating temperatures, and resists shock and vibration dis-
ruption.
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Table 2: Performance
Typical Values
Condition1 128GB 256GB Unit
Sequential Write 500 800 MB/s
Read 1500 1950 MB/s
Random Write 65000 80000 IOPS
Read 40000 80000 IOPS
Note: 1. Two lanes, high-speed mode gear 4; sequential access of 512KB chunk; random access of
4KB chunk; command queue depth = 32, burst performance
Additional performance data, such as sustained and system performance on a specific
application board, will be provided in a separate document upon customer request.
Notes: 1. Two lanes, high-speed mode gear 4; VCC = 2.5V; VCCQ = 1.2V; TOPER = 25°C, measurements
done as average RMS current consumption
2. Two lanes, high-speed mode gear 4; VCC = 2.5V; VCCQ = 1.2V; TOPER = 85°C, measurements
bandwidth of 250 KHz
Note: 1. Two lanes, low-speed mode PWM gear 4, M-PHY in Hibernate; VCC = 2.5V; VCCQ = 1.2V;
TOPER = 25°C
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Signal Descriptions
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Signal Assignments
1 2 3 4 5 6 7 8 9 10 11 12 13 14
C NC VSS VSS VCCQ VCCQ NC NC VCC VCC RFU VSS VSS RFU RFU C
E NC VSS VSS VCCQ VSF1 VSF2 VCC VSF3 VSF4 VSS RFU RFU E
H REF_ H
RST_n VSS VSS VSS VSS VSS VSS
CLK
M DOUT1 _c DOUT1 _t VSS VSS VSS RFU RFU NC NC RFU NC VSS VSS VSS M
N NC VSS VSS VSS VSS RFU RFU VCC VCC RFU VSS VSS RFU NC N
P NC NC RFU VSS VSS RFU RFU VCC VCC VSF9 VSS VSS NC NC P
1 2 3 4 5 6 7 8 9 11 12 13 14
10
Top View (ball down)
Note: 1. The following balls are not connected in this product family, although specified by JE-
DEC Standard No. 21-C: A[7:6],B[7:6],C1, C[7:6], E1, G1, J1, L1 and K[7:6]
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Package Dimensions
Seating plane
A 0.08 A
153X Ø0.357 ±0.05
Dimensions apply to
solder balls post-
Ball A1 ID
reflow on Ø0.350 SMD
(covered by SR) Ball A1 ID
ball pads.
0.5 TYP
0.5 TYP
1.2 ±0.1
0.5 TYP
0.213 ±0.04
6.5 CTR
55X Ø0.25 test pads.
9.5 CTR
Ni/Au plated on pitch.
11.5 ±0.1
No solder balls.
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Architecture
CVCCQ CVCC
CVDDiQ2 CVDDi CVDDiQ
VCC VCCQ
Regulator Regulator
DIN0_t/_c
M-PHY
DOUT0_t/_c
NAND
NAND I/O
DIN1_t/_c Control
Core Logic
Flash
Block
DOUT1_t/_c Data
Block
UFS I/O
RST_n
Block
REF_CLK
VSF[9:1]
VSS VSS
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Value
Lane 0
Name ID Lane 1 Type Notes
TX_HSMODE_Capability 01h 01h R FALSE = 0, TRUE = 1
TX_HSGEAR_Capability 02h 04h R HS_G1_TO_G4 = 4
TX_PWMG0_Capability 03h 00h R 0 = NO, 1 = YES
TX_PWMGEAR_Capability 04h 07h R Range from PWM_G1 to PWM_G7
TX_Amplitude_Capability 05h 03h R SA = 1, LA = 2, BOTH = 3
TX_ExternalSYNC_Capability 06h 01h R FALSE = 0, TRUE = 1
TX_HS_Unterminated_LINE_Drive_Ca- 07h 00h R 0 = N0, 1 = YES
pability
TX_LS_Terminated_LINE_Drive_Capabili- 08h 01h R 0 = N0, 1 = YES
ty
TX_Min_SLEEP_NoConfig_Time_Capa- 09h 08h R 1 to 15
bility
TX_Min_STALL_NoConfig_Time_Capa- 0Ah 80h R 1 to 255
bility
TX_Min_SAVE_Config_Time_Capability 0Bh 7Fh R 1 to 250
TX_REF_CLOCK_SHARED_Capability 0Ch 01h R 0 = N0, 1 = YES
TX_PHY_MajorMinor_Release_Capabili- Bit[7:4]: Major version number
0Dh 41h R
ty Bit[3:0]: Minor version number
TX_PHY_Editorial_Release_Capability 0Eh 01h R Bit[7:0] = 1 to 99
TX_Hibern8Time_Capability 0Fh 01h R/W 1 to 128
TX_Advanced_Granularity_Capability 10h 05h R/W Bit[2:1]: Step size
Bit[0]: Supports fine granularity
steps
TX_Advanced_Hibern8Time_Capability 11h 07h R/W 1 to 128
TX_HS_Equalizer_Setting_Capability 12h 03h R Bit[1:0]
Value
Lane 0
Name ID Lane 1 Type Notes
RX_HSMODE_Capability 81h 01h R 0 = NO, 1 = YES
RX_HSGEAR_Capability 82h 04h R HS_G1_TO_G4 = 4
RX_PWMG0_Capability 83h 00h R 0 = NO, 1 = YES
RX_PWMGEAR_Capability 84h 04h R Range from PWM_G1 to
PWM_G7
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Value
Lane 0
Name ID Lane 1 Type Notes
RX_HS_Unterminated_LINE_Drive_Ca- 85h 00h R 0 = NO, 1 = YES
pability
RX_LS_Terminated_LINE_Drive_Capabil- 86h 01h R 0 = NO, 1 = YES
ity
RX_Min_SLEEP_NoConfig_Time_Capa- 87h 0Fh R 1–15
bility
RX_Min_STALL_NoConfig_Time_Capa- 88h FAh R 1–255
bility
RX_Min_SAVE_Config_Time_Capability 89h FAh R 1–250
RX_REF_CLOCK_SHARED_Capability 8Ah 01h R/W 0 = NO, 1 = YES
RX_HS_G1_SYNC_LENGTH_Capability 8Bh 47h R/W Bit[7:6]: SYNC_range FINE = 0,
COARSE = 1
Bit[5:0]: SYNC-length 1 to 15 for
FINE, 0 to 15 for COARSE
RX_HS_G1_PREPARE_LENGTH_Capabili- 8Ch 0Fh R 0–15
ty
RX_LS_PREPARE_LENGTH_Capability 8Dh 06h R 0–15
RX_PWM_Burst_Closure_Length_Capa- 8Eh 1Fh R/W 0–31
bility
RX_Min_ActivateTime_Capability 8Fh 05h R/W 1–9
RX_PHY_MajorMinor_Release_Capabili- 90h 41h R Bit[7:4]: Major version number
ty Bit[3:0]: Minor version number
RX_PHY_Editorial_Release_Capability 91h 01h R 1–99
RX_Hibern8Time_Capability 92h 01h R/W 1–128
RX_PWM_G6_G7_SYNC_LENGTH_Capa- 93h 0Fh R/W Bit[7:6]: SYNC_range FINE = 0,
bility COARSE = 1
Bit[5:0]: SYNC-length 0 to 15
RX_HS_G2_SYNC_LENGTH_Capability 94h 48h R/W Bit[7:6]: SYNC_range FINE = 0,
COARSE = 1
Bit[5:0]: SYNC-length 1 to 15 for
FINE, 0 to 15 for COARSE
RX_HS_G3_SYNC_LENGTH_Capability 95h 48h R/W Bit[7:6]: SYNC_range FINE = 0,
COARSE = 1
Bit[5:0]: SYNC-length 1 to 15 for
FINE, 0 to 15 for COARSE
RX_HS_G2_PREPARE_LENGTH_Capabili- 96h 0Fh R/W Bit[3:0]: 0 to 15
ty
RX_HS_G3_PREPARE_LENGTH_Capabili- 97h 0Fh R/W Bit[3:0]: 0 to 15
ty
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Value
Lane 0
Name ID Lane 1 Type Notes
RX_Advanced_Granularity_Capability 98h 04h R/W Bit[2:1]: Step size
Bit[0]: Supports fine granularity
steps
RX_Advanced_Hibern8Time_Capability 99h 04h R/W 1–128
RX_Advanced_Min_ActivateTime_Capa- 9Ah 0Bh R/W Bit[3:0]: 1–14
bility
RX_HS_G4_SYNC_LENGTH_Capability 9Bh 4Ah R/W Bit[7:6]: SYNC_range FINE = 0,
COARSE = 1
Bit[5:0]: SYNC-length 1 to 15 for
FINE, 0 to 15 for COARSE
RX_HS_G4_PREPARE_LENGTH_Capabili- 9Ch 0Fh R/W Bit[3:0]: 0–15
ty
RX_HS_Equalizer_Setting_Capability 9Dh 01h R/W Bit[0] =0: No equalization
Bit[0] =1: Yes equalization
RX_HS_ADAPT_LENGTH_FINE_Capabili- 9Eh 7Fh R/W Bit[6:0]: 0 to 127
ty
RX_HS_ADAPT_LENGTH_COARSE_Capa- 9Fh 8Eh R/W Bit[6:0]: 0 to 17
bility
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Transaction Transaction
Initiator to Target Code Target to Initiator Code
NOP OUT 00h NOP IN 20h
COMMAND 01h RESPONSE 21h
DATA OUT 02h DATA IN 22h
TASK MANAGEMENT REQUEST 04h TASK MANAGEMENT RESPONSE 24h
Reserved 11h READY TO TRANSFER 31h
QUERY REQUEST 16h QUERY RESPONSE 36h
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UFS Descriptors
Descriptors are blocks or pages of parameters that describe something about the de-
vice. Descriptors are classified into types: device descriptors, configuration descriptors,
unit descriptors, and so forth. Micron devices support the following UFS descriptors.
For detailed information, refer to the JEDEC UFS specification.
Default
Offset Size Name Value Description
00h 1 bLength E6h Size of this descriptor
01h 1 bDescriptorIDN 01h Configuration descriptor type identifier
02h 1 bConfDescContinue 00h 00h: This value indicates that this is the last configuration descriptor in
a sequence of write descriptor query requests. Device shall perform in-
ternal configuration based on received configuration descriptor(s).
01h: This value indicates that this is not the last configuration descrip-
tor in a sequence of write descriptor query requests. Other configura-
tion descriptors will be sent by host. Therefore, the device should not
perform the internal configuration yet.
03h 1 bBootEnable 00h Enables to boot feature.
04h 1 bDescrAccessEn 00h Enables access to the device descriptor after the partial initialization
phase of the boot sequence.
05h 1 bInitPowerMode 01h Configures the power mode after device initialization or hardware re-
set.
06h 1 bHighPriorityLUN 7Fh Configures the high priority logical unit.
07h 1 bSecureRemovalType 00h Configures the secure removal type.
08h 1 bInitActiveICCLevel 00h Configures the ICC level in active mode after device initialization or
hardware reset.
09h 2 wPeriodicRTCUpdate 00h Frequency and method of real-time clock update (see Device Descrip-
tor).
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Default
Offset Size Name Value Description
0Bh 1 bHPBControl 01h HPB Control Mode
Configures the Control Mode of HPB
0Ch 1 bRPMBRegionEnable 00h RPMB Region Enable
Configures which RPMB regions are enabled in RPMB well-known logi-
cal unit
0Dh 1 bRPMBRegion1Size 00h RPMB Region 1 Size
Configures the size of RPMB region 1 if RPMB region 1 is enabled
0Eh 1 bRPMBRegion2Size 00h RPMB Region 2 Size
Configures the size of RPMB region 2 if RPMB region 2 is enabled
0Fh 1 bRPMBRegion3Size 00h RPMB Region 3 Size
Configures the size of RPMB region 3 if RPMB region 3 is enabled
10h 1 bWriteBoosterBuffer- 00h Enables the User Space reduction when Write Booster Buffer is config-
NoUserSpaceReductio- ured
nEn
11h 1 bWriteBoosterBuffer- 00h Configures the Write Booster Buffer type
Type
12h 4 dNumSharedWrite- 00h Configures the Write Booster Buffer size for a shared Write Booster
BoosterBufferAllocU- Buffer configuration
nits
Default
Offset Size Name Value Description
00h 1 bLength 59h Size of this descriptor
01h 1 bDescriptorIDN 00h Device descriptor type identifier
02h 1 bDevice 00h Device type: 00h
Others: Reserved
03h 1 bDeviceClass 00h UFS device class:
Mass storage: 00h
04h 1 bDeviceSubClass 00h UFS mass storage subclass:
Bits (0/1) specify as follows:
Bit 0: Bootable/non-bootable
Bit 1: Embedded/removable
Bit 2: Reserved (for unified memory extension specification)
Others: Reserved
05h 1 bProtocol 00h Protocol supported by UFS device:
SCSI: 00h
06h 1 bNumberLU 00h Number of logical units (user configurable):
bNumberLU does not include well known logical units
07h 1 bNumberWLU 04h Number of well-known logical units
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Default
Offset Size Name Value Description
08h 1 bBootEnable 00h Boot enable indicates whether the device is enabled for boot (user
configurable):
00h: Boot feature disabled
01h: Bootable feature enabled
09h 1 bDescrAccessEN 00h Descriptor access enable indicates whether the device descriptor can
be read after the partial initialization phase of the boot sequence
(user configurable):
00h: Device descriptor access disabled
01h: Device descriptor access enabled
0Ah 1 bInitPowerMode 01h Initial power mode defines the power mode after device initialization
or hardware reset (user configurable):
00h: UFS-sleep mode
01h: Active mode
0Bh 1 bHighPriorityLUN 7Fh High priority LUN defines the high-priority logical unit (user configura-
ble):
Valid values are from 0 to the number of logical units specified by
bMaxNumberLU, and 7Fh. If the value is 7Fh, all logical units have the
same priority.
0Ch 1 bSecureRemovalType 00h Secure removal type (user configurable):
00h: Information removed by an erase of the physical memory
01h: Information removed by overwriting the addressed locations with
a single character followed by an erase
02h: Information removed by overwriting the addressed locations with
a character, its complement, then a random character
03h: Information removed using a vendor define mechanism
Others: Reserved
0Dh 1 bSecurityLU 01h Support for security LU:
00h: Not supported
01h: RPMB
Others: Reserved
0Eh 1 bBackgroundOp- 05h Background operations termination latency defines the maximum la-
sTermLat tency for the termination of ongoing background operations. When
the device receives a COMMAND UPIU with a transfer request, the de-
vice shall start the data transfer and send a DATA IN UPIU or an RTT
UPIU within the latency declared in bBackgroundOpsTermLat. The la-
tency is expressed in units of 10ms (for example, 01h = 10ms, FFh =
2550ms). The latency is undefined if the value of this parameter is 0.
0Fh 1 bInitActiveICCLevel 00h Initial active ICC level defines the bActiveICCLevel value after power-on
or reset (user configurable):
Valid range from 00h to 0Fh
10h 2 wSpecVersion 0310h Specification version:
Bits[15:8] = major version in BCD format
Bits[7:4] = minor version in BCD format
Bits[3:0] = version suffix in BCD format
Example: 3.21 = 0321h
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Default
Offset Size Name Value Description
12h 2 wManufactureDate – Manufacturing date:
BCD version of the device manufacturing date
Example: August 2010 = 0810h
14h 1 iManufactureName 00h Manufacturer name:
Index to the string which contains the manufacturer name
15h 1 iProductName 01h Product name:
Index to the string which contains the product name
16h 1 iSerialNumber 02h Serial number:
Index to the string which contains the serial number
17h 1 iOEMID 03h OEM ID:
Index to the string which contains the OEM ID
18h 2 wManufactureID 12Ch Manufacturer ID:
Manufacturer ID as defined in JEDEC standard JEP106 "Standard Man-
ufacturer's Identification Code"
1Ah 1 bUD0BaseOffset 16h Unit descriptor 0 base offset
1Bh 1 bUDConfigPLength 1Ah Unit descriptor configuration parameter length:
Total size of the configurable unit descriptor parameters
1Ch 1 bDeviceRTTCap 02h RTT capability of device:
Maximum number of outstanding RTTs supported by device. The mini-
mum value is 2.
1Dh 2 wPeriodicRTCUpdate 0000h Frequency and method of real-time clock update (user configurable):
Bits[15:10]: Reserved
Bit[9]: TIME_BASELINE
0h: Time elapsed from the previous dSecondsPassed update
1h: Absolute time elapsed from January 1st 2010 00:00
NOTE if the host device has a real-time clock, it should use TIME BASE-
LINE = "1." If the host device has no real-time clock, it should use TIME
BASELINE = "0."
Bits[8:6]: TIME_UNIT
0h = Undefined
1h = Months
2h = Weeks
3h = Days
4h = Hours
5h = Minutes
6h = Reserved
7h = Reserved
Bits[5:0]: TIME_PERIOD
If TIME_UNIT is 0, TIME_PERIOD is ignored and the period between
RTC update is not defined. All fields are configurable by the host.
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Default
Offset Size Name Value Description
1Fh 1 bUFSFeaturesSup- FFh UFS features support:
port2 This field indicates which features are supported by the device. A fea-
ture is supported if the related bit is set to 1.
Bit[0]: Field firmware update (FFU)
Bit[1]: Production state awareness (PSA)
Bit[2]: Device life span
Bit[3]: Refresh operation
Bit[4]: TOO_HIGH_TEMPERATURE
Bit[5]: TOO_LOW_TEMPERATURE
Bit[6]: Extended Temperature
Bit[7]: Host Performance Booster (HPB)
Others: Reserved
Bit 0 shall be set to 1
20h 1 bFFUTimeout 0Ah Field firmware update timeout:
The maximum time, in seconds, that access to the device is limited or
not possible through any ports associated due to execution of a WRITE
BUFFER command.
A value of 0 indicates that no timeout is provided.
21h 1 bQueueDepth 20h Queue depth:
0: The device implements the per-LU queuing architecture
1.. 255: The device implements the shared queuing architecture. This
parameter indicates the depth of the shared queue.
If bLUQueueDepth > 0 for any LU (except RPMB LU), then bQueue-
Depth shall be 0.
22h 2 wDeviceVersion – Device version:
This field provides the device version.
24h 1 bNumSecureWPArea 20h Number of secure write protect areas:
This value specifies the total number of secure write protect areas sup-
ported by the device. The value shall be equal to or greater than
bNumberLU and shall not exceed 32 (bNumberLU ≤ bNumSecureWPAr-
ea ≤ 32).
25h 4 dPSAMaxDataSize – PSA maximum data size:
This parameter specifies the maximum amount of data that may be
written during the pre-soldering phase of the PSA flow.
The value indicates the total amount of data for all logical units with
bPSASensitive = 01h. Value expressed in units of 4KB.
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Default
Offset Size Name Value Description
29h 1 bPSAStateTimeout 12h PSA state timeout:
This parameter specifies the command maximum timeout for a change
in bPSAState state.
00h means undefined.
Otherwise, the formula to calculate the maximum timeout value is:
Production state timeout = 100µs × 2^bPSAStateTimeout
For example:
01h means 100µs × 2^1 = 200µs
02h means 100µs × 2^2 = 400µs
17h means 100µs × 2^23 = 838.86s
2Ah 1 iProductRevisionLe- 04h Product revision level:
vel Index to the string which contains the product revision level
2Bh: 20 Reserved – Reserved
3Fh
40h 2 wHPBVersion 0200h HPB Specification Version:
Bits[15:8] = major version in BCD format
Bits[7:4] = minor version in BCD format
Bits[3:0] = version suffix in BCD format
Example: 1.2.3 = 0123h
42h 1 bHPBControl 01h HPB Control Mode:
00h: host control mode
01h: device control mode
Others: reserved
43h: 11 Reserved – Reserved
4Eh
4Fh 4 dExtendedUFSFeatur- 03FFh Extended UFS Features Support:
esSupport2 This field indicates which features are supported by the device. A fea-
ture is supported if the related bit is set to 1.
Bit[0]: Field firmware update (FFU)
Bit[1]: Production state awareness (PSA)
Bit[2]: Device life span
Bit[3]: Refresh operation
Bit[4]: TOO_HIGH_TEMPERATURE
Bit[5]: TOO_LOW_TEMPERATURE
Bit[6]: Extended Temperature
Bit[7]: Host performance Booster (HPB)
Bit[8]: Write Booster
Bit[9]: Performance throttling
Others: Reserved
Bit 0 shall be set to 1
53h 1 bWriteBoosterBuffer- 00h No User Space reduction mode
NoUserSpaceReduc- 00h: User space shall be reduced if Write Booster Buffer is configured
tionEn 01h: User space shall not be reduced if Write Booster Buffer is config-
ured
Others: Reserved
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Default
Offset Size Name Value Description
54h 1 bWriteBoosterBuffer- 00h Write Booster Buffer Type
Type 00h: LU dedicated buffer type
01h: Single shared buffer type
Others: Reserved
55h 4 dNumSharedWrite- 00h The Write Booster Buffer size for the shared Write Booster Buffer con-
BoosterBufferAllocU- figuration
nits
Notes: 1. Some fields are user-configurable as they can be configured by the user writing the con-
figuration descriptor.
2. The Device Life Span and Write Booster features are supported as Jedec interface only
Default
Offset Size Name Value Description
00h 1 bLength 57h Size of this descriptor
01h 1 bDescriptorIDN 07h Geometry descriptor type identifier
02h 1 bMediaTechnology 00h Reserved
03h 1 Reserved 00h Reserved
04h 8 qTotalRaw- 128GB EE64000h Total raw device capacity:
DeviceCa- 256GB 1DCBC000h Total memory quantity available to the user to configure the de-
pacity vice logical units (RPMB excluded). It is expressed in unit of 512
bytes.
0Ch 1 bMaxNumberLU 01h Maximum number of logical unit supported by the UFS device:
01h: 32 logical units
0Dh 4 dSegmentSize 2000h Segment size:
Value expressed in unit of 512 bytes
11h 1 bAllocationUnitSize 01h Allocation unit size:
Value expressed in number of segments. Each logical unit can be
allocated as a multiple of allocation units.
12h 1 bMinAddrBlockSize 08h Minimum addressable block size:
Value expressed in unit of 512 bytes. Its minimum value is 08h,
which corresponds to 4KB.
13h 1 bOptimalReadBlock- 80h Optimal read block size:
Size Value expressed in unit of 512 bytes. This is optional parameter, 0
= not available.
14h 1 bOptimalWriteBlock- 80h Optimal write block size:
Size Value expressed in unit of 512 bytes
15h 1 bMaxInBufferSize 40h Maximum data-in buffer size:
Value expressed in unit of 512 bytes. Its minimum value is 08h,
which corresponds to 4KB.
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Default
Offset Size Name Value Description
16h 1 bMaxOutBufferSize 40h Maximum data-out buffer size:
Value expressed in unit of 512 bytes. Its minimum value is 08h,
which corresponds to 4KB.
17h 1 bRPMB_ReadWrite- 20h Maximum number of RPMB frames (256-byte of data) allowed in
Size security protocol in and security protocol out (for example, associ-
ated with a single command UPIU). If the data to be transferred is
larger than bRPMB_ReadWriteSize x 256 bytes, the host will trans-
fer it using multiple SECURITY PROTOCOL IN/OUT commands.
18h 1 bDynamicCapacityRe- 01h Dynamic capacity resource policy:
source Policy This parameter specifies the device spare blocks resource manage-
ment policy.
00h: Spare blocks resource management policy is per logical unit.
The host should release amount of logical blocks from each logical
unit as asked by the device.
01h: Spare blocks resource management policy is per memory
type. The host may deallocate the required amount of logical
blocks from any logical units with the same bMemoryType.
19h 1 bDataOrdering 00h Support for out-of-order data transfer:
00h: Out-of-order data transfer is not supported by the device, in-
order data transfer is required.
01h: Out-of-order data transfer is supported by the device.
Others: Reserved
1Ah 1 bMaxContextIDNum- 20h Maximum available number of contexts which are supported by
ber the device:
Minimum number of supported contexts shall be 5.
1Bh 1 bSysDataTagUnitSize 00h bSysDataTagUnitSize provides system data tag unit size, which can
be calculated as in the following (in bytes):
Tag unit size = 2^(bSysDataTagUnitSize) × bMinAddrBlockSize ×
512
1Ch 1 bSysDataTagResSize 06h Maximum storage area size in bytes allocated by the device to
handle system data by the tagging mechanism:
Valid range from 0 to 6
1Dh 1 bSupportedSecRTypes 09h Bit map which represents the supported secure removal types:
Bit 0: Information removed by an erase of the physical memory
Bit 1: Information removed by overwriting the addressed locations
with a single character followed by an erase
Bit 2: Information removed by overwriting the addressed locations
with a character, its complement, then a random character.
Bit 3: Information removed using a vendor define mechanism
Others: Reserved
A value of 1 means that the corresponding secure removal type is
supported.
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Default
Offset Size Name Value Description
1Eh 2 wSupportedMemory- 8009h Bit map which represents the supported memory types:
Types Bit 0: normal memory type
Bit 1: System code memory type
Bit 2: Non-persistent memory type
Bit 3: Enhanced memory type 1
Bit 4: Enhanced memory type 2
Bit 5: Enhanced memory type 3
Bit 6: Enhanced memory type 4
Bit 7: Reserved
…
Bit 14: Reserved
Bit 15: RPMB memory type
A value 1 means that the corresponding memory type is suppor-
ted. Bit 0 and Bit 15 shall be 1 for all UFS device.
20h 4 dSystemCodeMaxNAl- – Not supported
locU
24h 2 wSystemCodeCapAdj- –
Fac
26h 4 dNonPersistMaxNAllo- –
cU
2Ah 2 wNonPersistCapAdj- –
Fac
2Ch 4 dEn- 128GB 7732h Maximum number of allocation units for the enhanced memory
hanced1Ma 256GB EE5Eh type 1
xNAllocU
30h 2 wEnhanced1CapA- 0300h Capacity adjustment factor for the enhanced memory type 1
djFac
32h 4 dEnhanced2MaxNAl- – Not supported
locU
36h 2 wEnhanced2CapA- –
djFac
38h 4 dEnhanced3MaxNAl- –
locU
3Ch 2 wEnhanced2CapA- –
djFac
3Eh 4 dEnhanced4MaxNAl- –
locU
42h 2 wEnhanced4CapA- –
djFac
44h 2 dOptimalLogical- –
BlockSize
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Default
Offset Size Name Value Description
48h 1 bHPBRegionSize 13h HPB Region size, which can be calculated as in the following (in
bytes)
HPB Region size = 512B x 2^bHPBRegionSize
49h 1 bHPBNumberLU 20h Maximum number of HPB LU supported by the device
00h: HPB is not supported by the device
01h ~ 20h: Maximum number of HPB LU supported by the device
Others : Reserved
4Ah 1 bHPBSubRegionSize 13h HPB Sub-Region size, which can be calculated as in the following
(in bytes) and shall be a multiple of Logical Block size
HPB Sub-Region size = 512B x 2^bHPBSubRegion Size
bHPBSubRegionSize shall not exceed bHPBRegionSize
4Bh 2 wDeviceMaxActiveHP- 100h Maximum number of Active HPB Regions that is supported by the
BRegions device
The value shall not exceed maximum number of HPB Regions
which is calculated by
(qTotalRawDeviceCapacity - size of all Boot LUs)/HPBRegionSize
4Fh 4 dWriteBoos- 128GB 1DCCh Maximum total Write Booster Buffer size which is supported by
terBuffer- 256GB 3B97h the entire device. The summation of the Write Booster Buffer size
MaxNAllocU- for all LUs should be equal to or less than size value indicated by
nits this descriptor
53h 1 bDeviceMaxWrite- 01h Number of maximum Write Booster Buffer supported by the de-
BoosterLUs vice. In this version of the standard, the valid value of this field is
1. Other values are reserved
54h 1 bWriteBoosterBuffer- 03h Capacity Adjustment Factor for the Write Booster Buffer memory
CapAdjFac type. This value is just to inform the LBA space reduction multipli-
cation factor when Write Booster Buffer is configured in user
space reduction mode. Therefore, the value of this descriptor is
valid only if bWriteBoosterBufferNoUserSpaceReductionEn is 0.
The LBA size will be decreased by bWriteBoosterBufferCapAdjFac
*dLUNumWriteBoosterBufferAllocUnits (for example, 3 will be set
for TLC NAND when SLC mode is used as Write Booster Buffer)
55h 1 bSupportedWrite- 02h The supportability of reduction mode and non-reduction mode
BoosterBufferUserSpa- 00h: Write Booster Buffer can be configured only in user space re-
ceReductionTypes duction type
01h: Write Booster Buffer can be configured only user space is not
reduction type
02h: Device can be configured in either user space reduction type
or user space non-reduction type
Others: Reserved
56h 1 bSupportedWrite- 02h The supportability of Write Booster Buffer type
BoosterBufferTypes 00h: LU based Write Booster Buffer configuration
01h: Single shared Write Booster Buffer configuration
02h: Supporting both LU based Write Booster Buffer and Single
shared Write Booster Buffer configuration
Others: Reserved
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Note: 1. Some fields are user configurable as they can be configured by the user writing the con-
figuration descriptor.
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Default
IDN Name Type Value Description
00h Reserved – – Reserved
01h fDeviceInit Read/ 00h Device initialization:
Set only 0b: Device initialization completed or not started yet
1b: Device initialization in progress
02h fPermanentWPEn Read/ 00h Permanent write protection enable:
Write once 00h: Permanent write protection disabled
01h: Permanent write protection enabled
03h fPowerOnWPEn Read/ 00h Power-on write protection enable:
Power on re- 00h: Power-on write protection disabled
set 01h: Power-on write protection enabled
04h FBackgroundOpsEn Read/Volatile 01h Background operations enable:
00h: Device is not permitted to run background operations
01h: Device is permitted to run background operations
05h fDeviceLifeSpan- Read/Volatile 00h Device life span mode:
ModeEn 0b: Device life span mode is disabled
1b: Device life span mode is enabled
06h fPurgeEnable Write only/ – PURGE enable:
Volatile 00h: PURGE operation is disabled
01h: PURGE operation is enabled
07h fRefreshEnable Write only/ – Refresh Enable:
Volatile 0b: Refresh operation is disabled.
1b: Refresh operation is enabled
08h fPhyResourceRemoval Read/ 00h Physical resource removal:
Persistent The host sets this flag to 1 to indicate that the dynamic ca-
pacity operation commences upon device EndPointReset or
hardware reset.
The device resets this flag to 0 after completion of dynamic
capacity operation. The host cannot reset this flag.
09h fBusyRTC Read only 00h Busy real-time clock:
00h: Device is not executing internal operation related to
RTC
01h: Device is executing internal operation related to RTC
0Ah Reserved – – Reserved for unified memory extension standard
0Bh fPermanentlyDisableF- Read/ 00h Permanently disable firmware update:
WUpdate Write once 00h: The UFS device firmware may be modified.
01h: The UFS device permanently disallows future firmware
updates to the UFS device.
0Ch Reserved – – Reserved for unified memory extension standard
0Dh Reserved – – Reserved for unified memory extension standard
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Default
IDN Name Type Value Description
0Eh fWriteBoosterEn Read/Volatile 00h Write Booster Enable:
0b: Write Booster is not enabled
1b: Write Booster is enabled
0Fh fWriteBoosterBuffer- Read/Volatile 00h Flush the data in Write Booster Buffer to the user area of
FlushEn storage
0b: Flush operation is not performed.
1b: Flush operation is performed
10h fWriteBoosterBuffer- Read/Volatile 00h Flush Write Booster Buffer during hibernate state
FlushDuringHibernate 0b: Device is not allowed to flush the Write Booster Buffer
during link hibernate state
1b: Device is allowed to flush the Write Booster Buffer dur-
ing link hibernate state
11h fHPBReset Read/Set only 00h HPB Reset
0: HPB reset completed or not started yet
1: HPB reset in progress
12h fHostActivateGCEn Read/Set only 00h HACG
All flags reported in the table are device level flags. They are addressed setting INDEX =
00h and SELECTOR = 00h.
An attribute is a parameter that represents a specific range of numeric values that can
be written or read. Attribute size can be from 1-bit to 32-bit. Attributes of the same type
can be organized in arrays, each element of them identified by an index.
Size Default
IDN Name Type (Byte) Value Description
00h bBootLunEN Read/ 1 00h Boot LUN enable:
Persistent 00h: Boot disabled
01h: Enabled boot from boot LU A
02h: Enabled boot from boot LU B
All others: Reserved
01h Reserved – – – Reserved
02h bCurrentPowerMode Read only 1 11h Current power mode:
00h: Idle mode
10h: Pre-active mode
11h: Active mode
20h: Pre-sleep mode
22h: UFS-sleep mode
30h: Pre-power down mode
33h: UFS-power down mode
Others: Reserved
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Size Default
IDN Name Type (Byte) Value Description
03h bActiveICCLevel Read/Volatile 1 00h Active ICC level:
bActiveICCLevel defines the maximum current con-
sumption allowed during active mode.
00h: Lowest active ICC level
0Fh: Highest active ICC level
Others: Reserved
04h bOutOfOrderDataEn Read/ 1 00h Out-of-order data transfer enable:
Write once 00h: Out-of-order data transfer is disabled
01h: Out-of-order data transfer is enabled
Others: Reserved
05h bBackgroundOpStatus Read only 1 00h Background operations status device health status
for background operation:
00h: Not required
01h: Required, not critical
02h: Required, performance impact
03h: Critical
Others: Reserved
06h bPurgeStatus Read only 1 00h PURGE operation status:
00h: Idle (PURGE operation disabled)
01h: PURGE operation in progress
02h: PURGE operation stopped prematurely
03h: PURGE operation completed successfully
04h: PURGE operation failed due to logical unit
queue not empty
05h: PURGE operation general failure
Others: Reserved
07h bMaxDataInSize Read/ 1 40h Maximum data in size
Persistent
08h bMaxDataOutSize Read/ 1 40h Maximum data out size
Persistent
09h dDynCapNeeded Read only 4 00h Dynamic capacity needed
0Ah bRefClkFreq Read/ 1 01h Reference clock frequency value:
Persistent 00h: 19.2 MHz
01h: 26 MHz
02h: 38.4 MHz
03h: 52 MHz
Others: Reserved
0Bh bConfigDescrLock Read/ 1 00h Configuration descriptor lock:
Write once 00h: Configuration descriptor not locked
01h: Configuration descriptor locked
Others: Reserved
0Ch bMaxNumOfRTT Read/ 1 02h Maximum current number of outstanding RTTs in
Persistent device that is allowed.
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Size Default
IDN Name Type (Byte) Value Description
0Dh wExceptionEventCon- Read/Volatile 2 00h Exception event control:
trol Bit 0: DYNCAP_EVENT_EN
Bit 1: SYSPOOL_EVENT_EN
Bit 2: URGENT_BKOPS_EN
Bit 3–15: Reserved
0Eh wExceptionEventStatus Read only 2 00h Bit 0: DYNCAP_NEEDED
Bit 1: SYSPOOL_EXHAUSTED
Bit 2: URGENT_BKOPS
Bit 3–15: Reserved
0Fh dSecondsPassed Write only 4 00h Bits[31:0]: Seconds passed from TIME BASELINE
10h wContextConf Read/Volatile 2 00h INDEX specifies the LU number. SELECTOR specifies
the context ID within the LU. Valid values are 01h–
Fh
11h Obsolete – – – –
12h Reserved – – – Reserved for Unified Memory Extension standard
13h bHostActivateGCStatus – 1 00h HAGC
14h bDeviceFFUStatus Read only 1 00h Device FFU status:
00h: No information
01h: Successful microcode update
02h: Microcode corruption error
03h: Internal error
04h: Microcode version mismatch
05h–FEh: Reserved
FFh: General error
15h bPSAState Read/ 1 00h 00h: Off. PSA feature is off.
Persistent 01h: Pre-soldering. PSA feature is on, device is in the
pre-soldering state.
02h: Loading complete. PSA feature is on. The host
will set to this value after the host finished writing
data during pre-soldering state.
03h: Soldered. PSA feature is no longer available.
Set by the device to indicate it is in post-soldering
state. This attribute unchangeable after it is in sol-
dered state.
16h dPSADataSize Read/ 4 00h The amount of data that the host plans to load to
Persistent all logical units with bPSASensitive set to 1.
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Size Default
IDN Name Type (Byte) Value Description
17h bRefClkGatingWait- Read only 1 05h Minimum time for which the reference clock is re-
Time quired by device during transition to LS-MODE or
HIBERN8 state. The larger time requirement among
the transition to LS-MODE and HIBERN8 states
should be set for this attribute.
00h: Undefined
01h: 1 micro second
…
FFh: 255 micro seconds
18h bDeviceCaseRoughT- Read only 1 00h Device’s rough package case surface temperature.
emperature This value is valid when (TOO_HIGH_TEMPERATURE
is supported and TOO_HIGH_TEMP_EN is enabled)
or ( TOO_LOW_TEMPERATURE is supported and
TOO_LOW_TEMP_EN is enabled ).
0 : Unknown Temperature
1~250 : ( this value – 80 ) degrees in Celsius. (–79
ºC~170 ºC )
Others: Reserved
19h bDeviceTooHighTemp- Read only 1 BCh High temperature boundary from which
Boundary TOO_HIGH_TEMP in wExceptionEventStatus is
turned on.
0: Unknown
100~250: ( this value – 80 ) degrees in celcius. (20
ºC~170 ºC )
Others: Reserved
1Ah bDeviceTooLowTemp- Read only 1 2Bh Low temperature boundary from which
Boundary TOO_LOW_TEMP in wExceptionEventStatus is
turned on.
0: Unknown
1~80: ( this value – 80 ) degrees in celcius. (–79 ºC~0
ºC )
Others: Reserved
1Bh bTrottling_Status Read only 1 00h
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Size Default
IDN Name Type (Byte) Value Description
1Ch bWriteBoosterBuffer- Read only 1 00h Flush operation status of Write Booster Buffer
FlushStatus 00h: idle. Device is not flushing the Write Booster
Buffer; either the Write Booster Buffer is empty or a
flush has not been initiated
01h: Flush operation in progress. The Write Booster
Buffer is not yet empty and a flush has been initi-
ated
02h: Flush operation stopped prematurely. The
Write Booster Buffer is not empty and the host stop-
ped the in-progress flush
03h: Flush operation completed successfully
04h: Flush operation general failure
Others: Reserved
1Dh bAvailableWriteBoos- Read only 1 00h Available Write Booster Buffer Size
terBufferSize This available buffer size is decreased by Write Boos-
ter operation and increased by flush operation
Value expressed in unit of 10% granularity
00h: 0% buffer remains
01h: 10% buffer remains
02h~09h: 20%~90% buffer remains
0Ah: 100% buffer remains
Others: Reserved
1Eh bWriteBoosterBufferLi- Read only 1 00h This field provides an indication of the Write Boos-
feTimeEst ter Buffer lifetime based on the amount of per-
formed program/erase cycles. The detailed calcula-
tion method is vendor specific
00h: Information not available (Write Booster Buffer
is disabled)
01h: 0%–10% Write Booster Buffer life time used
02h: 10%–20% Write Booster Buffer life time used
03h: 20%–30% Write Booster Buffer life time used
04h: 30%–40% Write Booster Buffer life time used
05h: 40%–50% Write Booster Buffer life time used
06h: 50%–60% Write Booster Buffer life time used
07h: 60%–70% Write Booster Buffer life time used
08h: 70%–80% Write Booster Buffer life time used
09h: 80%–90% Write Booster Buffer life time used
0Ah: 90%–100% Write Booster Buffer life time used
0Bh: Exceeded its maximum estimated Write Boos-
ter Buffer life time (write commands are processed
as if Write Booster feature was disabled)
Others: Reserved
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Size Default
IDN Name Type (Byte) Value Description
1Fh dCurrentWriteBooster- Read only 4 00h The current Write Booster Buffer size
BufferSize Host can check the current Write Booster Buffer size
by checking this attribute. Value expressed in unit of
Allocation Units. If this value is 0, then the current
Write Booster Buffer size is 0
20h: Reserved – – – Reserved for Unified Memory Extension standard
2Bh
2Ch bRefreshStatus Read only 1 00h Refresh Operation Status
00h: Idle (refresh operation disabled)
01h: Refresh operation in progress
02h: Refresh operation stopped prematurely
03h: Refresh operation completed successfully
04h: Refresh operation failed due to logical unit
queue not empty
05h: Refresh operation general failure
Others: Reserved
2Dh bRefreshFreq Read/ 1 00h Refresh Frequency
Persistent Host should make sure that dRefreshTotalCount will
be incremented on this frequency
00h: Not defined
01h: 1 month
02h: 2 month
…
FFh: 255 month
2Eh bRefreshUnit Read/ 1 00h Refresh Operation Unit
Persistent This attribute may be set to adjust the minimum
physical block numbers to be refreshed upon a sin-
gle request
00h: Minimum refresh capability of Device
01h:100% (entire device)
Others: Reserved
2Fh bRefreshMethod Read/ 1 00h Refresh Method
Persistent This parameter specifies the refresh operation meth-
od
00h: Not defined
01h: Manual-Force
02h: Manual-Selective
Others: Reserved
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Page Subpage
Page Name Code Code Description
Control 0Ah 00h Return control mode page
Read-write error recovery 01h 00h Return read-write error recovery mode page
Caching 08h 00h Return caching mode page
All pages 3Fh 00h Return all mode pages (not including subpages)
All subpages 3Fh FFh Return all mode pages and subpages
Default
Offset Bit Field Value Description
00h 5:0 PAGE CODE 0Ah Indicates the format and parameters for particular mode page.
00h 6 SPF 0h Indicates SUBPAGE format.
00h 7 PS 01h Indicates the page parameters can be saved.
01h 7:0 PAGE LENGTH 0Ah Indicates the size in bytes of the following mode page parame-
ters.
02h 0 RLEC 0h Report log exception condition. Setting this bit to 0 specifies that
the device server shall not report log exception conditions.
02h 1 GLTSD 0h Global logging target save disable (GLTSD): Setting this bit to 0
specifies that the logical unit implicitly saves, at vendor specific in-
tervals, each log parameter in which the TSD bit is set to 0.
02h 2 D_SENSE 0h A descriptor format sense data (D_SENSE) bit set to 0 specifies that
the device server shall return fixed format sense data when re-
turning sense data in the same I_T_L_Q nexus transaction as the
status.
02h 3 DPICZ 0h A disable protection information check if protect field is 0 (DPICZ)
bit set to 0 indicates that checking of protection information bytes
is enabled.
02h 4 TMF_ONLY 0h The allow task management functions only (TMF_ONLY) bit set to
0 specifies that the device server shall process commands with the
auto contingent allegiance (ACA) task attribute received on the
faulted I_T nexus when an ACA condition has been established.
02h 7:5 TST 0h Indicates task set type (TST).
03h 0 Obsolete 0h Not available
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Default
Offset Bit Field Value Description
03h 2:1 QERR 0h The queue error management (QERR) field specifies how the de-
vice server shall handle other commands when one command is
terminated with check condition status. If an ACA condition is es-
tablished, the affected commands in the task set shall resume af-
ter the ACA condition is cleared. Otherwise, all commands other
than the command that received the check condition status shall
be processed as if no error occurred.
03h 3 NUAR 0h No unit attention on release (NUAR) bit set to 0 specifies that the
device server shall establish a unit attention condition.
03h 7:4 QUEUE ALGORITHM 01h A value of 1 in this field specifies that the device server may reor-
MODIFIER der the processing sequence of commands having the SIMPLE task
attribute in any manner.
04h 2:0 Obsolete 0h Not available
04h 3 SWP 0h A software write protect (SWP) bit (user configurable)
04h 5:4 UA_INTLCK_CTRL 0h The unit attention interlocks control (UA_INTLCK_CTRL) field set
to 00b specifies that the logical unit shall clear any unit attention
condition reported in the same I_T_L_Q nexus transaction as a
check condition status and shall not establish a unit attention con-
dition when a command is completed with busy, task set full, or
reservation conflict status.
04h 6 RAC 0h A report a check (RAC) bit set to 0 specifies that the device server
may return busy status regardless of the length of time the reason
for returning busy status may persist.
04h 7 VS 0h Not available
05h 2:0 AUTOLOAD MODE 0h This field specifies the action to be taken by a removable medium
device server when a medium is inserted. Setting it to 0 means
that medium shall be loaded for full access.
05h 3 Reserved – –
05h 4 RWWP 0h A reject write without protection (RWWP) bit set to 0 specifies
that WRITE commands without protection information shall be
processed.
05h 5 ATMPE 0h An application tag mode page enabled (ATMPE) bit set to 0 speci-
fies that the application tag mode page is disabled and the con-
tents of logical block application tags are not defined by this
standard.
05h 6 TAS 0h A task aborted status (TAS) bit set to 0 specifies that aborted com-
mands shall be terminated by the device server without any re-
sponse to the application client.
05h 7 ATO 0h An application tag owner (ATO) bit set to 0 specifies that the de-
vice server may modify the contents of the LOGICAL BLOCK APPLI-
CATION TAG field and, depending on the protection type, may
modify the contents of the LOGICAL BLOCK REFERENCE TAG field.
06h 15:0 Obsolete 0h Not available
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Default
Offset Bit Field Value Description
08h 15:0 BUSY TIMEOUT PERIOD 01h Busy timeout period:
0001h = 100ms
0Ah 15:0 EXTENDED SELF-TEST 0h This field contains advisory data that is the time in seconds that
COMPLETION TIME the device server requires to complete an extended self-test when
the device server is not interrupted by subsequent commands and
no errors occur during processing of the self-test.
Default
Offset Bit Field Value Description
00h 5:0 PAGE CODE 01h Indicates the format and parameters for particular mode page.
00h 6 SPF 0h Indicates SUBPAGE format.
00h 7 PS 01h Indicates the page parameters can be saved.
01h 7:0 PAGE LENGTH 0Ah Indicates the size in bytes of the following mode page parame-
ters.
02h 0 DCR 0h A disable correction (DCR) bit set to 0 allows the use of additional
information (for example, ECC bytes) for data error recovery. If the
EER bit is set to 1, the DCR bit shall be set to 0.
02h 1 DTE 0h A data terminate on error (DTE) bit set to 0 specifies that the de-
vice server shall not terminate the data-in or data-out buffer
transfer of a command performing a READ or WRITE operation
upon detection of a recovered error.
02h 2 PER 0h A post error (PER) bit set to 0 specifies that if a recovered read er-
ror occurs during a command performing a READ or WRITE opera-
tion, then the device server shall perform error recovery proce-
dures within the limits established by the error recovery parame-
ters and only terminate the command with check condition status
if the error becomes uncorrectable based on the established limits.
If the DTE bit is set to 1, then the PER bit shall be set to 1.
02h 3 EER 0h An enable early recovery (EER) bit set to 0 specifies that the device
server shall use an error recovery procedure that minimizes the
risk of error mis-detection or mis-correction.
02h 4 RC 0h A read continuous (RC) bit set to 0 specifies that ERROR RECOV-
ERY operations that cause delays during the data transfer are ac-
ceptable. Data shall not be fabricated.
02h 5 TB 0h A transfer block (TB) bit set to 0 specifies that if an unrecovered
read error occurs during a READ operation, then the device server
shall not transfer any data for the logical block to the data-in buf-
fer.
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Default
Offset Bit Field Value Description
02h 6 ARRE 0h An automatic read reassignment enabled (ARRE) bit set to 0 speci-
fies that the device server shall not perform automatic reassign-
ment of defective logical blocks during READ operations.
02h 7 AWRE 01h An automatic write reassignment enabled (AWRE) bit set to 1
specifies that the device server shall enable automatic reassign-
ment of defective logical blocks during WRITE operations.
03h 7:0 READ RETRY COUNT 01h This field (user configurable) specifies the number of times that
the device server shall attempt its recovery algorithm during READ
operations.
04h 7:0 Obsolete 0h Not available
05h 7:0 Obsolete 0h Not available
06h 7:0 Obsolete 0h Not available
07h 1:0 Restricted for MMC-6 0h Not available
07h 6:2 Reserved – –
07h 7 TPERE 0h Not available
08h 7:0 WRITE RETRY COUNT 00h This field (user configurable) specifies the number of times that
the device server shall attempt its recovery algorithm during
WRITE operations.
09h 7:0 Reserved – –
0Ah 15:0 RECOVERY TIME LIMIT 4B0h This field (user configurable) specifies in milliseconds the maxi-
mum time duration that the device server shall use for data error
recovery procedures. When both a retry count and a recovery time
limit are specified, the field that specifies the recovery action of
least duration shall have priority.
Default
Offset Bit Field Value Description
00h 5:0 PAGE CODE 08h Indicates the format and parameters for particular mode page.
00h 6 SPF 0h Indicates SUBPAGE format.
00h 7 PS 01h Indicates the page parameters can be saved.
01h 7:0 PAGE LENGTH 12h Indicates the size in bytes of the following mode page parame-
ters.
02h 0 RCD 0h A read cache disable (RCD) bit (user configurable) set to 0 specifies
that the device server may return data requested by a READ com-
mand by accessing either the cache or medium. A RCD bit set to 1
specifies that the device server shall transfer all of the data re-
quested by a READ command from the medium (for example, da-
ta shall not be transferred from the cache).
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Default
Offset Bit Field Value Description
02h 1 MF 0h A multiplication factor (MF) bit set to 0 specifies that the device
server shall interpret the MINIMUM PREFETCH field and the MAXI-
MUM PREFETCH field in terms of the number of logical blocks for
each of the respective types of prefetch.
02h 2 WCE 01h A write back cache enable (WCE) bit (user configurable) set to 0
specifies that the device server shall complete a WRITE command
with good status only after writing all of the data to the medium
without error. A WCE bit set to 1 specifies that the device server
may complete a WRITE command with good status after receiving
the data without error and prior to having written the data to the
medium.
02h 3 SIZE 0h A size enable (SIZE) bit set to 0 specifies that the NUMBER OF
CACHE SEGMENTS field is used to control caching segmentation.
Simultaneous use of both the number of segments and the seg-
ment size is vendor specific.
02h 4 DISC 0h A discontinuity (DISC) bit set to 0 specifies that prefetches be trun-
cated or wrapped at time discontinuities.
02h 5 CAP 0h A caching analysis permitted (CAP) bit set to 0 specifies that cach-
ing analysis is disabled (for example, to reduce overhead time or
to prevent non-pertinent operations from impacting tuning val-
ues).
02h 6 ABPF 0h An abort prefetch (ABPF) bit set to 0 when the DRA bit set to 0
specifies that the termination of any active prefetch is dependent
upon caching mode page bytes 4 through 11 and is vendor specif-
ic.
02h 7 IC 0h An initiator control (IC) enable bit set to 0 specifies that the device
server uses its own adaptive caching algorithm.
03h 3:0 WRITE RETENTION PRIOR- 0h This field set to 0h means that the device server should not distin-
ITY guish between retaining the indicated data and data placed into
the cache by other means (for example, prefetch).
03h 7:4 DEMAND READ RETEN- 0h This field set to 0 means that the device server should not distin-
TION PRIORITY guish between retaining the indicated data and data placed into
the cache by other means (for example, prefetch).
04h 15:0 DISABLE PREFETCH 0h This field specifies the selective disabling of anticipatory prefetch
TRANSFER LENGTH on long transfer lengths. If this field is set to 0, then all anticipato-
ry prefetching is disabled for any request for data, including those
with a transfer length of 0.
06h 15:0 MINIMUM PREFETCH 0h This field specifies the number of logical blocks to prefetch re-
gardless of the delays it might cause in processing subsequent
commands. If MF bit is set to 0, this field contains the number of
logical blocks.
08h 15:0 MAXIMUM PREFETCH 0h This field specifies the number of logical blocks to prefetch if the
prefetch does not delay processing of subsequent commands. If
MF bit is set to 0, this field contains the number of logical blocks.
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Default
Offset Bit Field Value Description
0Ah 15:0 MAXIMUM PREFETCH 0h This field specifies an upper limit on the number of logical blocks
CEILING computed as the maximum prefetch. If this number of logical
blocks is greater than the value in the MAXIMUM PREFETCH field,
then the number of logical blocks to prefetch shall be truncated
to the value stored in this field.
0Ch 0 NV_DIS 0h An NV_DIS bit set to 0 specifies that the device server may use a
nonvolatile cache and indicates that a nonvolatile cache may be
present and enabled.
0Ch 2:1 Reserved – –
0Ch 4:3 Vendor specific 0h Vendor specific
0Ch 5 DRA 0h A disable read-ahead (DRA) bit set to 0 specifies that the device
server may continue to read logical blocks into the prefetch buffer
beyond the addressed logical block(s).
0Ch 6 LBCSS 0h A logical block cache segment size (LBCSS) bit set to 0 specifies
that the CACHE SEGMENT SIZE field units shall be interpreted as
bytes. The LBCSS shall not impact the units of other fields.
0Ch 7 FSW 0h A force sequential write (FSW) bit set to 0 specifies that the device
server may reorder the sequence of writing logical blocks (for ex-
ample, in order to achieve faster command completion).
0Dh 7:0 NUMBER OF CACHE SEG- 0h This field specifies the number of segments into which the device
MENTS server shall divide the cache.
0Eh 15:0 CACHE SEGMENT SIZE 0h This field specifies the segment size in bytes if the LBCSS bit is set
to 0 or in logical blocks if the LBCSS bit is set to 1. This field is valid
only when the SIZE bit is set to 1.
10h 7:0 Reserved – –
11h 15:0 Obsolete 0h Not available
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Default
Offset Bit Field Value Description
00h 4:0 PERIPHERAL DEVICE TYPE 1Eh This bit set to 1 means device server is a direct access block device.
1Eh: Well-known logical unit
00h 7:5 PERIPHERAL QUALIFIER 0h A peripheral device having the specified peripheral device type is
connected to this logical unit. If the device server is unable to de-
termine whether or not a peripheral device is connected, it also
shall use this peripheral qualifier. This peripheral qualifier does
not mean that the peripheral device connected to the logical unit
is ready for access.
01h 7:0 PAGE CODE 0h This field identifies the VPD page and contains the same value as
in this field in the INQUIRY CDB.
02h 15:0 PAGE LENGTH 08h This field indicates the length in bytes of the VPD parameters that
follow this field.
04h 7:0 Supported VPD Page 0h The supported VPD page list contains a list of all VPD page codes
List[0] implemented by the logical unit in ascending order beginning
with page code 00h:
SUPPORTED_VPD_PAGE
05h 7:0 Supported VPD Page 80h UNIT_SERIAL_NUM
List[1]
06h 7:0 Supported VPD Page 83h DEVICE_ID
List[2]
07h 7:0 Supported VPD Page 86h EXTENDED INQUIRY VPD
List[3]
08h 7:0 Supported VPD Page 87h MODE_PAGE_POLICY
List[4]
09h 7:0 Supported VPD Page B0h BLOCK_LIMITS
List[5]
0Ah 7:0 Supported VPD Page B1h BLOCK_DEVICE_CHARACTERISTICS
List[6]
0Bh 7:0 Supported VPD Page B2h LOGICAL_BLOCK_PROVISIONING
List[7]
Default
Offset Bit Field Value Description
00h 4:0 PERIPHERAL DEVICE TYPE 1Eh This bit set to 1 means device server is a direct access block device.
1Eh: Well-known logical unit
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Default
Offset Bit Field Value Description
00h 7:5 PERIPHERAL QUALIFIER 0h A peripheral device having the specified peripheral device type is
connected to this logical unit. If the device server is unable to de-
termine whether or not a peripheral device is connected, it also
shall use this peripheral qualifier. This peripheral qualifier does
not mean that the peripheral device connected to the logical unit
is ready for access.
01h 7:0 PAGE CODE 80h This field identifies the VPD page and contains the same value as
in this field in the INQUIRY CDB.
02h 15:0 PAGE LENGTH 4h This field indicates the length in bytes of the VPD parameters that
follow this field.
04h 7:0 PRODUCT SERIAL NUM- – This field contains right-aligned ASCII data that is vendor-assigned
BER serial number.
Default
Offset Bit Field Value Description
00h 4:0 PERIPHERAL DEVICE TYPE 1Eh This bit set to 1 means device server is a direct access block device.
1Eh: Well-known logical unit
00h 7:5 PERIPHERAL QUALIFIER 0h A peripheral device having the specified peripheral device type is
connected to this logical unit. If the device server is unable to de-
termine whether or not a peripheral device is connected, it also
shall use this peripheral qualifier. This peripheral qualifier does
not mean that the peripheral device connected to the logical unit
is ready for access.
01h 7:0 PAGE CODE 83h This field identifies the VPD page and contains the same value as
in this field in the INQUIRY CDB.
02h 15:0 PAGE LENGTH Ch This field indicates the length in bytes of the VPD parameters that
follow this field.
04h 4:0 CODE SET 2h This field contains a code set enumeration that indicates the for-
mat of the DESIGNATOR field.
04h 7:5 PROTOCOL IDENTIFIER 0h This field may indicate the SCSI transport protocol to which the
designation descriptor applies.
05h 3:0 DESIGNATOR TYPE 1h This field indicates the format and assignment authority for the
designator.
05h 5:4 ASSOCIATION 0h This field indicates the entity with which the DESIGNATOR field is
associated. If a logical unit returns a designation descriptor with
this field set to 00b or 10b, it shall return the same descriptor
when it is accessed through any other I_T nexus.
05h 6 Reserved – –
05h 7 PIV 0h A protocol identifier valid (PIV) bit set to 0 indicates the PROTO-
COL IDENTIFIER field contents are reserved.
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Default
Offset Bit Field Value Description
06h 7:0 Reserved – –
07h 7:0 DESIGNATOR LENGTH 8h This field indicates the length in bytes of the DESIGNATOR field.
08h 23:0 IEEE COMPANY ID – –
0Bh 39:0 VENDOR SPECIFIC EXTEN- –
–
SION IDENTIFIER
Default
Offset Bit Field Value Description
00h 4:0 PERIPHERAL DEVICE TYPE 1Eh This bit set to 1 means device server is a direct access block device.
1Eh: Well-known logical unit
00h 7:5 PERIPHERAL QUALIFIER 0h A peripheral device having the specified peripheral device type is
connected to this logical unit. If the device server is unable to de-
termine whether or not a peripheral device is connected, it also
shall use this peripheral qualifier. This peripheral qualifier does not
mean that the peripheral device connected to the logical unit is
ready for access.
01h 7:0 PAGE CODE 87h This field identifies the VPD page and contains the same value as
in this field in the INQUIRY CDB.
02h 15:0 PAGE LENGTH Ch This field indicates the length in bytes of the VPD parameters that
follow this field.
Mode page policy descriptor [0] Contains information describing the mode page policy for read-
04h 5:0 Policy page code 1h write error recovery mode page.
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Default
Offset Bit Field Value Description
Mode page policy descriptor [2] Contains information describing the mode page policy for control
0Ch 5:0 Policy page code Ah mode page.
Default
Offset Bit Field Value Description
00h 4:0 PERIPHERAL DEVICE TYPE 1Eh This bit set to 1 means device server is a direct access block de-
vice.
1Eh: Well-known logical unit
00h 7:5 PERIPHERAL QUALIFIER 0h A peripheral device having the specified peripheral device type
is connected to this logical unit. If the device server is unable to
determine whether or not a peripheral device is connected, it
also shall use this peripheral qualifier. This peripheral qualifier
does not mean that the peripheral device connected to the
logical unit is ready for access.
01h 7:0 PAGE CODE B0h This field identifies the VPD page and contains the same value
as in this field in the INQUIRY CDB.
02h 15:0 PAGE LENGTH 3Ch This field indicates the length in bytes of the VPD parameters
that follow this field.
04h 7:0 Reserved – –
05h 7:0 MAXIMUM COMPARE 0h This field is set to 0, if the device server does not support this
AND WRITE LENGTH command.
06h 15:0 OPTIMAL TRANSFER 10h This field indicates the optimal transfer length granularity in
LENGTH GRANULARITY blocks for a single ORWRITE command, PREFETCH command,
READ command, VERIFY command, WRITE command, WRITE
AND VERIFY command, XDREAD command, XDWRITE com-
mand, XDWRITEREAD command, or XPWRITE command.
08h 31:0 MAXIMUM TRANSFER 0h This field indicates the maximum transfer length in blocks that
LENGTH the device server accepts for a single ORWRITE command,
READ command, VERIFY command, WRITE command, WRITE
AND VERIFY command, XDWRITEREAD command, or XPWRITE
command.
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Default
Offset Bit Field Value Description
0Ch 31:0 OPTIMAL TRANSFER 10h This field indicates the optimal transfer length in blocks for a
LENGTH single ORWRITE command, PREFETCH command, READ com-
mand, VERIFY command, WRITE command, WRITE AND VERIFY
command, XDREAD command, XDWRITE command, XDWRITE-
READ command, or XPWRITE command.
10h 31:0 MAXIMUM PREFETCH 100h This field indicates:
XDREAD XDWRITE a) the maximum transfer length in blocks that the device server
TRANSFER LENGTH accepts for a single PREFETCH command
b) if the XOR control mode page is implemented, then the
maximum value supported by the MAXIMUM XOR WRITE SIZE
field in the XOR control mode page.
c) if the XOR control mode page is not implemented, then the
maximum transfer length in blocks that the device server ac-
cepts for a single XDWRITE command or XDREAD command.
The device server should set this field to less than or equal to
the MAXIMUM TRANSFER LENGTH field.
14h 31:0 MAXIMUM UNMAP LBA FFFFFFFFh This field indicates the maximum number of LBAs that may be
COUNT unmapped by an UNMAP command.
If the number of LBAs that may be unmapped by an UNMAP
command is constrained only by the amount of data that may
be contained in the UNMAP parameter list, then the device
server shall set this field to FFFF_FFFFh.
If the device server implements the UNMAP command, then
the value in this field shall be greater than or equal to 1.
18h 31:0 MAXIMUM UNMAP 10h This field indicates the maximum number of unmap block de-
BLOCK DESCRIPTOR scriptors that shall be contained in the parameter data trans-
COUNT ferred to the device server for an UNMAP command.
If there is no limit on the number of unmap block descriptors
contained in the parameter data, then the device server shall
set this field to FFFF_FFFFh.
If the device server implements the UNMAP command, then
the value in this field shall be greater than or equal to 1.
1Ch 31:0 OPTIMAL UNMAP GRAN- 1h This field indicates the optimal granularity in logical blocks for
ULARITY unmap requests. An unmap request with a number of logical
blocks that is not a multiple of this value may result in UNMAP
operations on fewer LBAs than requested.
If this field is set to 0000_0000h, then the optimal unmap gran-
ularity is not specified.
20h 30:0 UNMAP GRANULARITY 0h This field indicates the LBA of the first logical block to which
ALIGNMENT the OPTIMAL UNMAP GRANULARITY field applies.
The unmap granularity alignment is used to calculate an opti-
mal unmap request starting LBA as follows:
Optimal unmap request starting LBA = (n × OPTIMAL UNMAP
GRANULARITY) + UNMAP GRANULARITY ALIGNMENT
Where n is 0 or any positive integer value.
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Default
Offset Bit Field Value Description
20h 31 UGAVALID 0h An unmap granularity alignment valid (UGAVALID) bit set to 0
indicates that the UNMAP GRANULARITY ALIGNMENT field is
not valid.
Default
Offset Bit Field Value Description
00h 4:0 PERIPHERAL DEVICE TYPE 1Eh This bit set to 1 means device server is a direct access block device.
1Eh: Well-known logical unit
00h 7:5 PERIPHERAL QUALIFIER 000h A peripheral device having the specified peripheral device type is
connected to this logical unit. If the device server is unable to de-
termine whether or not a peripheral device is connected, it also
shall use this peripheral qualifier. This peripheral qualifier does
not mean that the peripheral device connected to the logical unit
is ready for access.
01h 7:0 PAGE CODE B1h This fields identifies the VPD page and contains the same value as
in the PAGE CODE field in the INQUIRY CDB.
02h 15:0 PAGE LENGTH 3Ch This field indicates the length in bytes of the VPD parameters that
follow this field.
04h 15:0 MEDIUM ROTATION RATE 0001h 0001h means device is a non-rotating medium (for example, solid
state).
06h 7:0 Reserved – –
07h 3:0 NOMINAL FORM FACTOR 05h This field indicates the nominal form factor of the device contain-
ing the logical unit.
07h 7:4 Reserved – –
Default
Offset Bit Field Value Description
00h 4:0 PERIPHERAL DEVICE TYPE 1Eh This bit set to 1 means device server is a direct access block device.
1Eh: Well known logical unit
00h 7:5 PERIPHERAL QUALIFIER 000h A peripheral device having the specified peripheral device type is
connected to this logical unit. If the device server is unable to de-
termine whether or not a peripheral device is connected, it also
shall use this peripheral qualifier. This peripheral qualifier does
not mean that the peripheral device connected to the logical unit
is ready for access.
01h 7:0 PAGE CODE B2h This fields identifies the VPD page and contains the same value as
in the PAGE CODE field in the INQUIRY CDB.
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Default
Offset Bit Field Value Description
02h 15:0 PAGE LENGTH 04h This field indicates the length in bytes of the VPD parameters that
follow this field.
04h 7:0 THRESHOLD EXPONENT 16h This field indicates the threshold set size in LBAs as a power of 2.
05h 0 DP 00h A descriptor present (DP) bit set to 0 indicates that a PROVISION-
ING GROUP DESCRIPTOR is not present.
05h 1 ANC_SUP 00h This bit set to 0 indicates that the device server does not support
anchored LBAs.
05h 5:2 Reserved – –
05h 6 TBPWS 00h This bit set to 0 indicates that the device server does not support
the use of the WRITE SAME (16) command to unmap LBAs.
05h 7 TPU 01h This bit set to 1 indicates that the device server supports the UN-
MAP command.
06h 7:0 Reserved – –
07h 7:0 Reserved – –
When the EVPD bit is set to 0 and page code = 0, the standard INQUIRY DATA is respon-
ded to INQUIRY command. The standard INQUIRY DATA format is shown in the follow-
ing table:
Default
Offset Bit Field Value Description
00h 4:0 PERIPHERAL DEVICE TYPE 1Eh This bit set to 1 means device server is a direct access block device.
1Eh: Well known logical unit
00h 7:5 PERIPHERAL QUALIFIER 0h A peripheral device having the specified peripheral device type is
connected to this logical unit. If the device server is unable to de-
termine whether or not a peripheral device is connected, it also
shall use this peripheral qualifier. This peripheral qualifier does
not mean that the peripheral device connected to the logical unit
is ready for access.
01h 6:0 Reserved – –
01h 7 RMB 0h A removable medium (RMB) bit set to 0 indicates that the medium
is not removable.
02h 7:0 VERSION 6h This field indicates the implemented version of this standard. This
field set to 06h means the conformance to SPC.
03h 3:0 RESPONSE DATA FORMAT 2h This field value of two indicates that the data shall be in the for-
mat defined in SPC.
03h 7:4 NA1 0h Not available in UFS standard
04h 7:0 ADDITIONAL LENGTH 1Fh This field indicates the length in bytes of the remaining standard
INQUIRY data.
05h 7:0 NA2 0h Not available in UFS standard
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Default
Offset Bit Field Value Description
06h 7:0 NA3 0h Not available in UFS standard
07h 0 NA4 0h Not available in UFS standard
07h 1 CMDQUE 1h This bit is set to 1 indicating that the logical unit supports the
command management model (SAM).
07h 7:2 NA5 0h Not available in UFS standard
08h 15:0 VENDOR IDENTIFICATION This field contains left-aligned ASCII data identifying the vendor
–
of the product.
10h 15:0 PRODUCT IDENTIFICA- This field contains left-aligned ASCII data defined by the vendor.
–
TION
20h 15:0 PRODUCT REVISION LEV- This field contains left-aligned ASCII data defined by the vendor.
–
EL
Default
Offset Bit Field Value Description
00h 4:0 PERIPHERAL DEVICE TYPE 1Eh This bit set to 1 means device server is a direct access block device.
1Eh: Well-known logical unit
00h 7:5 PERIPHERAL QUALIFIER 0h A peripheral device having the specified peripheral device type is
connected to this logical unit. If the device server is unable to de-
termine whether or not a peripheral device is connected, it also
shall use this peripheral qualifier. This peripheral qualifier does
not mean that the peripheral device connected to the logical unit
is ready for access.
01h 7:0 PAGE CODE 86h This field identifies the VPD page.
02h 15:0 PAGE LENGTH 3Ch The PAGE LENGTH field specifies the length of the VPD page data.
04h 7:6 ACTIVATE MICROCODE B0h This field indicates how a device server activates microcode and
establishes a unit attention condition when a WRITE BUFFER com-
mand with the download microcode mode set to 05h or 07h is
processed.
04h 5:0 Reserved - -
05h 7:6 Reserved - -
05h 5:0 FEATURES SUPPORT 37h These fields indicate if some specific functions are supported by
the device.
06h 7:1 Reserved - -
06h 0 V_SUP 1h This bit is set to 1 when the device server supports a volatile cache
and the applicable command standard defines features using this
cache.
07h 7:5 Reserved - -
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Default
Offset Bit Field Value Description
07h 4 P_I_I_SUP 0h This bit is set to 0, indicating that the logical unit does not support
protection information intervals.
07h 3:0 Reserved - -
08h 7:5 Reserved – -
08h 4 R_SUP This bit is set to 0, indicating that the device server does not sup-
0h
port referrals.
08h 3:0 Reserved - -
09h 7:4 Reserved - -
09h 3:0 MULTI I_T NEXUS MICRO- This field indicates how the device server handles concurrent at-
CODE DOWNLOAD 5h tempts to download microcode using the WRITE BUFFER com-
mand from multiple I_T nexuses.
10h 15:0 EXTENDED SELF_TEST A value of 0h indicates that the EXTENDED SELF-TEST COMPLE-
0h
COMPLETION MINUTES TION MINUTES field is not supported.
12h 7:0 Reserved – -
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Electrical Specifications
According to JEDEC UFS v3.1 specification, power-up timing starts when the supply
voltage crosses 300mV and ends when it reaches the minimum operating value. Micron
device only supports V CC and V CCQ. V CCQ2 is not used.
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Micron Confidential and Proprietary Advance
Revision History
Rev. B – 05/2020
• Removed 512GB
• Updated UFS Performance section
• Updated PHY M-RX Capability Attributes
• Updated Descriptors
• Added Extended Inquiry Data
• Updated Features section
• Updated current consumption
• Updated notes in Package Dimensions section
Rev. A – 03/2020
• Initial release
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