WSEAS TRANSACTIONS on ELECTRONICS Sudhanshu Maheshwari

High performance voltage – mode multifunction filter

with minimum component count
SUDHANSHU MAHESHWARI
Department of Electronics Engineering,
Z. H. College of Engineering and Technology,
AMU, Aligarh 202 002, INDIA.
E-mail: maheshwarispm@rediffmail.com

Abstract: This paper presents a new second order multifunction filter using one active element, requiring only
‘twelve’ CMOS transistors, and four passive elements. The proposed circuit realizes voltage-mode low-pass,
high-pass and band-pass functions with the advantages of minimum component count structure, high Q
possibility, and high frequency potential. The proposed circuit is verified through PSPICE simulation results

Keywords: Analog filtering, multifunction filters, low cost, differential voltage current conveyor

1 Introduction simpler realization than the one (FDCCII) used in

A number of filtering applications are now being the available circuit [3]. The simplicity refers to the
handled with DSP techniques and digital filters, but number of transistors used in implementation. The
there are still numerous situations where analog circuit of ref. [3] is a single input multi output with
continuous time filters are either a necessity or high input impedance and grounded components,
provide a more economical solution. Among these unlike the other category of multi input single
are the interface circuits which connect the real output circuits [2,4,5]. The proposed circuit falls in
world analog signals to the digital signal processor the latter category of the available works [2, 4, 5],
and provide band-limiting before the signals can be but with the distinct advantage of using a minimum
sampled for further processing with digital component count. PSPICE simulation results using
techniques, and reconstruction back to the analog 0.5µ CMOS parameters are given to support the new
world. Similarly, filtering requirements at very high proposed circuit.
frequencies require analog techniques where digital
circuitry is not realistic and economical [1]. Over
last two decades, current-mode active elements have 2 Proposed Circuit
become very useful for analog filtering applications 2.1 Circuit description
due to their wide bandwidths, high slew rates and
low power consumption. Several such active The differential voltage current conveyor (DVCC) is
elements have evolved namely, current conveyors, a special type of second-generation current
current feedback amplifiers, current differencing conveyor with differential input capability at Y
buffered amplifier, current differencing terminal. A DVCC with only Z+ stage is
transconductance amplifier, differential voltage characterized by the following relationship.
current conveyors and many more [2-10].
Multifunction filters with capability of providing VY1-VY2 = VX; IY1=IY2 = 0; IZ = IX. (1)
different filter responses are useful because of their
versatility. As far as the topic of this paper is The CMOS implementation is shown in Figure 1.
concerned, the multifunction filters based on a DVCC has recently become popular due to the
single active element are of interest. Such voltage- differential input handling capability unlike the
mode filters using different active elements have CCII [8]. Thereafter many applications of this active
been reported in the literature [2-5]. The circuits element were reported [9-11]. However, a voltage-
presented in ref. [2, 4, 5] require more than four mode second order multifunction filter employing a
passive components, whereas, the circuit of ref. [3] single DVCC has not been attempted in wealth of
is a minimum component count work. recent literature yet [12-15]. The new proposed
This paper proposes new multifunction filter multifunction filter circuit is shown in Figure 2. The
with minimum component count (four passive and circuit uses only Z+ stage thus resulting in a very
one active), but the active element used (DVCC) has simple configuration, requiring only ‘twelve’

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 WSEAS TRANSACTIONS on ELECTRONICS Sudhanshu Maheshwari

transistors for the active element. The circuit matching is not a restriction in that case. Similarly,
analysis using eqn. (1) yields the following output for low-pass function, equal resistor design is
voltage expression: required for realization. In this case Q becomes:

V2 V V V1 C1C2
s2V2 + s( + 1 − 3 )+ Q= . (5)
Vo =
R1C1 R2C2 R1C2 R1R2C1C2 (2) (C2 − C1 )
1 1 2 1
s2 + s( + − )+
R1C1 R2C2 R1C2 R1R2C1C2 VDD

Equation (2) suggests that the circuit of Figure 2

realize following filter functions with input and
M5 M6
component conditions:
M7 M8

(i) V3=Vin; V1=V2=0: BP

(ii) V3=V2=Vin; V1=0; C1=C2 : HP M1
M2 M4
(iii) V3=V1=Vin; V2=0; R1=R2: LP Y2 Y1 M3 X
Z+
Thus the three basic filtering functions are realized.
The LP and HP function realization require
matching conditions in form of equal resistors and M10 M11 M12
M9
capacitors respectively. The filter parameters, VBB
namely pole-frequency, quality factor are as
follows:
VSS
1 R1 R2 C1C2
ωo = ; Q=
R1 R2 C1C2 R1C1 + R2 ( C2 − 2C1 ) Fig. 1: DVCC implementation.
(3)
Vo
It is to be noted that the new circuit is a unique
Y2 Y1
addition to the literature as a low cost versatile filter. DVCC
As far as the realization of other two second order
functions is concerned, it should not be seen as a X Z+
drawback keeping in view the simplicity of the new
circuit. Next, it may be argued that the circuit lacks C1
the ideal high input impedance [10-14]. It is a well C2 R2
known fact that, with a three input single output R1
system, using a simple (and single) active element
along with four components, fulfilling this
requirement is not possible. Similar arguments hold
V2 V1 V3
true for the use or otherwise of grounded
components. Fig. 2: Proposed multifunction filter.

2.2 Circuit Design Equation (5) imply that Q>1 is possible with proper
The circuit can be designed for a desired Q (even, design. Next, the filter gains are analyzed from eqn.
Q>1). For example, the realization of high-pass (2) and found as:
function requires equal capacitor design, in which
case Q becomes: HLP=HHP=1;HBP=-R2/(R1-R2) (6)

R1 R2 For band-pass response, the above gain is for equal

Q= (4) capacitor design.
( R1 − R2 )
2.3 Sensitivity analysis
Equation (4) suggests that Q> 1 is quite possible Sensitivity figures of the filter parameters (eqn. 3)
with proper design. This design is also suited for for the proposed circuit are next analyzed. Pole-
realizing band-pass function, though capacitive frequency sensitivity is found to be 0.5 for all

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 WSEAS TRANSACTIONS on ELECTRONICS Sudhanshu Maheshwari

elements. Pole-Q sensitivity for resistive and and R2=20KΩ so as to result in the pole-frequency
capacitive elements is respectively found as: as 5.6MHz and pole-Q as 1.4. The gain plots for
band-pass and high pass functions are shown in
R1C1 − R2 (C 2 − 2C1 ) Figure 3 and 4 respectively. The pole-frequency as
S RQ2 = − S RQ1 = (7)
2[ R1C1 + R2 (C 2 − 2C1 )] obtained from figures 3 and 4 is found as 5.6MHz
and pole-Q is 1.4, which very well match with the
designed values. Input/Output wave-shapes for
R1C1 − R2 (C 2 + 2C1 )
S CQ2 = − S CQ1 = (8) band-pass filter function are also given in Figure 5
2[ R1C1 + R2 (C 2 − 2C1 )] at the centre frequency of 5.6MHz. The THD at the
output is 1.2%. Good results were obtained even for
For equal capacitor design, the sensitivity of pole-Q higher amplitudes of signal. As far as the sensitivity
to resistive elements becomes: of pole-Q for high-pass and band-pass design is
concerned, it is 0.4 for capacitive elements and 1.4
R1 + R2 (same as Q) for resistive elements.
S RQ2 = − S RQ1 = (9)
2( R1 − R2 ) 40

R1 − 3R2
S CQ2 = − S CQ1 = (10)
2( R1 − R2 ) 0

Thus the above eqns. (9-10) apply to the high-pass -40

and band-pass design; though capacitive matching is
not a condition for band-pass design. Further, it is
emphasized that the sensitivity (in eqns. 9-10) can -80
never become infinite, as the resistors cannot be 1.0KHz 10KHz 100KHz 1.0MHz 10MHz 100MHz 1.0GHz
taken equal for a practical high-pass circuit design VDB(4)
Frequency
(please refer eqn. 4). Next, for the equal resistor
design, the sensitivity figures become: Fig. 3: Gain plot for band-pass filter.

3C1 − C 2 100
S RQ2 = − S RQ1 = (11)
2(C 2 − C1 )

(C + C1 )
0
S Q
= −S Q
=− 2 (12)
2(C 2 − C1 )
C2 C1

-100
The above eqns. (11-12) apply to the low-pass
design which requires resistive matching. Again, the
eqns. (11-12) does not imply infinite sensitivity as
the capacitors cannot be equal for low-pass design -200
1.0KHz 10KHz 100KHz 1.0MHz 10MHz 100MHz 1.0GHz
(please refer eqn. 5). The numerical values of the VDB(4)
sensitivities for the design used for presentation of Frequency
results shall be given in the following section. Fig. 4: Gain plot for high-pass filter.

3 Simulation Results 3.2 Low-pass

3.1 Band-pass and high-pass Next the circuit was designed for low-pass function
The proposed circuit is simulated using the CMOS with R1=R2=20KΩ and C1=1pF, and C2=2pF. The
implementation of Fig. 1 and device parameters as designed pole-frequency was 5.6 MHz and pole-Q
also listed in Table 1 and 2. The same has been as 1.4. The simulated results for low-pass function
successfully employed in many of the recently are given in Figure 6, with the pole-frequency and
reported works based on DVCC applications [9-11]. pole-Q same as the designed values. The
The supply voltage used is ±2.5V. The circuit was input/output waveforms for low-pass filter at 5MHz
designed with C1=C2=1pF for high-pass and band- are also shown in Figure 7. The THD at the output is
pass responses. The resistors used were R1=41.6KΩ 1.1%. The sensitivity of pole-Q for the design is 0.5

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 WSEAS TRANSACTIONS on ELECTRONICS Sudhanshu Maheshwari

for resistive elements and 1.5 for capacitive A current conveyor is characterized by non-unity
elements. transfer gains that depend on the technology and the
device dimensions. A DVCC with only Z+ output
4 Practical considerations (as the proposed circuit does not use Z- output) can
also be defined taking into account this practical
4.1 DVCC non-idealities Having presented the
aspect:
new multifunction filter circuit along with its well
convincing results, a more realistic viewpoint is
β1VY1- β2VY2 = VX; IY1=IY2 = 0; IZ = αIX (9)
taken into consideration by redefining a practical
DVCC.
20mV Here, β1 and β2 are the voltage transfer gains from
Y1 and Y2 terminal respectively to the X terminal
and α is the current transfer gain from X terminal to
0V
the Z+ terminal. The above transfer gains deviates
unity by the voltage and current transfer errors,
which are quite small and technology dependent.
-20mV

20mV
V(6) Moreover, the transfer gains, instead of being real,
are actually frequency dependent with an upper
bound on the usable frequency. For DVCC, these
0V gains remain unity till 10’s of MHz. Thus good
results are obtained at the frequency of 5.6MHz as
SEL>>
already evident in the previous section. A re-
-20mV
0s 100ns 200ns 300ns 400ns 500ns 600ns 700ns 800ns analysis of the proposed circuit results in modified
V(3)
Time output voltage expression, and the filter parameters
Fig. 5: Input/Output band-pass waveforms at as
5.6MHz.
α αR1 R2 C1C2
ωo = ; Q=
50 R1 R2 C1C2 αR1C1 + R2 [C2 − (1 + β 2 ) C1 ] (10)

Slight deviations are expected in the results due to

the appearance of non-ideality terms in the above
eqn. However, these deviations are negligible as
0 also evident from the simulated results. In fact the
results obtained do not reflect any deviation. The
deviation, for instance in pole-frequency (MHz) is
in third place of decimal. Similar statement holds
for pole-Q as well. It is therefore quite evident that
the proposed circuit is not adversely affected by the
-50
1.0KHz 10KHz 100KHz 1.0MHz 10MHz 100MHz 1.0GHz DVCC non-idealities.
VDB(4)
Frequency 4.2 DVCC Parasitics
Fig. 6: Gain plot for low-pass filter. The effect of various parasitic impedances at DVCC
ports is next considered. Since V3 is always to be
20mV
connected to the signal input, port Z+ (along with
Y1) impedances comprising RZ//RY//CZ//CY would
0V be effective. Though port Y2 (along with X)
parasitic capacitance become ineffective when V2=0
SEL>>
-20mV
(it merges with C2) but the parasitic resistance RY
40mV
V(4)
does appear across C2. Similarly, the parasitic
resistance at port Y2 gets ineffective when V1=0 (it
merges with R2), but CY does appear across R2.
0V

4.3 Inputs’ selection

-40mV
0s 100ns 200ns 300ns 400ns 500ns 600ns 700ns
The new proposed multifunction filter enjoys a
V(3)
Time minimum component count and a very compact
Fig.7: Input/Output low-pass waveforms at 5MHz. realization. There are certain aspects which need to

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be practically considered. Firstly, the input Table 2: Parameters used

impedance may not be high and even frequency
NMOS :
dependent in certain cases. Secondly, one of the
LEVEL=3 UO=460.5 TOX=1.0E-8 TPG=1
three inputs nodes (V3) is always to be connected to
VTO=.62 JS=1.8E-6 XJ=.15E-6 RS=417
the input signal; whereas, the rest two nodes need be
RSH=2.73 LD=0.04E-6 ETA=0
switched for different filtering functions (eqn. 2 and
VMAX=130E3 NSUB=1.71E17 PB=0.761
subsequent discussion). A switching network may
PHI=0.905 THETA=0.129 GAMMA=0.69
be employed at the inputs’ end and the circuit may
KAPPA=0.1 AF=1 WD=0.11E-6 CJ=76.4E-5
even be made digitally controllable with a two-bit
MJ=0.357 CJSW=5.68E-10 MJSW=0.302
control for selecting one of the two inputs namely
CGSO=1.38E-10 CGDO=1.38E-10
V1 or V2. This aspect may further be utilized to also
CGBO=3.45E-10 KF=3.07E-28 DELTA=.42
make the input impedance desirable for voltage
NFS=1.2E11
mode operation by appropriate design of the
PMOS:
switching network.
LEVEL=3 UO=100 TOX=1.0E-8 TPG=1
VTO=-0.58 JS=.38E-6 XJ=0.1E-6 RS=866
4.4 Integration aspect RSH=1.81 LD=0.03E-6 ETA=0
Another important aspect to be considered is the
VMAX=113E3 NSUB=2.08E17 PB=0.991
feasibility of integrating the circuit. It is to be noted
PHI=0.905 THETA=0.120 GAMMA=0.76
that the proposed circuit employs floating
KAPPA=2 AF=1 WD=0.14E-6 CJ=85E-5
capacitors, which can be integrated using double-
MJ=0.429 CJSW=4.67E-10 MJSW=.631
poly process. Next, the resistors need to be replaced
CGSO=1.38E-10 CGDO=1.38E-10
with tunable active equivalents (in CMOS
CGBO=3.45E-10 KF=1.08E-29 DELTA=0.81
technology) for most practical purpose. The circuit
NFS=0.52E11
can thus be made voltage controllable so as to tune
the filter parameters through external control
voltage(s). Therefore, the new multifunction filter is
integrable in CMOS technology. Acknowledgement: The author is thankful to the
anonymous reviewers for useful suggestions that
helped to improve the paper. The author is also
grateful to the guest editors for recommending the
5 Conclusion paper.
A novel voltage-mode multifunction filter circuit
employing minimum number of active and passive
components, realizing low-pass, band-pass and
high-pass filter functions is proposed. The new
References:
circuit is verified through PSPICE simulation [1] R. Schaumann, M. E. Van Valkenburg, Design
results. The proposed circuit is a useful addition to of Analog Filters, Oxford Press, 2006.
the literature as a low cost and high frequency [2] C. L. Hou, C. C. Huang, Y. S. Lan, J. J. Shaw,
filtering option with CMOS compatibility. It is C. M. Chang, Current mode and voltage mode
expected to act as a useful building block for universal biquad using a single current
designing higher order filters as well. feedback amplifier, Int J. Elec., vol. 86, 1999,
pp. 929-932.
[3] C. M. Chang, B. M. Al Hashimi, C. L., Wang, C.
W. Hung, A single FDCC biquad filter, IEE
Proc. CDS, vol. 150, 2003, pp. 394-398.
[4] A. U. Keskin, Multifunction biquad using single
CDBA, Electrical Engineering, vol. 88, 2006,
Table 1: Device dimensions used
pp. 353-356.
[5] S. Kilnic, A. U. Keskin, U. Cam, Cascadable
Transistors L(µm) W(µm)
voltage mode multifunction biquad employing
M1, M2, M3, M4 1 1.6 single OTRA, Frequenz, vol. 61, 2007, pp. 3-
M5, M6 1 8 4.
M9, M10 1 29 [6] R. Senani, S. S. Gupta, Universal voltage mode /
current mode biquad filter realized with current
M7, M8, 1 20
feedback opamps, Frequenz, vol. 51, 1997, pp.
M11, M12 1 90 203-208.

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 WSEAS TRANSACTIONS on ELECTRONICS Sudhanshu Maheshwari

[7] D. Biolek, V. Biolkova, Tunable ladder CDTA Theory and Applications, Vol. 36, 2008, pp.
based filters, 511-522.
http://www.electronicsletters.com/papers/2002/0025/paper.asp [12] J. W. Horng, W-Y Chiu, H-Y Wei, Voltage
[8] H. O. Elwan and A. M. Soliman, Novel CMOS mode highpass, bandpass and lowpass filters
differential voltage current conveyor and its using two DDCCs, Int J Electr., vol. 91, 2004,
applications, IEE Proceedings: Circuits pp. 461-464.
Devices and Systems, vol. 144, 1997, pp. 856- [13] W-Y Chiu, J. W. Horng, High input and low
860. output impedance voltage mode universal
[9] M. A. Ibrahim, S. Minaei and H. Kuntman, A biquadratic filter using DDCCs, IEEE Trans.
22.5 MHz biquad using differential voltage CAS-II, vol. 54, 2007, pp. 649-652.
current conveyor and grounded passive [14] J. W. Horng, C-L Hou, C-M Chang, H-P Chou,
elements, Int J.Electron. Commun., vol. 59, C-T Lin, High input impedance voltage mode
2005, pp.311-318.. universal biquadratic filter with one input and
[10] S. Maheshwari, High input impedance VM- five outputs using current conveyors, Circuits
APSs with grounded passive elements, IET: Systems and Signal Processing, vol. 25, 2006,
Circuits Devices and Systems, vol. 1, 2007, pp. pp. 767-777.
72-78. [15] H-P Chen, Universal voltage mode filter using
[11] S. Maheshwari, High input impedance voltage plus type DDCCs, Analog IC and Signal
mode first order all-pass sections, Int J Circuit Processing, vol. 50, 2007, p. 137-145.

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