LM6171

SNOS745D – MAY 1998 – REVISED NOVEMBER 2023

LM6171 High-Speed, Low-Power, Low-Distortion Voltage Feedback Amplifier

1 Features 3 Description
• Typical unless otherwise noted The LM6171 is a high-speed, unity-gain-stable
• Easy-to-use voltage feedback topology voltage-feedback amplifier. The LM6171 offers a high
• Very high slew rate: 3600 V/μs slew rate of 3600 V/μs and a unity-gain bandwidth
• Wide unity-gain-bandwidth product: 76 MHz of 100 MHz while consuming only 2.5 mA of supply
• −3‑dB frequency at AV = +2: 75 MHz current. The LM6171 has very impressive ac and dc
• Low supply current: 2.5 mA performance that is a great benefit for high-speed
• High CMRR: 110 dB signal processing and video applications.
• High open-loop gain: 90 dB
The ±15‑V power supplies allow for large signal
• Specified for ±15-V and ±5-V operation
swings and give greater dynamic range and signal-
2 Applications to-noise ratio (SNR). The LM6171 has a high
output current drive, low spurious-free dynamic range
• Multimedia broadcast systems
(SFDR) and total harmonic distortion (THD), and is an
• Line driver, switch
excellent choice for analog-to-digital converter (ADC)
• Video amplifier
and digital-to-analog converter (DAC) systems. The
• NTSC, PAL® and SECAM systems
LM6171 is specified for ±5‑V operation for portable
• ADC/DAC buffer
applications.
• HDTV amplifier
• Pulse amplifier and peak detector Package Information
• Instrumentation amplifier PART NUMBER PACKAGE(1) PACKAGE SIZE(2)
• Active filter D (SOIC, 8) 4.9 mm × 6 mm
LM6171
P (PDIP, 8) 9.81 mm × 9.43 mm

(1) For more information, see Section 10.

(2) The package size (length × width) is a nominal value and
includes pins, where applicable.

Simplified Schematic

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
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Table of Contents
1 Features............................................................................1 6.3 Feature Description...................................................26
2 Applications..................................................................... 1 6.4 Device Functional Modes..........................................26
3 Description.......................................................................1 7 Application and Implementation.................................. 27
4 Pin Configuration and Functions...................................2 7.1 Application Information............................................. 27
5 Specifications.................................................................. 3 7.2 Typical Applications.................................................. 30
5.1 Absolute Maximum Ratings........................................ 3 7.3 Power Supply Recommendations.............................31
5.2 ESD Ratings............................................................... 3 7.4 Layout....................................................................... 31
5.3 Recommended Operating Conditions.........................3 8 Device and Documentation Support............................32
5.4 Thermal Information....................................................3 8.1 Receiving Notification of Documentation Updates....32
5.5 Electrical Characteristics: ±15 V................................. 4 8.2 Support Resources................................................... 32
5.6 Electrical Characteristics: ±5 V................................... 6 8.3 Trademarks............................................................... 32
5.7 Typical Characteristics: LM6171A Only...................... 8 8.4 Electrostatic Discharge Caution................................32
5.8 Typical Characteristics.............................................. 17 8.5 Glossary....................................................................32
6 Detailed Description......................................................26 9 Revision History............................................................ 33
6.1 Overview................................................................... 26 10 Mechanical, Packaging, and Orderable
6.2 Functional Block Diagram......................................... 26 Information.................................................................... 33

4 Pin Configuration and Functions

Figure 4-1. D Package, 8-Pin SOIC

P Package, 8-Pin PDIP
(Top View)

Table 4-1. Pin Functions

PIN
TYPE(1) DESCRIPTION
NAME NO.
–IN 2 I Negative input pin
+IN 3 I Positive input pin
N/C 1, 5, 8 — This pin is not internally connected; leave floating or connect to any other pin on the device.
OUTPUT 6 O Output pin.
V– 4 I/O Negative supply voltage pin.
V+ 7 I/O Positive supply voltage pin.

(1) Signal types: I = input, O = output, I/O = input or output.

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5 Specifications
5.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1) (2)
MIN MAX UNIT
VS Supply voltage (V+ – V–) 36 V
VI Differential input voltage ±10 V
VCM Common-mode voltage (V–) – 0.3 (V+) + 0.3 V
IIN Input current ±10 mA
ISC Output current short to ground(3) Continuous A
Tstg Storage temperature –65 150 ℃
TJ Junction temperature(4) 150 ℃
Infrared or convection reflow (20 seconds) 235
TSOLDER ℃
Wave soldering lead temp (10 seconds) 260

(1) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and
specifications.
(2) Stresses beyond those listed under Absolute Maximum Rating may cause permanent damage to the device. These are stress
ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated
under Recommended Operating Condition. Exposure to absolute-maximum-rated conditions for extended periods may affect device
reliability.
(3) Continuous short circuit operation at elevated ambient temperature can result in exceeding the maximum allowed junction temperature
of 150°C.
(4) The maximum power dissipation is a function of TJ(MAX), RθJA, and TA. The maximum allowable power dissipation at any ambient
temperature is PD = (TJ(MAX)–TA)/RθJA. All numbers apply for packages soldered directly into a PC board.

5.2 ESD Ratings

VALUE UNIT

Electrostatic Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2000 V

V(ESD)
discharge Charged device model (CDM), per ANSI/ESDA/JEDEC JS-002(2) ±1500 V

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP155 states that 2500-V HBM allows safe manufacturing with a standard ESD control process.

5.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN TYP MAX UNIT
VS Supply voltage 5.5 34 V
TA Ambient temperature −40 85 °C

5.4 Thermal Information

LM6171
THERMAL METRIC(1) D (SOIC) A Version D (SOIC) B Version P (PDIP) UNIT
8 PINS 8 PINS 8 PINS
RθJA Junction-to-ambient thermal resistance 122.5 172 108 ℃/W
RθJC(top) Junction-to-case (top) thermal resistance 64.7 62.4 52.4 ℃/W
RθJB Junction-to-board thermal resistance 65.9 55.7 51.9 ℃/W
ΨJT Junction-to-top characterization parameter 17.6 16.5 6.8 ℃/W
ΨJB Junction-to-board characterization parameter 65.1 55.1 51.1 ℃/W
RθJC(bot) Junction-to-case (bottom) thermal resistance N/A N/A N/A ℃/W

(1) For information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.

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5.5 Electrical Characteristics: ±15 V

at TJ = 25°C, V+ = 15 V, V− = −15 V, VCM = 0 V, and RL = 1 kΩ (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN(2) TYP(1) MAX(2) UNIT
1.5 3
LM6171A
TA = –40°C to +85°C 5
VOS Input offset voltage mV
1.5 6
LM6171B
TA = –40°C to +85°C 8
TCVOS Input offset voltage average drift 6 μV/°C
1 3
IB Input bias current
TA = –40°C to +85°C 4
μA
0.03 2
IOS Input offset current
TA = –40°C to +85°C 3
Common-mode 40
RIN Input resistance MΩ
Differential-mode 4.9
RO Open-loop output resistance 14 Ω

LM6171A, 80 110
VCM = ±10 V TA = –40°C to +85°C 75
CMRR Common-mode rejection ratio dB
LM6171B, 75 110
VCM = ±10 V TA = –40°C to +85°C 70

LM6171A, 85 95
VS = ±5 V to ±15 V TA = –40°C to +85°C 80
PSRR Power supply rejection ratio dB
LM6171B, 80 95
VS = ±5 V to ±15 V TA = –40°C to +85°C 75
VCM Input common-mode voltage CMRR > 60 dB ±13.5 V
80 90
RL = 1 kΩ, VOUT = ±5 V
TA = –40°C to +85°C 70
AV Large signal voltage gain(3) dB
70 83
RL = 100 Ω, VOUT = ±5 V
TA = –40°C to +85°C 60
12.5 13.3
RL = 1 kΩ, sourcing
TA = –40°C to +85°C 12
−12.5 −13.3
RL = 1 kΩ, sinking
TA = –40°C to +85°C −12
VO Output swing V
9 11.6
RL = 100 Ω, sourcing
TA = –40°C to +85°C 8.5
−9 −10.5
RL = 100 Ω, sinking
TA = –40°C to +85°C −8.5
90 116
Sourcing, RL = 100 Ω
Continuous output current (open TA = –40°C to +85°C 85
mA
loop)(4) 90 105
Sinking, RL = 100 Ω
TA = –40°C to +85°C 85

Continuous output current (in linear Sourcing, RL = 100 Ω 100

mA
region) Sinking, RL = 100 Ω 80
Sourcing 135
ISC Output short circuit current mA
Sinking 135
2.5 4
IS Supply current mA
TA = –40°C to +85°C 4.5

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5.5 Electrical Characteristics: ±15 V (continued)

at TJ = 25°C, V+ = 15 V, V− = −15 V, VCM = 0 V, and RL = 1 kΩ (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN(2) TYP(1) MAX(2) UNIT
AV = +2, VIN = 13 VPP 3600
SR Slew rate(5) V/μs
AV = +2, VIN = 10 VPP 3000
LM6171A 76 MHz
Unity-gain bandwidth
LM6171B 100 MHz
AV = +1 200
LM6171A
AV = +2 75
−3-dB frequency MHz
AV = +1 160
LM6171B
AV = +2 62
LM6171A 58
φm Phase margin Deg
LM6171B 40

AV = −1, VOUT = ±5 V, LM6171A 21

ts Settling time (0.1%) ns
RL = 500 Ω LM6171B 48

AV = −2, VIN = ±5 V, LM6171A 4.1

tp Propagation delay ns
RL = 500 Ω LM6171B 6
AD Differential gain(6) 0.03 %
φD Differential phase(6) 0.5 °
en Input-referred voltage noise f = 10 kHz 12 nV/√Hz
in Input-referred current noise f = 10 kHz 1 pA/√Hz

(1) Typical values represent the most likely parametric norm

(2) All limits are specified by testing or statistical analysis.
(3) Large-signal voltage gain is the total output swing divided by the input signal required to produce that swing. For VS = ±15 V,
VOUT = ±5 V. For VS = +5 V, VOUT = ±1 V.
(4) The open-loop output current is the output swing with the 100-Ω load resistor divided by that resistor.
(5) Slew rate is the average of the rising and falling slew rates.
(6) Differential gain and phase are measured with AV = +2, VIN = 1 VPP at 3.58 MHz and both input and output 75 Ω terminated.

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5.6 Electrical Characteristics: ±5 V

at TJ = 25°C, V+ = 5 V, V− = −5 V, VCM = 0 V, and RL = 1 kΩ (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN(2) TYP(1) MAX(2) UNIT
1.2 3
LM6171A
TA = –40°C to +85°C 5
VOS Input offset voltage mV
1.2 6
LM6171B
TA = –40°C to +85°C 8
TCVOS Input offset voltage average drift 4 μV/°C
1 2.5
IB Input bias current
TA = –40°C to +85°C 3.5
µA
0.03 1.5
IOS Input offset current
TA = –40°C to +85°C 2.2
Common-mode 40
RIN Input resistance MΩ
Differential-mode 4.9
RO Open loop output resistance 14 Ω

LM6171A, 80 105
VCM = ±2.5 V TA = –40°C to +85°C 75
CMRR Common-mode rejection ratio dB
LM6171B, 75 105
VCM = ±2.5 V TA = –40°C to +85°C 70

LM6171A, 85 95
VS = ±5 V to ±15 V TA = –40°C to +85°C 80
PSRR Power supply rejection ratio dB
LM6171B, 80 95
VS = ±5 V to ±15 V TA = –40°C to +85°C 75
LM6171A ±3.2
VCM Input common-mode voltage CMRR > 60 dB V
LM6171B ±3.7

RL = 1 kΩ, 75 84
VOUT = ±1 V TA = –40°C to +85°C 65
AV Large signal voltage gain(3) dB
RL = 100 Ω, 70 80
VOUT = ±1 V TA = –40°C to +85°C 60
3.2 3.5
RL = 1 kΩ, sourcing
TA = –40°C to +85°C 3
−3.2 −3.4
RL = 1 kΩ, sinking
TA = –40°C to +85°C −3
VO Output swing V
2.8 3.2
RL = 100 Ω, sourcing
TA = –40°C to +85°C 2.5
−2.8 −3.0
RL = 100 Ω, sinking
TA = –40°C to +85°C −2.5
28 32
Sourcing, RL = 100 Ω
Continuous output current (open TA = –40°C to +85°C 25
loop)(4) 28 30
Sinking, RL = 100 Ω
TA = –40°C to +85°C 25
mA
Sourcing 130
ISC Output short circuit current
Sinking 100
2.3 3
IS Supply current
TA = –40°C to +85°C 3.5
AV = +2, VIN = 3.5 VPP 750
SR Slew rate(5) V/μs
AV = +2, VIN = 2 VPP 450

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5.6 Electrical Characteristics: ±5 V (continued)

at TJ = 25°C, V+ = 5 V, V− = −5 V, VCM = 0 V, and RL = 1 kΩ (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN(2) TYP(1) MAX(2) UNIT
LM6171A 70
Unity-gain bandwidth MHz
LM6171B 70
AV = +1 190
LM6171A
AV = +2 75
−3-dB frequency MHz
AV = +1 130
LM6171B
AV = +2 45
φm Phase margin 57 Deg

AV = −1, VOUT = ±1 V, LM6171A 25

ts Settling time (0.1%) ns
RL = 500 Ω LM6171B 60

AV = −2, VIN = ±1 V, LM6171A 4.5

tp Propagation delay ns
RL = 500 Ω LM6171B 8
AD Differential gain(6) 0.04 %
φD Differential phase(6) 0.7 °
en Input-referred voltage noise f = 10 kHz 11 nV/√Hz
in Input-referred current noise f = 10 kHz 1 pA/√Hz

(1) Typical values represent the most likely parametric norm

(2) All limits are specified by testing or statistical analysis.

(3) Large-signal voltage gain is the total output swing divided by the input signal required to produce that swing. For VS = ±15 V,
VOUT = ±5 V. For VS = +5 V, VOUT = ±1 V
(4) The open-loop output current is the output swing with the 100-Ω load resistor divided by that resistor.
(5) Slew rate is the average of the rising and falling slew rates.
(6) Differential gain and phase are measured with AV = +2, VIN = 1 VPP at 3.58 MHz and both input and output 75 Ω terminated.

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5.7 Typical Characteristics: LM6171A Only

at TA = 25°C, and for LM6171A only (unless otherwise noted)

4 3.5

3.5 3.25

3 3

Supply Current (mA)

Supply current (mA)

2.5 2.75

2 2.5

1.5 2.25

1 2
-55C 85C
0.5 -40C 125C 1.75 VS = 5 V
25C VS = 15 V
0 1.5
0 5 10 15 20 25 30 35 40 -60 -40 -20 0 20 40 60 80 100 120 140
Supply voltage (V) Temperature (C)

Figure 5-1. Supply Current vs Supply Voltage Figure 5-2. Supply Current vs Temperature
0.5 0.25

0.2
0.25
Input Bias Current (A)
Offset Voltage (mV)

0.15

0 0.1

0.05
-0.25
0
VS = 5 V VS = 5 V
VS = 15 V VS = 15 V
-0.5 -0.05
-60 -40 -20 0 20 40 60 80 100 120 140 -40 -20 0 20 40 60 80 100
Temperature (C) Temperature (C)

Figure 5-3. Input Offset Voltage vs Temperature Figure 5-4. Input Bias Current vs Temperature
0.5 135
130 VS = 5 V
0.4 VS = 15 V
125
0.3
120
0.2
Offset Voltage (mV)

115
Current (mA)

0.1 110
0 105
-0.1 100
95
-0.2
90
-0.3
85
-0.4 80
VS = 15 V
-0.5 75
-15 -12 -9 -6 -3 0 3 6 9 12 15 -60 -40 -20 0 20 40 60 80 100 120 140
Common Mode Voltage (V) Temperature (C)

Figure 5-5. Input Offset Voltage vs Common Mode Voltage Figure 5-6. Short Circuit Current vs Temperature (Sourcing)

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5.7 Typical Characteristics: LM6171A Only (continued)

at TA = 25°C, and for LM6171A only (unless otherwise noted)

-75 15
-80 12.5
-85 10
-90 7.5

Output Voltage (V)

-95 5
Current (mA)

-100 2.5
-105 0
-110 -2.5
-115 -5
-120 -7.5
-125 -10 -40C
VS = 5V 25C
-130 VS = 15V -12.5 85C
-135 -15
-60 -40 -20 0 20 40 60 80 100 120 140 -0.125 -0.075 -0.025 0.025 0.075 0.125
Temperature (C) Current (mA)

Figure 5-7. Short Circuit Current vs Temperature (Sinking) Figure 5-8. Output Voltage vs Output Current
4 120
Common Mode Rejection Ratio (dB)
3
100
2
Output Voltage (V)

80
1

0 60

-1
40
-2
-40C 20
-3 25C VS = 5 V
85C VS = 10 V
-4 0
-0.125 -0.075 -0.025 0.025 0.075 0.125 1 10 100 1k 10k 100k 1M 10M 100M
Current (mA) Frequency (Hz)

Figure 5-9. Output Voltage vs Output Current Figure 5-10. CMRR vs Frequency
120 120
Power Supply Rejection Ratio (dB)

Power Supply Rejection Ratio (dB)

100 100

80 80

60 60

40 40

20 20
Positive Positive
Negative Negative
0 0
10 100 1k 10k 100k 1M 10M 100M 10 100 1k 10k 100k 1M 10M 100M
Frequency (Hz) Frequency (Hz)

Figure 5-11. PSRR vs Frequency Figure 5-12. PSRR vs Frequency

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5.7 Typical Characteristics: LM6171A Only (continued)

at TA = 25°C, and for LM6171A only (unless otherwise noted)

120 60 120 60

100 30 100 30
Open Loop Gain Magnitude (dB)

Open Loop Gain Magnitude (dB)

80 0 80 0

Open Loop Phase ()

Open Loop Phase ()

60 -30 60 -30

40 -60 40 -60

20 -90 20 -90

0 -120 0 -120

-20 -150 -20 -150

-40 Magnitude -180 -40 Magnitude -180

Phase Phase
-60 -210 -60 -210
10 100 1k 10k 100k 1M 10M 100M 1G 10 100 1k 10k 100k 1M 10M 100M 1G
Frequency (Hz) Frequency (Hz)

VS = 30 V VS = 10 V
Figure 5-13. Open-Loop Frequency Response Figure 5-14. Open-Loop Frequency Response
68.5 90
88
68
86
Gain Bandwidth (MHz)

Gain Bandwidth (MHz)

67.5 84
82
67 80
78
66.5
76
66 74
72
65.5
70
65 68
5 7.5 10 12.5 15 17.5 20 22.5 25 27.5 30 0 100 200 300 400 500 600 700 800 900 1000
Supply Voltage (V) Load Capacitance (pF)

Figure 5-15. Gain Bandwidth Product vs Supply Voltage Figure 5-16. Gain Bandwidth Product vs Load Capacitance
107.5 107.5
105 105
102.5 102.5
100 100
Open Loop Gain (dB)

Open Loop Gain (dB)

97.5 97.5
95 95
92.5 92.5
90 90
87.5 87.5
85 85
82.5 -55C 82.5 -55C
25C 25C
80 125C 80 125C
77.5 77.5
0 200 400 600 800 1000 1200 1400 1600 1800 2000 0 200 400 600 800 1000 1200 1400 1600 1800 2000
RLOAD () RLOAD ()

Figure 5-17. Large-Signal Voltage Gain vs Load Figure 5-18. Large-Signal Voltage Gain vs Load

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5.7 Typical Characteristics: LM6171A Only (continued)

at TA = 25°C, and for LM6171A only (unless otherwise noted)

200 12
5V VS = 5 V
180  15 V VS = 15 V
10
160
Voltage Noise (nV/Hz)

Current Noise (pA/Hz)

140
8
120
100 6
80
4
60
40
2
20
0 0
1 10 100 1k 10k 1 10 100 1k 10k
Frequency (Hz) Frequency (Hz)

Figure 5-19. Input Voltage Noise vs Frequency Figure 5-20. Input Current Noise vs Frequency
5000 5000
4500 4500
4000 4000
3500 3500
Slew Rate (V/s)

Slew Rate (V/s)

3000 3000
2500 2500
2000 2000
1500 1500
1000 1000
500 500
0 0
5 7.5 10 12.5 15 17.5 20 22.5 25 27.5 30 5 7.5 10 12.5 15 17.5 20 22.5 25 27.5 30
Supply Voltage (V ) Supply Voltage (V )

Figure 5-21. Slew Rate vs Supply Voltage Figure 5-22. Slew Rate vs Input Voltage
3600 40
3300 Sourcing
Sinking
3000 35
2700
Output Impedance ()

2400 30
Slew Rate (V/s)

2100
1800 25
1500
1200 20
900
600 15
300
0 10
0 100 200 300 400 500 600 700 800 900 1000 1M 10M 100M
Load Capacitance (pF) Frequency (Hz)

Figure 5-23. Slew Rate vs Load Capacitance Figure 5-24. Open-Loop Output Impedance vs Frequency

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5.7 Typical Characteristics: LM6171A Only (continued)

at TA = 25°C, and for LM6171A only (unless otherwise noted)

40 10
Sourcing 9
Sinking
35 8
7
Output Impedance ()

Output Voltage (V)

30 6
5
25 4
3
20 2
1
15 0
-1
10 -2
1M 10M 100M 0 10 20 30 40 50 60 70 80
Frequency (Hz) Time (ns)
AV = −1, VS = ±15 V
Figure 5-25. Open-Loop Output Impedance vs Frequency Figure 5-26. Large-Signal Pulse Response
5 10
9
4 8
7
Output Voltage (V)

Output Voltage (V)

3 6
5
2 4
3
1 2
1
0 0
-1
-1 -2
0 10 20 30 40 50 60 70 80 0 10 20 30 40 50 60 70 80
Time (ns) Time (ns)
AV = −1, VS = ±5 V AV = 1, VS = ±15 V
Figure 5-27. Large-Signal Pulse Response Figure 5-28. Large-Signal Pulse Response
5 22
20
4 18
16
Output Voltage (V)

Output Voltage (V)

3 14
12
2 10
8
1 6
4
0 2
0
-1 -2
0 10 20 30 40 50 60 70 80 0 10 20 30 40 50 60 70 80
Time (ns) Time (ns)
AV = 1, VS = ±5 V AV = 2, VS = ±15 V
Figure 5-29. Large-Signal Pulse Response Figure 5-30. Large-Signal Pulse Response

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5.7 Typical Characteristics: LM6171A Only (continued)

at TA = 25°C, and for LM6171A only (unless otherwise noted)

5 0.1

4 0.05

AC Coupled Output Voltage (V)

0
Output Voltage (V)

3
-0.05
2
-0.1
1
-0.15

0 -0.2

-1 -0.25
0 10 20 30 40 50 60 70 80 0 10 20 30 40 50 60 70 80
Time (ns) Time (ns)
AV = 2, VS = ±5 V AV = −1, VS = ±15 V
Figure 5-31. Large-Signal Pulse Response Figure 5-32. Small-Signal Pulse Response
0.1 0.25

0.05 0.2
AC Coupled Output Voltage (V)

AC Coupled Output Voltage (V)

0
0.15
-0.05
0.1
-0.1
0.05
-0.15

-0.2 0

-0.25 -0.05
0 10 20 30 40 50 60 70 80 90 0 10 20 30 40 50 60 70 80
Time (ns) Time (ns)
AV = −1, VS = ±5 V AV = 1, VS = ±15 V
Figure 5-33. Small-Signal Pulse Response Figure 5-34. Small-Signal Pulse Response
0.25 0.45
0.4
0.2
AC Coupled Output Voltage (V)

AC Coupled Output Voltage (V)

0.35
0.3
0.15
0.25
0.1 0.2
0.15
0.05
0.1
0.05
0
0
-0.05 -0.05
0 10 20 30 40 50 60 70 80 0 10 20 30 40 50 60 70 80
Time (ns) Time (ns)
AV = 1, VS = ±5 V AV = 2, VS = ±15 V
Figure 5-35. Small-Signal Pulse Response Figure 5-36. Small-Signal Pulse Response

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5.7 Typical Characteristics: LM6171A Only (continued)

at TA = 25°C, and for LM6171A only (unless otherwise noted)

0.45 5
0.4
0
AC Coupled Output Voltage (V)

0.35
0.3 -5

0.25

Gain (dB)
-10
0.2
-15
0.15
0.1 -20
VS = 2.75 V
0.05 VS = 5 V
-25 VS = 10 V
0
VS = 15 V
-0.05 -30
0 10 20 30 40 50 60 70 80 1M 10M 100M
Time (ns) Frequency (Hz)
AV = 2, VS = ±5 V AV = 1
Figure 5-37. Small-Signal Pulse Response Figure 5-38. Closed-Loop Frequency Response vs
Supply Voltage
10 15

10
5
5

0 0
Gain (dB)

Gain (dB)

-5
-5
-10

-10 -15
CL = 1.5 pF
VS = 2.75 V -20 CL = 50 pF
-15 VS = 5 V CL = 100 pF
VS = 10 V -25 CL = 220 pF
VS = 15 V CL = 1000 pF
-20 -30
1M 10M 100M 1M 10M 100M
Frequency (Hz) Frequency (Hz)
AV = 2 VS = 30 V, AV = 1
Figure 5-39. Closed-Loop Frequency Response vs Figure 5-40. Closed-Loop Frequency Response vs
Supply Voltage Capacitive Load
15 20

10 15

5 10
5
0
0
Gain (dB)

Gain (dB)

-5
-5
-10
-10
-15
CL = 1.5 pF -15 CL = 1.5 pF
-20 CL = 50 pF CL = 50 pF
CL = 100 pF -20 CL = 100 pF
-25 CL = 220 pF -25 CL = 220 pF
CL = 1000 pF CL = 1000 pF
-30 -30
1M 10M 100M 1M 10M 100M
Frequency (Hz) Frequency (Hz)
VS = 10 V, AV = 1 VS = 30 V, AV = 2
Figure 5-41. Closed Loop Frequency Response vs Figure 5-42. Closed-Loop Frequency Response vs
Capacitive Load Capacitive Load

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5.7 Typical Characteristics: LM6171A Only (continued)

at TA = 25°C, and for LM6171A only (unless otherwise noted)

20 -50
HD2
15 -60 HD3
10 -70

Harmonic Distortion (dBc)

5 -80
0 -90
Gain (dB)

-5 -100
-10 -110
-15 CL = 1.5 pF -120
CL = 50 pF
-20 CL = 100 pF -130
-25 CL = 220 pF -140
CL = 1000 pF
-30 -150
1M 10M 100M 10k 100k 1M 10M
Frequency (Hz) Frequency (Hz)
VS = 10 V, AV = 2 VS = 30 V, AV = 1, RL = 2.5 kΩ, VOUT = 2 VPP
Figure 5-43. Closed-Loop Frequency Response vs Figure 5-44. Harmonic Distortion vs Frequency
Capacitive Load
-50 -40
HD2 -45 HD2
-60 HD3 -50 HD3
-55
-70
Harmonic Distortion (dBc)

Harmonic Distortion (dBc)

-60
-80 -65
-70
-90 -75
-80
-100 -85
-90
-110 -95
-100
-120
-105
-130 -110
-115
-140 -120
10k 100k 1M 10M 10k 100k 1M 10M
Frequency (Hz) Frequency (Hz)
VS = 10 V, AV = 1, RL = 2.5 kΩ, VOUT = 2 VPP VS = 30 V, AV = 2, RL = 2.5 kΩ, VOUT = 2 VPP
Figure 5-45. Total Harmonic Distortion vs Frequency Figure 5-46. Total Harmonic Distortion vs Frequency
-40 -40
-45 HD2 -45 HD2
-50 HD3 -50 HD3
-55 -55
Harmonic Distortion (dBc)

Harmonic Distortion (dBc)

-60 -60
-65 -65
-70 -70
-75 -75
-80 -80
-85 -85
-90 -90
-95 -95
-100 -100
-105 -105
-110 -110
-115 -115
-120 -120
10k 100k 1M 10M 10k 100k 1M 10M
Frequency (Hz) Frequency (Hz)
VS = 10 V, AV = 2, RL = 2.5 kΩ, VOUT = 2 VPP VS = 30 V, AV = 2, RL = 100 Ω, VOUT = 2 VPP
Figure 5-47. Total Harmonic Distortion vs Frequency Figure 5-48. Harmonic Distortion vs Frequency

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5.7 Typical Characteristics: LM6171A Only (continued)

at TA = 25°C, and for LM6171A only (unless otherwise noted)

-40 -72
-45 HD2 HD2
-75
-50 HD3 HD3
-55 -78
Harmonic Distortion (dBc)

Harmonic Distortion (dBc)

-60 -81
-65
-70 -84
-75 -87
-80
-85 -90
-90 -93
-95
-100 -96
-105 -99
-110
-102
-115
-120 -105
10k 100k 1M 10M 0 2 4 6 8 10 12 14 16 18 20
Frequency (Hz) Output Voltage (VPP)
VS = 10 V, AV = 2, RL = 100 Ω, VOUT = 2 VPP VS = 30 V, AV = 2, RL = 100 Ω, VOUT = 2 VPP, f = 10 kHz
Figure 5-49. Harmonic Distortion vs Frequency Figure 5-50. Harmonic Distortion vs Output Voltage Peak to
Peak
1.6
D (SOIC)
1.4 P (PDIP)
Maximum Power Dissipation (W)

1.2

0.8

0.6

0.4

0.2
-40 -20 0 20 40 60 80 100
Ambient Temerature (C)
VS = 10 V, AV = 2, RL = 100 Ω, VOUT = 2 VPP, f = 10 kHz
Figure 5-51. Harmonic Distortion vs Output Voltage Peak to Figure 5-52. Total Power Dissipation vs Ambient Temperature
Peak

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5.8 Typical Characteristics

at TA = 25°C (unless otherwise noted)

Figure 5-53. Supply Current vs Supply Voltage Figure 5-54. Supply Current vs Temperature

Figure 5-55. Input Offset Voltage vs Temperature Figure 5-56. Input Bias Current vs Temperature

Figure 5-57. Input Offset Voltage vs Common Mode Voltage Figure 5-58. Short Circuit Current vs Temperature (Sourcing)

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5.8 Typical Characteristics (continued)

at TA = 25°C (unless otherwise noted)

Figure 5-59. Short Circuit Current vs Temperature (Sinking) Figure 5-60. Output Voltage vs Output Current

Figure 5-61. Output Voltage vs Output Current Figure 5-62. CMRR vs Frequency

Figure 5-63. PSRR vs Frequency Figure 5-64. PSRR vs Frequency

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5.8 Typical Characteristics (continued)

at TA = 25°C (unless otherwise noted)

Figure 5-65. Open-Loop Frequency Response Figure 5-66. Open-Loop Frequency Response

Figure 5-67. Gain Bandwidth Product vs Supply Voltage Figure 5-68. Gain Bandwidth Product vs Load Capacitance

Figure 5-69. Large-Signal Voltage Gain vs Load Figure 5-70. Large-Signal Voltage Gain vs Load

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5.8 Typical Characteristics (continued)

at TA = 25°C (unless otherwise noted)

Figure 5-71. Input Voltage Noise vs Frequency Figure 5-72. Input Voltage Noise vs Frequency

Figure 5-73. Input Current Noise vs Frequency Figure 5-74. Input Current Noise vs Frequency

Figure 5-75. Slew Rate vs Supply Voltage Figure 5-76. Slew Rate vs Input Voltage

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5.8 Typical Characteristics (continued)

at TA = 25°C (unless otherwise noted)

Figure 5-77. Slew Rate vs Load Capacitance Figure 5-78. Open-Loop Output Impedance vs Frequency

AV = −1, VS = ±15 V
Figure 5-79. Open-Loop Output Impedance vs Frequency Figure 5-80. Large-Signal Pulse Response

AV = −1, VS = ±5 V AV = 1, VS = ±15 V
Figure 5-81. Large-Signal Pulse Response Figure 5-82. Large-Signal Pulse Response

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5.8 Typical Characteristics (continued)

at TA = 25°C (unless otherwise noted)

AV = 1, VS = ±5 V AV = 2, VS = ±15 V
Figure 5-83. Large-Signal Pulse Response Figure 5-84. Large-Signal Pulse Response

AV = 2, VS = ±5 V AV = −1, VS = ±15 V
Figure 5-85. Large-Signal Pulse Response Figure 5-86. Small-Signal Pulse Response

AV = −1, VS = ±5 V AV = 1, VS = ±15 V
Figure 5-87. Small-Signal Pulse Response Figure 5-88. Small-Signal Pulse Response

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5.8 Typical Characteristics (continued)

at TA = 25°C (unless otherwise noted)

AV = 1, VS = ±5 V AV = 2, VS = ±15 V
Figure 5-89. Small-Signal Pulse Response Figure 5-90. Small-Signal Pulse Response

AV = 2, VS = ±5 V AV = 1
Figure 5-91. Small-Signal Pulse Response Figure 5-92. Closed-Loop Frequency Response vs
Supply Voltage

AV = 2 AV = 1
Figure 5-93. Closed-Loop Frequency Response vs Figure 5-94. Closed-Loop Frequency Response vs
Supply Voltage Capacitive Load

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5.8 Typical Characteristics (continued)

at TA = 25°C (unless otherwise noted)

AV = 1 AV = 2
Figure 5-95. Closed Loop Frequency Response vs Figure 5-96. Closed-Loop Frequency Response vs
Capacitive Load Capacitive Load

AV = 2
Figure 5-97. Closed-Loop Frequency Response vs Figure 5-98. Total Harmonic Distortion vs Frequency
Capacitive Load

Figure 5-99. Total Harmonic Distortion vs Frequency Figure 5-100. Total Harmonic Distortion vs Frequency

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5.8 Typical Characteristics (continued)

at TA = 25°C (unless otherwise noted)

Figure 5-101. Total Harmonic Distortion vs Frequency Figure 5-102. Undistorted Output Swing vs Frequency

Figure 5-103. Undistorted Output Swing vs Frequency Figure 5-104. Undistorted Output Swing vs Frequency

Figure 5-105. Undistorted Output Swing vs Frequency Figure 5-106. Total Power Dissipation vs Ambient Temperature

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6 Detailed Description
6.1 Overview
The LM6171 is a high-speed, unity-gain-stable voltage-feedback amplifier. The device consumes only 2.5 mA of
supply current while providing a gain-bandwidth product of 100 MHz and a slew rate of 3600 V/μs. The LM6171
has additional features, such as low differential gain and phase, and high output current. The LM6171 is a great
choice in high-speed circuits.
The LM6171 is a true voltage-feedback amplifier. Unlike current-feedback amplifiers (CFAs) with a low inverting
input impedance and a high noninverting input impedance, both inputs of voltage-feedback amplifiers (VFAs)
have high-impedance nodes. The low-impedance inverting input in CFAs couples with a feedback capacitor
and causes oscillation. As a result, CFAs cannot be used in traditional op-amp circuits, such as photodiode
amplifiers, I-to-V converters, and integrators.
6.2 Functional Block Diagram

6.3 Feature Description

6.3.1 Circuit Operation
The class AB input stage in the LM6171 is fully symmetrical and has a similar slewing characteristic to the
current feedback amplifiers. In the Section 6.2, Q1 through Q4 form the equivalent of the current feedback
input buffer, RE forms the equivalent of the feedback resistor, and stage A buffers the inverting input. The
triple-buffered output stage isolates the gain stage from the load to provide low output impedance.
6.3.2 Slew Rate
The slew rate of the LM6171 is determined by the current available to charge and discharge an internal high
impedance node capacitor. The current is the differential input voltage divided by the total degeneration resistor
RE. Therefore, the slew rate is proportional to the input voltage level, and higher slew rates are achievable in
lower-gain configurations.
When a very fast, large signal pulse is applied to the input of an amplifier, some overshoot or undershoot occurs.
By placing an external series resistor, such as 1 kΩ, to the input of the LM6171, the bandwidth is reduced to help
reduce overshoot.
6.4 Device Functional Modes
The LM6171 has a single functional mode and can be used with both single-supply or split power-supply
configurations. The power-supply voltage must be greater than 9 V (±4.5 V) and less than 33 V (±16.5 V).

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7 Application and Implementation

Note
Information in the following applications sections is not part of the TI component specification,
and TI does not warrant its accuracy or completeness. TI’s customers are responsible for
determining suitability of components for their purposes, as well as validating and testing their design
implementation to confirm system functionality.

7.1 Application Information

7.1.1 Compensation for Input Capacitance
The combination of an amplifier input capacitance and gain setting resistors adds a pole that can cause peaking
or oscillation. To solve this problem, use a feedback capacitor with the following value to cancel that pole:

R ×C
CF > G R IN (1)
F

For the LM6171, a feedback capacitor of 2 pF is recommended. Figure 7-1 illustrates the compensation circuit.

Figure 7-1. Compensating for Input Capacitance

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7.1.2 Power Supply Bypassing

Bypassing the power supply is necessary to maintain low power-supply impedance across frequency.
Individually bypass both positive and negative power supplies by placing 0.01‑μF ceramic capacitors directly
to power-supply pins and 2.2‑μF tantalum capacitors close to the power-supply pins.

Figure 7-2. Power Supply Bypassing

7.1.3 Termination
In high-frequency applications, reflections occur if signals are not properly terminated. Figure 7-3 shows a
properly terminated signal and Figure 7-4 shows an improperly terminated signal.

Figure 7-3. Properly Terminated Signal Figure 7-4. Improperly Terminated Signal

To minimize reflection, use coaxial cable with matching characteristic impedance to the signal source. Terminate
the other end of the cable with the same value terminator or resistor. For commonly used cables, RG59 has a
75‑Ω characteristic impedance, and RG58 has a 50‑Ω characteristic impedance.

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7.1.4 Driving Capacitive Loads

Amplifiers driving capacitive loads can oscillate or have ringing at the output. To eliminate oscillation or reduce
ringing, place an isolation resistor as shown in Figure 7-5. The combination of the isolation resistor and the load
capacitor forms a pole to increase stability by adding more phase margin to the overall system. The desired
performance depends on the value of the isolation resistor; the bigger the isolation resistor, the more damped
the pulse response becomes. For the LM6171, a 50‑Ω isolation resistor is recommended for initial evaluation.
Figure 7-6 shows the LM6171 driving a 200‑pF load with the 50‑Ω isolation resistor.

Figure 7-5. Isolation Resistor Used to Drive Capacitive Load

Figure 7-6. The LM6171 Driving a 200‑pF Load With a 50‑Ω Isolation Resistor

7.1.5 Using Probes

Active (FET) probes are an excellent choice for taking high-frequency measurements because of a wide
bandwidth, high input impedance, and low input capacitance. However, the probe ground leads provide a long
ground loop that produces errors in measurement. Instead, ground the probes directly by removing the ground
leads and probe jackets and using scope probe jacks.
7.1.6 Components Selection and Feedback Resistor
In high-speed applications, keep all component leads short because wires are inductive at high frequency.
For discrete components, choose carbon composition-type resistors and mica-type capacitors. Surface-mount
components are preferred over discrete components for minimum inductive effect.
Large values of feedback resistors can couple with parasitic capacitance and cause undesirable effects such
as ringing or oscillation in high-speed amplifiers. For the LM6171, a feedback resistor of 510 Ω gives optimized
performance.

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7.2 Typical Applications

7.2.1 Fast Instrumentation Amplifier

Figure 7-7. Fast Instrumentation Amplifier

VIN = V2 − V1
if R6 = R2, R7 = R5 and R1 = R4
VOUT R6 R1
VIN = R2 1 + 2 R3 = 3

7.2.2 Multivibrator

Figure 7-8. Multivibrator

1
f=
2 R1C ln 1 + 2 R2
R3
f = 4 MHz

7.2.3 Pulse Width Modulator

Figure 7-9. Pulse Width Modulator

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7.3 Power Supply Recommendations

7.3.1 Power Dissipation
The maximum power allowed to dissipate in a device is defined as:

TJ max − TA
PD = θJA (2)

where
• PD is the power dissipation in a device
• TJ(max) is the maximum junction temperature
• TA is the ambient temperature
• θJA is the thermal resistance of a particular package
For example, for the LM6171 in a SOIC-8 package, the maximum power dissipation at 25°C ambient
temperature is 730 mW.
Thermal resistance, θJA, depends on parameters such as die size, package size, and package material. The
smaller the die size and package, the higher θJA becomes. The 8-pin PDIP package has a lower thermal
resistance (108°C/W) than the 8-pin SOIC-8 (172°C/W). Therefore, for higher dissipation capability, use an 8-pin
PDIP package.
The total power dissipated in a device can be calculated as:

PD = PQ + PL (3)

where
• PQ = the quiescent power dissipated in a device with no load connected at the output.
– PQ = supply current × total supply voltage with no load
• PL = the power dissipated in the device with a load connected at the output; PL is not the power dissipated by
the load.
– PL = output current × (voltage difference between supply voltage and output voltage of the same supply)
For example, the total power dissipated by the LM6171 with VS = ±15 V, and the output voltage of 10 V into a
1‑kΩ load resistor (one end tied to ground) is:

PD = PQ + PL
= 2.5 mA × 30 V + 10 mA × 15 V − 10 V
= 75 mW + 50 mW
= 125 mA

7.4 Layout
7.4.1 Layout Guidelines
7.4.1.1 Printed Circuit Boards and High-Speed Op Amps
There are many things to consider when designing a printed circuit board (PCB) for high-speed op amps.
Without proper caution, excessive ringing, oscillation, and other degraded ac performance in high-speed circuits
can be frustrating. As a rule, keep the signal traces short and wide to provide low inductance and low-impedance
paths. Ground any unused board space to reduce stray signal pickup. Also ground any critical components
at a common point to eliminate voltage drop. Sockets add capacitance to the board and can affect frequency
performance. If possible, solder the amplifier directly into the PCB without using any socket.

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8 Device and Documentation Support

TI offers an extensive line of development tools. Tools and software to evaluate the performance of the device,
generate code, and develop solutions are listed below.
8.1 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. Click on
Notifications to register and receive a weekly digest of any product information that has changed. For change
details, review the revision history included in any revised document.
8.2 Support Resources
TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight
from the experts. Search existing answers or ask your own question to get the quick design help you need.
Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do
not necessarily reflect TI's views; see TI's Terms of Use.
8.3 Trademarks
TI E2E™ is a trademark of Texas Instruments.
PAL® is a registered trademark of and used under lisence from Advanced Micro Devices, Inc..
All trademarks are the property of their respective owners.
8.4 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled
with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric changes could cause the device not to meet its published
specifications.

8.5 Glossary
TI Glossary This glossary lists and explains terms, acronyms, and definitions.

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9 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision C (March 2013) to Revision D (November 2023) Page
• Updated the numbering format for tables, figures, and cross-references throughout the document................. 1
• Added the Pin Configuration and Functions, Specifications, ESD Ratings, Thermal Information, Detailed
Description, Application and Implementation, Power Supply Recommendations, Layout, Device and
Documentation Support, and Mechanical, Packaging, and Orderable Information sections..............................1
• Changed wide unity-gain bandwidth product from 100 MHz to 76 MHz in Features ........................................ 1
• Changed –3-dB frequency from 62 MHz to 75 MHz in Features ...................................................................... 1
• Deleted text stating that LM6171 is developed in TI's vertically integrated process.......................................... 1
• Changed Operating Ratings to Recommended Operating Conditions and moved Thermal Resistance content
to new Thermal Information section .................................................................................................................. 3
• Deleted ESD information and footnote from Absolute Maximum Ratings and moved to ESD Ratings..............3
• Deleted footnote from Recommended Operating Conditions.............................................................................3
• Changed DC and AC specifications tables to Electrical Characteristics: ±15 V.................................................4
• Changed LM6171A unity-gain bandwidth from 100 MHz to 76 MHz in Electrical Characteristics: ±15 V.......... 4
• Changed LM6171A –3-dB freq for AV = +1 from 160 MHz to 200 MHz in Electrical Characteristics: ±15 V .... 4
• Changed LM6171A –3-dB freq for A V = +2 from 62 MHz to 75 MHz in Electrical Characteristics: ±15 V ........ 4
• Changed LM6171A phase margin from 40° to 58° in Electrical Characteristics: ±15 V..................................... 4
• Changed LM6171A settling time from 48 ns to 21 ns in Electrical Characteristics: ±15 V................................. 4
• Changed LM6171A propagation delay from 6 ns to 4.1 ns in Electrical Characteristics: ±15 V.........................4
• Changed 5 V DC and AC specifications tables to Electrical Characteristics: ±5 V ........................................... 6
• Changed LM6171A input common-mode voltage from ±3.7 V to ±3.2 V in Electrical Characteristics: ±5 V .....6
• Changed LM6171A –3-dB frequency for AV = +1 from 130 MHz to 190 MHz in Electrical Characteristics: ±5 V
............................................................................................................................................................................6
• Changed LM6171A –3-dB frequency for AV = +2 from 45 MHz to 75 MHz in Electrical Characteristics: ±5 V . 6
• Changed LM6171A settling time from 60 ns to 25 ns in Electrical Characteristics: ±5 V .................................. 6
• Changed LM6171A propagation delay from 8 ns to 4.5 ns in Electrical Characteristics: ±5 V ......................... 6
• Added new Typical Characteristics section for LM6171A...................................................................................8

Changes from Revision B (March 2013) to Revision C (March 2013) Page

• Changed National Semiconductor data-sheet layout to Texas Instruments format............................................1

10 Mechanical, Packaging, and Orderable Information

The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.

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PACKAGING INFORMATION

Orderable Device Status Package Type Package Pins Package Eco Plan Lead finish/ MSL Peak Temp Op Temp (°C) Device Marking Samples
(1) Drawing Qty (2) Ball material (3) (4/5)
(6)

LM6171AIM/NOPB OBSOLETE SOIC D 8 TBD Call TI Call TI -40 to 85 LM61

71AIM
LM6171AIMX/NOPB ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 (L61AIM, LM61) Samples
71AIM
LM6171BIM/NOPB OBSOLETE SOIC D 8 TBD Call TI Call TI -40 to 85 LM61
71BIM
LM6171BIMX/NOPB OBSOLETE SOIC D 8 TBD Call TI Call TI -40 to 85 LM61
71BIM
LM6171BIN/NOPB ACTIVE PDIP P 8 40 RoHS & Green NIPDAU Level-1-NA-UNLIM -40 to 85 LM6171 Samples
BIN

(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.

(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.

(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.

(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.

Addendum-Page 1
 PACKAGE OPTION ADDENDUM

www.ti.com 22-Feb-2025

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

Addendum-Page 2
 PACKAGE MATERIALS INFORMATION

www.ti.com 18-Jan-2025

TAPE AND REEL INFORMATION

REEL DIMENSIONS TAPE DIMENSIONS

K0 P1

B0 W
Reel
Diameter
Cavity A0
A0 Dimension designed to accommodate the component width
B0 Dimension designed to accommodate the component length
K0 Dimension designed to accommodate the component thickness
W Overall width of the carrier tape
P1 Pitch between successive cavity centers

Reel Width (W1)

QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE

Sprocket Holes

Q1 Q2 Q1 Q2

Q3 Q4 Q3 Q4 User Direction of Feed

Pocket Quadrants

*All dimensions are nominal

Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1
Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
LM6171AIMX/NOPB SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1

Pack Materials-Page 1
 PACKAGE MATERIALS INFORMATION

www.ti.com 18-Jan-2025

TAPE AND REEL BOX DIMENSIONS

Width (mm)
H
W

*All dimensions are nominal

Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
LM6171AIMX/NOPB SOIC D 8 2500 353.0 353.0 32.0

Pack Materials-Page 2
 PACKAGE MATERIALS INFORMATION

www.ti.com 18-Jan-2025

TUBE

T - Tube
height L - Tube length

W - Tube
width

B - Alignment groove width

*All dimensions are nominal

Device Package Name Package Type Pins SPQ L (mm) W (mm) T (µm) B (mm)
LM6171BIN/NOPB P PDIP 8 40 502 14 11938 4.32

Pack Materials-Page 3
 PACKAGE OUTLINE
D0008A SCALE 2.800
SOIC - 1.75 mm max height
SMALL OUTLINE INTEGRATED CIRCUIT

SEATING PLANE
.228-.244 TYP
[5.80-6.19]
.004 [0.1] C
A PIN 1 ID AREA
6X .050
[1.27]
8
1

.189-.197 2X
[4.81-5.00] .150
NOTE 3 [3.81]

4X (0 -15 )

4
5
8X .012-.020
B .150-.157 [0.31-0.51]
.069 MAX
[3.81-3.98] .010 [0.25] C A B [1.75]
NOTE 4

.005-.010 TYP
[0.13-0.25]

4X (0 -15 )

SEE DETAIL A
.010
[0.25]

.004-.010
0 -8 [0.11-0.25]
.016-.050
[0.41-1.27] DETAIL A
(.041) TYPICAL
[1.04]

4214825/C 02/2019

NOTES:

1. Linear dimensions are in inches [millimeters]. Dimensions in parenthesis are for reference only. Controlling dimensions are in inches.
Dimensioning and tolerancing per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed .006 [0.15] per side.
4. This dimension does not include interlead flash.
5. Reference JEDEC registration MS-012, variation AA.

www.ti.com
 EXAMPLE BOARD LAYOUT
D0008A SOIC - 1.75 mm max height
SMALL OUTLINE INTEGRATED CIRCUIT

8X (.061 )
[1.55]
SYMM SEE
DETAILS
1
8

8X (.024)
[0.6] SYMM

(R.002 ) TYP
[0.05]
5
4
6X (.050 )
[1.27]
(.213)
[5.4]

LAND PATTERN EXAMPLE

EXPOSED METAL SHOWN
SCALE:8X

SOLDER MASK SOLDER MASK

METAL METAL UNDER
OPENING OPENING SOLDER MASK

EXPOSED
METAL EXPOSED
METAL
.0028 MAX .0028 MIN
[0.07] [0.07]
ALL AROUND ALL AROUND

NON SOLDER MASK SOLDER MASK

DEFINED DEFINED

SOLDER MASK DETAILS

4214825/C 02/2019

NOTES: (continued)

6. Publication IPC-7351 may have alternate designs.

7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.

www.ti.com
 EXAMPLE STENCIL DESIGN
D0008A SOIC - 1.75 mm max height
SMALL OUTLINE INTEGRATED CIRCUIT

8X (.061 )
[1.55] SYMM

1
8

8X (.024)
[0.6] SYMM

(R.002 ) TYP
5 [0.05]
4
6X (.050 )
[1.27]
(.213)
[5.4]

SOLDER PASTE EXAMPLE

BASED ON .005 INCH [0.125 MM] THICK STENCIL
SCALE:8X

4214825/C 02/2019

NOTES: (continued)

8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.

www.ti.com
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