I2C Serial Bus Devices
I2C Serial Bus Overview (0 to 100 kbps), enhanced mode backward compatible, mixed-mode com-
A complete I2Csystem usually has at least (0 to 400 kbps) and high-speed mode munication is possible with the speed of
one microcontroller, peripheral memory, (0 to 3.4 Mbps). Because all successive the bus being controlled by the Bus
hard disk, graphic chip and other I/O enhancements to the specification are Master chip.
subsystems. The I2C bus is popular in Vcc
computing, consumer electronics and Microcontroller ADC Gate Array
communications since it allows easy two-
line communication between two systems SDA
using a Serial DAta line (SDA) and a SCL
Serial CLock line (SCL). The I2C bus has
three modes of operation: standard mode SRAM or
LCD Driver I/O Expander
EEPROM
Common I2C Application Problems
Mixed-Voltage Levels Level-Translation Example 1 Level-Translation Example 2
I2C-bus devices currently in the market range in 5V 5V 5V 3.3 V 3.3 V 5V 2.5 V
supply voltage from 1.5 V to 5 V with commen- 3.3 V 1.8 V
CBT3306 TVC3306 1.5 V
surate I/O and threshold levels. Operating mixed 1A 1B GATE 1.2 V
threshold-level devices on the same bus SCL0 SCL1
requires level translation. 2A 2B 1A 1B
SDA0 SDA1
The two level-translation examples here show 2A 2B
Enable 1OE SCL0 SCL1
how dual-channel signal switches can be used
to translate I2C signals (SDA and SCL) between 3A 3B
2OE SDA0 SDA1
mixed-voltage levels typically found in ICs GND
and systems.
Address Conflict/Bus Contention I 2C/SMBus Multiplexer Example
I2C addresses for two different functions, such VCC VCC VCC = 5 V VCC VCC VCC VCC
as LCD controller or temperature sensor, are Slave #1 Slave #2
intentionally unique to prevent bus contention. CBT3253 SDA SDA
However, when identical components are used,
1B1 SCL SCL
the designer may be forced to connect two 1B2
devices with the same address to the bus and SDA 1A
1B3
cause addressing conflicts because there is no 1B4
way to isolate one device from the others. I2C 2B1
Bus 2B2
One I2C/SMBus multiplexer solution for address Master
SCL 1B
2B3
conflicts is to use the CBT3253, a near-zero 2B4
delay, bi-directional, dual 1:4 multiplexer signal S0 VCC VCC VCC VCC
switch that operates at 5 V and is available in a S1 Slave #4 Slave #3
tiny 16-pin QFN package. Data paths are 1OE/2OE SDA SDA
selected through the use of control input select SCL SCL
pins (S0 and S1). Using this device, the SDA and
Inputs
SCL signal pair can be fanned out allowing up to Function Selection
S1 S0
four devices with identical addresses. Further, L L 1A = 1B1, 2A = 2B1 Slave #1
the CBT3253 may be used to decrease the L H 1A = 1B2, 2A = 2B2 Slave #2
loading seen by the bus master in applications H L 1A = 1B3, 2A = 2B3 Slave #3
with many I2C devices or larger wiring H H 1A = 1B4, 2A = 2B4 Slave #4
capacitance to ensure that the 400-pF maximum
allowed in the I2C specification is not exceeded.
TM
R E L I A B L E. L O G I C. I N N O V A T I O N.
PCF8574/A (8-Bit I/O Expander for I2C-Bus)
The PCF8574 and PCF8574A, which comply with Typical Application
Vcc Vcc
Philips I2C protocol, provide an 8-bit, general- 5V
purpose, remote I/O expander for the I2C bus.
These I/O expander devices have low-current PCF8574/A
P0 Temperature Sensor
consumption and include latched outputs with
high-current drive capability for directly driving SDA P1 Battery Status
SOC
LEDs. The only difference between the devices ASIC SCL Reset Signals
P2
is the I2C address. The PCF8574 has an I2C
address of 0100XXX and the address for the CPU INT P3 Status
PCF8574A is 0111XXX. MCU
A0 P4 LEDs
A1
P5
Features A2
P6
• Pin-to-pin compatible and functionally P7
equivalent with Philips PCF8574 and Push Button
PCF8574A (SOIC and TSSOP packages)
• Smallest industry package options: PCF8574/A Functional Block Diagram*
– 20-pin QFN package (62% smaller than
20-pin TSSOP) PCF8574
– 20-pin TVSOP package (23% smaller than INT 5 Interrupt
20-pin TSSOP) LP Filter
Logic
A0 1
• Two-wire I2C-bus to 8-bit bidirectional
parallel-bus expander 2 4
A1 P0
• Operating supply voltage from 2.5-V to 3 5
A2 P1
6-V VCC 6
14 P2
• Low standby-current consumption of 10 µA 7
SCL Input I2C Bus Shift P3
maximum SDA 15 8 Bit I/O Port
Filter Control Register 9
• Open drain interrupt output to signal a P4
10
change on an I/O pin P5
11
• Latched outputs with high-current drive P6
capability for driving LEDs 12
P7
• Addressed by three hardware-address pins
Write Pulse
• The difference between the PCF8574 and
16 Read Pulse
PCF8574A is the I2C address VCC Power-On
GND 8
– PCF8574: 0x20 – 0x27 (up to 8 may be Reset
used on same I2C bus)
– PCF8574A: 0x38 – 0x3F (up to 8 may be
used on same I2C bus) Pin Descriptions*
– A total of 16 PCF8574 and PCF8574A Symbol Pin Description Symbol Pin Description
devices may be used on the same I2C bus A0 1 Address Input 0 P4 9 Bi-direction I/O 4
• Top applications: A1 2 Address Input 1 P5 10 Bi-direction I/O 5
– Fan control A2 3 Address Input 2 P6 11 Bi-direction I/O 6
– LED control
P0 4 Bi-direction I/O 0 P7 12 Bi-direction I/O 7
– System monitoring
P1 5 Bi-direction I/O 1 INT 13 Interrupt Output (Active Low)
– Temperature sensor monitoring
– Push button monitoring P2 6 Bi-direction I/O 2 SCL 14 Serial Clock Line (SCL)
– 8-bit bidirectional expansion P3 7 Bi-direction I/O 3 SDA 15 Serial Data Line (SDA)
GND 8 VCC 16 Supply Voltage
*All pin numbers shown are for 16-pin SOIC and PDIP packages. See datasheets for 20-pin package options.
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