January 13, 2005 ECE 532 Analog II ⎯ Spring 2005 Page 1 of 2
CLASS POLICY & GUIDELINES
Benjamin J. Blalock, Ph. D.
Assistant Professor
Department of Electrical and Computer Engineering
email: bblalock@ece.utk.edu
webpage: www.ece.utk.edu/~bblalock
Office information: 404 Ferris Hall, ph# 974-0927
Office hrs: 10-11am Tues. & Thurs. (or by scheduled appointment)
Prerequisites: Successful completion of undergraduate-level electronics, ECE 531 or
permission, and a strong desire to improve one’s self by becoming analog-
capable.
Text: • Baker, Li, & Boyce, CMOS Circuit Design, Layout, and Simulation, IEEE
Press, 1998. At the professor’s discretion, photocopies of some of the lecture
notes may become available at Campus Copy, 1838 Cumberland Ave.
References: • Johns & Martin, Analog Integrated Circuit Design, John Wiley & Sons, 1997.
• Razavi, Design of Analog CMOS Integrated Circuits, McGraw-Hill, Inc., 2000
• Allen & Holberg, CMOS Analog Design, 2nd Ed., Oxford Univ. Press, 1987.
• Laker & Sansen, Design of Analog Integrated Circuits and Systems, McGraw-
Hill, Inc., 1994.
• Gray & Meyer, Analysis and Design of Analog Integrated Circuits, John Wiley
& Sons, 1984.
• Gregorian & Temes, Analog MOS Integrated Circuits for Signal Processing,
John Wiley & Sons, 1986.
• Tsividis, Mixed Analog-Digital VLSI Devices and Technology, McGraw-Hill,
1996.
• + class handouts (journal papers, etc.)
Grading: (7) Quizzes 50%
Projects 50%
Total 100%
Grading scale: A(>90%), B+(86 to 89%), B(80 to 85%), C+(76 to 79%), C(70 to 75%), D(60 to
69%), F(<60%).
Quiz scores become final one week after being returned. According to the professor’s
discretion, course grades may or may not be curved.
Homework will be assigned but not graded. The homework is assigned for your edification and
enjoyment. Working through the homework assignments is encouraged and strongly
recommended. Homework assignments will be made in class and/or via email. To be included
on the class email alias, immediately send me an email message (use ‘ECE532’ in the subject
heading).
Disclaimer: This syllabus is subject to minor revisions and wholesale changes.
January 13, 2005 ECE 532 Analog II ⎯ Spring 2005 Page 2 of 2
Each project report should be concise. Use your favorite word-processing software to generate
each report. Good grammar, correct spelling, and clear, accurate descriptions are expected.
Lecture classes will meet in room 510 of Ferris Hall from 8:10−9:25am on Tuesdays &
Thursdays. Class attendance is encouraged and strongly recommended.
Academic Integrity: The ECE Department takes very seriously its obligation to the University
and the Engineering Profession to produce graduates that are trustworthy, ethical, and competent
in their field; therefore, no academic dishonesty of any kind will be tolerated in this class. See
the “Hilltopics” Student Handbook for more details on this matter.
SYLLABUS
Course Topics and Order of Coverage
Week 1 (Jan13): Review, CMOS passive elements, Chpts. 1-6
Week 2 (Jan18, Jan20; Quiz#1): CMOS passive elements, noise characteristics Chpts. 7
Week 3 (Jan25, Jan27): Analog MOSFET models Chpt. 9
Week 4 (Feb1, Feb3; Quiz#2): Current sinks & sources Chpt. 20
Week 5 (Feb8, Feb10): Reference Circuits Chpt. 21
Week 6 (Feb15, Feb17; Quiz#3): Reference Circuits Chpt. 21
Week 7 (Feb22, Feb24): Single-stage amplifiers Chpt. 22
Week 8 (Mar1, Mar3; Quiz#4): Feedback amplifier design Chpts. 23
Week 9 (Mar8, Mar10): Differential amplifiers
Week 10 (Mar15, Mar17); Quiz#5): Diff. Amps (continued) Chpt. 24
Week 11 Spring Break Chpt. 24
Week 12 (Mar29, Mar31): Operational amplifiers Chpt. 25
Week 13 (Apr5, Apr7; Quiz#6): Op Amps (continued) Chpt. 25
Week 14 (Apr12, Apr14): Op Amps (continued) Chpt. 25
Week 15 (Apr19, Apr21; Quiz#7): Nonlinear analog circuits (e.g., comparators) Chpt. 26
Week 16 (Apr26): Dynamic analog circuits Chpt. 27
Disclaimer: This syllabus is subject to minor revisions and wholesale changes.
