1. Write a short note on : i. LED ii.7 Segment Display iii. Optocoupler iv.

Relay
LED (Light Emitting Diode)

• Light Emitting Diode (LED) is an important output device for visual indication in any embedded system.
• LED can be used as an indicator for the status of various signals or situations.
E.g.: 'Device ON', 'Battery low', or 'Charging of battery' conditions.
• LED is a p-n junction diode and it contains an anode and a cathode.
• For proper functioning, anode is connected to +ve and cathode to -ve terminal of supply voltage.
• A resistor is used in series to limit the current through the LED.
7-Segment LED Display
• The 7-segment LED display is an output device for displaying alpha numeric characters.
• It contains 7 LED segments arranged in a special form used for displaying characters and 1 LED for
decimal point.
• Segments are named A to G and DP for decimal point.
• Based on configuration:
o Common Anode: All anodes are commonly connected.
o Common Cathode: All cathodes are commonly connected.
• The current should be limited (typically 20mA) using resistors.
Relay
• Relay is an electro-mechanical device used as a dynamic path selector for signals and power.
• It contains a coil, a metal armature and one or more contacts.
• Operates on electromagnetic principle.
• Types:
o SPST Normally Open: Circuit closed when energized.
o SPST Normally Closed: Circuit open when energized.
o SPDT: Two paths selected based on relay state.
• A transistor-based driver circuit is used for control.
• Reed relays used for low voltage embedded applications.
2. Explain Quality attributes of Embedded Systems
Quality Attributes of Embedded Systems
Quality attributes are non-functional requirements that determine how well an embedded system
performs, beyond just doing what it's supposed to do. These attributes greatly affect the usability,
performance, and success of the system.
3.2.1 Operational Quality Attributes
These attributes affect the system when it is in its working (or online) mode.
1. Response
• What it means: Measures how fast the system reacts to input or changes in the environment.
• Why it matters: In critical systems like flight control or anti-lock braking systems (ABS), quick
response is essential to prevent accidents.
• Example: A flight control system must instantly react to turbulence or control input. Any delay could risk
passenger safety.
• Note: Not all systems require fast response. An electronic toy can afford a delay without serious
consequences.
2. Throughput
• What it means: Measures how much work the system can do in a given amount of time.
• Why it matters: High throughput means the system can handle more tasks or data efficiently.
• How it's measured: Usually measured with benchmarks – standard performance metrics.
• Example: A card reader’s throughput may be defined as transactions per minute. Higher throughput =
better performance.
3. Reliability
• What it means: Indicates how consistently the system performs without failure.
• Why it matters: Systems should run for long periods without crashing, especially in safety-critical or
commercial products.
• Key terms:
o MTBF (Mean Time Between Failures): How long the system runs before failing.
o MTTR (Mean Time To Repair): How long it takes to fix the system after a failure.
• Example: In medical devices or factory automation, a failure can have serious consequences. These
systems need high MTBF and low MTTR.
4. Maintainability
• What it means: Refers to how easily the system can be repaired or updated.
• Why it matters: Systems often need regular checkups or may fail unexpectedly; they must be easy to
maintain.
• Types:
o Scheduled (Preventive) Maintenance: Planned replacement of parts before failure.
▪ Example: Replacing ink cartridges in a printer after a certain number of pages.
o Corrective Maintenance: Fixing the system when something goes wrong.
▪ Example: Repairing the paper feed when a printer stops working.
• Availability Formula:
o A=MTBFMTBF + MTTRA = \frac{\text{MTBF}}{\text{MTBF + MTTR}}A=MTBF + MTTRMTBF
o Higher availability means the system is more accessible and functional most of the time.
5. Security
• What it means: Protects the system and its data from unauthorized access, modification, or misuse.
• Key Concepts (CIA Triad):
o Confidentiality: Only authorized users can view the data.
o Integrity: Only authorized users can change the data.
o Availability (in this context): Only authorized users can access the system and services when needed.
• Example: A Personal Digital Assistant (PDA):
o Password protection (Availability)
o Admin-only settings (Confidentiality)
o Read-only access to certain files (Integrity)
6. Safety
• What it means: Ensures that the system does not cause harm to users, the public, or the environment.
• Why it's important: Failure in hardware or software can lead to injuries, accidents, or environmental
damage.
• Example: A breakdown in a chemical plant’s control system could release toxic gases.
• Types of Threats:
o Sudden threats: Like a sudden product failure.
o Gradual threats: Like long-term radiation or chemical leakage from a faulty product.
• Design consideration: Safety analysis must be done during product development to minimize risks and
damages.

3. Explain: i. Keyboard ii. PPI

Keyboard

• Keyboard is an input device for user interfacing.

• If the number of keys required is very limited, push button switches can be used and they can be directly
interfaced to the port pins for reading.
• However, there may be situations demanding a large number of keys for user input (e.g., PDA device with
alphanumeric keypad for user data entry).
• In such situations, it may not be possible to interface each key to a port pin due to the limitation in the
number of general-purpose port pins available for the processor/controller in use, and moreover, it is
wastage of port pins.
• Matrix keyboard is an optimum solution for handling large key requirements.
• It greatly reduces the number of interface connections.
• For example:
o In direct interfacing technique, 16 keys require 16 port pins.
o In a matrix keyboard, only 8 lines are required for 16 keys.
• The 16 keys are arranged in a 4 column × 4 row matrix.
• In a matrix keyboard, the keys are arranged in a matrix fashion (i.e., connected in row and column style).
• For detecting a key press, the keyboard uses the scanning technique:
o Each row of the matrix is pulled low.
o The columns are read.
o After reading the status of each column corresponding to a row, the row is pulled high.
o The next row is pulled low and the status of columns are read.
o This process continues until all rows are scanned.
• When a row is pulled low and a key connected to that row is pressed, reading the column to which the key
is connected will give logic 0.
• Since keys are mechanical devices, de-bounce issues may occur, causing multiple key press effects for a
single key press.
• To prevent this, a proper key de-bouncing technique should be applied.
• Two de-bouncing techniques are:
o Hardware key de-bouncer circuits
o Software key de-bounce techniques
• Software de-bouncing doesn’t require additional hardware and is easy to implement.
o On detecting a key-press, the key is read again after a de-bounce delay.
o If the key press is genuine, the state will still be ‘pressed’ on the second read.
• Pull-up resistors are connected to the column lines to limit the current that flows to the Row line on a
key press.

Programmable Peripheral Interface (PPI)

• Programmable Peripheral Interface (PPI) devices are used for extending the I/O capabilities of
processors/controllers.
• Most processors/controllers provide a very limited number of I/O and data ports.
• Sometimes, a system may require more I/O ports than those supported by the processor/controller.
• A programmable peripheral interface device expands the I/O capabilities of the processor/controller.
• 8255A is a popular PPI device for 8-bit processors/controllers.
• 8255A supports 24 I/O pins.
• These I/O pins can be grouped as:
1. Three 8-bit parallel ports:
▪ Port A
▪ Port B
▪ Port C
2. Two 8-bit parallel ports (Port A and Port B) and Port C in any one of the following configurations:
▪ As 8 individual I/O pins
▪ Two 4-bit ports: Port C Upper (CU) and Port C Lower (CL)
• This configuration is achieved by manipulating the control register of 8255A.
• The control register holds the configuration for:
o Port A
o Port B
o Port C
• The bit details of the control register define how each port behaves (input/output/handshaking, etc.).
4.Discuss the inner working of Automotive Embedded Systems
Automotive embedded systems are systems where electronics take control over mechanical
systems.
Their presence in a vehicle can range from simple (mirror and wiper controls) to complex (airbag
controller and anti-lock brake systems - ABS).
Automotive embedded systems are typically built around:
• Microcontrollers
• Digital Signal Processors (DSPs)
• Or a hybrid of the two
These are generally known as Electronic Control Units (ECUs).
The number of embedded controllers in a vehicle:
• Ordinary vehicle: Around 20 to 40
• Luxury vehicle (e.g., Mercedes S, BMW 7): Around 75 to 100
Regulations and customer demands driving embedded system adoption:
• Fuel economy
• Environmental and emission standards
• Safety, comfort, infotainment
The first embedded system used in automotive applications:
• Microprocessor-based fuel injection system introduced by Volkswagen 1600 in 1968.
Types of Electronic Control Units (ECUs)
High-Speed Electronic Control Units (HECUs)
• Used in critical control units requiring fast response
• Examples:
o Fuel injection systems
o Antilock brake systems (ABS)
o Engine control
o Electronic throttle
o Steering controls
o Transmission control unit
o Central control unit
Low-Speed Electronic Control Units (LECUs)
• Used in non-critical applications where response time is less important
• Built around low-cost microcontrollers/microprocessors or DSPs
• Examples:
o Audio controllers
o Door locks (passenger and driver)
o Power windows (door glass control)
o Wiper control
o Mirror control
o Seat control systems
o Headlamp and tail lamp controls
o Sunroof control unit
5. Explain how RTOS achieves accurate time management
'Real-Time' implies deterministic timing behaviour.
• Deterministic timing behaviour in RTOS context means the OS services consumes only known and
expected amounts of time regardless the number of services.
• A Real-Time Operating System or RTOS implements policies and rules concerning time-critical allocation
of a system's resources.
• The RTOS decides which applications should run in which order and how much time needs to be allocated
for each application.
• Predictable performance is the hallmark of a well-designed RTOS.
• This is best achieved by the consistent application of policies and rules.
• Policies guide the design of an RTOS.
• Rules implement those policies and resolve policy conflicts.
• Windows CE, QNX, VxWorks, MicroC/OS-II, etc. are examples of Real-Time Operating Systems
(RTOS).
The Real-Time Kernel
• The kernel of a Real-Time Operating System is referred as Real-Time kernel.
• The Real-Time kernel is highly specialised and it contains only the minimal set of services required for
running the user applications/tasks.
• The basic functions of a Real-Time kernel are:

• Task/Process Management Deals with setting up the memory space for the tasks loading the task's code
into the memory space allocating system resources setting up a Task Control Block (TCB) for the task
task/process termination/deletion. A Task Control Block (TCB) is used for holding the information
corresponding to a task. TCB usually contains the following set of information:
• Task ID: Task Identification Number
• Task State: The current state of the task (e.g. State = 'Ready' for a task which is ready to execute)
• Task Type: Indicates what is the type for this task. The task can be a hard real time or soft real
• time or background task.
• Task Priority: Task priority (e.g. Task priority = 1 for task with priority = 1)
• Task Context Pointer: Pointer for context saving
• Task Memory Pointers: Pointers to the code memory, data memory and stack memory for the task
• Task System Resource Pointers: Pointers to system resources (semaphores, mutex, etc.) used by
• the task
• Task Pointers: Pointers to other TCBs (TCBs for preceding, next and waiting tasks)
• Other Parameters: Other relevant task parameters

• The parameters and implementation of the TCB is kernel dependent.

• The TCB parameters vary across different kernels, based on the task management implementation.
• Task management service utilises the TCB of a task in the following way:
• Creates a TCB for a task on creating a task
• Delete/remove the TCB of a task when the task is terminated or deleted
• Reads the TCB to get the state of a task
• Update the TCB with updated parameters on need basis (e.g. on a context switch)
• Modify the TCB to change the priority of the task dynamically
• Task/Process Scheduling deals with sharing the CPU among various tasks/processes.
• A kernel application called 'Scheduler' handles the task scheduling.
• Scheduler is nothing but an algorithm implementation, which performs the efficient and optimum
scheduling of tasks to provide a deterministic behaviour.
• Task/Process Synchronisation deals with synchronising the concurrent access of a resource, which is
shared across multiple tasks and the communication between various tasks.

• Error/Exception Handling: Deals with registering and handling the errors occurred/exceptions raised
during the execution of tasks. Insufficient memory, timeouts, deadlocks, deadline missing, bus error, divide
 by zero, unknown instruction execution, etc. are examples of errors/exceptions. Errors/Exceptions can
happen at the kernel level services or at task level.
Deadlock is an example for kernel level exception, whereas timeout is an example for a task level
exception. The OS kernel gives the information about the error in the form of a system call (API).
Watchdog timer is a mechanism for handling the timeouts for tasks.
Memory Management: RTOS makes use of 'block' based memory allocation technique, instead of
the usual dynamic memory allocation techniques used by the GPOS. RTOS kernel uses blocks of fixed size
of dynamic memory and the block is allocated for a task on a need basis. The blocks are stored in a 'Free
Buffer Queue’. To achieve predictable timing and avoid the timing overheads, most of the RTOS kernels
allow tasks to access any of the memory blocks without any memory protection. RTOS kernels assume
that the whole design is proven correct and protection is
unnecessary. Some commercial RTOS kernels allow memory protection as optional.
Interrupt Handling: Deals with the handling of various types of interrupts. Interrupts provide Real-Time
behaviour to systems. Interrupts inform the processor that an external device or an associated
task requires immediate attention of the CPU. Interrupts can be either Synchronous or Asynchronous.
Synchronous interrupts: Occur in sync with the currently executing task. Usually the software interrupts
fall under this category. Divide by zero, memory segmentation error, etc. are examples of synchronous
interrupts. For synchronous interrupts, the interrupt handler runs in the same context of the interrupting
task.
Asynchronous interrupts: Occur at any point of execution of any task, and are not in sync with the
currently executing task. The interrupts generated by external devices (by asserting the interrupt line of the
processor/controller to which the interrupt line of the device is connected) connected to the
processor/controller, timer overflow interrupts, serial data reception/ transmission interrupts, etc. are
examples for asynchronous interrupts. For asynchronous interrupts, the interrupt handler is usually written
as separate task and it runs in a different context. Hence, a context switch happens while handling the
asynchronous interrupts. Priority levels can be assigned to the interrupts and each interrupt can be enabled
or disabled individually. Most of the RTOS kernel implements 'Nested Interrupts' architecture. Interrupt
nesting allows the pre-emption (interruption) of an Interrupt Service Routine (ISR), servicing an interrupt,
by a high priority interrupt.
Time Management : Accurate time management is essential for providing precise time reference for all
applications. The time reference to kernel is provided by a high-resolution Real-Time Clock (RTC)
hardware chip (hardware timer).The hardware timer is programmed to interrupt the processor/controller at
a fixed rate. This timer interrupt is referred as ‘Timer tick’ and is taken as the timing reference by the
kernel. The 'Timer tick' interval may vary depending on the hardware timer.
Usually the 'Timer tick' varies in the microseconds range.The time parameters for tasks are expressed as
the multiples of the ‘Timer tick'. The System time is updated based on the 'Timer tick’. If the System time
register is 32 bits wide and the 'Timer tick' interval is 1 microsecond, the System time register will reset in.
The 'Timer tick' interrupt is handled by the 'Timer Interrupt' handler of kernel.
The 'Timer tick' interrupt can be utilised for implementing the following actions:
Save the current context (Context of the currently executing task).
Increment the System time register by one. Generate timing error and reset the System time register if the
timer tick count is greater than the maximum range available for System time register.
Update the timers implemented in kernel (Increment or decrement the timer registers for each timer
depending on the count direction setting for each register. Increment registers with count direction setting
= 'count up' and decrement registers with count direction setting = 'count down').
• Activate the periodic tasks, which are in the idle state.
• Invoke the scheduler and schedule the tasks again based on the scheduling algorithm.
• Delete all the terminated tasks and their associated data structures (TCBs).
• Load the context for the first task in the ready queue. Due to the re-scheduling, the ready task might be
changed to a new one from the task, which was preempted by the 'Timer Interrupt' task.
 Hard Real-Time
• Real-Time Operating Systems that strictly adhere to the timing constraints for a task are referred as
'Hard Real-Time' systems.
• They must meet the deadlines for a task without any slippage.
• Missing any deadline may produce catastrophic results for Hard Real-Time Systems,
including permanent data loss and irrecoverable damages to the system/users.
• Hard Real-Time systems emphasise the principle ‘A late answer is a wrong answer’.
• Air bag control systems and Anti-lock Brake Systems (ABS) of vehicles are typical examples for
Hard Real-Time Systems.
• Any delay in the deployment of the air bags makes the life of the passengers under
threat.
• Hard Real-Time Systems does not implement the virtual memory model for handling the memory.
• This eliminates the delay in swapping in and out the code corresponding to the task to and from the
primary memory.
• Most of the Hard Real-Time Systems are automatic and does not contain a Human in the Loop
(HITL).
• The presence of human in the loop for tasks introduces unexpected delays in the task execution.
Soft Real-Time
• Real-Time Operating Systems that do not guarantee meeting deadlines, but offer the best effort to
meet the deadline are referred as 'Soft Real-Time' systems.
• Missing deadlines for tasks are acceptable for a Soft Real-time system if the frequency of deadline
missing is within the compliance limit of the Quality of Service (QoS).
• A Soft Real-Time system emphasises the principle 'A late answer is an acceptable answer, but it
could have done bit faster’.
• Soft Real-Time systems most often have a human in the loop (HITL).
• Automated Teller Machine (ATM) is a typical example for Soft-Real-Time System.
• If the ATM takes a few seconds more than the ideal operation time, nothing fatal happens.
• An audio-video playback system is another example for Soft Real-Time system.
• No potential damage arises if a sample comes late by fraction of a second, for playback.

6. WACP to illustrate the multithreaded application

#include <windows.h>
#include <stdio.h>

// Child thread function

DWORD WINAPI ChildThread(LPVOID lpParam) {
for (int i = 0; i <= 10; ++i) {
printf("Executing Child Thread: Counter = %d\n", i);
Sleep(500); // 500 ms delay
}
return 0;
}

// Main function
int main() {
HANDLE hThread;
DWORD dwThreadID;
 // Create the child thread
hThread = CreateThread(
NULL, // default security attributes
0, // default stack size
ChildThread, // thread function
NULL, // parameter to thread function
0, // default creation flags
&dwThreadID // returns the thread identifier
);

if (hThread == NULL) {
printf("Thread Creation Failed\nError No: %lu\n", GetLastError());
return 1;
}

// Main thread counting from 0 to 10

for (int i = 0; i <= 10; ++i) {
printf("Executing Main Thread: Counter = %d\n", i);
Sleep(500); // 500 ms delay
}

// Wait for the child thread to finish

WaitForSingleObject(hThread, INFINITE);

// Close the thread ha

7. List and explain different types of PROM

• The program memory or code storage memory of an embedded system stores the program instructions.
• The code memory retains its contents even after the power is turned off.
It is generally known as non-volatile storage memory.
• It can be classified into different types as shown:

Masked ROM (MROM):

 • Masked ROM is a one-time programmable device.
• Masked ROM makes use of the hardwired technology for storing data.
• The device is factory programmed by masking and metallisation process at the time
of production itself, according to the data provided by the end user.
• Advantage – low cost for high volume production.
• Limitation - inability to modify the device firmware
against firmware upgrades.
• Since the MROM is permanent in bit storage, it is not possible to alter the
bit information.
• Different mechanisms are used for the masking process of the ROM, like
1. Creation of an enhancement or depletion mode transistor through channel implant.
2. By creating the memory cell either using a standard transistor or a high threshold transistor.
• In the high threshold mode, the supply voltage required to turn ON the transistor is above
the normal ROM IC operating voltage.
• This ensures that the transistor is always off and the memory cell stores always logic 0.
Programmable Read Only Memory (PROM) / (OTP)
• One Time Programmable Memory (OTP) or PROM is not pre-programmed by the manufacturer.
• The end user is responsible for programming these devices.
• This memory has nichrome or polysilicon wires arranged in a matrix. These wires can be
functionally viewed as fuses.
• It is programmed by a PROM programmer which selectively burns the fuses according to the bit
pattern to be stored.
• Fuses which are not blown/burned represents a logic “1” whereas fuses which are blown/burned
represents a logic 0.
• The default state is logic "1".
• OTP is widely used for commercial production of embedded systems whose prototyped versions
are proven and the code is finalised.
• It is a low cost solution for commercial production.
• OTPs cannot be reprogrammed.
Erasable Programmable Read Only Memory (EPROM)
• Erasable Programmable Read Only Memory (EPROM) gives the flexibility to re-program
the same chip.
• EPROM stores the bit information by charging the floating gate of an FET.
• Bit information is stored by using an EPROM programmer, which applies high voltage to
charge the floating gate.
• EPROM contains a quartz crystal window for erasing the stored information.
• If the window is exposed to ultraviolet rays for a fixed duration, the entire memory will be
erased.
• Even though the EPROM chip is flexible in terms of re-programmability, it needs to be
taken out of the circuit board and put in a UV eraser device for 20 to 30 minutes.
• It is a tedious and time-consuming process.
FLASH
Flash memory is a variation of EEPROM technology
It combines the re- programmability of EEPROM and the high capacity of standard ROMs.
FLASH is the latest ROM technology.
Most popular ROM technology used in today's embedded designs.
FLASH memory is organised as sectors (blocks) or pages.
FLASH memory stores information in an array of floating gate MOSFET transistors.
The erasing of memory can be done at sector level or page level without affecting the other sectors
or pages.
Each sector/page should be erased before re-programming.
The typical erasable capacity of FLASH is 1000 cycles.
E.g.: W27C512 from WINBOND is an example of 64KB FLASH memory

Non-Volatile RAM (NVRAM)

• Non-volatile RAM is a random access memory with battery backup.
• It contains static RAM based memory and a minute battery for providing supply to
the memory in the absence of extemal power supply.
• The memory and battery are packed together in a single package.
• The life span of NVRAM is expected to be around 10 years.
• E.g.: DS1644 from Maxim/Dallas is an example of 32KB NVRAM.

8. Explain Characteristics of Embedded Systems

Characteristics of an Embedded System (Detailed Explanation)
Embedded systems are specialized computing systems designed to perform dedicated functions.
They have distinct characteristics that differentiate them from general-purpose computers.
1. Application and Domain Specific
• Purpose-Built: Each embedded system is developed to perform a specific task or set of
tasks.
• Not Reusable Across Domains: It cannot be reused for other applications or domains
because it is tightly coupled with its intended function.
o Example: A microwave oven’s embedded system cannot be used in an air
conditioner since the functions, controls, and requirements are different.
• Domain Specialization: Systems are designed with consideration of the specific
requirements of the domain they serve (e.g., automotive, medical, consumer electronics).
2. Reactive and Real-Time
• Constant Interaction: Embedded systems continuously monitor and interact with the
external environment using sensors and actuators.
• Reactive: They respond to changes (called events) in their environment. These events could
be periodic (like a temperature check every second) or unpredictable (like a sudden brake in
a car).
• Real-Time Operation:
o The system must respond within a defined time frame to ensure correct operation.
o Failure to respond in time may lead to system failure or danger (especially in
mission-critical applications).
o Hard Real-Time: Missing a deadline is unacceptable (e.g., airbag system).
o Soft Real-Time: Occasional delays are tolerable (e.g., video streaming).
• Design Consideration: Must account for the worst-case execution time to ensure all
deadlines are met.
3. Operates in Harsh Environments
• Deployment Areas: Many embedded systems are installed in environments with:
o High temperature
o Dust or moisture
o Mechanical shock or vibrations
o Power supply fluctuations
• Robust Design Required:
o Use of high-grade components (e.g., industrial or military-grade).
 o Protective enclosures and shock absorbers.
o Extra precautions for long-term operation (e.g., corrosion resistance, temperature
tolerance).
o Example: Embedded systems in space exploration must withstand extreme
temperatures and radiation.
4. Distributed
• Part of a Larger System: Embedded systems often work as subsystems within a larger
system, forming a distributed network of systems.
• Coordination: Each unit performs a dedicated task but communicates with others for
overall functionality.
o Example: An automatic vending machine includes:
▪ A payment module (card reader)
▪ A selection interface (buttons/display)
▪ A dispensing mechanism
▪ All these are independent but must work together seamlessly.
• Advantages of Distribution:
o Easier maintenance and modular design.
o Improved reliability (failure of one part doesn’t always crash the entire system).
o Scalability and flexibility in design.
9. Explain different types of RAM
• RAM generally falls into three categories: Static RAM (SRAM), Dynamic RAM (DRAM)
and Non-Volatile RAM (NVRAM).

Static RAM (SRAM):

• Static RAM stores data in the form of voltage.
• They are made up of flip-flops.
• Static RAM is the fastest form of RAM available.
• Fast due to its resistive networking and switching capabilities.
• In typical implementation, an SRAM cell (bit) is realised using six transistors (or 6
MOSFETs).
• Four of the transistors are used for building the latch (flip-flop) part of the memory cell and
two for controlling the access.

• The access to the memory cell is controlled by Word Line, which controls the access
transistors (MOSFETs) Q5 and Q6.
• The access transistors control the connection to bit lines B & B\.
• In order to write a value to the memory cell, apply the desired value to the bit control lines
(For writing 1, make B = 1 and B\ = 0; For writing 0, make B = 0 and B\ = 1) and assert the Word
Line (Make Word line high).
• This operation latches the bit written in the flip-flop.
• For reading the content of the memory cell, assert both B and bit
• lines to 1 and set the Word line to 1.
• The major limitations of SRAM are low capacity and high cost.
Dynamic RAM (DRAM)
• Dynamic RAM stores data in the form of charge.
• They are made up of MOS transistor gates.
• Advantages – high density and low cost compared to SRAM.
• Disadvantage – since the information is stored as charge it gets leaked off with time and to
prevent this they need to be refreshed periodically.
• Special circuits called DRAM controllers are used for the refreshing operation.
• The refresh operation is done periodically in milliseconds interval.
Fig: DRAM cell implementation

10.Explain fundamental issues in hardware software co design

1. Selecting the Model
• A model helps in understanding and describing a system at different stages of its design.
• Models may represent functionality, data flow, control flow, or structure.
• Challenge: Which model to use?
o Early stages (Requirement/Specification phase): Focus on what the system should
do. No need for low-level implementation details.
o Later stages (Design/Implementation phase): Focus shifts to how the system will
work — details like modules, interconnections, and execution.
• Common practice: Use different models in different phases — often switch between:
o Functional model
o Structural model
o FSM (Finite State Machines)
o Data Flow Graphs (DFGs)
2. Selecting the Architecture
• Architecture defines the structure, components, and data flow in a system.
• It’s the blueprint for how the system will be built and how different parts interact.
• Different types of architecture solve different problems:
a. Controller Architecture
• Implements Finite State Machines (FSM).
• Uses:
o State Register: Holds current state
 o Combinational Logic: Calculates next state and output
• Best for control-heavy tasks (e.g., elevator control, traffic lights).
b. Datapath Architecture
• Focuses on processing data using operations like add, compare, move, etc.
• Includes: Registers, ALUs, Counters, Buses, Ports
• Best for data-intensive applications (e.g., image processing, signal filtering).
c. FSMD Architecture (Finite State Machine with Datapath)
• Combines both control and data handling.
• Controller issues control signals, datapath executes operations.
• Widely used in custom processors and digital systems.
3. Types of Instruction Set Architectures
a. CISC (Complex Instruction Set Computing)
• Uses powerful single instructions to perform complex tasks.
• Example: CJNE in 8051 checks a condition and jumps — in one instruction.
• Pros: Less memory use, fewer instructions.
• Cons: Complex hardware (microcode decoders).
b. RISC (Reduced Instruction Set Computing)
• Uses simple, fast instructions that execute in one clock cycle.
• Requires more instructions to complete a task but allows pipelining and better
performance.
• Used in ARM processors, microcontrollers, etc.
c. VLIW (Very Long Instruction Word)
• Executes multiple operations in one long instruction.
• Uses multiple ALUs (Arithmetic Logic Units) in parallel.
• Great for multimedia, DSP, or graphics applications.
d. SIMD (Single Instruction, Multiple Data)
• Executes the same instruction on multiple data simultaneously.
• Good for parallelizable problems (e.g., image filters, matrix math).
e. MIMD (Multiple Instruction, Multiple Data)
• Each processor runs its own instruction stream on its own data.
• Example: Multiprocessor systems, multi-core CPUs.
• Communication via shared memory or message passing.
4. Selecting the Language
• Programming languages map models into real system implementations.
• No strict rule for which language must be used:
o Software models: C, C++, Java, C#, Python
o Hardware models: VHDL, Verilog, SystemC
• Important factors:
o Language must match the model’s nature.
o Should be able to express the model easily.
• Example:
o C++ → Object-oriented models
o VHDL → Hardware state machines or datapaths
5. Partitioning System Requirements into Hardware and Software
• One of the most critical and difficult tasks.
• Some parts of a system can be implemented in:
o Hardware → Faster, more power-efficient, but costlier and harder to change.
o Software → Flexible, easier to develop and update, but slower.
• Design needs to decide:
 o Which features go in firmware/software
o Which features need dedicated hardware
• Trade-offs considered:
o Performance
o Cost
o Power consumption
o Reusability
o Flexibility
• Example:
o In a camera: Image processing (hardware), Menu system/UI (software)
11. With neat diagram explain Operating System architecture.
An Operating System (OS) acts as an intermediary between user applications and hardware
resources, providing essential services to manage system operations efficiently. Its primary
functions include:
• User Convenience: Simplifying system usage for users.
• Resource Management: Efficiently organizing and managing system resources.

In embedded systems, the OS ensures that applications can interact with hardware components
seamlessly, often under strict timing constraints.

The kernel is the core of the operating system and is responsible for managing the system resources and the
communication among the hardware and other system services.
• Kernel acts as the abstraction layer between system resources and user applications.
• Kernel contains a set of system libraries and services.
For a general purpose OS, the kernel contains different services for handling the following:
Process management deals with managing the processes/tasks.
• Process management includes
• Setting up the memory space for the process
• Loading the process's code into the memory space
• Allocating system resources
• Scheduling and managing the execution of the process
• Setting up and managing the Process Control Block (PCB)
• Inter Process Communication and synchronisation
 • Process termination/deletion, etc.
Primary Memory Management
• The term primary memory refers to the volatile memory (RAM) where processes are loaded
and variables and shared data associated with each process are stored.
• The Memory Management Unit (MMU) of the kernel is responsible for Keeping track of
which part of the memory area is currently used by which process
• Allocating and De-allocating memory space on a need basis (Dynamic memory allocation)

File System Management: File is a collection of related information.

• A file could be a program (source code or executable), text files, image files, word
documents, audio/video files, etc.
• The file system management service of Kernel is responsible for The creation, deletion and
alteration of files
• Creation, deletion and alteration of directories
• Saving of files in the secondary storage memory (e.g. Hard disk storage)
• Providing automatic allocation of file space based on the amount of free space available
• Providing a flexible naming convention for the files
• The various file system management operations are OS dependent.
• For example, the kernel of Microsoft DOS OS supports a specific set of file system
management operations and they are not the same as the file system operations supported by
UNIX Kernel.

I/O System (Device) Management

• Kernel is responsible for routing the I/O requests coming from different user applications to
the appropriate I/O devices of the system.
• In a well-structured OS, the direct accessing of I/O devices are not allowed and the access to
them are provided through a set of Application Programming Interfaces (APIs) exposed by
the kernel.
• The kernel maintains a list of all the I/O devices of the system.
• May be available in advance or updated dynamically as and when a new device is installed.
• The service Device Manager of the kernel is responsible for handling all I/O device related
operations.
• The kernel talks to the I/O device through a set of low-level systems calls, which are
implemented in a service called device drivers.
• Device Manager is responsible for Loading and unloading of device drivers
• Exchanging information and the system specific control signals to and from the device

Secondary Storage Management

• The secondary storage management deals with managing the secondary storage memory
devices, if any, connected to the system.
• Secondary memory is used as backup medium for programs and data since the main
memory is volatile.
• In most of the systems, the secondary storage is kept in disks (Hard Disk).
• The secondary storage management service of kernel deals with
• Disk storage allocation
• Disk scheduling (Time interval at which the disk is activated to backup data)
• Free Disk space management
Protection Systems
• Most of the modern operating systems are designed in such a way to support multiple users
with different levels of access permissions. E.g. ‘Administrator’, ‘Standard’, ‘Restricted’
permissions in Windows XP.
• Protection deals with implementing the security policies to restrict the access to both user
and system resources by different applications or processes or users.
• In multiuser supported operating systems, one user may not be allowed to view or modify
the whole or portions of another user's data or profile details.
• In addition, some application may not be granted with permission to make use of some of
the system resources.
• This kind of protection is provided by the protection services running within the kernel.
Interrupt Handler
Kernel provides handler mechanism for all external/internal interrupts generated by the system
12. Explain In System Programming (ISP)
In-System Programming (ISP) is a technique used to program or update the firmware of a
microcontroller or microprocessor directly while it is still soldered into the circuit board. You
do not need to remove the chip for reprogramming.
Key Concept:
• The firmware (the program that runs on the microcontroller) is embedded within the
system.
• ISP allows developers or users to reprogram the memory (usually FLASH) on the target
board without removing the chip from the board.
Features:
• Flexible and convenient for firmware updates and development.
• No need for a separate programmer hardware.
• Requires that the chip supports ISP, which means it must be capable of receiving
programming signals while powered and on-board.
• Can be done using PC software tools and standard communication ports (USB, Serial,
Parallel).
• Typically uses serial communication protocols such as:
o SPI (Serial Peripheral Interface)
o JTAG (Joint Test Action Group)
o Proprietary interfaces depending on manufacturer
How It Works:
• The chip is powered into a special ISP mode.
• The chip’s Boot ROM (a small permanent memory block) takes over execution and listens
for programming commands.
• Using a serial connection, a PC sends data and instructions to the chip to:
o Erase old firmware
o Write new firmware
o Verify written contents
• Once programming is complete, the chip is reset or restarted, and it begins executing the
newly programmed firmware.
Boot ROM Role in ISP:
• Boot ROM is factory programmed memory that contains low-level firmware
programming instructions.
• It is activated during ISP mode and enables read, write, and erase operations on FLASH
memory.
 • Execution starts from Boot ROM during ISP mode rather than the usual application code.
Applications:
• Firmware development and debugging
• Field upgrades without hardware replacement
• Easier production programming for devices