0% found this document useful (0 votes)
8 views14 pages

Level of Integration

Uploaded by

jhayuvraj2023
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
0% found this document useful (0 votes)
8 views14 pages

Level of Integration

Uploaded by

jhayuvraj2023
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 14

 Number of gates fabricated in single IC.

 SSI – Small scale integration – 12 gates/chip

 MSI – Medium scale integration – 100 gates/chip

 LSI – Large scale integration – 1K gates/chip


Level of
Integration  VLSI – Very large scale integration – 10K gates/chip

 ULSI – Ultra large scale integration – 100K gates/chip


 These ICs are compared using certain performance specifications.

1. Power Dissipation
2. Propagation Delay
3. Fan-In and Fan-Out

Characteristics 4. Input logic level

of Digital IC’s 5. Output logic level


6. Compatibility
7. Noise margin
8. Speed – Power product
 This is the mean power of logic circuit draws from the supply
during one complete cycle.

 This parameter is very important because if the power dissipation is


large, then the life period of the IC is reduced.

Power  It should be noted that in one complete cycle, the IC is in logic ‘1’ for
Dissipation half the time and in logic ‘0’ during the remaining half.

 The power dissipation of a logic gate is equal to the de supply


voltage (VCC) times the average supply current IC).

 Hence the power dissipation should be as minimum as possible.


 This parameter characterizes the speed of a logic circuit.

 The propagation delay of IC is the mean time required for a


pulse to pass through the IC.

Propagation  It is thus defined as the time interval between a change in input


Delay and the resulting change in the output of an IC. It is represented
by tp.
Propagation
Delay +
=
2

Where, tpHL – the time it takes the o/p to go from High to Low

tpLH – time it takes the i/p to go from Low to High


 Fan-In - Fan in of a logic circuit gives the maximum number
of inputs that can be connected to the logic circuit without
impairing other primary parameters.

 The fan-out is defined as the maximum number of inputs (load)


Fan-In and
that can be connected to the output of a gate without degrading
Fan-Out
the normal operation.

 Fan Out is calculated from the amount of current available in


the output of a gate and the amount of current needed in each
input of the connecting gate
Fan-In and
Fan-Out
 If the input voltage level changes without changing the output, this is
known as Input Logic Level .

 The input is either in logic 0 – low(0V)or logic 1 – High(+5 V) some


tolerance is allowed to the input voltage.
Input Logic
 Eg: If the input voltage may change from 0V to 0.8V without
level (VlL and changing the output level. This voltage of 0.87V is defined as the
VlH) Maximum low input voltage (VIL).

 If the logic 1 may change from + 5V to + 2V without affecting, the


output level, then the + 2V is known us the Minimum high level
input voltage (VIH).
 The output voltage is at 0V for logic 0 and at 5V for logic 1.

 Eg: In supply voltage variations, voltage drop across resistors


etc., so these voltages tend to vary. Thus any voltage say, from
Output Logic 0V to 0.4V is considered as low output.
level (VlL and
 Similarly any voltage from 2.7V to 5V is considered as logic 1.
VlH)
 Thus the worst-case output voltages are the Maximum low
level output voltage (VOL) and the Minimum high level
output voltages (VOH).
Input and
output logic
level
 Compatibility is defined as the ability of one device to drive
the input of another device.

 If the output of one device is connected to the input of another


device, for both the devices the Input Logic Level and Output
Compatibility Logic Level must be same, then these two devices are
compatible .
 There is a minimum permissible variation between the drive
device and the load device this difference is known as the
noise margin.

 As long as the noise level of any stray interference picked by


Noise Margin the various leads of the device is within this value of 0.4V the
input of the load device is not affected.
Noise Margin
 It is specified by the manufacture as a measure of the
performance of a logic circuit based on the product of the
propagation delay time and the power dissipation at a specified
frequency.
SPEED –
POWER  It is expressed in the units of joules (J).
PRODUCT  Normally, the minimum value of speed-power product is
desirable for better performance.

The advantages of ICs : (i) Extremely small in size, (ii) Low power consumption,
(iii) Reliability, (iv) Reduced cost, (v) Very small weight and (vi) Easy replacement.

You might also like