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The document outlines a series of exercises related to analog circuits, specifically focusing on cascades and current mirrors. It includes tasks such as computing output resistance, designing a cascode current source, calculating voltage gains, and designing CMOS amplifiers and current mirrors. Each exercise requires verification through simulations and provides specific parameters for calculations.

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23 views2 pages

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The document outlines a series of exercises related to analog circuits, specifically focusing on cascades and current mirrors. It includes tasks such as computing output resistance, designing a cascode current source, calculating voltage gains, and designing CMOS amplifiers and current mirrors. Each exercise requires verification through simulations and provides specific parameters for calculations.

Uploaded by

fxx78701
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Ain Shams University Analog Circuits (1)

Faculty of Engineering (ECE 312)


ECE Dept.

Exercise 3
Cascodes and Current Mirrors1
You are required to verify all your answers by simulations.

Figure 1

1. Compute the output resistance of the circuits depicted in Fig. 1. Assume all of the transistors operate
in saturation and gmrO >> 1.

2. The cascode current source shown in Fig. 2 must be designed for a


bias current of 0.5 mA. Assume nCox = 100 A/V2 and VTH = 0.4 V.
a. Neglecting channel-length modulation compute the required
value of Vb2. What is the minimum tolerable value of Vb1 if M2
must remain in saturation?
b. Assuming  = 0.1 V-1, calculate the output impedance of the
circuit.
Figure 2
3. Calculate the voltage gain of each stage illustrated in Fig. 3.

4. Design the CMOS cascode amplifier of Fig. 4 for a voltage gain of 200 and a power budget of 2
mW with VDD = 1.8 V. Assume (W/L)2 = (W/L)3 = (W/L)4 = 20/0.18 and p = 2n = 0.2 V-1. Determine
the required DC levels of Vin and Vb3 and find (W/L)1. For simplicity, assume Vb1 = Vb2 = 0.9 V.

Figure 3 Figure 4

1
For extra problems, check chapter 9 problems in Fundamentals of Microelectronics 1st E (B. Razavi).
5. We wish to generate two currents equal to 50 A and 230 A from a reference of 130 A. Design
an npn current mirror for this purpose. Neglect the base currents.

6. Calculate Icopy in each of the circuits shown in Fig. 5. Assume all of the transistors operate in
saturation.

Figure 5

7. The common-source stage depicted in Fig. 6 must be designed for a voltage gain of 26 dB
and a power budget of 2 mW. Assuming (W/L)1 = 20/0.18, λn = 0.1V−1, and λp = 0.2V−1,
design the circuit.

Figure 6

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