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The document outlines the course EEE2040-04: Digital Logic Circuit, including textbook references, instructor and teaching assistant contact information, class schedule, and office hours. It details the lecture topics covering various aspects of digital logic design, including number systems, Boolean algebra, and circuit design methodologies. Additionally, it provides an overview of binary arithmetic and the representation of negative numbers.

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0% found this document useful (0 votes)
43 views33 pages

Wk1 Chap1

The document outlines the course EEE2040-04: Digital Logic Circuit, including textbook references, instructor and teaching assistant contact information, class schedule, and office hours. It details the lecture topics covering various aspects of digital logic design, including number systems, Boolean algebra, and circuit design methodologies. Additionally, it provides an overview of binary arithmetic and the representation of negative numbers.

Uploaded by

kristen03020
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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EEE2040-04: Digital Logic Circuit

Text Book (any of the editions below):


• Charles H. Roth, Jr. and Larry L. Kinney, “Fundamentals of Logic
Design”, 7th Edition, 2014/2020.
• Charles H. Roth, Jr., “Fundamentals of Logic Design”, 5th Edition,
2006

(2006, 5th edition) (2010, 6th edition) (2014, 7th edition) (2020, 7th edition)

March 2025
EEE2040-04: Digital Logic Circuit

Instructor: Dr. Kar-Ann Toh


Office: Engineering C216
Email: katoh@yonsei.ac.kr
URL: https://milab.yonsei.ac.kr/
Office hours:
Tuesday: 9am-11am, Thursday: 9am-10am

Teaching Assistant: Hari Kang


Email: hariver1220@yonsei.ac.kr
EEE2040-04: Digital Logic Circuit

Class Time
Tuesday: 8am (Lecture, Pre-recorded video)
Thursday: 1pm – 2:50pm (Lecture/Quiz)
Class Venue:
face-to-face (Thur: EngHB039) + Pre-recorded (Tue)
* Any changes will be announced and posted on

LearnUS Notice Board


EEE2040-04: Digital Logic Circuit
URL: https://open.yonsei.ac.kr/
Login: student ID Password: your own password
EEE2040-04: Digital Logic Circuit
URL: https://milab.yonsei.ac.kr/
EEE2040-04: Digital Logic Circuit
Lecture Contents

Topics:
• Chapter 1: Introduction: Number Systems and Conversion
• Chapter 2-3: Boolean Algebra
• Chapter 4: Applications of Boolean Algebra/Minterm and Maxterm Expansions
• Chapter 5: Karnaugh Maps
• Chapter 6: Quine-McCluskey Method
• Chapter 7: Multi-Level Gate Circuits/NAND and NOR Gates
• Chapter 8: Combinational Circuit design and Simulation Using Gate
• Chapter 9: Multiplexers, Decoders, and Programmable Logic Devices
• Chapter 11: Latches and Flip-Flops
• Chapter 12: Registers and Counters
• Chapter 13: Analysis of Clocked Sequential Circuit
• Chapter 14: Derivation of State Graphs and Tables
• Chapter 15: Reduction of State Tables State Assignment
• Chapter 16: Sequential Circuit Design
CHAPTER 1
Introduction: Number Systems and Conversion

1.1 Digital Systems and Switching Circuits


1.2 Number Systems and Conversion
1.3 Binary Arithmetic
1.4 Representation of Negative Numbers
1.5 Binary Codes
Objectives

Topics introduced in this chapter:


• Difference between Analog and Digital System

• Difference between Combinational and Sequential Circuits


• Binary number and digital systems
• Number systems and Conversion
• Add, Subtract, Multiply, Divide Positive Binary Numbers
• 1’s Complement, 2’s Complement for Negative binary number
• BCD code, 6-3-1-1 code, excess-3 code
1.1 Digital Systems and Switching Circuits
• Digital systems: computation, data processing, control,

communication, measurement
- Reliable, Integration

• Analog – Continuous
- Natural Phenomena
(Pressure, Temperature, Speed…)
- Difficulty in realizing, processing using electronics
• Digital – Discrete
- Binary Digit ➔ Signal Processing as Bit unit
- Easy in realizing, processing using electronics
- High performance due to Integrated Circuit Technology
Binary Digit?
• Binary:
- Can be traced to ancient symbols
|, ¦ , |¦, ||, ¦¦, ¦|, |||, ¦¦¦ , |¦¦ , ||¦ , ¦¦|, ¦||, |¦|, ¦|¦
- Two values(0, 1)
- Each digit is called as a “bit”

Good things in Binary Number


- Number representation with only two values (0,1)
- Can be implemented with simple electronic devices
(ex: Voltage High(1), Low(0)
Switch On (1) Off(0)…)
Switching Circuit
• Combinational Circuit:

- outputs depend on only present inputs, not on past inputs


• Sequential Circuit:
- outputs depend on both present inputs and past inputs
- have “memory” function
1.2 Number Systems and Conversion
Decimal: 953 .7810 = 9 10 2 + 5 101 + 3 10 0 + 7 10 −1 + 8 10 −2

Binary: 1011.112 = 1 23 + 0  2 2 + 1 21 + 1 20 + 1 2 −1 + 1 2 −2
1 1 3
= 8 + 0 + 2 +1+ + = 11 = 11.7510
2 4 4

Radix(Base): N = (a4 a3 a2 a1a0 .a−1a− 2 a−3 ) R


= a4  R 4 + a3  R 3 + a2  R 2 + a1  R1 + a0  R 0
+ a−1  R −1 + a− 2  R − 2 + a−3  R −3

3
Example: 147.38 = 1 82 + 4  81 + 7  80 + 3  8−1 = 64 + 32 + 7 +
8
= 103.37510

Hexa-Decimal: A2 F16 = 10 16 2 + 2 161 + 15 16 0 = 2560 + 32 + 15 = 2607 10


If the base is R, then R digits (0,1,…,R-1) are used.
1.2 Number Systems and Conversion
Conversion of Decimal to Base-R

N = (an an −1    a2 a1a0 ) R = an R n + an −1 R n −1 +    + a2 R 2 + a1 R1 + a0
Least significant digit
N
= an R n −1 + an −1 R n − 2 +    + a2 R1 + a1 = Q1 , remainder a0
R

Q1
= a n R n − 2 + a n −1 R n −3 +    + a 3 R 1 + a 2 = Q2 , remainder a1
R

Q2
= an R n −3 + an −1 R n −4 +    + a3 = Q3 , remainder a2
R
Most significant digit
1.2 Number Systems and Conversion
Example: Decimal to Binary Conversion

2 53

2 26 rem. = 1 = a0
2 13 rem. = 0 = a1

2 6 rem. = 1 = a2 5310 = 110101 2


2 3 rem. = 0 = a3

2 1 rem. = 1 = a4

0 rem. = 1 = a5
1.2 Number Systems and Conversion
Conversion of a decimal fraction to Base-R
F = (.a−1a− 2 a−3    a− m ) R = a−1 R −1 + a− 2 R −2 + a−3 R −3 +    + a− m R − m
FR = a−1 + a− 2 R −1 + a−3 R −2 +    + a− m R − m +1 = a−1 + F1 Most significant digit

F1 R = a− 2 + a−3 R −1 +    + a− m R − m + 2 = a− 2 + F2

F2 R = a−3 +    + a− m R − m +3 = a−3 + F3 Least significant digit

Example:
F = .625 F1 = .250 F2 = .500
 2  2  2 .625 10 = .101 2
1.250 0.500 1.000
(a−1 = 1) ( a − 2 = 0) (a−3 = 1)
1.2 Number Systems and Conversion
Example: Convert 0.7 to binary

.7
2
(1).4
2
(0).8
2
(1).6
2
(1).2
2
(0).4 Process starts repeating here because .4 was previously
2 obtained
(0).8 0.710 − 0.1 0110 0110 0110   2
1.2 Number Systems and Conversion
Example: Convert 231.34 to base-7
3
231.34 = 2 16 + 3  4 + 1 + = 45.7510
4

7 45 .75
7 6 rem.3 7
(5).25 45 .7510 = 63 .5151   7
0 rem.6
7
(1).75
7
(5).25
7
(1).75
Conversion from binary to hexadecimal:
1001101.0101112 = 0100
 1101
 0101  = 4 D.5C16
 1100
4 D 5 C
1.3 Binary Arithmetic
Addition table

0+0=0
0 +1 = 1
1+ 0 =1
1 +1 = 0 and carry 1 to the next column

1111 carries
Example:
1310 = 1101
1110 = 1011
11000 = 2410
1.3 Binary Arithmetic
Subtraction
0−0 = 0
0 −1 = 1 and borrow 1 from the next column
1− 0 =1
1 −1 = 0

Example:

1 (indicates 1111 borrows 111 borrows


a borrow
11101 10000 111001
From the
− 10011 3rd column) − 11 − 1011
1010 1101 101110
1.3 Binary Arithmetic
Subtraction Example with Decimal
column 2 column 1

205
− 18
205 − 18 = [2 10 2 + 0 101 + 5  100 ] 187
−[ 1 10 + 8 10 ]
1 0

note borrow from column 1


= [2  10 2 + (0 − 1) 101 + (10 + 5) 100 ]
−[ 1101 + 8  100 ]
note borrow from column 2
= [(2 − 1)  10 2 + (10 + 0 − 1)  101 + 15 100 ]
−[ 1)  101 + 8 100 ]
= [1 10 2 + 8  101 + 7 100 ] = 187
1.3 Binary Arithmetic
Multiplication Multiply: 13 x11(10) 1101
1011
00 = 0
1101
0 1 = 0 1101
1 0 = 0 0000
1 1 = 1 1101
10001111 = 14310
1111 multiplicand
1101 multiplier
1111 first partial product
0000 second partial product
(01111) sum of first two partial products
1111 third partial product
(1001011) sum after adding third partial product
1111 fourth partial product
11000011 final product (sum after adding fourth partial product)
1.3 Binary Arithmetic
Division

quotient
1101
1011 10010001 dividend

1011
divisor
1110
1011
1101 The quotient is 1101 with a remainder
1011 of 10.

10
1.4 Representation of Negative Numbers
bn – 1 b1 b0

Magnitude
MSB

(a) Unsigned number

bn – 1 bn – 2 b1 b0

Magnitude
Sign
0 denotes + MSB
1 denotes –
(b) Signed number
1.4 Representation of Negative Numbers
2’s complement representation for Negative Numbers

N * = 2n − N

Negative integers
Positive
integers Sign and 2’s complement 1’s complement
+N (all systems) -N magnitude N* N
+0 0000 -0 1000 - 1111
+1 0001 -1 1001 1111 1110
+2 0010 -2 1010 1110 1101
+3 0011 -3 1011 1101 1100
+4 0100 -4 1100 1100 1011
+5 0101 -5 1101 1011 1010
+6 0110 -6 1110 1010 1001
+7 0111 -7 1111 1001 1000
-8 - 1000 -
1.4 Representation of Negative Numbers
1’s complement representation for Negative Numbers
N = (2 n − 1) − N

Example: 2 n − 1 = 111111
N = 010101 An alternate way is to simply complement
N bit-by-bit by replacing 1’s to 0’s and 0’s
N = 101010 to 1’s.

N * = 2 n − N = (2 n − 1 − N ) + 1 = N + 1
==➔ 2’s complement: 1’s complement + ‘1’

To obtain the magnitude N from 2’s


complement and 1’s complement : N = 2 n − N * and N = (2 n − 1) − N

In general, in a 2’s complement system with a word length of n bits, the

2 n − 2 n −1 = 2 n −1
number represents a negative number with a maximum magnitude of :
1.4 Representation of Negative Number
Addition of 2’s complement Numbers
+3 0011
Case 1
+4 0100
+7 0111 (correct answer)
Case 2 +5 0101
Hint: maximum magnitude from
+6 0110 total number of bits - 1

1011 wrong answer because of overflow (+11 requires


5 bits including sign)
Case 3 +5 0101
−6 1010
1111 (correct answer)
Case 4 −5 1011
+6 0110
(1)0001 correct answer when the carry from the sign bit
is ignored (this is not an overflow)
1.4 Representation of Negative Numbers
Addition of 2’s complement Numbers

Case 5 −3 1101
−4 1100
−7 (1)1001 correct answer when the last carry is ignored
(this is not an overflow)
Case 6

−5 1011
−6 1010
(1)0101 wrong answer because of overflow
(-11 requires 5 bits including sign)
1.4 Representation of Negative Numbers
Addition of 1’s complement Numbers
Case 3 +5 0101
−6 1001
−1 1110 (correct answer)
Case 4 −5 1010
+6 0110
(1) 0000
1 (end-around carry)
0001 (correct answer, no overflow)

Case 5 −3 1100
−4 1011
(1) 0111
1 (end-around carry)
1000 (correct answer, no overflow)
1.4 Representation of Negative Numbers
Addition of 1’s complement Numbers
Case 6 −5 1010
−6 1001
(1) 0011
1 (end-around carry)
0100 (wrong answer because of overflow)

Case 4 : − A + B (where B  A)
A + B = (2 n − 1 − A) + B = 2 n + ( B − A) − 1

Case 5 : − A − B ( A + B  2n−1 )
A + B = (2n − 1 − A) + (2n − 1 − B) = 2n + [2n − 1 − ( A + B)] − 1

The end-around carry is equivalent to subtracting 2 nand adding 1


1.4 Representation of Negative Numbers
Addition of 1’s complement Numbers
11110100 ( −11)
11101011 + ( −20)
(1) 11011111
1 (end-around carry)
11100000 = −31

Addition of 2’s complement Numbers


11111000 ( −8)
00010011 + 19
(1)00001011 = +11

(discard last carry)


1.5 Binary Codes
9 3 7.2 5
    
1001 0011 0111 . 0010 0101

8-4-2-1
Decimal Code 6-3-1-1 Excess-3 2-out-of-5 Gray
Digit (BCD) Code Code Code Code
0 0000 0000 0011 00011 0000
1 0001 0001 0100 00101 0001
2 0010 0011 0101 00110 0011
3 0011 0100 0110 01001 0010
4 0100 0101 0111 01010 0110
5 0101 0111 1000 01100 1110
6 0110 1000 1001 10001 1010
7 0111 1001 1010 10010 1011
8 1000 1011 1011 10100 1001
9 1001 1100 1100 11000 1000
1.5 Binary Codes
6-3-1-1 Code:
N = w3 a3 + w2 a2 + w1a1 + w0 a0

N = 6 1 + 3  0 + 1 1 + 1 1 = 8

ASCII Code

1010011 1110100 1100001 1110010 1110100


S t a r t
Summary

• Number systems and conversion


• Binary arithmetic
• Representation of Negative Numbers
• Binary Codes

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