Important Information, Contents

Product Overview 1
SIMATIC 2
Installation

Addressing 3
S7-300 Programmable Controller
Hardware and Installation Wiring 4
Networking 5
Manual Commissioning 6
Maintenance 7
This manual is part of the documentation
package with order no.: 6ES7 398-8AA03-8BA0 CPUs 8
CPU 31x-2 as DP Master/DP
Slave and Direct Communication 9
Cycle and Response Times of the
S7-300 10
CPU Functions Dependent on the
CPU and STEP 7 Version 11

Tips and Tricks 12

Appendices

Glossary, Index

EWA 4NEB 710 6084-02

Edition 1
 Safety Guidelines
This manual contains notices which you should observe to ensure your own personal safety, as well as to
protect the product and connected equipment. These notices are highlighted in the manual by a warning
triangle and are marked as follows according to the level of danger:

Danger
! indicates that death, severe personal injury or substantial property damage will result if proper precau-
tions are not taken.

Warning
! indicates that death, severe personal injury or substantial property damage can result if proper precau-
tions are not taken.

Caution
! indicates that minor personal injury or property damage can result if proper precautions are not taken.

Note
draws your attention to particularly important information on the product, handling the product, or to a
particular part of the documentation.

Qualified Personnel
Only qualified personnel should be allowed to install and work on this equipment. Qualified persons are
defined as persons who are authorized to commission, to ground, and to tag circuits, equipment, and sys-
tems in accordance with established safety practices and standards.

Correct Usage
Note the following:

Warning
! This device and its components may only be used for the applications described in the catalog or the
technical descriptions, and only in connection with devices or components from other manufacturers
which have been approved or recommended by Siemens.
This product can only function correctly and safely if it is transported, stored, set up, and installed cor-
rectly, and operated and maintained as recommended.

Trademarks
SIMATICR, SIMATIC HMIR and SIMATIC NETR are registered trademarks of SIEMENS AG.
Some of other designations used in these documents are also registered trademarks; the owner’s rights
may be violated if they are used by third parties for their own purposes.

Copyright Siemens AG 1998 All rights reserved Disclaimer of Liability

The reproduction, transmission or use of this document or its contents is not We have checked the contents of this manual for agreement with the hard-
permitted without express written authority. Offenders will be liable for ware and software described. Since deviations cannot be precluded entirely,
damages. All rights, including rights created by patent grant or registration of we cannot guarantee full agreement. However, the data in this manual are
a utility model or design, are reserved. reviewed regularly and any necessary corrections included in subsequent
editions. Suggestions for improvement are welcomed.

Siemens AG
Automation and Drives (A&D)
Industrial Automation Systems (AS) E Siemens AG 1998
Postfach 4848, D- 90327 Nürnberg Technical data subject to change.
S7-300 Programmable Controller Hardware and Installation
Index-2 EWA 4NEB 710 6084-02
Siemens Aktiengesellschaft
Important Information

Purpose of the Manual

The information contained in this manual enables you to:
S Install and wire an S7-300 programmable controller.
S Look up operator entries, functional descriptions and the technical
specifications relevant to the S7-300’s CPUs.
You will find the function descriptions and technical specifications for the signal
modules, power supply modules and interface modules in the Module
Specifications Reference Manual.

Delivery Package
This documentation package (order number 6ES7 398-8AA03-8BA0) comprises
two manuals and an instruction list with the following contents:

S7-300 Programmable Controller, S7-300, M7-300 Programmable Instruction List

Hardware and Installation Controllers, Module Specifications

S Mechanical and electrical S General technical data

S Instruction set for all CPUs
configuration S Power supply modules
S Brief description of
instructions and execution
S Installation and wiring S Digital modules times in relation to the
S Preparing the S7-300 for S Analog modules individual CPUs
operation
S Order numbers for the A detailed description of all
S Characteristics and technical S7-300 instructions with examples can
data for the S7-300 CPUs
be found in the STEP 7
manuals (see Appendix H).
You can also order the
instruction list separately:
6ES7 398-8AA03-8BN0

S7-300 Programmable Controller Hardware and Installation

EWA 4NEB 710 6084-02 iii
Important Information

Scope of the Manual

This manual applies for the following CPUs:

CPU Order No. As of Version

Firmware Hardware
CPU 312 IFM 6ES7 312-5AC02-0AB0 1.0.0 01
CPU 313 6ES7 313-1AD03-0AB0 1.0.0 01
CPU 314 6ES7 314-1AE04-0AB0 1.0.0 01
CPU 314 IFM 6ES7 314-5AE03-0AB0 1.0.0 01
CPU 315 6ES7 315-1AF03-0AB0 1.0.0 01
CPU 315-2 DP 6ES7 315-2AF03-0AB0 1.0.0 01
CPU 316-2 DP 6ES7 316-2AG00-0AB0 1.0.0 01
CPU 318-2 6ES7 318-2AJ00-0AB0 1.0.0 01

This manual describes all modules that are valid at the time the manual is
released. For new modules or newer versions of modules, we reserve the option to
add to the manual a product information containing the current information on this
module.

Changes Since the Previous Version

The following changes have been made since the previous version (S7-300
Programmable Controller, Hardware and Installation Manual (order no.
6ES7 398-8AA02-8BA0), Edition 2):
S New CPUs:
– CPU 316-2 DP
– CPU 318-2
(Refer to Section11.1! It describes important differences between the
CPU 318-2 and other CPUs ).
S The CPU 316 is no longer included in the scope of delivery for the S7-300 and
therefore not described in this manual.
S Separate versions for CPU firmware and hardware:
– You can find the firmware version of the CPU (V 1.0.0) under the front cover,
on the left next to the power supply connections.
– You can find the hardware version of the CPU on the front cover.
S You can save the firmware of the CPU on the memory card (not 318-2).
S New for the CPU 315-2 DP
– Routing
– Direct communication
– Equidistance

S7-300 Programmable Controller Hardware and Installation

iv EWA 4NEB 710 6084-02
 Important Information

Standards, Certificates and Approvals

The S7-300 programmable controller meets the requirements and criteria of
standard IEC 1131, Part 2. The S7-300 meets the requirements for the CE mark.
Approvals for CSA, UL and FM have been granted for the S7-300.
See Appendix A for detailed information on standards and approvals.

Recycling and Disposal

The SIMATIC S7-300 can be recycled thanks to the low level of pollutants in its
equipment.
Please contact the following address for environmentally-friendly recycling and
disposal of your old SIMATIC equipment:
Siemens Aktiengesellschaft
Anlagenbau und Technische Dienstleistungen
ATD ERC Essen Recycling/Remarketing
Fronhauser Str. 69
D-45127 Essen
Phone: +49 201/816 1540 (hotline)
Fax: +49 201/816 1504

Documentation Required
Depending on the CPU, you require the following documentation for installing your
S7-300:

The following documentation is required for installing the S7-300 and for preparing it for
operation:

Documentation package
Order number
Hardware and Reference Instruction 6ES7 398-8AA03-8BA0
Installation, Manual List
Manual Module
Specifications

For CPUs 312 IFM and 314 IFM, you will also require the description of the
integrated functions and the control functions in STEP 7:

Integrated System and Standard

Functions Functions
Manual Reference Manual
Order No. 6ES7 398-8CA00-8BA0 (You can find this in STEP 7 as an electronic
manual)

S7-300 Programmable Controller Hardware and Installation

EWA 4NEB 710 6084-02 v
Important Information

Documentation for Programming

In Appendix H you will find a list of the documentation required to program and
commission the S7-300. In addition, you will find a list of specialist books on
programmable controllers.

CD-ROM
Furthermore, the complete SIMATIC S7 documentation is available on CD-ROM.

Guide
To help you find special information quickly, the manual contains the following
access aids:
S At the start of the manual you will find a complete table of contents and a list of
the diagrams and tables that appear in the manual.
S An overview of the contents of each section is provided in the left-hand column
on each page of each chapter.
S You will find a glossary in the appendix at the end of the manual. The glossary
contains definitions of the main technical terms used in the manual.
S At the end of the manual you will find a comprehensive index which gives you
rapid access to the information you need.

Additional Support
Please contact your local Siemens representative if you have any queries about
the products described in this manual. A list of Siemens representatives worldwide
is contained in the appendix to this manual.
If you have any questions or suggestions concerning this manual, please fill in the
form at the end of this manual and return it to the specified address. Please feel
free to enter your personal assessment of the manual in the form provided.
We offer a range of courses to help get you started with the SIMATIC S7
programmable controller. Please contact your local training center or the central
training center in Nuremberg, D-90327 Germany (tel. +49 (911) 895-3154)

S7-300 Programmable Controller Hardware and Installation

vi EWA 4NEB 710 6084-02
 Important Information

Constantly Updated Information

You can receive up-to-date information on SIMATIC products from the following
sources:
S On the Internet at http://www.ad.siemens.de/
S On the fax polling number +49-8765-93 00-55 00
In addition, the SIMATIC Customer Support provides up-to-date information and
downloads for users of SIMATIC products:
S On the Internet at http://www.ad.siemens.de/simatic-cs
S Via the SIMATIC Customer Support mailbox on the following number:
+49 (911) 895-7100
To access the mailbox, use a modem with up to V.34 (28.8 kbps), and set the
parameters as follows: 8, N, 1, ANSI. Alternatively, access it using ISDN (x.75,
64 kbps).
You can reach the SIMATIC Customer Support by telephone at
+49 (911) 895-7000 and by fax at +49 (911) 895-7002. Queries can also be
addressed to us by Internet mail or by mail to the mailbox specified above.

S7-300 Programmable Controller Hardware and Installation

EWA 4NEB 710 6084-02 vii
Important Information

S7-300 Programmable Controller Hardware and Installation

viii EWA 4NEB 710 6084-02
Contents

Important Information
1 Product Overview
2 Installation
2.1 Configuring an S7-300 Installation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2
2.1.1 Horizontal and Vertical Installation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2
2.1.2 Clearance Measurements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-3
2.1.3 Installation dimensions of the Modules . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-4
2.1.4 Arranging the Modules on a Single Rack . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-5
2.1.5 Arranging the Modules on Multiple Racks
(Not CPU 312 IFM/313) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-6
2.2 Installation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-9
2.2.1 Installing the Rail . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-9
2.2.2 Installing Modules on the Rail . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-13
2.2.3 After Installation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-15
3 Addressing
3.1 Slot-Based Addressing for Modules (Default Addressing) . . . . . . . . . . . . . 3-2
3.2 User-Defined Address Allocation with the CPU 31x-2 DP . . . . . . . . . . . . . 3-4
3.3 Addressing the Signal Modules . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-5
3.4 Addressing the Integrated Inputs and Outputs of the CPU 312 IFM and
CPU 314 IFM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-8
4 Wiring
4.1 Electrical Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-2
4.1.1 General Rules and Guidelines for Operating an S7-300
Programmable Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-2
4.1.2 Configuring the S7-300 Process I/Os . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-5
4.1.3 S7-300 Configuration with Grounded Reference Potential . . . . . . . . . . . . . 4-9
4.1.4 S7-300 Configuration with Ungrounded Reference Potential
(Not CPU 312 IFM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-9
4.1.5 S7-300 Configuration with Isolated Modules . . . . . . . . . . . . . . . . . . . . . . . . . 4-11
4.1.6 Configuration of an S7-300 with Non-Isolated Modules . . . . . . . . . . . . . . . 4-13
4.1.7 Cable/Wiring Routing Inside Buildings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-13
4.1.8 Cable/Wiring Routing Outside Buildings . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-17
4.1.9 Protecting Digital Output Modules from Inductive Overvoltage . . . . . . . . . 4-17
4.2 Lightning Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-20
4.2.1 Lightning Protection Zone Concept . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-21
4.2.2 Rules for the Transition Between Lightning Protection Zones 0 ´ 1 . 4-23
4.2.3 Rules for the Transitions Between 1 ´ 2 and Greater Lightning Protection
Zones . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-25
4.2.4 Sample Circuit for Overvoltage Protection of Networked S7-300s . . . . . . 4-28

S7-300 Programmable Controller Hardware and Installation

EWA 4NEB 710 6084-02 ix
Contents

4.3 Wiring . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-30

4.3.1 Wiring Rules . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-30
4.3.2 Wiring the Power Supply Module and CPU . . . . . . . . . . . . . . . . . . . . . . . . . . 4-32
4.3.3 Wiring the Front Connectors of the Signal Modules . . . . . . . . . . . . . . . . . . 4-35
4.3.4 Connecting Shielded Cables via a Shield Contact Element . . . . . . . . . . . . 4-39
5 Networking
5.1 Configuring a Subnet . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-2
5.1.1 Prerequisites . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-2
5.1.2 Rules for Configuring a Subnet . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-5
5.1.3 Cable Lengths . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-12
5.2 Network Components . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-15
5.2.1 PROFIBUS Bus Cable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-16
5.2.2 Bus Connectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-17
5.2.3 Plugging the Bus Connector into a Module . . . . . . . . . . . . . . . . . . . . . . . . . . 5-18
5.2.4 RS 485 Repeater . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-19
6 Commissioning
6.1 Inserting and Changing the Memory Card
(Not CPU 312 IFM/314 IFM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-3
6.2 Inserting the Backup Battery/Accumulator (Not CPU 312 IFM) . . . . . . . . . 6-4
6.3 Connecting a Programming Device . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-5
6.3.1 Connecting a Programming Device to an S7-300 . . . . . . . . . . . . . . . . . . . . 6-5
6.3.2 Connecting the Programming Device to Several Nodes . . . . . . . . . . . . . . . 6-6
6.3.3 Connecting a Programming Device to Ungrounded Nodes
of an MPI Subnet . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-9
6.4 Switching On a S7-300 for the First Time . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-10
6.5 Resetting the CPU . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-11
6.6 Commissioning the PROFIBUS-DP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-16
6.6.1 Commissioning the CPU 31x-2 DP as a DP Master . . . . . . . . . . . . . . . . . . 6-17
6.6.2 Commissioning the CPU 31x-2 DP as a DP Slave . . . . . . . . . . . . . . . . . . . 6-18
7 Maintenance
7.1 Changing the Backup/Accumulator (Not CPU 312 IFM) . . . . . . . . . . . . . . . 7-2
7.2 Replacing Modules . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-5
7.3 Replacing Fuses on 120/230V AC Digital Output Modules . . . . . . . . . . . . 7-9
8 CPUs
8.1 Control and Display Elements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-2
8.1.1 Status and Fault Displays . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-3
8.1.2 Mode Selector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-4
8.1.3 Backup Battery/Accumulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-5
8.1.4 Memory Card . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-6
8.1.5 MPI and PROFIBUS-DP Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-7
8.1.6 Clock and Runtime Meter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-9
8.2 Communication Options of the CPU . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-11
8.3 Testing Functions and Diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-13
8.3.1 Testing Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-13

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x EWA 4NEB 710 6084-02
 Contents

8.3.2 Diagnosis with LED Displays . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-15

8.3.3 Diagnosis with STEP 7 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-15
8.4 CPUs – Technical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-17
8.4.1 CPU 312 IFM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-18
8.4.2 CPU 313 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-28
8.4.3 CPU 314 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-30
8.4.4 CPU 314 IFM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-32
8.4.5 CPU 315 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-48
8.4.6 CPU 315-2 DP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-50
8.4.7 CPU 316-2 DP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-53
8.4.8 CPU 318-2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-56
9 CPU 31x-2 as DP Master/DP Slave and Direct Communication
9.1 DP Address Areas of the CPUs 31x-2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-2
9.2 CPU 31x-2 as DP Master . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-3
9.3 Diagnostics of the CPU 31x-2 as DP Master . . . . . . . . . . . . . . . . . . . . . . . . 9-4
9.4 CPU 31x-2 as DP Slave . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-10
9.5 Diagnostics of the CPU 31x-2 as DP Slave . . . . . . . . . . . . . . . . . . . . . . . . . 9-15
9.5.1 Diagnosis with LEDs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-16
9.5.2 Diagnosis with STEP 5 or STEP 7 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-16
9.5.3 Reading Out the Diagnostic Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-17
9.5.4 Structure of the Slave Diagnostic Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-21
9.5.5 Station Status 1 to 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-22
9.5.6 Master PROFIBUS Address . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-24
9.5.7 Manufacturer ID . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-24
9.5.8 Module Diagnosis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-25
9.5.9 Station Diagnosis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-26
9.5.10 Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-28
9.6 Parameter Assignment Frame and Configuration Frame . . . . . . . . . . . . . . 9-29
9.6.1 Structure of the Parameter Assignment Frame . . . . . . . . . . . . . . . . . . . . . . 9-30
9.6.2 Structure of the Configuration Frame (S7 Format) . . . . . . . . . . . . . . . . . . . 9-32
9.6.3 Structure of the Configuration Frame for Non-S7 DP Masters . . . . . . . . . 9-34
9.7 Direct Communication . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-36
9.8 Diagnostics in Direct Communication . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-37
10 Cycle and Response Times of the S7-300
10.1 Cycle Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-2
10.2 Response Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-3
10.3 Calculation Examples for Cycle Time and Response Time . . . . . . . . . . . . 10-10
10.4 Interrupt Response Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-14
10.5 Calculation Example for the Interrupt Response Time . . . . . . . . . . . . . . . . 10-16
10.6 Reproducibility of Delay and Watchdog Interrupts . . . . . . . . . . . . . . . . . . . . 10-16

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Contents

11 CPU Functions Dependent on the CPU and STEP 7 Version

11.1 The Differences Between the CPU 318-2 and
the CPU 312 IFM to 316-2 DP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-2
11.2 The Differences Between the CPUs 312 IFM to 316 and
Their Previous Versions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-4
12 Tips and Tricks
A Standards, Certificates and Approvals
B OBs
C Execution Times of the SFCs/SFBs and IEC Functions
C.1 SFCs and SFBs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C-2
C.2 IEC Timers and IEC Counters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C-8
C.3 IEC Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C-8
D System Status List in the CPUs
E Dimensioned Drawings
F Guidelines for Handling Electrostatic Sensitive Devices (ESD)
F.1 What is ESD? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . F-2
F.2 Electrostatic Charging of Persons . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . F-3
F.3 General Protective Measures against Electrostatic Discharge Damage . F-4
G Replacement Parts and Accessories for the CPUs of the S7-300
H SIMATIC S7 Reference Literature
I Safety of Electronic Control Equipment
J Siemens Worldwide
K List of Abbreviations
Glossary
Index

S7-300 Programmable Controller Hardware and Installation

xii EWA 4NEB 710 6084-02
 Contents

Figures
1-1 Components of an S7-300 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2
2-1 Horizontal and Vertical Installation of an S7-300 . . . . . . . . . . . . . . . . . . . . . 2-2
2-2 Clearance Measurements for an S7-300 Installation . . . . . . . . . . . . . . . . . . 2-3
2-3 Module Arrangement for an S7-300 Programmable Controller
Mounted on One Rack . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-5
2-4 Arrangement of Modules in a Four-Rack S7-300 Configuration . . . . . . . . 2-8
2-5 Fixing Holes of the 2 m/6.56 ft. Rail . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-10
2-6 Connecting the Protective Conductor to the Rail . . . . . . . . . . . . . . . . . . . . . 2-12
2-7 Inserting the Key in the CPU . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-15
2-8 Applying Slot Numbers to the Modules . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-16
3-1 Slots of the S7-300 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-2
3-2 Addresses of the Inputs and Outputs of Digital Modules . . . . . . . . . . . . . . 3-5
3-3 Addresses of the Inputs and Outputs of the Digital Module in Slot 4 . . . . 3-6
3-4 Addresses of the Inputs and Outputs of the Analog Module in Slot 4 . . . 3-7
4-1 Signal Modules Operated on a Grounded Incoming Supply . . . . . . . . . . . . 4-7
4-2 Signal Modules Powered from the PS 307 . . . . . . . . . . . . . . . . . . . . . . . . . . 4-8
4-3 S7-300 Configuration with Grounded Reference Potential . . . . . . . . . . . . . 4-9
4-4 S7-300 Configuration with Ungrounded Reference Potential . . . . . . . . . . . 4-10
4-5 Potentials in a Configuration with Isolated Modules . . . . . . . . . . . . . . . . . . 4-12
4-6 Potentials in a Configuration with the Non-Isolated SM 334 Analog Input/Output
Module; AI 4/AO 2 8/8Bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-13
4-7 Relay Contact for Emergency Stop in the Output Circuit . . . . . . . . . . . . . . 4-18
4-8 Suppressor Circuit with DC-Operated Coils with
Diodes and Zener Diodes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-18
4-9 Suppressor Circuit with AC-Operated Coils . . . . . . . . . . . . . . . . . . . . . . . . . 4-19
4-10 Lightning Protection Zones of a Building . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-22
4-11 Example of the Interconnection of Networked S7-300s . . . . . . . . . . . . . . . 4-29
4-12 Wiring the Power Supply Module and CPU to the Power Connector . . . . 4-33
4-13 Setting the Mains Voltage for the PS 307 . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-34
4-14 Bringing the Front Connector into the Wiring Position . . . . . . . . . . . . . . . . . 4-36
4-15 Configuration of Two Signal Modules With Shield Contact Element . . . . . 4-40
4-16 Attaching Shielded 2-Wire Cables to a Shield Contact Element . . . . . . . . 4-41
5-1 Terminating Resistor on the Bus Connector Switched On and Off . . . . . . 5-7
5-2 Terminating Resistor on the RS 485 Repeater . . . . . . . . . . . . . . . . . . . . . . . 5-7
5-3 Connecting Terminating Resistors in an MPI Subnet . . . . . . . . . . . . . . . . . 5-8
5-4 Example of an MPI Subnet . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-9
5-5 Example of a PROFIBUS Subnet . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-10
5-6 Example of a Configuration with the CPU 315-2 DP in an MPI
and PROFIBUS Subnet . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-11
5-7 Maximum Cable Length Between Two RS 485 Repeaters . . . . . . . . . . . . . 5-13
5-8 Cable Lengths in an MPI Subnet . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-14
5-9 Bus Connector (6ES7 ... ): Terminating Resistor Switched On and Off . . 5-18
5-10 Removing the Slide on the RS 485 Repeater . . . . . . . . . . . . . . . . . . . . . . . . 5-20
5-11 Lengths of the Stripped Insulation for Connection
to the RS 485 Repeater . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-21
6-1 Inserting the Memory Card in the CPU . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-3
6-2 Inserting a Backup Battery in the CPUs 313/314 . . . . . . . . . . . . . . . . . . . . . 6-4
6-3 Connecting a Programming Device to an S7-300 . . . . . . . . . . . . . . . . . . . . 6-5
6-4 Connecting a Programming Device to Several S7-300s . . . . . . . . . . . . . . . 6-7
6-5 Connecting a Programming Device to a Subnet . . . . . . . . . . . . . . . . . . . . . 6-8
6-6 Programming Device Connected to an Ungrounded S7-300 . . . . . . . . . . . 6-9

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Contents

6-7 Switching Sequence for the Mode Selector for Resetting the CPU . . . . . 6-13
6-8 Switching Sequence for the Mode Selector for
Cold Start (CPU 318-2 Only) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-14
7-1 Changing the Backup Battery in the CPU 313/314 . . . . . . . . . . . . . . . . . . . 7-3
7-2 Unlocking the Front Connector and Detaching the
Module from the Rail . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-6
7-3 Removing the Front Connector Coding Key . . . . . . . . . . . . . . . . . . . . . . . . . 7-7
7-4 Installing a New Module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-7
7-5 Plugging In the Front Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-8
7-6 Location of the Fuses on Digital Output Modules . . . . . . . . . . . . . . . . . . . . 7-10
8-1 Control and Display Elements of the CPUs . . . . . . . . . . . . . . . . . . . . . . . . . 8-2
8-2 Status and Fault Displays of the CPUs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-3
8-3 The Principle of Forcing with S7-300 CPUs
(CPU 312 IFM to 316-2 DP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-14
8-4 Display of the States of the Interrupt Inputs of the CPU 312 IFM . . . . . . . 8-20
8-5 Front View of the CPU 312 IFM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-21
8-6 Terminal Assignment Diagram of the CPU 312 IFM . . . . . . . . . . . . . . . . . . 8-26
8-7 Basic Circuit Diagram of the CPU 312 IFM . . . . . . . . . . . . . . . . . . . . . . . . . . 8-27
8-8 Display of the States of the Interrupt Inputs of the CPU 314 IFM . . . . . . . 8-34
8-9 Front View of the CPU 314 IFM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-35
8-10 Terminal Assignment Diagram of the CPU 314 IFM . . . . . . . . . . . . . . . . . . 8-44
8-11 Basic Circuit Diagram of the CPU 314 IFM (Special Inputs and Analog
Inputs/Outputs) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-45
8-12 Basic Circuit Diagram of the CPU 314 IFM (Digital Inputs/Outputs) . . . . . 8-46
8-13 Wiring the Analog Inputs of the CPU 314 IFM with a 2-Wire Measuring
Transducer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-47
8-14 Wiring the Analog Inputs of the CPU 314 IFM with a 4-Wire Measuring
Transducer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-47
9-1 Diagnostics with CPU 315-2 DP < 315-2AF03 . . . . . . . . . . . . . . . . . . . . . . . 9-6
9-2 Diagnostics with CPU 31x-2 (315-2 DP as of 315-2AF03) . . . . . . . . . . . . . 9-7
9-3 Diagnostic Addresses for DP Master and DP Slave . . . . . . . . . . . . . . . . . . 9-8
9-4 Intermediate Memory in the CPU 31x-2 as DP Slave . . . . . . . . . . . . . . . . . 9-11
9-5 Diagnostic Addresses for DP Master and DP Slave . . . . . . . . . . . . . . . . . . 9-19
9-6 Structure of the Slave Diagnostic Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-21
9-7 Structure of the Module Diagnosis of the CPU 31x-2 . . . . . . . . . . . . . . . . . 9-25
9-8 Structure of the Station Diagnosis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-26
9-9 Bytes +4 to +7 for Diagnostic and Process Interrupts . . . . . . . . . . . . . . . . . 9-27
9-10 Standardized Portion of the Parameter Assignment Frame (Example) . . 9-30
9-11 Parameters for the CPU 31x-2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-31
9-12 Description of Byte 0 of the CPU’s Address Area Identifiers . . . . . . . . . . . 9-33
9-13 Description of Byte 1 of the CPU’s Address Area Identifiers . . . . . . . . . . . 9-33
9-14 Direct Communication with CPU 31x-2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-36
9-15 Diagnostic Address for the Receiver During Direct Communication . . . . . 9-37
10-1 Component Parts of the Cycle Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-2
10-2 Shortest Response Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-4
10-3 Longest Response Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-5
10-4 Overview of the Bus Runtime on PROFIBUS-DP at
1.5 Mbps and 12 Mbps . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-9
11-1 Sample Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-3
E-1 Dimensioned Drawing of the CPU 312 IFM . . . . . . . . . . . . . . . . . . . . . . . . . E-1
E-2 Dimensioned Drawing of the CPU 313/314/315/315-2 DP/316-2 DP . . . . E-2
E-3 Dimensioned Drawing of the CPU 318-2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . E-3

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 Contents

E-4 Dimensioned Drawing of the CPU 314 IFM, Front View . . . . . . . . . . . . . . . E-3
E-5 Dimensioned Drawing of the CPU 314 IFM, Side View . . . . . . . . . . . . . . . E-4
F-1 Electrostatic Voltages which can Build up on a Person . . . . . . . . . . . . . . . . F-3

Tables
1-1 Components of an S7-300 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-3
2-1 Installation Dimensions of the S7-300 Modules . . . . . . . . . . . . . . . . . . . . . . 2-4
2-2 Connecting Cables for Interface Modules . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-7
2-3 Fixing Holes for Rails . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-11
2-4 Module Accessories . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-13
2-5 Installing the Modules on the Rail . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-14
2-6 Slot Numbers for S7 Modules . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-15
3-1 Start Addresses for the Signal Modules . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-3
3-2 Integrated Inputs and Outputs of the CPU 312 IFM . . . . . . . . . . . . . . . . . . 3-8
3-3 Integrated Inputs and Outputs of the CPU 314 IFM . . . . . . . . . . . . . . . . . . 3-8
4-1 VDE Specifications for Configuring a PLC System . . . . . . . . . . . . . . . . . . . 4-5
4-2 Cabling Inside Buildings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-14
4-3 High-Voltage Protection of Cables Using Surge
Protection Components . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-23
4-4 Low-Voltage Protection for Lightning Protection Zone 1 ´ 2 . . . . . . . 4-26
4-5 Low-Voltage Protection for Lightning Protection Zone 2 ´ 3 . . . . . . . . 4-27
4-6 Example of a Configuration Fulfilling Lightning Protection Requirements
(Legend for Figure 4-11) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-28
4-7 Wiring Rules for the Power Supply and CPU . . . . . . . . . . . . . . . . . . . . . . . . 4-30
4-8 Wiring Rules for Module Front Connectors . . . . . . . . . . . . . . . . . . . . . . . . . . 4-31
4-9 Wiring the Front Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-37
4-10 Preparing the Signal Module for Operation . . . . . . . . . . . . . . . . . . . . . . . . . 4-38
4-11 Assignment of Cable Cross-Sections and Terminal Elements . . . . . . . . . . 4-39
5-1 Permissible MPI/PROFIBUS Addresses . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-3
5-2 MPI Addresses of CPs/FMs in an S7-300
(with the CPU 312 IFM to 316-2 DP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-3
5-3 Permissible Cable Lengths in an MPI Subnet Segment . . . . . . . . . . . . . . . 5-12
5-4 Permissible Cable Lengths in a PROFIBUS subnet Depending on the
Transmission Rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-12
5-5 Lengths of Spur Lines per Segment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-14
5-6 Network Components . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-15
5-7 Properties of the PROFIBUS Bus Cable . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-16
5-8 Specifications for Installation of Indoor Bus Cable . . . . . . . . . . . . . . . . . . . . 5-17
6-1 Possible Reasons for MRES Request by CPU . . . . . . . . . . . . . . . . . . . . . . 6-11
6-2 Internal CPU Events on Memory Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-15
8-1 The Differences in Control and Display Elements Between CPUs . . . . . . 8-2
8-2 Using a Backup Battery or Accumulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-5
8-3 Memory Cards . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-6
8-4 CPU Interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-7
8-5 Characteristics of the Clock of the CPUs . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-9
8-6 CPU Communication Options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-11
8-7 Diagnostic LEDs of the CPU . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-15
8-8 Start Information for OB 40 for the Interrupt Inputs
of the Integrated I/Os . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-19
8-9 Start Information for OB 40 for the Interrupt Inputs
for the Integrated I/O . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-33

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Contents

8-10 Characteristic Features of the Integrated Inputs and

Outputs of the CPU 314 IFM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-38
9-1 Meaning of the BUSF LED of the CPU 31x-2 as DP Master . . . . . . . . . . . 9-4
9-2 Reading Out the Diagnostic Data with STEP 7 . . . . . . . . . . . . . . . . . . . . . . 9-5
9-3 Event Detection of the CPU 31x-2 as DP Master . . . . . . . . . . . . . . . . . . . . 9-9
9-4 Evaluating RUN-STOP Transitions of the DP Slaves
in the DP Master . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-9
9-5 Configuration Example for the Address Areas
of the Intermediate Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-12
9-6 Meaning of the BUSF LEDs in the CPU 31x-2 as DP Slave . . . . . . . . . . . 9-16
9-7 Reading Out the Diagnostic Data with STEP 5 and STEP 7 in the Master
System . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-17
9-8 Event Detection of the CPU 31x-2 as DP Slave . . . . . . . . . . . . . . . . . . . . . 9-20
9-9 Evaluating RUN-STOP Transitions in the DP Master/DP Slave . . . . . . . . 9-20
9-10 Structure of Station Status 1 (Byte 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-22
9-11 Structure of Station Status 2 (Byte 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-23
9-12 Structure of Station Status 3 (Byte 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-23
9-13 Structure of the Master PROFIBUS Address (Byte 3) . . . . . . . . . . . . . . . . 9-24
9-14 Structure of the Manufacturer Identification (Bytes 4 and 5) . . . . . . . . . . . 9-24
9-15 Structure of the Configuration Frame . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-32
9-16 Identifiers for the Address Areas of the Intermediate Memory . . . . . . . . . 9-33
9-17 Structure of the Configuration Frame for Non-S7 DP Masters . . . . . . . . . 9-35
9-18 Event Detection of the CPU 31x-2 as Receiver
During Direct Communication . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-37
9-19 Evaluation of the Station Failure of the Sender
During Direct Communication . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-38
10-1 Operating System Processing Times of the CPUs . . . . . . . . . . . . . . . . . . . 10-6
10-2 Process Image Update of CPUs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-7
10-3 CPU-specific Factors for the User Program Processing Time . . . . . . . . . . 10-7
10-4 Updating the S7 Timers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-7
10-5 Update Time and SFB Runtimes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-8
10-6 Extending the Cycle by Nesting Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . 10-10
10-7 Process Interrupt Response Times of the CPUs . . . . . . . . . . . . . . . . . . . . 10-14
10-8 Diagnostic Interrupt Response Times of the CPUs . . . . . . . . . . . . . . . . . . 10-15
10-9 Reproducibility of the Delay and Watchdog Interrupts of the CPUs . . . . . 10-17
D-1 Sublists of the System Status List of the CPUs . . . . . . . . . . . . . . . . . . . . . D-1
D-2 Sublists of the System Status List of the
CPU 315-2 DP as DP Master . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . D-4
G-1 Accessories and Replacement Parts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . G-1
H-1 Manuals for Configuring and Programming the S7-300 . . . . . . . . . . . . . . . H-1
H-2 Manuals for PROFIBUS-DP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . H-3
H-3 List of Books You Can Order . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . H-4

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xvi EWA 4NEB 710 6084-02
Product Overview 1
Modular Design
The S7-300 has a modular design. You can set up your own individual system by
combining components from a comprehensive range of S7-300 modules.
The range of modules includes the following components:
S CPUs for various performance ranges
S Signal modules for digital and analog input/output (see Module Specifications
Reference Manual)
S Function modules for technological functions (see the function module manual
for a description).
S CP communication processors (see the communication processor manual for a
description)
S Load power supply modules for connecting the S7-300 to 120/230V AC power
supplies (see Module Specifications Reference Manual)
S Interface modules for the interconnection of racks in multi-rack installations (see
Module Specifications Reference Manual)
All of the S7-300 modules are contained in housings protected to IP 20, i.e. they
are encapsulated and can be operated without a fan.

In This Chapter
In this chapter, we will introduce you to the most important components that go to
make up an S7-300.

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EWA 4NEB 710 6084-02 1-1
Product Overview

Structure of an S7-300
An S7-300 programmable controller is made up of the following components:
S Power supply (PS)
S CPU
S Signal modules (SM)
S Function modules (FM)
S Communication processor (CP).
Several S7-300s can communicate together and with other SIMATIC S7 PLCs via
PROFIBUS bus cables.
You require a programming device (PG) to program the S7-300. You hook the
programming device up to the S7-300 with a special programming device cable.
Figure 1-1 shows a possible configuration with two S7-300 programmable
controllers. The components in the shaded area are described in this manual.

Power supply (PS)
 

 Central processing unit (CPU)
 Signal module (SM)
 PROFIBUS bus cable
 Programming device cable




 

Figure 1-1 Components of an S7-300

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1-2 EWA 4NEB 710 6084-02
 Product Overview

Components of an S7-300
You have a number of components at your disposal for installing and starting up an
S7-300 programmable controller. Table 1-1 lists the major components and their
functions:

Table 1-1 Components of an S7-300

Components Function Illustration

Rail ... accommodates the S7-300
modules
Accessory:
Shield contact element

Power supply (PS) ... converts the power system

voltage (120/230V AC) into
24V DC for the S7-300 and load
power supply for 24V DC load
circuits

CPU ... executes the user program;

Accessory: supplies the S7-300 backplane
bus with 5 V; communicates with
S CPU 313/314/315/315-2 DP/ other nodes in an MPI network
316-2 DP/318-2
via the MPI interface.
– Memory card
You can also use the CPU 31x-2
– Backup battery (or DP/318-2 in a PROFIBUS
accumulator for real-time subnet:
clock) except for
S as a DP master
CPU 313)
S as a DP slave on an S7/M7
S CPU 314 IFM DP master or another DP
– Backup battery (or master.
accumulator for real-time
clock)
– Front connector
S CPU 312 IFM
– Front connector
Signal modules (SM) ... match different process signal
(digital input modules, levels to the S7-300
digital output modules,
digital input/output modules)
analog input module
analog output module
analog input/output modules)
Accessory: Front connector

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Product Overview

Table 1-1 Components of an S7-300, continued

Components Function Illustration

Function modules (FM) ... for time-critical and memory-
intensive process signal
processing tasks, for example,
Accessories:
positioning or closed-loop control
Front connector

Communication processor (CP). ... relieves the CPU of

communication tasks, for
example, CP 342-5 DP for
Accessory:
connection to PROFIBUS-DP.
Connecting cable

SIMATIC TOP connect ... for wiring of the digital modules

Accessories:
Front connector module with
ribbon cable connection
Interface module (IM) ... interconnects the individual
tiers of an S7-300
Accessories:
Connecting cables

PROFIBUS bus cable with bus ... interconnects stations on an

connector MPI or PROFIBUS subnet

Programming device cable ... connects a CPU to a

programming device/PC

RS 485 repeaters ... for amplifying the signals in an

MPI or PROFIBUS subnet and
for connecting segments in these
systems

Programming device (PG) or PC ... configures, initializes,

with the STEP 7 software programs and tests the S7-300
package

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1-4 EWA 4NEB 710 6084-02
Installation 2
Introduction
In this chapter we will show you how to carry out the mechanical configuration, and
prepare and install the S7-300 components.
To set up a S7-300, you must take into account the configuration of the electrical
setup. Make sure you also read Chapter 3, “Wiring”.

Contents

Section Contents Page

2.1 Configuration of an S7-300 Setup 2-2
2.2 Installation 2-9

Open Modules
The modules of an S7-300 are open components. That means you can only install
the S7-300 in housings, cabinets or electrical operating areas that are only
accessible by key or a special tool. Only trained or authorized personnel should
have access to the housings, cabinets or electrical operating areas.

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Installation

2.1 Configuring an S7-300 Installation

Section Contents Page

2.1.1 Horizontal and Vertical Installation 2-2
2.1.2 Clearance Measurements 2-3
2.1.3 Installation Dimensions of the Modules 2-4
2.1.4 Arranging the Modules on a Single Rack 2-5
2.1.5 Arranging the Modules on Multiple Racks (Not CPU 312 IFM/313) 2-6

2.1.1 Horizontal and Vertical Installation

Installation
You can install your S7-300 in either a horizontal or vertical position.

Permissible Ambient Temperature

S Horizontal installation from 0 to 60 _C
S Vertical installation from 0 to 40 _C

Vertical installation Horizontal installation

You must always position the CPU and the

power supply at the bottom or on the left.

Figure 2-1 Horizontal and Vertical Installation of an S7-300

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2-2 EWA 4NEB 710 6084-02
 Installation

2.1.2 Clearance Measurements

Rules
If you adhere to the minimum clearance measurements:
S You will ensure that the S7-300 modules do not get too hot.
S You will have adequate space for inserting and removing the S7-300 modules.
S You will have sufficient space for running cables.
S The height of the S7-300 mounting rack increases to 185 mm.
Despite this, you must maintain a clearance of 40 mm (1.56 in.).

Note
If you use a shield contact element (see Section 4.3.4), the dimension
specifications apply from the lower edge of the shield contact element.

Clearance Measurements
Figure 2-2 shows the necessary clearances between the individual racks and to
the adjacent equipment, cable ducts, cabinet walls etc. for standard S7-300
configurations on several racks.

40 mm
(1.56 in.)
For example, cable duct

40 mm

ÂÂÂÂÂÂÂÂÂÂÂÂÂÂ
(1.56 in.)

40 mm
200
mm
a (7.81
(1.56 in.) in.)
20 + a
mm
(0.78
in.)

40 mm 20 mm
(1.56 in.) (0.78 in.)

Figure 2-2 Clearance Measurements for an S7-300 Installation

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EWA 4NEB 710 6084-02 2-3
Installation

2.1.3 Installation dimensions of the Modules

Table 2-1 shows the installation dimensions of the S7-300 modules.

Table 2-1 Installation Dimensions of the S7-300 Modules

Modules Module Module Max. Installa-

Width Height tion Depth
Power supply PS 307, 2 A 50 mm
(1.95 in.)
Power supply PS 307, 5 A 80 mm
(3.12 in.)
Power supply PS 307, 10 A 200 mm
(7.8 in)
CPU 31x/312 IFM, 80 mm
(3.12 in.)
CPU 314 IFM/CPU 318-2 160 mm
130 mm
(6.24 in.)
or
Digital input module SM 321 40 mm 180 mm
(1.56 in.) 125 mm, (7.02 in.) with
Digital output module SM 322 185 mm front cover of
Relay output module SM 322 with shield CPU and IM
Digital input/output module SM 323 contact 361 open
Simulator module SM 374 element (195 mm
Analog input module SM 331 40 mm (8 00 in.)
(8.00 in ) for
(1.56 in.) CPU 312
Analog output module SM 332 IFM)
Analog input/output module SM 334
Interface module IM 360 40 mm
(1.56 in.)
Interface module IM 361 80 mm
(3.12 in.)
Interface module IM 365 40 mm
(1.56 in.)

Rail Length
Depending on your S7-300 configuration, you can use rails of the following lengths:

Rail Usable Lengths for Remarks

Modules
160 mm (6.24 in.) 120 mm (4.68 in.) Comes with fixing holes
482.6 mm (18.82 in.) 450 mm (17.55 in.)
530 mm (20.67 in.) 480 mm (18.72 in.)
830 mm (32.37 in.) 780 mm (30.42 in.)
2000 mm (1.56 in.) Cut to length required Fixing holes must be drilled

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 Installation

2.1.4 Arranging the Modules on a Single Rack

Rules
The following rules apply to the arrangement of the modules on a single rack:
S No more than eight modules(SM, FM, CP) may be installed to the right of the
CPU.
S The number of modules (SM, FM, CP) that can be plugged in is limited by the
amount of power they draw from the S7-300’s backplane bus (see the table
containing the technical specifications of the various modules).
The power input from the S7-300 backplane bus to all the modules installed on
a mounting rack must not exceed the following:
– For the CPUs 313/314/314 IFM/315/315-2 DP/
316-2 DP/318-2 1.2 A
– For the CPU 312 IFM 0.8 A

Figure 2-3 shows the arrangement of the modules in an S7-300 configuration with
8 signal modules.

PS CPU SM/FM/CP

Figure 2-3 Module Arrangement for an S7-300 Programmable Controller Mounted on

One Rack

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Installation

2.1.5 Arranging the Modules on Multiple Racks

(Not CPU 312 IFM/313)

Exception
The CPU 312 IFM and CPU 313 can only be used for a configuration on one rack.

Rules
The following rules apply to the arrangement of modules on more than one rack:
S The interface module is always be installed in slot 3, to the left of the first signal
module.
S No more than 8 modules (SM, FM, CP) are permitted per rack. These modules
are always located to the right of the interface modules.
Exception: In the case of the CPU 314 IFM, a module cannot be inserted in
slot 11 on rack 3 (see Chapter 3).
S The number of modules (SM, FM, CP) that can be installed is limited by the
maximum permissible current that can be drawn from the S7-300 backplane
bus. The power consumption must not exceed 1.2 A per line (see technical
specifications of the modules).

Prerequisite: Interface modules

Interface modules that relay the S7-300 backplane bus from one rack to the next
are required in multi-rack configurations. The CPU is always located on rack 0.

Interface Module To Be Used for ... Order No.

IM 360 Rack 0 6ES7 360-3AA01-0AA0
IM 361 Rack 1 to 3 6ES7 361-3CA01-0AA0
Two-Line Configuration Only..
IM 365 S Rack 0 6ES7 365-0BA00-0AA0
IM 365 R Rack 1

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 Installation

Connecting Cables for the IM 360/361 Interface Module

The following connecting cables are available for the interface modules:

Table 2-2 Connecting Cables for Interface Modules

Length Order No. of the Connecting Cable

1m 6ES7 368-3BB01-0AA0
2.5 m (8.2 ft.) 6ES7 368-3BC51-0AA0
5m 6ES7 368-3BF01-0AA0
10 m 6ES7 368-3CB01-0AA0

IM 365 Interface Module

The S7-300 offers the IM 365 interface module for a configuration on 2 racks. The
two IM 365 interface modules are connected by a 1 m long cable (fixed wiring).
If you use the IM 365 interface modules, you can use only signal modules on
rack 1.
The total current drawn by the inserted signal modules from both mounting racks
must not exceed 1.2 A ; the current drawn by mounting rack 1 is limited to 800 mA.

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Installation

Maximum Configuration of an Installation

Figure 2-4 shows the module arrangement in an S7-300 configuration on
4 mounting racks (not CPU 312 IFM/313).

Not for CPU 314 IFM

(see Chapter 3)

Rack 3

IM 368 Connecting cable

Rack 2

IM 368 Connecting cable

Rack 1

IM 368 Connecting cable

Rack 0

PS CPU IM SMs

Figure 2-4 Arrangement of Modules in a Four-Rack S7-300 Configuration

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2-8 EWA 4NEB 710 6084-02
 Installation

2.2 Installation

Section Contents Page

2.2.1 Installing the Rail 2-9
2.2.2 Installing Modules on the Rail 2-13
2.2.3 After Installation 2-15

2.2.1 Installing the Rail

Are you Installing a 2-Meter Rail?

If not, you can skip this section and read on from the section entitled
Dimensioned Drawing for Fixing Holes.
If so, the 2-meter rail has to be prepared for installation. Proceed as follows:
1. Shorten the rail to the required length.
2. Mark out:
– Four holes for the fixing screws (dimensions: see Table 2-3)
– A hole to take the fixing screw for the protective conductor.
3. Is the rail longer than 830 mm/32.37 in.?
If so: You must make additional holes for more fixing screws to ensure the rail is
secure. Mark out these holes along the groove in the middle section of the rail
(see Figure 2-5). These additional holes should be at 500 mm (19.5 in)
intervals.
If not: No further steps must be taken.

S7-300 Programmable Controller Hardware and Installation

EWA 4NEB 710 6084-02 2-9
Installation

4. Drill the marked holes to a diameter of 6.5+ 0.2 mm for M6 screws.

5. Tighten the M6 screw to fix the protective conductor.

Groove for Hole for fixing screw

drilling extra
fixing holes

Drilled hole for extra

fixing screw
Hole for
connection
of protective Hole for fixing screw
conductor

Figure 2-5 Fixing Holes of the 2 m/6.56 ft. Rail

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2-10 EWA 4NEB 710 6084-02
 Installation

Dimensioned Drawing for Fixing Holes

The fixing-hole dimensions for the rail are shown in Table 2-3.

Table 2-3 Fixing Holes for Rails

“Standard” Rail 2 m Rail

32.5 mm 32.5 mm
(1.27 in.) (1.27 in.)

57.2 mm 57.2 mm
(2.23 in.) (2.23 in.)
approx. approx.
500 mm 500 mm
(19.5 in.) (19.5 in.)

15 mm
a b (0.59 in.)

Length of Rail Dimension a Dimension b –

160 mm 10 mm 140 mm
(6.24 in.) (0.39 in.) (5.46 in.)
482.6 mm 8.3 mm 466 mm
(18.82 in.) (0.32 in.) (18.17 in.)
530 mm 15 mm 500 mm
(20.67 in.) (0.59 in.) (19.5 in.)
830 mm 15 mm 800 mm
(32.37 in.) (0.59 in.) (31.2 in.)

Fixing Screws
You have a choice of the following screw types for fixing the rail.

for Type of Screw Description

Lateral fixing screws M6 cheese-head screw M6 to Choose a suitable screw length
ISO 1207/ ISO 1580 to for your configuration.
(DIN 84/DIN 85) You will also require
q 6,4 wash-
ers tto ISO 7092 (DIN 433)
M6 hexagon-head screw to ISO
4017 (DIN 4017)
Extra fixing screw M6 cheese-head screw to
(only for 2 m rail) ISO 1207/ ISO 1580
(DIN 84/DIN 85)

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Installation

Installing the Rail

To install rails, proceed as follows:
1. Choose a position for the rail that leaves enough room to install it properly and
enough space to cope with the temperature rise of the modules (leave at least
40 mm /1.56 in. free above and below the rail; see page 2-3).
2. Screw the rail to its base (size: M6). Is this base a metallic plate or a grounded
supporting plate?
If so: Make sure there is a low-impedance connection between the rail and the
base. In the case of painted or anodized metals, for instance, use a suitable
contacting agent or contact washers.
If not: No particular steps are required.
3. Connect the rail to the protective conductor. An M6 screw is provided for this
purpose on the rail.
Minimum cross-section from the conductor to the protective conductor: 10 mm2.

Note
Make absolutely sure that your connection to the protective conductor is
low-impedance (see Figure 2-6). If the S7-300 is mounted on a hinged rail, you
must use a flexible cable to establish the connection to the protective conductor.

Protective Conductor Connection

Figure 2-6 shows you how to connect the protective conductor to the rail.

Figure 2-6 Connecting the Protective Conductor to the Rail

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 Installation

2.2.2 Installing Modules on the Rail

Accessories
The accessories you need for installation are included with the modules.
Appendix G contains a list of accessories and spare parts with the corresponding
order numbers.

Table 2-4 Module Accessories

Module Accessories Included Description

CPU 1 slot For assigning slot numbers
number label
2 keys The key is used for actuating the CPU’s mode selector
Labeling strip (CPU 312 For labeling the integrated input and output points of the
IFM/314 IFM only) CPU
Signal module 1 bus connector For establishing the electrical connections between the mo-
(SM) dules
1 labeling strip For labeling the input and output points on the module
Interface mo- 1 slot For assigning slot numbers on racks 1 to 3
dule (IM) number label
(IM 361 and IM 365
only)

Sequence for Installing the Modules on the Rail

1. Power supply module
2. CPU
3. Signal module(s)
Note:If you are installing SM 331 analog input modules, please check before
installation whether you have to move the measuring range submodules on the
side of the module. (see Chapter 4 on analog modules in the Module
Specifications Reference Manual).

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Installation

Sequence for Installation

The individual steps to be followed when installing the modules are described
below.

Table 2-5 Installing the Modules on the Rail

Each signal module comes with a bus

connector, but not the CPU. When attaching
the bus connectors, always start with the
CPU:
S Remove the bus connector from the last
module and plug it into the CPU.
S You must not plug a bus connector into the
“last” module.

Hook the modules onto the rail (1), 2

slide them along as far as the module on the 1
left (2), and swing them down into place (3).

3
Bolt the modules tight, applying a torque of
between 0.8 and 1.1 Nm (7 to 10 in. lb.).

0.8 to 1.1 Nm

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 Installation

2.2.3 After Installation

Inserting the Key

After installing the CPU on the rail, you can insert the key into the CPU in the
STOP or RUN switch position.

STOP

Figure 2-7 Inserting the Key in the CPU

Assigning Slot Numbers

After installation you can assign a slot number to each module. This makes it
easier to assign the modules in the configuration table in STEP 7. Table 2-6 shows
the slot number assignment.

Table 2-6 Slot Numbers for S7 Modules

Slot Number Module Remarks

1 Power supply (PS) –
2 CPU –
3 Interface module (IM) To the right of the CPU
4 1st signal module To the right of the CPU or IM
5 2nd signal module –
6 3rd signal module –
7 4th signal module –
8 5th signal module –
9 6th signal module –
10 7th signal module –
11 8th signal module –

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Installation

Applying Slot Numbers

Figure 2-8 shows you how to apply the slot numbers.The slot number labels are
included with the CPU.

Figure 2-8 Applying Slot Numbers to the Modules

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Addressing 3
In This Chapter
In this chapter, you will learn about the different ways of addressing the individual
channels of the signal modules.

Slot-Based Address Allocation

Slot-based address allocation is the default addressing method on the S7, i.e. a
defined module start address is allocated to each slot number.

User-Defined Address Allocation

In user-defined address allocation, you can allocate any address within the
available CPU address area to any module. User-oriented address allocation on
the S7-300 is only possible with the CPU 315-2 DP.

In This Chapter

Section Contents Page

3.1 Slot-Based Address Allocation for Modules (Default 3-2
Addresses)
3.2 User-Defined Address Allocation with CPU 31x-2 DP 3-4
3.3 Addressing the Signal Modules 3-5
3.4 Addressing the Integrated Inputs and Outputs of the 3-8
CPU 312 IFM und CPU 314 IFM

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Addressing

3.1 Slot-Based Addressing for Modules (Default Addressing)

Introduction
In slot-based addressing (default addressing), a module start address is allocated
to each slot number (see Table 3-1). This section shows you which module start
address is allocated to which slot number. You need this information to determine
the module start addresses on the installed modules.

Maximum Configuration
Figure 3-1 shows a configuration of the S7-300 on four racks and all of the
available module slots. Please note that with the CPUs 312 IFM and 313, only one
configuration is possible on rack 0.

Rack 3

Slot number IM 3 4 5 6 7 8 9 10 11

Rack 2

Slot number IM 3 4 5 6 7 8 9 10 11

Rack 1

Slot number IM 3 4 5 6 7 8 9 10 11

Rack 0

Slot number 1 2 3 4 5 6 7 8 9 10 11

Figure 3-1 Slots of the S7-300

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 Addressing

Module Start Addresses

Table 3-1 shows the allocation of the module start addresses to the slot numbers
and racks.
The input and output addresses for I/O modules start from the same module start
address.

Note
In the case of the CPU 314 IFM, a module cannot be plugged into slot 11 on
rack 3. The address space is occupied by the integrated inputs and outputs.

Table 3-1 Start Addresses for the Signal Modules

Rack Module Slot Number

Start
Addresses 1 2 3 4 5 6 7 8 9 10 11

Digital 0 4 8 12 16 20 24 28
0 PS CPU IM
Analog 256 272 288 304 320 336 352 368
Digital – 32 36 40 44 48 52 56 60
11 IM
Analog – 384 400 416 432 448 464 480 496
Digital – 64 68 72 76 80 84 88 92
21 IM
Analog – 512 528 544 560 576 592 608 624
Digital – 96 100 104 108 112 116 120 1242
31 IM
Analog – 640 656 672 688 704 720 736 7522
1 Not with the CPU 312 IFM/313
2 Not with the CPU 314 IFM

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Addressing

3.2 User-Defined Address Allocation with the CPU 31x-2 DP

Only the 315-2 DP, 316-2 DP and 318-2 CPUs

... support user-defined address allocation.

User-Defined Address Allocation

User-defined address allocation means that you are free to allocate any module
(SM/FM/CP) an address of your choice. The addresses are allocated in STEP 7.
You define the start address of the module, and all other addresses of this module
are based on this start address.

Advantages
Advantages of user-defined address allocation:
S Optimum utilization of the address areas available, since between the modules,
address “gaps” will not occur.
S When generating standard software, you can program addresses which are
independent of the S7-300 configuration.

Addresses of the Distributed I/Os

To address the distributed I/Os of the CPUs 31x-2 DP, please read Section 9.1.

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 Addressing

3.3 Addressing the Signal Modules

Introduction
This section shows you how signal modules are addressed. You need this
information in order to be able to address the channels of the signal modules in
your user program.

Addresses of the Digital Modules

The address of an input or output of a digital module consists of a byte address
and a bit address.

E.g. I 1.2

Input Byte ad- Bit address

dress

The byte address depends on the module start address.

The bit address is the number printed on the module.
Figure 3-2 shows you how the addresses of the individual channels of a digital
module are obtained.

Byte address:
Module start address

Byte address:
Module start address + 1

Bit address

Figure 3-2 Addresses of the Inputs and Outputs of Digital Modules

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Addressing

An Example for Digital Modules

The example in Figure 3-3 shows which default addresses are obtained if a digital
module is plugged into slot 4 (i.e. when the module start address is 0).
Slot number 3 has not been assigned since there is no interface module in the
example.

PS CPU SM (digital module)

Address 0.0
Address 0.1

Address 0.7

Address 1.0
Address 1.1

Address 1.7

Slot number 1 2 4

Figure 3-3 Addresses of the Inputs and Outputs of the Digital Module in Slot 4

Addresses of the Analog Modules

The address of an analog input or output channel is always a word address.
The channel address depends on the module start address.
If the first analog module is plugged into slot 4, it has the default start address 256.
The start address of each further analog module increases by 16 per slot (see
Table 3-1).
An analog input/output module has the same start addresses for its input and
output channels.

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An Example for Analog Modules

The example in Figure 3-4 shows you which default channel addresses are
obtained for an analog module plugged into slot 4. As you can see, the input and
output channels of an analog input/output module are addressed as of the same
address (the module start address).
Slot number 3 has not been assigned since there is no interface module in the
example.

PS CPU SM (analog module)

Inputs
Channel 0: Address 256
Channel 1: Address 258
:
:
Outputs
Channel 0: Address 256
Channel 1: Address 258
:
:

Slot number 1 2 4

Figure 3-4 Addresses of the Inputs and Outputs of the Analog Module in Slot 4

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Addressing

3.4 Addressing the Integrated Inputs and Outputs of the

CPU 312 IFM and CPU 314 IFM

CPU 312 IFM

The integrated inputs and outputs of the CPU 312 IFM have the following
addresses:

Table 3-2 Integrated Inputs and Outputs of the CPU 312 IFM

Inputs/Outputs Addresses Remarks

10 digital inputs 124.0 to 125.1
Of these, 4 are special You can assign these special channels the
channels: counter and frequency functions (see the
124.6 to 125.1 Integrated Functions) manual), or you can use
them as interrupt inputs.
6 digital outputs 124.0 to 124.5 –

CPU 314 IFM

The integrated inputs and outputs of the CPU 314 IFM have the following
addresses:

Table 3-3 Integrated Inputs and Outputs of the CPU 314 IFM

Inputs/Outputs Addresses Remarks

20 digital inputs 124.0 to 126.3
Of these, 4 are special You can assign these special channels the
channels: functions “Counter”, “Frequency meter”,
126.0 to 126.3 “Counter A/B” or “Positioning” (see the
Integrated Functions) manual), or you can use
them as interrupt inputs.
16 digital outputs 124.0 to 125.7 –
4 analog inputs 128 to 135 –
1 analog output 128 to 129 –

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Introduction
In this chapter we will show you how to configure the electrical installation and how
to wire an S7-300.
To configure an S7-300 you must take into account the mechanical configuration.
Make sure you also read Section 2.1.

Basic Rules
In view of the many and varied applications an S7-300, this chapter can only
describe a few basic rules on its electrical configuration. You must observe at least
these basic rules if you want your S7-300 to operate faultlessly and satisfactorily.

Contents

Section Contents Page

4.1 Electrical Configuration 4-2
4.2 Lightning and Overvoltage Protection 4-20
4.3 Wiring 4-30

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Wiring

4.1 Electrical Configuration

Section Contents Page

4.1.1 General Rules and Guidelines for Operating an S7-300 4-2
Programmable Controller
4.1.2 Configuring the S7-300 Process Peripherals 4-5
4.1.3 S7-300 Configuration with Grounded Reference Potential 4-9
4.1.4 S7-300 Configuration with Ungrounded Reference Potential 4-9
(not CPU 312 IFM)
4.1.5 S7-300 Configuration with Isolated Modules 4-11
4.1.6 Configuration of an S7-300 with Non-Isolated Modules 4-13
4.1.7 Cabling Inside Buildings 4-13
4.1.8 Cabling Outside Buildings 4-17
4.1.9 Protecting Digital Output Modules Against Inductive Overvoltage 4-17

4.1.1 General Rules and Guidelines for Operating an S7-300

Programmable Controller

As part of a plant or system, and depending on its particular area of application,

the S7-300 programmable controller requires that you observe a number of
specific rules and guidelines.
Observe the safety and accident prevention regulations applying to particular
applications or situations, for example the relevant machine protection guidelines.
This section outlines the most important rules you must observe when integrating
your S7-300 in an existing plant or system.

Emergency Stop Systems

Emergency stop systems to IEC 204 (corresponds to VDE 113) must remain
effective in all operating modes of the plant or system.

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Starting Up a Plant Again Following Specific Events

The following table shows you what you have to observe when starting up a plant
again following certain events.

If There Is... What Must Not Happen ...

A restart following a voltage dip or power No dangerous operating states may occur.
failure If necessary, force an emergency stop.
A restart following resetting of the An uncontrolled or undefined start-up must
emergency stop system be avoided.

Mains Voltage
The following table shows you what to watch with respect to the mains voltage.

In the Case of ... The Following Must Apply

Permanently installed plants or systems wi- There must be a mains disconnect switch or
thout all-pole mains disconnect switches a fuse in the building installation system
Load power supplies, power supply modu- The system voltage range set must corres-
les pond to the local system voltage
All circuits of the S7-300 Any fluctuations in, or deviations from, the
rated mains voltage must be within the per-
missible tolerances (see the technical speci-
fications of the S7-300 modules)

24V DC Power Supply

The following table shows you what you must observe in connection with the 24V
DC power supply.

Function Measures to Take

Buildings External lightning Install lightning pro-
protection tection
(
(e.g. lilightning
ht i
24V DC power supply cables, Internal lightning
conductors).
signal cables protection
24 V power supply Safe (electrical) extra-low voltage isolation

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Protection Against the Effects of External Electrical Interference

The following table will show you what you must do to protect your programmable
controller against electrical interference or faults.

Function Make Sure That ...

All plants and systems in which the S7-300 A protective conductor is connected to the
is installed plant or system to divert electromagnetic
interference.
Supply, signal and bus cables The conductor routing and installation is
correct. (see Section 4.1.7 and 4.1.8)
Signal and bus cables A cable break or conductor break cannot
result in undefined plant or system states.

Rules Relating to S7-300 Power Consumption and Power Loss

The S7-300 modules draw the power they need from the backplane bus and, if
required, from an external load power supply.
S The power consumption of all the signal modules from the backplane bus must
not exceed the current the CPU can deliver to the backplane bus.
S The PS 307 power supply is dependent on the power consumption from the
24V load power supply; this is made up of the total power consumption of the
signal modules and all other connected loads.
S The power loss of all the components in a cabinet must not exceed the
maximum thermal rating of the cabinet.
Tip: When establishing the required dimensions of the cabinet, ensure that the
temperature inside the cabinet does not exceed the permissible 60 _C even
where external temperatures are high.
You will find the values for the power consumption and power loss of a module
under the technical specifications of the relevant modules.

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4.1.2 Configuring the S7-300 Process I/Os

This section contains information concerning the overall configuration of an S7-300

system with a grounded incoming supply (TN-S system). The following aspects are
covered:
S Circuit-breaking devices, short-circuit and overload protection to VDE 0100 and
VDE 0113
S Load power supplies and load circuits

Definition: Grounded Supply

In a grounded incoming supply system, the neutral is grounded. A single fault to
ground or a grounded part of the plant causes the protective devices to trip.

Components and Protective Measures

A number of components and protective measures are prescribed for a plant. The
type of components and the degree of compulsion pertaining to the protective
measures will depend on the VDE specification applicable to your particular plant.
The following table refers to Figure 4-1 on page 4-5.

Table 4-1 VDE Specifications for Configuring a PLC System

Compare ... Refer to VDE 0100 VDE 0113

Figure
4-1
Disconnecting devices
... Part 460: ... Part 1:
for control systems, Main switch Disconnector
sensors and actuators
Short-circuit and over-  ... Part 725: ... Part 1:
load protection: Single-pole fu- S In the case of a grounded
In groups for sensors sing of circuits secondary circuit: provide
and actuators single-pole protection
S Otherwise: provide all-pole
protection
Load power supply for  Galvanic isolation Galvanic isolation by transformer
AC load circuits with by transformer mandatory
more than five electro- recommended
magnetic devices

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Features of Load Power Supplies

The load power supply feeds input and output circuits (load circuits), as well as
sensors and actuators. The characteristic features of load power supplies required
in specific applications are listed in the following table.

Characteristics of Mandatory for ... Remarks

the Load Power
Supply
Protective separa- Modules that have to be The PS 307 power supplies and the Sie-
tion supplied with v60V DC mens load power supplies of the 6EP1
or v25V AC series have these characteristics
24V DC load circuits
Output voltage tole- If the output voltage tolerances are ex-
rances: ceeded, we recommend you fit a back-
20.4 V to 28.8 V 24V DC load circuits up capacitor Rating: 200 mF per 1A load
current (in the case of full-wave rectifica-
40.8 V to 57.6 V 48V DC load circuits tion).

51 V to 72 V 60V DC load circuits

Rule: Ground Load Circuits

Load circuits should be grounded.
The common reference potential (ground) guarantees full functionality. Provide a
detachable connection to the protective conductor on the load power supply
(terminal L- or M) or on the isolating transformer (Figure 4-1, ). In the event of
power distribution faults, this makes it easier to localize ground faults.

S7-300 Grounding Concept

In the S7-300 grounding concept, a distinction is drawn between the CPU 312 IFM
and the other CPUs.
S CPU 312 IFM: With the CPU 312 IFM, you can only implement a grounded
configuration. The functional ground is connected to the chassis ground
internally in CPU 312 IFM (see Section 8.4.1).
S CPU 313/314/314 IFM/315/315-2 DP/316-2 DP/318-2: If you use the S7-300
with one of these CPUs on a grounded supply, you should also ground the
reference potential of the S7-300. The reference potential is grounded if the
connection between the M terminal and the functional ground terminal on the
CPUs is in place (factory setting of the CPU).

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S7-300 in the Overall Configuration

Figure 4-1 shows the S7-300 in the overall configuration (load power supply and
grounding concept) supplied from a TN-S system.
Note: The arrangement of the power supply connections shown does not reflect
the actual physical arrangement; this has been done to improve clarity.

L1 Low-voltage distribution
L2
L3 For example, TN-S system
N (3 400 V)
PE
Cabinet

PS CPU SM

Rail

mP
L1 L+
M
N M

Signal modules

Ground bus in cabinet



AC
AC
Load circuit
24 to 230V AC for AC modules

AC
DC
 5 to 60V DC load circuit for
non-isolated DC modules

AC
DC
5 to 60V DC load circuit for
isolated DC modules

Figure 4-1 Signal Modules Operated on a Grounded Incoming Supply

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S7-300 with Load Power Supply from the PS 307

Figure 4-2 shows the S7-300 in the overall configuration (load power supply and
grounding concept) in a TN-S power system environment.
Apart from powering the CPU, the PS 307 also supplies the load current for the
24V DC modules.
Note: The arrangement of the power supply connections does not reflect the actual
physical arrangement; this has been done to improve clarity.

L1 Low-voltage distribution
L2
L3 For example, TN-S system
N (3 400 V)
PE
Cabinet

PS CPU SM

Rail

mP
L1 L+
M
N M

Signal modules

Ground bus in cabinet

24V DC load circuit for

DC modules

Figure 4-2 Signal Modules Powered from the PS 307

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4.1.3 S7-300 Configuration with Grounded Reference Potential

If you install the S7-300 with grounded reference potential, interference currents
that might occur are discharged to the protective conductor.
S In the case of CPUs 313/314/314 IFM/315/315-2 DP/316-2DP/318-2, via a
jumper inserted between terminal M and functional ground (see Figure 4-3)
S In the case of the CPU 312 IFM, these terminals are connected internally (see
Section 8.4.1).

Terminal Connection Model

Figure 4-3 shows the configuration of an S7-300 with CPU 313/314/314 IFM/315/
315-2 DP/316-2 DP/318-2 with grounded reference potential. If you want to ground
the reference potential, you must not remove the jumper on the CPU between the
M terminal and functional ground.

Removable
jumper

Removable
47 nF 1 MΩ
jumper
M

M
L+
M
Ground bus

Figure 4-3 S7-300 Configuration with Grounded Reference Potential

4.1.4 S7-300 Configuration with Ungrounded Reference Potential

(Not CPU 312 IFM)

If you install the S7-300 with ungrounded reference potential, any interference
current is discharged to the protective conductor via an RC network integrated in
CPUs 313/314/314 IFM/315/315-2 DP/ 316-2 DP/318-2 (see Figure 4-4).

Application
In plants covering large areas, it may be necessary to configure the S7-300 with
ungrounded reference potential for ground fault monitoring purposes, for example.
This is the case, for example, in the chemical industry and in power stations.

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Terminal Connection Model

Figure 4-4 shows the configuration of an S7-300 (not with CPU 312 IFM) with
ungrounded reference potential. If you do not want to ground the reference
potential, you must remove the jumper on the CPU between the M terminal and
functional ground. If the jumper is not in place, the S7-300’s reference potential
is connected internally to the protective conductor over an RC network and the rail.
This discharges radio-frequency interference current and precludes static charges.

47 nF 1 MΩ
M M
L+
M
Ground bus

Figure 4-4 S7-300 Configuration with Ungrounded Reference Potential

Power Supply Units

In the case of power supply units, make sure that the secondary winding has no
connection to the protective conductor. We recommend the use of the PS 307
power supply module.

Filtering the 24V DC Supply

If you supply the CPU from a battery without grounding the reference potential, you
must filter the 24 V DC supply. Use an interference suppression device from
Siemens, for example, B84102-K40.

Insulation Monitoring
If dangerous plant conditions can arise as a result of double faults, you must
provide some form of insulation monitoring.

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4.1.5 S7-300 Configuration with Isolated Modules

Isolation Between...
In configurations with isolated modules, the reference potentials of the control
circuit (Minternal) and load circuit (Mexternal) are electrically isolated
(see Figure 4-5).

Application
You use isolated modules for the following:
S All AC load circuits
S DC load circuits with separate reference potential
Examples of load circuits with separate reference potential:
– DC load circuits whose sensors have different reference potentials (for
example if grounded sensors are located at some considerable distance
from the control system and no equipotential bonding is possible)
– DC load circuits whose positive pole (L+) is grounded (battery circuits).

Isolated Modules and Grounding Concept

You can use isolated modules irrespective of whether the reference potential of the
control system is grounded or not.

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Potentials in a Configuration with Isolated Modules

PS CPU DI DO
Uint
Data
Mint

mP
L1 L+
L1
M
N
N
PE M

Ground bus in cabinet

L+ L1

Mext N
230V AC load
24V DC load current supply current supply

Figure 4-5 Potentials in a Configuration with Isolated Modules

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4.1.6 Configuration of an S7-300 with Non-Isolated Modules

Potentials in a Configuration with Non-Isolated Modules

Figure 4-6 shows the potentials of an S7-300 configuration with grounded
reference potential with the non-isolated analog input/output module SM 334; AI
4/AO 2 8/8Bit. For this analog input/output module, you must connect one of the
MANA grounds with the chassis ground of the CPU.

PS CPU 4AI/2AO
Uint
Data
Mint

mP
L1 L+
L1
M D D
N A A
N
PE M MANA

+ +
1 mm2

Ground bus in the V

cabinet A
L+
Mext
24V DC load power supply

Figure 4-6 Potentials in a Configuration with the Non-Isolated SM 334 Analog Input/Output Module;
AI 4/AO 2 8/8Bit

4.1.7 Cable/Wiring Routing Inside Buildings

Rules for EMC Cable/Wiring Routing

Inside buildings (inside and outside cabinets), clearances must be observed
between groups of different cables to achieve the necessary electromagnetic
compatibility (EMC). Table 4-2 provides you with information on the general rules
governing clearances to enable you to choose the right cables.

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How to Read the Table

To find out how to run two cables of different types, proceed as follows:
1. Look up the type of the first cable in column 1 (Cables for ...).
2. Look up the type of the second cable in the corresponding field in column 2
(and Cables for ...).
3. Read off the guidelines to be observed from column 3 (Run ...).

Table 4-2 Cabling Inside Buildings

Cables for ... and Cables for ... Run ...

Bus signals, shielded Bus signals, shielded In common bundles or cable
(SINEC L1, PROFIBUS) (SINEC L1, PROFIBUS) ducts
Data signals, shielded Data signals, shielded
(programming devices, (programming devices,
operator panels, printers, operator panels, printers,
counter inputs, etc.) counter inputs, etc.)
Analog signals, shielded Analog signals, shielded
Direct voltage Direct voltage
(v 60 V), unshielded (v 60 V), unshielded
Process signals Process signals
(v 25 V), shielded (v 25 V), shielded
Alternating voltage Alternating voltage
(v 25 V), unshielded (v 25 V), unshielded
Monitors (coaxial cable) Monitors (coaxial cable)
Direct voltage In separate bundles or cable
(u 60 V and v 400 V), ducts (no minimum clearance
unshielded necessary)
Alternating voltage
(u 25 V and v 400 V),
unshielded
Direct and alternating voltages Inside cabinets:
(u 400 V), In separate bundles or cable
unshielded ducts (no minimum clearance
necessary)
Outside cabinets:
On separate cable racks with a
clearance of at least 10 cm
(3.93 in.)

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Table 4-2 Cable/Wiring Routing Inside Buildings, continued

Cables for ... and Cables for ... Run ...

Direct voltage Bus signals, shielded In separate bundles or cable
(u 60 V and v 400 V), (SINEC L1, PROFIBUS) ducts (no minimum clearance
unshielded Data signals, shielded necessary)
Alternating voltage (programming devices, OPs,
(u 25 V and v 400 V), printers, count signals, etc.)
unshielded Analog signals, shielded
Direct voltage
(v 60 V), unshielded
Process
(v 25 V), shielded
Alternating voltage
(v 25 V), unshielded
Monitors (coaxial cable)
Direct voltage In common bundles or cable
(u 60 V and v 400 V), ducts
unshielded
Alternating voltage
(u 25 V and v 400 V),
unshielded
Direct and alternating voltages Inside cabinets:
(u 400 V), unshielded In separate bundles or cable
ducts (no minimum clearance
necessary)
Outside cabinets:
On separate cable racks with a
clearance of at least 10 cm
(3.93 in.)

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Table 4-2 Cable/Wiring Routing Inside Buildings, continued

Cables for ... and Cables for ... Run ...

Direct and alternating voltages Bus signals, shielded Inside cabinets:
(u 400 V), (SINEC L1, PROFIBUS) In separate bundles or cable
unshielded Data signals, shielded ducts (no minimum clearance
(programming devices, OPs, necessary)
printers, count signals, etc.) Outside cabinets:
Analog signals, shielded On separate cable racks with a
Direct voltage clearance of at least 10 cm
(v 60 V), unshielded (3.93 in.)
Process
(v 25 V), shielded
Alternating voltage
(v 25 V), unshielded
Monitors (coaxial cable)
Direct voltage
(u 60 V and v 400 V),
unshielded
Alternating voltage
(u 25 V and v 400 V),
unshielded
Direct and alternating voltages Direct and alternating voltages In common bundles or cable
(u 400 V), (u 400 V), ducts
unshielded unshielded
SINEC H1 SINEC H1 In common bundles or cable
ducts
Others In separate bundles or cable
ducts with a clearance of at least
50 cm (19.65 in.)

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4.1.8 Cable/Wiring Routing Outside Buildings

Rules for EMC Cable/Wiring Routing

When installing cables outside buildings, the same EMC rules apply as for inside
buildings. The following also applies:
S Run cables on metal cable supports.
S Establish an electrical connection between the joints in the cable supports.
S Ground the cable supports.
S If necessary, provide adequate equipotential bonding between the various items
of equipment connected.
S Take the necessary (internal and external) lightning protection and grounding
measures in as far as they are applicable to your particular application (see
below).

Rules for Lightning Protection Outside Buildings

Run your cables either:
S in metal conduits grounded at both ends, or
S in concrete cable ducts with continuous end-to-end armoring.

Overvoltage Protection Equipment

An individual appraisal of the entire plant is necessary before any lightning
protection measures are taken (see Section 4.2).

4.1.9 Protecting Digital Output Modules from Inductive Overvoltage

Integrated Overvoltage Protection

The digital output modules of the S7-300 have integral surge protectors. Surge
voltages occur when inductive loads (for example, relay coils and contactors) are
switched off.

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Additional Overvoltage Protection

Inductive loads should only be fitted with supplementary surge protectors in the
following cases:
S If SIMATIC output circuits can be switched off by means of additionally installed
contacts (e.g. relay emergency stop contacts)
S If the inductive loads are not driven by SIMATIC modules
Note: Ask the supplier of the inductances how the various overvoltage protection
devices should be rated.

Example:
Figure 4-7 shows an output circuit that makes supplementary overvoltage
protection necessary.

Contact in the output circuit

For example, emergency stop
switch
Inductance requires suppressor circuit
D
(see Figures 4-8 and 4-9).

Figure 4-7 Relay Contact for Emergency Stop in the Output Circuit

Suppressor Circuit with DC-Operated Coils with Diodes and Zener Diodes
DC-operated coils are connected with diodes or Zener diodes.

with diodes with Zener diodes

+ +

- -

Figure 4-8 Suppressor Circuit with DC-Operated Coils with Diodes and Zener Diodes

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Suppressor Circuit with Diodes/Zener Diodes

Diode/Zener diode circuits have the following characteristics:
S The overvoltages induced on circuit interruption are completely
suppressed/Zener diode has a higher cut-off voltage.
S They have a high time delay (six to nine times higher than without a diode
circuit)/Zener diode interrupts switch faster than a diode circuit.

Suppressor Circuit with AC-Operated Coils

AC-operated coils are connected with varistors or RC elements.

with varistor with RC

element
~ ~

~ ~

Figure 4-9 Suppressor Circuit with AC-Operated Coils

Suppressor Circuit with Varistors

Suppressor circuits with varistors have the following characteristics:
S The amplitude of the switching overvoltage is limited, but not damped
S The wavefront steepness remains the same
S Very short time delay

Suppressor Circuit with RC Elements

Suppressor circuits with RC elements have the following characteristics:
S The amplitude and wavefront steepness of the switching overvoltage are
reduced
S Short time delay.

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4.2 Lightning Protection

Section Contents Page

4.2.1 Lightning Protection Zone Concept 4-21
4.2.2 Rules for the Transition Between Lightning Protection Zones 0´1 4-23
4.2.3 Rules for the Transition Between Lightning Protection Zones 1´2 4-25
and Greater
4.2.4 Sample Circuit for Overvoltage Protection of Networked S7-300s 4-28

Reference Literature
The solutions given are based on the lightning protection zone concept described
in the IEC 1312-1 “Protection against LEMP”.

Overview
Failures are very often the result of overvoltages caused by:
S Atmospheric discharge or
S Electrostatic discharge.
We will begin by showing you what the theory of overvoltage protection is based
on: the lightning protection zones concept.
At the end of this section, you will find rules for the transitions between the
individual lightning protection zones.

Note
This section can only provide information on the protection of a programmable
controller against overvoltages.
However, complete protection against overvoltage is guaranteed only if the whole
surrounding building is designed to provide protection against overvoltages. This
applies especially to constructional measures for the building at the planning
stage.
If you wish to obtain detailed information on overvoltage protection, we therefore
recommend you to address your Siemens contact or a company specialized in
lightning protection.

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4.2.1 Lightning Protection Zone Concept

The Principle of the Lightning Protection Zone Concept

The principle of the lightning protection zone concept states that the volume to be
protected, for example, a manufacturing hall, is subdivided into lightning protection
zones in accordance with EMC guidelines (see Figure 4-10).
The individual lightning protection zones are made up of:

The outer lightning protection of the building (field side) Lightning protection
zone 0
Shielding
S Buildings Lightning protection
zone 1
S Rooms and/or Lightning protection
zone 2
S Devices Lightning protection
zone 3

Effects of the Lightning Strike

Direct lightning strikes occur in lightning protection zone 0. The lightning strike
creates high-energy electromagnetic fields which can be reduced or removed from
one lightning protection zone to the next by suitable lightning protection
elements/measures.

Overvoltage
In lightning protection zones 1 and higher, surges can result from switching
operations and interference.

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Schematic of the Lightning Protection Zones

Figure 4-10 shows a schematic of the lightning protection zone concept for a
free-standing building.

Lightning protection zone 0 (field side)

Building
Outer shield
lightning (steel
Lightning protection zone 1
protection armouring)

Room shield
Lightning prot. zone 2 (steel
Power armouring)
cable Lightning Device shield
protection
zone 3 (metal housing)
Device
non
electrical
Metallic wire
part (metallic)

internal
line

Lightening protection
Data cable equipotential bonding
Local equipotential
bonding

Figure 4-10 Lightning Protection Zones of a Building

Principle of the Transitions between Lightning Protection Zones

At the transitions between the lightning protection zones, you must take measures
to prevent surges being conducted further.
The lightning protection zone concept also states that all cables at the transitions
between the lightning protection zones that can carry lightning stroke current (!)
must be included in the lightning protection equipotential bonding.
Lines that can carry lightning stroke current include:
S Metal pipelines (for example, water, gas and heat)
S Power cables (for example, line voltage, 24 V supply)
and
S Data cables (for example, bus cable).

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4.2.2 Rules for the Transition Between Lightning Protection Zones

0´1

Rule for the Transition 0 ´ 1 (Lightning Protection Equipotential Bonding)

The following measures are suitable for lightning protection equipotential bonding
at the transition between lightning protection zones 0 ´ 1:
S Use grounded, spiraled, current-conducting metal strips or metal braiding, for
example, NYCY or A2Y(K)Y, as a cable shield at the start and end,
and
S lay cable
– in continuous metal pipes that are grounded at the start and end, or
– in ducts of armored concrete with continuous armoring or
– on closed metal cable racks grounded at the start and end,
or
S use fiber optic cables instead of lightning stroke current-carrying cables.

Additional Measures
If you cannot take the measures listed above, you must install a high-voltage
protector at the 0 ´ 1 transition with a corresponding lightning conductor.
Table 4-3 contains the components you can use for high-voltage protection of your
plant.

Table 4-3 High-Voltage Protection of Cables Using Surge Protection Components

No. Cables for ... ... with the Following at Transi- Order No.
tion 0 ´ 1
1 S 3-phase TN-C system 3 DEHNport 5 SD 7 028*
lightning conductors
Phase L1/L2/L3
to PEN
S 3-phase TN-S and TT system 4 DEHNport 5 SD 7 028*
lightning conductors
Phase L1/L2/L3/N
to PE
S AC TN-L, TN-S, TT system 2 DEHNport 5 SD 7 028*
lightning conductors
Phase L1 + N
to PE
2 24V DC power supply 1 KT lightning conductor DSN: 919 253
Type A D 24 V

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Table 4-3 High-Voltage Protection of Cables Using Surge Protection Components, continued

No. Cables for ... ... with the Following at Transi- Order No.
tion 0 ´ 1
3 Bus cable
S MPI, RS 485 S up to 500 kbps
1 KT lightning conductor DSN: 919 232
Type ARE 8 V -
S over 500 kbps
1 KT lightning conductor DSN: 919 270
Type AHFD 5 V -
S RS 232 (V.24) S per core pair
1 KT lightning conductor DSN: 919 231
Type ARE 15 V -
4 Inputs/outputs of digital modules
and power supply
S 24V DC 1 KT lightning conductor DSN: 919 253
Type AD 24 V -
S 120/230V AC 2 DEHNguard 150 900 603*
surge arresters
5 Inputs/outputs of analog modules
S Up to 12 V +/– 1 KT lightning conductor DSN: 919 220
Type ALE 15 V -
S Up to 24 V +/– 1 KT lightning conductor DSN: 919 227
Type ALE 48 V -
S Up to 48 V +/– 1 KT lightning conductor DSN: 919 222
Type ALE 60 V -

* You can order these components direct from DEHN + SÖHNE

GmbH + Co. KG
Elektrotechnische Fabrik
Hans-Dehn-Str. 1
D-92318 Neumarkt
Federal Republic of Germany

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4.2.3 Rules for the Transitions Between 1 ´ 2 and Greater Lightning

Protection Zones

Rules for 1 ´ 2 and Greater Transitions (Local Equipotential Bonding)

The following applies to all 1 ´ 2 and greater lightning protection zone transitions:
S Set up local equipotential bonding at each subsequent lightning protection zone
transition.
S Include all cables (also metal conduits, for example) in the local equipotential
bonding at all subsequent lightning protection zone transitions.
S Include all metal installations located within the lightning protection zone in the
local equipotential bonding (for example, metal part within lightning protection
zone 2 at transition 1 ´ 2).

Additional Measures
We recommend low-voltage protection:
S For all 1 ´ 2 and greater lightning protection zone transitions
and
S For all cables that run within a lightning protection zone and are longer than
100 m

Lightning Protection Element for the 24V DC Power Supply

You must use only the KT lightning conductor, Type AD 24 V SIMATIC for the 24V
DC power supply of the S7-300. All other surge protection components do not
meet the required tolerance range of 20.4 V to 28.8 V of the S7-300’s power
supply.

Lightning Conductor for Signal Modules

You can use standard surge protection components for the digital input/output
modules. However, please note that these only permit a maximum of 1.15 VNom
= 27.6 V for a rated voltage of 24V DC. If the tolerance of your 24V DC power
supply is higher, use the surge protection components for 48V DC nominal voltage.
You can also use the KT lightning conductor, Type AD 24 V SIMATIC. However,
this can result in the following restrictions:
S Digital inputs: An increased input current can flow in the case of negative input
voltages.
S Digital outputs: The release time of contactors can increase significantly.

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Low-Voltage Protection Elements for 1 ´ 2

We recommend the surge protection components listed in Table 4-4 for the
interfaces between lightning protection zones 1 ´ 2. You must use these
low-voltage protection elements for the S7-300 in order to meet the conditions for
the CE mark.

Table 4-4 Low-Voltage Protection for Lightning Protection Zone 1 ´ 2

No. Cables for ... ... with the Following at Transi- Order No.
tion 1 ´ 2
1 S 3-phase TN-C system 3 DEHNguard 275 900 600*
surge arresters 5 SD 7 030
S 3-phase TN-S and TT system 4 DEHNguard 275 900 600*
surge arresters 5 SD 7 030
S AC TN-L, TN-S, TT system 2 DEHNguard 275 900 600*
surge arresters 5 SD 7 030
2 24V DC power supply 1 KT lightning conductor DSN: 919 253
Type A D 24 V
3 Bus cable
S MPI, RS 485 S up to 500 kbps
1 KT lightning conductor DSN: 919 232
Type ARE 8 V -
S over 500 kbps
1 KT lightning conductor DSN: 919 270
Type AHFD 5 V -
S RS 232 (V.24) S per core pair
1 KT lightning conductor DSN: 919 231
Type ARE 15 V -
4 Inputs/outputs of digital modules
S 24V DC 1 KT lightning conductor DSN: 919 253
Type AD 24 V -
S 120/230V AC 2 DEHNguard 150 900 603*
surge arresters
5 Inputs of analog modules
S Up to 12 V +/– 1 KT ALD 12 V terminal block DSN: 919 216
on insulated rail

* You can order these components direct from DEHN + SÖHNE

GmbH + Co. KG
Elektrotechnische Fabrik
Hans-Dehn-Str. 1
D-92318 Neumarkt
Federal Republic of Germany

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Low-Voltage Protection Elements for 2 ´ 3

We recommend the surge protection components listed in Table 4-5 for the
transitions between lightning protection zones 2 ´ 3. You must use these
low-voltage protection elements for the S7-300 in order to meet the conditions for
the CE mark.

Table 4-5 Low-Voltage Protection for Lightning Protection Zone 2 ´ 3

No. Cables for ... ... with the Following at Transi- Order No.
tion 2 ´ 3
1 S 3-phase TN-C system 3 DEHNguard 275 900 600*
surge arresters 5 SD 7 030
S 3-phase TN-S and TT system 4 DEHNguard 275 900 600*
surge arresters 5 SD 7 030
S AC TN-L, TN-S, TT system 2 DEHNguard 275 900 600*
surge arresters 5 SD 7 030
2 24V DC power supply 1 KT lightning conductor DSN: 919 253
Type A D 24 V
3 Bus cable
S MPI, RS 485 S up to 500 kbps
1 KT lightning conductor DSN: 919 232
Type ARE 8 V -
S over 500 kbps
1 KT lightning conductor DSN: 919 270
Type AHFD 5 V -
S RS 232 (V.24) S per core pair
1 KT lightning conductor DSN: 919 231
Type ARE 15 V -
4 Inputs of digital modules
S 24V DC 1 Terminal block FDK 60 V DSN: 919 997
on insulated rail
S 120/230V AC 2 DEHNguard 150 900 603*
surge arresters
5 Outputs of analog modules
S Up to 12 V +/– 1 Terminal block DSN: 919 999
Type FDK 12 V
on an insulated rail, which
is connected to M – of
the module supply

* You can order these components direct from DEHN + SÖHNE

GmbH + Co. KG
Elektrotechnische Fabrik
Hans-Dehn-Str. 1
D-92318 Neumarkt
Federal Republic of Germany

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4.2.4 Sample Circuit for Overvoltage Protection of Networked

S7-300s

Components in Figure 4-11

Table 4-6 explains the consecutive numbers in Figure 4-11:

Table 4-6 Example of a Configuration Fulfilling Lightning Protection Requirements

(Legend for Figure 4-11)

No. from Components Description

Figure
4-11
1 DEHNport lightning conductors, High-voltage protection against direct
2 - 4 depending on mains system lightning strikes and surges as of
Order no.: 900 100* transition 0 ´ 1
2 2 DEHNguard 275 surge arresters, High-voltage surge protection at
Order no.: 900 600* transition 1 ´ 2
3 S In the spur line Low-voltage surge protection for RS
1 intermediate adapter 485 interfaces at transition 1 ´ 2
Type FS 9E-PB
Order no.: DSN 924 017
S In the spur line
1 standard rail 35 mm
with connecting cable
Type ÜSD-9-PB/S-KB
Order no.: DSN 924 064
4 Digital modules: Low-voltage surge protection at
KT lightning conductor, type AD 24 V inputs and outputs of the signal
SIMATIC modules at transition 1 ´ 2
Analog modules:
KT lightning conductor, type ARE 12
V–
5 Shielding the bus cable: –

Copper plate Shielding

ÎÎÎ Clip

6 Equipotential bonding cable 16 mm2 –

7 KT lightning conductor, type AHFD, Low-voltage surge protection for RS
for building entry point 485 interfaces at transition 0 ´ 1
Order No.: DSN 919 270

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Interconnection Example
Figure 4-11 gives an example of how to wire connect networked S7-300s in order
to achieve effective protection against surges:

Lightning protection zone 0, field side

L1L2 L3 NPE Lightning protection zone 1

 Cabinet 1  Cabinet 2
Lightning protect. zone 2 Lightning protect. zone 2

SV CPU SM  SV CPU SM 
MPI MPI
 

 


PE 10 mm2  PE 10 mm2  

 

Figure 4-11 Example of the Interconnection of Networked S7-300s

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4.3 Wiring

Section Contents Page

4.3.1 Wiring Rules 4-30
4.3.2 Wiring the Power Supply Module and CPU 4-32
4.3.3 Wiring the Front Connectors of the Signal Modules 4-35
4.3.4 Connecting Shielded Cables Using the Shield Contact Element 4-39

Prerequisite
You have already installed the S7-300 as described in Chapter 2.

4.3.1 Wiring Rules

Table 4-7 Wiring Rules for the Power Supply and CPU

Wiring Rules for... Power Supply and CPU

Connectable cable cross-sections for No
rigid cables
Connectable Without wire end 0.25 to 2.5 mm2
cable ferrule
cross-sections
ti
With wire end 0.25 to 1.5 mm2
for flexible cables ferrule
Number of cables per terminal 1 or combination of 2 conductors up to
connection 1.5 mm2 (total) in a common wire end
ferrule
Maximum outside diameter of the ∅ 3.8 mm
insulation
Length of Without insulating 11 mm
stripped lines collar
With insulating 11 mm
collar
Wire end ferrules Without insulating Version A, 10 to 12 mm long
to DIN 46228 collar
With insulating Version E, up to 12 mm long
collar

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Table 4-8 Wiring Rules for Module Front Connectors

Wiring Rules for... Module Front Connectors

(Spring Terminal and Screw-Type
Terminal)
20-pin 40-pin
Connectable cable cross-sections for No No
rigid cables
Connectable Without wire end 0.25 to 1.5 mm2 0.25 to 0.75 mm2
cable ferrule
cross-sections
ti
With wire end 0.25 to 1.5 mm2 0.25 to 0.75 mm2
for flexible cables ferrule Potential infeed:
1.5 mm2
Number of cables per terminal 1 or combination of 1 or combination of
connection 2 conductors up to 2 conductors up to
1.5 mm2 (total) in a 0.75 mm2 (total) in
common wire end a common wire end
ferrule ferrule
Maximum outside diameter of the ∅ 3.1 mm ∅ 2.0 mm
insulation Max. qty. 20 Max. qty. 40
∅ 3.1 mm
Max. qty. 20
Length of Without insulating 6 mm 6 mm
stripped lines collar
With insulating 6 mm 6 mm
collar
Wire end ferrules Without insulating Version A, 5 to Version A, 5 to
to DIN 46228 collar 7 mm long 7 mm long
With insulating Version E, up to Version E, up to
collar 6 mm long 6 mm long

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4.3.2 Wiring the Power Supply Module and CPU

Power Cables
Use flexible cables with a cross-section of between 0.25 and 2.5 mm2 to wire the
power supply.
If you use only one cable per connection, you don’t need an end ferrule.

Power Connector (not for CPU 312 IFM)

Use the power connector when wiring the PS 307 power supply module to the
CPU. The power connector comes with the power supply module.

Wiring the CPU 312 IFM

The PS 307 power supply module and the CPU 312 IFM are wired via the front
connector of the integrated inputs/outputs of the CPU 312 IFM (see Section 8.4.1).
You therefore cannot use the power connector for the CPU 312 IFM.

Other 24V Connections

Above the power connector on the PS 307 power supply there are still a number of
free 24V connections for powering the I/O modules.

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Wiring with the Power Connector

To wire the PS 307 power supply module and CPU, proceed as follows (see
Figure 4-12).

Warning
! Accidental contact with live conductors is possible, if the power supply module and
any additional load power supplies are switched on.
Make sure the S7-300 is absolutely dead before doing any wiring!

1. Open the front doors of the PS 307 power supply and CPU.
2. Undo the strain-relief assembly on the PS 307.
3. Strip the insulation from the power cable (230V/120V), and connect it to the
PS 307.
4. Screw the strain-relief assembly tight.
5. CPU 312 IFM: Strip the insulation off the power cable of the CPU 312 IFM, and
connect it to the PS 307 an.
CPU 313/314/314 IFM/315/315-2 DP/316-2 DP/318-2: Insert the power
connector, and screw it in tightly.
6. Close the front doors.

Strain-relief
assembly

Power
connector

4
230 V/120 V 0.5 to 0.8 Nm

Figure 4-12 Wiring the Power Supply Module and CPU to the Power Connector

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Setting the Power Supply to the Required Mains Voltage

Check to see that the voltage selector switch on the power supply module is set to
your local mains voltage. This switch is always factory-set to 230 V on the PS 307.
To select another mains voltage, do the following:
1. Pry the cover off with a screwdriver.
2. Set the selector to your mains voltage.
3. Replace the cover.

Figure 4-13 Setting the Mains Voltage for the PS 307

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4.3.3 Wiring the Front Connectors of the Signal Modules

Cables
You can use flexible cables with cross-sections as in Table 4-8 on page 4-31.
You do not need wire end ferrules. If you use wire end ferrules, only use those
listed in Table 4-8 on page 4-31.

Integrated Inputs/Outputs
You wire the integrated inputs/outputs of the CPU 312 IFM and 314 IFM also via
the front connector as described in this section.
If you use the possible digital inputs of the CPUs for the special functions, you wire
these inputs with shielded cables via a shield contact element (see Section 4.3.4).
This also applies when wiring the analog inputs/outputs of the CPU 314 IFM.

Types of Front Connector

You can order the 20- and 40-pin front connectors with spring or screw-type
terminals. You will find the order numbers in Appendix F.

Spring Terminals
To wire the front connector using spring terminals, simply insert the screwdriver
vertically into the opening with the red opening mechanism, put the cable into the
correct terminal, and remove the screwdriver.
Tip: There is a separate opening for test probes up to 2 mm in diameter to the left
of the opening for the screwdriver.

Wiring the Front Connector

Wire the screw-type front connector as follows:
1. Prepare the connector for wiring.
2. Wire the connector.
3. Prepare the module for operation.
These three steps are described on the following pages.

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Preparing the Connector for Wiring.

Warning
! Accidental contact with live conductors is possible if the power supply module and
any additional load power supplies are switched on.
Make sure the S7-300 is absolutely dead before doing any wiring!

1. Open the front door.

2. Place the front connector in the wiring position.
To do this, push the front connector into the signal module until it snaps into
place. The front connector still protrudes from the module in this position.
An advantage of the wiring position is that it makes wiring easier; in the wiring
position a wired front connector has no contact with the module.

Figure 4-14 Bringing the Front Connector into the Wiring Position

3. Strip the insulation off the cables (see Table 4-8 on page 4-31)
4. Do you want to use end ferrules?
If so: Press the end ferrules and the cables together

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Wiring the Front Connector

Table 4-9 Wiring the Front Connector

Step 20-Pin Front Connector 40-Pin Front Connector

1. Thread the cable strain-relief assembly –
into the front connector.
2. Do you want to bring the cables out at the bottom of the module?
If so:
Start with terminal 20, and wire the Starting at terminal 40 or 20, connect up
terminals in the following order: the terminals in alternating order, that is
terminal 20, 19, ... 1. terminals 39, 19, 38, 18 etc., down to
terminals 21 and 1.
If not:
Start with terminal 1, and wire the Starting at terminal 1 or 21, connect up
terminals in the following order: terminal the terminals in alternating order, that is
1, 2, ... 20. terminals 2, 22, 3, 23 etc., up to
terminals 20 and 40.
3. With screw-type terminals: Also tighten the screws of any terminals that are not
wired.
4. – Attach the cable strain-relief assembly
around the cable and the front connector.
5. Pull the cable strain-relief assembly tight. Push the retainer on the strain-relief
assembly in to the left; this will improve utilization of the available space.
–

2
2

1
0.4 to
0.7 Nm
0.5 to
0.8 Nm 4
3

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Preparing the Signal Module for Operation

Table 4-10 Preparing the Signal Module for Operation

Step 20-Pin Front Connector 40-Pin Front Connector

1. Press down the unlocking button on the Tighten screws to bring front connector
top of the module and, at the same time, to its operating position.
push the front connector into its
operating position on the module. When
the front connector reaches its operating
position, the unlocking button will snap
back into the locking position.
Note: When the front connector is put in its operating position, a front connector
encoding device engages in the front connector. The front connector then only fits
this type of module (see Section 7.2).
2. Close the front door.
3. Enter the addresses for identifying the individual channels on the labeling strip.
4. Slide the labeling strip into the guides on the front door.
–

2 2

1a 1

0.4 to
0.7 Nm

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4.3.4 Connecting Shielded Cables via a Shield Contact Element

Application
Using the shield contact element you can easily connect all the shielded cables of
S7 modules to ground by directly connecting the shield contact element to the rail.

Also for the CPU 312 IFM and 314 IFM

You can also use the shield contact element for wiring the integral inputs/outputs of
the CPU 312 IFM and 314 IFM, when using inputs for the special functions or
when wiring the analog inputs/outputs for the CPU 314 IFM.

Design of the Shield Contact Element

The shield contact element consists of the following parts:
S A fixing bracket with two bolts for attaching the element to the rail (Order No.:
6ES5 390-5AA00-0AA0) and
S The shield terminals
Depending on the cable cross-sections used, you must use the following shield
terminal:

Table 4-11 Assignment of Cable Cross-Sections and Terminal Elements

Cable with Shield Diameter Shield Terminal

Order No.:
2 cables with a shield diameter of 2 to 6ES7 390-5AB00-0AA0
6 mm (0.08 to 0.23 in.) each
1 cable with a shield diameter of 3 to 6ES7 390-5BA00-0AA0
8 mm (0.12 to 0.31 in.)
1 cable with a shield diameter of 4 to 6ES7 390-5CA00-0AA0
13 mm (0.16 to 0.51 in.)

The shield contact element is 80 mm (3.15 in.) wide with space for two rows each
with 4 shield terminals.

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Installing the Shield Contact Element

Install the shield contact element as follows:
1. Push the two bolts of the fixing bracket into the guide on the underside of the
rail. Position the fixing bracket under the modules to be wired.
2. Bolt the fixing bracket tight to the rail.
3. A slotted web is arranged at the bottom side of the terminal element. Place the
shield terminal at this position onto edge a of the fixing bracket (see
Figure 4-15). Press the shield terminals down and swing them into the desired
position.
You can attach up to four terminal elements on each of the two rows of the
shield contact element.

Fixing bracket
Shield terminal
Edge a

Figure 4-15 Configuration of Two Signal Modules With Shield Contact Element

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Attaching Cables
You can only attach one or two shielded cables per shield terminal (see
Figure 4-16 and Table 4-11). The cable is connected by its bare cable shield. There
must be at least 20 mm (0.78 in.) of bare cable shield. If you need more than
4 shield terminals, start wiring at the rear row of the shield contact element.
Tip: Use a sufficiently long cable between the shield terminal and the front
connector. You can thus remove the front connector without the need to also
remove the shield terminal.

1
Shield must lie under
the shield terminal
2

Figure 4-16 Attaching Shielded 2-Wire Cables to a Shield Contact Element

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Networking 5
Similar Structure
The structure of an MPI subnet is basically the same as a PROFIBUS subnet.
That means the same rules and the same components are used to set up the
subnet. The only exception arises if you set a transmission rate > 1.5 Mbps in a
PROFIBUS subnet. In this case, you will need other components. Special
reference is made to these components where relevant in this documentation.
Since the structure of an MPI subnet does not differ from that of a PROFIBUS
subnet, general reference is made in the following sections to configuring a subnet.

In This Chapter

Section Contents Page

5.1 Configuring a Subnet 5-2
5.2 Network Components 5-15

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Networking

5.1 Configuring a Subnet

In This Chapter

Section Contents Page

5.1.1 Prerequisites 5-2
5.1.2 Rules for Configuring a Subnet 5-5
5.1.3 Cable Lengths 5-12

Device = Node
Declaration: In the following, all devices that you connect in an MPI subnet are
called nodes.

5.1.1 Prerequisites

MPI/PROFIBUS Addresses
To ensure that all nodes can communicate with one another, you must allocate
them an address before networking:
S An “MPI address” and a “highest MPI address” in the MPI subnet
S A “PROFIBUS address” and a “highest PROFIBUS address” in a PROFIBUS
subnet.
Set these MPI/PROFIBUS addresses individually for each node using the
programming device (also on the slave switch in the case of some PROFIBUS-DP
slaves).

Note
The RS 485 repeater is not allocated an “MPI address” or a “PROFIBUS address”.

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Table 5-1 Permissible MPI/PROFIBUS Addresses

MPI Addresses PROFIBUS Addresses

0 to 126 0 to 125
Of these, the following are reserved: Of these, the following are reserved:
0 for the PG 0 for the PG
1 for the OP
2 for the CPU

Rules for the MPI/PROFIBUS Addresses

Observe the following rules before assigning MPI/PROFIBUS addresses:
S All MPI/PROFIBUS addresses in a subnet must be different.
S The highest MPI/PROFIBUS address must be w the largest actual
MPI/PROFIBUS address and be identical for each node. (Exception: If the
programming device is connected to several nodes; see Section 6.3.2).

Differences in the Case of MPI Addresses of CPs/FMs in an S7-300

Please note the following peculiarities and differences when using CPs/FMs with a
separate MPI address dependent on the CPU being used.

CPU 312 IFM to 316-2 DP:

Table 5-2 MPI Addresses of CPs/FMs in an S7-300 (with the CPU 312 IFM to 316-2 DP)

Options Example
Example: CPU CP CP
S7-300 with a CPU and 2 CPs in a
configuration.
The following 2 possibilities exist for the
assignment of MPI addresses of the
CP/FM in one configuration:

Option 1
MPI addr. MPI MPI
The CPU accepts the MPI addresses of addr. “x” addr. “z”
the CPs you set in STEP 7.
As of STEP 7 V 4.02 (see Section 11.2)
Option 2
MPI MPI MPI
The CPU automatically establishes the addr. addr.+1 addr.+2
MPI addresses of the CPs in their
configuration in accordance with the
MPI addr. pattern. CPU MPI addr.+1 MPI
addr.+2

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CPU 318-2

CPU 318-2 CP CP

An S7-300 with the CPU 318-2 only

occupies one MPI address in the MPI
subnet.

MPI addr.

Recommendation for MPI Addresses

Reserve the MPI address “0” for a service programming device and “1” for a
service OP that will be connected temporarily to the MPI if required. This means,
that you must assign different addresses to programming devices/OPs that are
integrated in the MPI subnet.
Recommendation for the MPI address of the CPU in the event of
replacement or servicing:
Reserve the MPI address “2” for a CPU. You thus prevent double MPI addresses
occurring after connection of a CPU with default settings to the MPI subnet (for
example, when replacing a CPU). This means that you must assign an MPI
address greater than “2” to the CPUs in the MPI subnet.

Recommendation for PROFIBUS Addresses

Reserve the PROFIBUS address “0” for a service programming device that may
subsequently be temporarily connected to the PROFIBUS subnet if required.
Allocate other PROFIBUS addresses to the programming devices integrated in the
PROFIBUS subnet.

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5.1.2 Rules for Configuring a Subnet

In This Section
This chapter describes how to configure a subnet and provides examples.

Segment
A segment is a bus cable between two terminating resistors. A segment can
contain up to 32 nodes. A segment is further limited by the permissible cable
length, which depends on the transmission rate (see Section 5.1.3).

Rules on Connecting the Nodes of a Subnet

S Before you interconnect the individual nodes of the subnet you must assign the
MPI address and the highest MPI address or the “PROFIBUS address” and the
“highest PROFIBUS address” to each node (except for RS 485 repeater).
Mark all the nodes in a subnet by putting their address on their housings. In
this way, you can always see which node has been assigned which address in
your system. For this purpose, each CPU comes with an enclosed sheet of
address labels.
S Connect all nodes in the subnet “in a row”; that is, integrate the stationary
programming devices and OPs direct in the subnet.
Connect only those programming devices/OPs that are required for
commissioning or maintenance via spur lines to the subnet.

Note
As of 3 Mbps, use only bus connectors with the order no. 6ES7 972-0B.10-0XA0
or 6ES7 972-0B.40-0XA0 to connect the nodes. (see Section 5.2)
As of 3 Mbps, use only the programming device connecting cable with the order
no. 6ES7 901-4BD00-0XA0 to connect the programming device. (see Section 5.2)

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Rules (Continued)
S If you operate more than 32 nodes on a network, you must connect the bus
segments via RS 485 repeaters.
All bus segments in a PROFIBUS subnet must have at least one DP master
and one DP slave between them.
S You connect non-grounded bus segments and grounded bus segments via RS
485 repeaters (see the description of the RS 485 repeater in the Module
Specifications Reference Manual).

S Each RS 485 repeater that you use reduces the maximum number of nodes on
each bus segment. That means if a RS 485 repeater is installed in one of the
bus segments, only a further 31 nodes can be installed in that segment. The
number of RS 485 repeaters has no impact on the maximum number of nodes
on the bus, however.
Up to 10 segments can be installed in a row.
S Switch the terminating resistor on at the first and last node of a segment.
S Before you integrate a new node in the subnet, you must switch off its supply
voltage.

Components
You connect the individual nodes via bus connectors and the PROFIBUS bus cable
(see also Section 5.2). Make sure that the bus connector is provided with a
programming device socket so that a programming device can be connected if
required.
Use RS 485 repeaters to connect segments or extend the cable.

Terminating Resistor
A cable must be terminated with its surge impedance. To do this, switch on the
terminating resistor on the first and last node of a subnet or a segment.
The nodes with a terminating resistor switched on must have their power supply
switched on during power up and operation.

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The Terminating Resistor on the Bus Connector

Figure 5-1 shows you how to switch on the terminating resistor on the bus
connector.

Terminating resistor on Terminating resistor on

switched on off
switched off off

Figure 5-1 Terminating Resistor on the Bus Connector Switched On and Off

The Terminating Resistor on the RS 485 Repeater

Figure 5-2 shows you where to switch on the terminating resistor on the RS 485
repeater.

DC
24 V L+ M PE M 5.2

Terminating resistor of
ON
bus segment 1

ON Terminating resistor of
SIEMENS
bus segment 2

Figure 5-2 Terminating Resistor on the RS 485 Repeater

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Example: Terminating Resistor in the MPI Subnet

Figure 5-3 shows where you must connect the terminating resistor in a possible
MPI subnet configuration.

S7-300
PG

S7-300 S7-300 S7-300

OP 25 À
RS 485 OP 25
repeater

À À

Spur line

PG*

* Connected via spur line for commissioning/maintenance only

À Terminating resistor switched on

Figure 5-3 Connecting Terminating Resistors in an MPI Subnet

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Example of an MPI Subnet

Figure 5-4 shows an MPI subnet that is configured in accordance with the above
rules.

S7-300** S7-300 S7-300 S7-300 CP****

PG
OP 25**
PROFIBUS
subnet***

2 À 1 3 4 5 6 7

S7-300 S7-300 S7-300 FM****

OP 25 OP 25

13 À 12 11 10 8 9

0
PG*
* Connected via spur line for commissioning/maintenance only
(with default MPI address)
** Connected to the MPI subnet later (with default MPI address)

*** The CP also has a PROFIBUS address in addition to the MPI address (address 7 here)
****In the case of the CPU 318-2-DP, the FMs/CPs do not have their own MPI addresses
In the case of the CPU 312 IFM to 316-2 DP, you can allocate the MPI addresses as you
wish
0 ... x MPI addresses of the nodes
À Terminating resistor switched on

Figure 5-4 Example of an MPI Subnet

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Example of a PROFIBUS Subnet

Figure 5-5 shows a PROFIBUS subnet that is configured in accordance with the
above rules.

S7-300 with
CPU 315-2 DP
as DP master ET 200M ET 200M ET 200M ET 200M
S5-95U

3 1* À 2 3 4 5 6

0
PD**
ET 200M
ET 200B ET 200B ET 200B ET 200B

11 À 10 9 8 7

* 1 = Default PROFIBUS address for DP master

** Connected to MPI via spur line for commissioning /maintenance only
(with MPI address = 0)
0 ... x PROFIBUS addresses of the nodes
0 ... x MPI addresses of the nodes
À Terminating resistor on

Figure 5-5 Example of a PROFIBUS Subnet

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Example with the CPU 315-2 DP

Figure 5-6 shows an MPI subnet with an integrated CPU 315-2 DP that is also
operating as a DP master in a PROFIBUS subnet.

S7-300 S5-95U
PG*
6
À
0 1À S5-95U
S7-300
5

S5-95U
3 S7-300 with
CPU 315-2 DP
4
S7-300 as DP master ET 200M ET 200M
À
OP 25
RS 485
repeater
4 5 6 1 2 3
S7-300 À
ET 200B ET 200B
OP 25
8 7
8 7
À
ET 200B ET 200B

MPI subnet PROFIBUS subnet 10 9

À
* Connected via spur line for commissioning/maintenance only (with default MPI address)
À Terminating resistor on
0 ... x MPI addresses of the nodes
0 ... x PROFIBUS addresses of the nodes

Figure 5-6 Example of a Configuration with the CPU 315-2 DP in an MPI and PROFIBUS Subnet

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5.1.3 Cable Lengths

Segment in the MPI Subnet

You can implement cable lengths of up to 50 m (164 ft.) in an MPI subnet segment.
The 50 m is measured from the 1st node to the last node of a segment.

Table 5-3 Permissible Cable Lengths in an MPI Subnet Segment

Transmission rate Maximum Cable Length of a Segment (in mm)

CPU 312 IFM to 316-2 DP 318-2
(Non-Isolated (Non-Isolated
MPI Interface) MPI Interface)
19.2 kbps 50 1000
187.5 kbps
1.5 Mbps – 200
3.0 Mbps – 100
6.0 Mbps
12.0 Mbps

Segment in the PROFIBUS Subnet

The cable length in a segment of a PROFIBUS subnet depends on the
transmission rate (see Table 5-4).

Table 5-4 Permissible Cable Lengths in a PROFIBUS subnet Depending on the

Transmission Rate

Transmission rate Maximum Cable Length of a Segment (in mm)

9.6 to 187.5 kbps 1000
500 kbps 400
1.5 Mbps 200
3 to 12 Mbps 100
* With a non-isolated interface

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Longer Cable Lengths

If you want to implement cable lengths above those permitted in a segment, you
must use RS 485 repeaters. The maximum cable length possible between two RS
485 repeaters corresponds to the cable length of a segment (see Table 5-4).
Please note that these maximum cable lengths only apply if no other node is
installed between the two RS 485 repeaters. You can connect up to 9 RS 485
repeaters in series.
When counting the total number of all nodes to be connected, you must observe,
that an RS 485 repeater counts as a node of the MPI subnet, even if it is not
assigned an MPI/PROFIBUS address.
Figure 5-7 shows how you can increase the maximum cable length for an MPI
subnet by means of RS 485 repeaters.

RS 485
repeater

S7-300
50 m 1000 m 50 m

PROFIBUS bus cable

Figure 5-7 Maximum Cable Length Between Two RS 485 Repeaters

Length of the Spur Lines

If you do not attach the bus cable directly to the bus connector (for example when
using a L2 bus terminal), you must take into account the maximum possible length
of the spur line!
The following table lists the maximum permissible lengths of spur lines per
segment:
As of 3 Mbps, use the programming device connecting cable with the order no.
6ES7 901-4BD00-0XA0 to connect the programming device or PC. Other types of
spur lines must not be used.

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Table 5-5 Lengths of Spur Lines per Segment

Transmission Max. Length of Spur Line Number of Nodes with Spur

Rate per Segment
g Line Length of ...
1.5 m or 1.6 m 3m
9.6 to 93.75 kbps 96 m 32 32
187.5 kbps 75 m 32 25
500 kbps 30 m 20 10
1.5 Mbps 10 m 6 3
3 to 12 Mbps – – –

Example
Figure 5-8 shows you a possible configuration of an MPI subnet. This example
illustrates the maximum possible distances in an MPI subnet.

S7-300 S7-300 S7-300 À

PG
OP 25 RS 485
repeater

À 3 4 5 6 7 À

Spur line max.

PG
Á 1000 m

max. 50m

À
S7-300 S7-300
OP 25 OP 25 RS 485
repeater

11 10 9 8 À
À

max. 50m
À Terminating resistor on
Á Programming device connected for maintenance purposes via spur line
0 ... x MPI addresses of the nodes

Figure 5-8 Cable Lengths in an MPI Subnet

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5.2 Network Components

Purpose

Table 5-6 Network Components

Purpose Components Description

... to configure a network PROFIBUS bus cable Section 5.2.1
... to connect a node to the Bus connector Section 5.2.2
network
... to amplify the signal RS 485 repeater Section 5.2.4
... to connect segments and Reference
Manual Module
Specifications
... to convert the signal for a Optical Link Module In the manual
fiber-optic network (for SIMATIC NET
PROFIBUS-DP network only) PROFIBUS
Networks
... to connect Programming device Section 5.1.3
programming devices/OPs to connecting cables (spur line)
the network

In This Section
This section describes the properties of the network components and information
for their installation and handling. You will find the technical specifications of the
RS 485 repeater in the Reference Manual Module Specifications.

Section Contents Page

5.2.1 PROFIBUS Bus Cable 5-16
5.2.2 Bus Connector 5-17
5.2.3 Plugging the Bus Connector into a Module 5-18
5.2.4 RS 485 Repeater 5-19

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5.2.1 PROFIBUS Bus Cable

PROFIBUS Bus Cable

We can provide you with the following PROFIBUS bus cables:

PROFIBUS bus cable 6XV1 830-0AH10

PROFIBUS underground cable 6XV1 830-3AH10
PROFIBUS drum cable 6XV1 830-3BH10
PROFIBUS bus cable with PE sheath (for food and 6XV1 830-0BH10
beverages industry)
PROFIBUS bus cable for festooning 6XV1 830-3CH10

Properties of the PROFIBUS Bus Cable

The PROFIBUS bus cable is a shielded twisted-pair cable with the following
properties:

Table 5-7 Properties of the PROFIBUS Bus Cable

Properties Values
Line impedance Approx. 135 to 160 Ω (f = 3 to 20 MHz)
Loop resistance x 115 Ω/km
Effective capacitance 30 nF/km
Attenuation 0.9 dB/100 m (f = 200 kHz)
Permissible cross-sectional core area 0.3 mm2 to 0.5 mm2
Permissible cable diameter 8 mm " 0.5 mm

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Rules for Laying

When laying the PROFIBUS bus cable, you should take care not to:
S Twist the cable
S Stretch the cable
S Compress the cable
You should also observe the following when laying the indoor bus cable (dA = outer
diameter of the cable):

Table 5-8 Specifications for Installation of Indoor Bus Cable

Properties Specifications
Bending radius (one-off) w 80 mm (10 dA)
Bending radius (multiple times) w 160 mm (20 dA)
Permissible temperature range during installation – 5 _C to + 50 _C
Storage and stationary operating temperature range – 30 _C to + 65 _C

5.2.2 Bus Connectors

Purpose of the Bus Connector

The bus connector is used to connect the PROFIBUS cable to the MPI or
PROFIBUS-DP interface. You thus make the connections to further nodes.
The following bus connectors are available:
S Up to 12 Mbps
– Without programming device socket (6ES7 972-0BA10-0XA0)
– With programming device socket (6ES7 972-0BB10-0XA0)
S Up to 12 Mbps, angular outgoing cable
– Without programming device socket (6ES7 972-0BA40-0XA0)
– With programming device socket (6ES7 972-0BB40-0XA0)

No Application
You do not require the bus connector for:
S DP slaves in degree of protection IP 65 (e.g. ET 200C)
S RS 485 repeaters

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5.2.3 Plugging the Bus Connector into a Module

Connecting the Bus Connector

Proceed as follows to connect the bus connector:
1. Plug the bus connector into the module.
2. Screw the bus connector tight on the module.
3. If the bus connector is installed at the start or end of a segment, you must
switch on the terminating resistor (switch setting “ON”) (see Figure 5-9).

Note
The bus connector 6ES7 972-0BA30-0XA0 does not have a terminating resistor.
You cannot connect it at the beginning or end of a segment.

Please make sure that power is always supplied to the stations where the
terminating resistor is fitted during start-up and normal operation.

Terminating resistor on Terminating resistor on

switched on off
switched off off

Figure 5-9 Bus Connector (6ES7 ... ): Terminating Resistor Switched On and Off

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Disconnecting the Bus Connector

With a looped-through network cable, you can unplug the bus connector from
the PROFIBUS-DP interface at any time, without interrupting data communication
on the network.

Warning
! A data communication error may occur on the network.
A network segment must always be terminated at both ends with the terminating
resistor. This is not the case, for example, if the power supply is not activated on
the last slave with a bus connector. Since the bus connector draws power from the
station, the terminating resistor has no effect.
Please make sure that power is always supplied to stations on which the
terminating resistor is active.

5.2.4 RS 485 Repeater

The Purpose of the RS 485 Repeater

The RS 485 repeater amplifies data signals on bus lines and interconnects network
segments.
You need an RS 485 repeater if:
S more than 32 nodes are connected to the network
S a grounded segment is to be connected to a non-grounded segment, or
S the maximum cable length of a segment is exceeded.

Description of the RS 485 Repeater

You will find a description and the technical specifications of the RS 485 repeater in
Chapter 7 of the Module Specifications Reference Manual.

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Installation
You can mount the RS 485 repeater either on the S7-300 rail or on a 35-mm
standard rail.
To mount it on the S7-300 rail, remove the slide at the rear of the RS 485 repeater
as follows:
1. Insert a screwdriver under the edge of the latching element.
2. Move the screwdriver towards the rear of the module. Keep this position.
3. Move the slide upwards.
Figure 5-10 shows how the slide of the RS 485 repeater is removed.

2
1

Figure 5-10 Removing the Slide on the RS 485 Repeater

After you have removed the slide, you can install the RS 485 repeater on the rail in
the same way as the other S7-300 modules (see Chapter 2).
Use flexible cables with a cross-sectional core area of 0.25 mm2 to 2.5 mm2 (AWG
26 to 14) to connect the 24V DC power supply.

Wiring the Power Supply Module

Proceed as follows to wire the power supply of the RS 485 repeater:
1. Loosen the screws “M” and “PE”.
2. Strip the insulation off the 24V DC power supply cable.
3. Connect the cable to terminals “L+” and “M” or “PE”.

Terminal “M5.2”
Terminal “M5.2” is a terminal that you do not need to wire, as it is only used for
servicing. The terminal “M5.2” supplies the reference potential. You need this
reference potential to measure the voltage characteristic between terminals “A1”
and “B1”.

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Connecting the PROFIBUS Bus Cable

You must connect the PROFIBUS bus cable to the RS 485 repeater as follows:
1. Cut the PROFIBUS bus cable to the length you require.
2. Strip the insulation off the PROFIBUS bus cable as shown in Figure 5-11.
The shield braiding must be turned up onto the cable. Only thus, the shielding
point can later act as a strain relief and a shield support element.

6XV1 830-0AH10 6XV1 830-3AH10

6XV1 830-3BH10

8,5 16 10 16 16 10
6 8,5 6

Shield braiding must be turned up!

Figure 5-11 Lengths of the Stripped Insulation for Connection to the RS 485 Repeater

3. Connect the PROFIBUS bus cable to the RS 485 repeater:

Connect similar cores (green/red for PROFIBUS bus cable) to similar terminals
A or B (for example, always connect a green wire to terminal A and a red wire
to terminal B).
4. Tighten the pressure saddles, so that the shielding is bare under the pressure
saddle.

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Software Prerequisites
You must be familiar with STEP 7 as of V 5.x to be able to use the complete range
of functions of the CPUs listed in the chapter entitled Important Information.
If you have installed STEP 7 < V 5.x and you want to configure your system with
these CPUs, you have the following alternatives:
S If you don’t upgrade STEP 7 < V 5.x, you can use the relevant CPUs with low
order numbers from the STEP 7 hardware catalogue.
Note that you can only use the functions of the previous CPU and of STEP 7 for
the new CPU.
Important: The CPUs 316-2 DP and 318-2 are not in the STEP 7 < V 5.x
hardware catalogue.
S Upgrade STEP 7. Get information on update options from the Internet at our
Customer Support site or ask your Siemens customer advisor.
S Install the new version of STEP 7.

Prerequisites for Commissioning

Prerequisite See...
The S7-300 must be installed Chapter 2
The S7-300 must be wired Chapter 4
In the case of a networked S7-300: Chapter 5
S MPI/PROFIBUS addresses must be set
S Terminating resistors must be switched on (at the segment
borders)

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In This Chapter

Section Contents Page

6.1 Inserting the Memory Card (Not CPU 312 IFM/314 IFM) 6-3
6.2 Inserting the Backup Battery or Accumulator (Not CPU 312 IFM) 6-4
6.3 Connecting the Programming Device 6-5
6.4 Switching On a S7-300 for the First Time 6-10
6.5 Resetting the CPU Memory 6-11
6.6 Commissioning PROFIBUS-DP 6-16

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6.1 Inserting and Changing the Memory Card

(Not CPU 312 IFM/314 IFM)

Exception
You cannot insert a memory card with the CPU 312 IFM and 314 IFM.

Inserting/Changing a Memory Card

1. Set the CPU to STOP mode.

Note
If you insert the memory card in a CPU mode other than STOP, the CPU will go
into STOP mode and the STOP LED will flash at 1 second intervals to request a
reset (see Section 6.5).

2. Is a memory card already inserted? If so: remove it.

3. Insert the new memory card in the CPU module shaft. Please note that the
insertion marking on the memory card points to the marking on the CPU (see
Figure 6-1).
4. Reset the CPU (see Section 6.5).

Insertion
marking

Figure 6-1 Inserting the Memory Card in the CPU

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6.2 Inserting the Backup Battery/Accumulator (Not

CPU 312 IFM)

Exceptions
A CPU 312 IFMdoesn’t have a backup battery or accumulator.
Since the CPU 313 doesn’t have a real-time clock, you don’t need an accumulator
for backup purposes (see Section 8.1.3).

Inserting the Backup Battery/Accumulator

You insert a backup battery or the accumulator in the CPU as follows:

Note
Only insert the backup battery in the CPU at power on.
If you insert the backup battery before power on, the CPU requests a reset.

1. Open the front door of the CPU.

2. Plug the battery or accumulator connector into the corresponding socket in the
battery compartment of the CPU. The notch on the connector must point to the
left.
3. Place the backup battery/accumulator into the battery compartment on the
CPU.
4. Close the front door of the CPU.

Figure 6-2 Inserting a Backup Battery in the CPUs 313/314

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6.3 Connecting a Programming Device

Prerequisites
The programming device must be equipped with an integrated MPI interface or an
MPI card in order to connect it to an MPI.

Cable length
For information on possible cable lengths, refer to Section 5.1.3.

6.3.1 Connecting a Programming Device to an S7-300

You can connect the programming device to the MPI of the CPU via a preprepared
programming device cable.
Alternatively, you can prepare the connecting cable yourself using the PROFIBUS
bus cable and bus connectors (see Section 5.2.2).

S7-300

Programming
device cable

PG

Figure 6-3 Connecting a Programming Device to an S7-300

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6.3.2 Connecting the Programming Device to Several Nodes

Two Configuration Options

When connecting a programming device to several nodes, you must differentiate
between two types of configuration:
S Programming device permanently installed in the MPI subnet
S Programming device connected for startup or maintenance purposes.
Depending on which of these configurations you choose, connect the programming
device to the other nodes as follows (see also Section 5.1.2).

Type of Configuration Connection

Programming device permanently Integrated directly in the MPI subnet
installed in the MPI subnet
Programming device installed for Programming device connected to a
commissioning or maintenance node via a spur line

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Permanently Installed Programming Device

You connect the programming device that is permanently installed in the MPI
subnet directly to the other nodes in the MPI subnet via bus connectors in
accordance with the rules described in Section 5.1.2).
Figure 6-4 shows two networked S7-300s. The two S7-300s are interconnected via
bus connectors.

PG
S7-300

PROFIBUS bus cable

S7-300

PROFIBUS bus cable

Figure 6-4 Connecting a Programming Device to Several S7-300s

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Connecting the Programming Device for Service Purposes: Recommendation

for MPI Addresses
If there is no stationary programming device, we recommend the following:
In order to connect a programming device for service purposes to an MPI subnet
with “unknown” nodes addresses, we recommend to set the following address on
the service programming device:
S MPI address: 0
S Highest MPI address: 126.
Afterwards, use STEP 7 to determine the highest MPI address in the MPI subnet
and adjust the highest MPI address in the programming device to that of the MPI
subnet.

Programming Device During Commissioning or Maintenance

For commissioning or maintenance purposes, you connect the programming
device via a spur line to a node of the MPI subnet. The bus connector of this node
must therefore be provided with a programming device socket (see also
Section 5.2.2).
Figure 6-5 shows two S7-300s to which a programming device is connected.

S7-300
PG
Programming device
cable = Spur line

S7-300

PROFIBUS bus cable

Figure 6-5 Connecting a Programming Device to a Subnet

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6.3.3 Connecting a Programming Device to Ungrounded Nodes of an

MPI Subnet

Connecting a Programming Device to Ungrounded Nodes

If you have an ungrounded configuration of nodes in an MPI subnet or an
ungrounded S7-300 (see Section 4.1.4), you may only connect an ungrounded
programming device to the MPI subnet or the S7-300.

Connecting a Grounded Programming Device to the MPI

You want to operate the nodes in an ungrounded configuration (see Section 4.1.4).
If the MPI at the programming device is grounded, you must connect an RS 485
repeater between the nodes and the programming device. You must connect the
ungrounded nodes to bus segment 2, if you connect the programming device to
bus segment 1 (terminals A1 B1) or the PG/OP interface (see Chapter 7 in the
Module Specifications, Reference Manual).
Figure 6-6 shows the RS 485 repeater as an interface between a grounded and an
ungrounded node in the MPI subnet.

Bus segment 1
Grounded signals

PG
S7-300

Bus segment 2
Ungrounded signals

Figure 6-6 Programming Device Connected to an Ungrounded S7-300

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6.4 Switching On a S7-300 for the First Time

Prerequisites
The S7-300 is installed and wired.
The mode selector should be in STOP mode.

Switching On for the First Time.

Switch the PS 307 power supply module on.
Result:
S The 24V DC LED on the power supply module comes on.
S On the CPU
– The 5V DC LED comes on.
– The STOP LED flashes at one second intervals while the CPU carries out an
automatic reset.
– The STOP LED comes on after the memory reset.
If there is no backup battery in the CPU, the BATF LED comes on.

Note
If you insert a memory card and a backup battery before power on, the CPU also
requests a memory reset after start-up.

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6.5 Resetting the CPU

When Do You Reset the CPU Memory?

You must reset the CPU memory:
S Before you transfer a new (complete) user program to the CPU
S If the CPU requests a MRES with its STOP LED flashing at 1-second intervals
Possible reasons for this request are listed in Table 6-1.

Table 6-1 Possible Reasons for MRES Request by CPU

Reasons for MRES Request by CPU Remarks

Wrong memory card has been plugged not with CPU 312 IFM/314 IFM
in.
RAM error in CPU –
Working memory too small, that is not CPU with 5V-FEPROM memory card
all blocks of the user program on a inserted:
memory card could be loaded. In these circumstances the CPU
requests a one-off memory reset. After
that, the CPU ignores the contents of
Attempt to load blocks with errors, for the memory card, enters the error
example if a wrong command has been reasons in the diagnostics buffer and
programmed. goes to STOP. You can erase the
contents of the 5V-FEPROM memory
card in the CPU or enter new program.

How to Reset the Memory

There are two ways of resetting the CPU memory:

Memory Reset with the Mode Memory Reset with Programming

Selector Device
... is described in this section. ... is only possible in STOP mode of
the CPU (see STEP 7-Online help).

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Cold start in the CPU 318-2

In the CPU 318-2 you can also carry out a cold start instead of resetting the
memory.
Cold start means:
S The data blocks in the working memory created by SFC 22 are deleted. The
remaining data blocks have the preassigned value from the load memory.
S The process image as well as all times, counters and memory markers are
reset – irrespective of whether they were parameterized as retentive.
S The OB 102 is processed.
S Before the first command in OB 1, the process image of the inputs is read.

Resetting the CPU Memory or Carrying Out a Cold Start (CPU 318-2 only) with
the Mode Selector

Step Resetting the CPU Memory Carrying Out a Cold Start

(Figure 6-7) (Figure 6-8)
CPU 318-2 Only
1 Turn the key to the STOP position
2 Turn the key to the MRES position Hold the key in this position until the STOP
LED comes on for the second time and remains on (this takes 3 seconds).
3 Within 3 seconds you must turn the Within 3 seconds you must turn the
switch back to the MRES position and switch to the RUN position.
keep holding it until the STOP LED During start-up the RUN LED flashes at
flashes (at 2 Hz). When the CPU has 2 Hz.
completed the reset, the STOP LED
stops flashing and remains lit.
The CPU has reset the memory.

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 Commissioning

Memory Reset

STOP
LED

On

Off t
3s
max. 3 s
min. 3 s

 

Figure 6-7 Switching Sequence for the Mode Selector for Resetting the CPU

Is the STOP LED Not Flashing During Memory Reset?

If the STOP LED doesn’t flash during memory reset or other LEDs come on (with
the exception of the BATF LED), you must repeat steps 2 and 3. If the CPU does
not perform the reset this time, evaluate the diagnostic buffer of the CPU.

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Commissioning

Cold Start

RUN
LED

On

Off
STOP
LED

On

t
Off 3s
max. 3 s
3s

 

Figure 6-8 Switching Sequence for the Mode Selector for Cold Start (CPU 318-2 Only)

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 Commissioning

What Happens in the CPU During Memory Reset?

Table 6-2 Internal CPU Events on Memory Reset

Event CPU 313/314/315/315-2 DP/ CPU 312 IFM/314 IFM

316-2 DP/318-2
CPU activities 1. The CPU deletes the entire user program in its RAM and in the load memory
(not the EPROM load memory).
2. The CPU deletes the backup memory.
3. The CPU tests its own hardware.
4. If you have inserted a memory card, The CPU copies the relevant contents of
the CPU copies the relevant the EPROM memory into the working
contents of the memory card into memory
the working memory.
Tip: If the CPU cannot copy the
contents of the memory card and
requests memory reset:
– Remove the memory card.
– Reset the CPU memory.
– Read the diagnostic buffer.
Memory contents The CPU memory is initialized to “0”. If The user program is loaded back into
after reset there is a memory card plugged in, the the RAM from the integrated retentive
user program is loaded back into the EPROM of the CPU.
RAM.
What’s left? The contents of the diagnostics buffer.
You can read the diagnostic buffer with the programming device (see the STEP 7
online help system).
The parameters of the MPI (MPI address and highest MPI address, transmission
rate, configured MPI addresses of CPs/FMs in an S7-300).
The contents of the operating hours counter (not for CPU 312 IFM).

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Commissioning

Note: MPI Parameters

The following applies for the validity of the MPI parameters at memory reset:

Memory Reset ... MPI Parameters ...

With memory card inserted ... located on the memory card or on the
(CPU 313/314/315/31x-2 DP) EPROM of the CPU are valid.
In the case of an integral EPROM
(CPU 312 IFM/314 IFM)
Without memory card inserted ... are retained and are valid.
(CPU 313/314/315/31x-2 DP)

6.6 Commissioning the PROFIBUS-DP

In This Section
This section provides you with vital information on commissioning a PROFIBUS
subnet with a CPU 31x-2 DP.

Section Contents Page

6.6.1 Commissioning the CPU 31x-2 DP as a DP Master 6-17
6.6.2 Commissioning the CPU 31x-2 DP as a DP Slave 6-18

Software Prerequisites

CPU 315-2 DP As of STEP 7 V 3.1

As of COM PROFIBUS V 3.0
CPU 316-2 DP: As of STEP 7 V 5.x
CPU 318-2 As of COM PROFIBUS V 5.0

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 Commissioning

6.6.1 Commissioning the CPU 31x-2 DP as a DP Master

Prerequisites for Commissioning

S The PROFIBUS subnet must be configured.
S The DP slaves must be prepared for operation (see relevant DP slave manual).

Commissioning
To commission the CPU 31x-2 DP as a DP master in a PROFIBUS subnet,
proceed as follows:
1. Load the PROFIBUS subnet configuration (preset configuration) created using
STEP 7 with the programming device in the CPU 31x-2 DP.
2. Switch on all of the DP slaves.
3. Switch the CPU 31x-2 DP from STOP mode to RUN mode.

Start-Up of the CPU 31x-2 DP as a DP Master

When the CPU 31x-2 DP is powered up, it checks the preset configuration of your
DP master system against the actual configuration.
Tip: You can set a check time for the test in STEP 7.
If the preset configuration matches the actual configuration, the CPU switches to
RUN.
If the preset configuration does not match the actual configuration, the response of
the CPU depends on the setting of the parameter “Startup if preset configuration
not equal to actual configuration”:

Startup If Preset Startup If Preset Configuration Not Equal to Actual

Configuration Not Equal Configuration = No
to Actual
Configuration = Yes
(Default Setting)
The CPU 31x-2 DP The CPU 31x-2 DP remains in STOP mode and the BUSF
switches to RUN mode LED flashes after the time set parameter transfer to modules
(BUSF LED flashes if any of has elapsed.
the DP slaves cannot be The flashing BUSF LED indicates that at least one DP slave
addressed) is not addressable. In this case, you should check that all
DP slaves are switched on, or you should read out the
diagnostic buffer (see STEP 7 User Manual).

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Recognizing the Operational States of the DP Slave

In Chapter 9 you will find the dependencies of the operating modes of the CPU
31x-2 DP as a DP master and of a DP slave.
Tip: When starting up the CPU as a DP master, always program OBs 82 and 86.
This allows you to identify and evaluate faults and interruptions in data transfer (for
CPUs configured as DP slaves see also Table 9-3 on page 9-9).

6.6.2 Commissioning the CPU 31x-2 DP as a DP Slave

Prerequisites for Commissioning

S The CPU 31x-2 DP must be parameterized and configured as a DP slave (see
Chapter 9).
When configuring it as a DP slave, you must already have decided on the
following:
– Should functions such as programming and status/control be available via
the DP interface?
– Is the DP master an S7 DP master or another DP master?
S All other DP slaves are parameterized and configured.
S The DP master is parameterized and configured.
Note that the CPU 31x-2 DP as DP slave provides address areas of an
immediate memory for data interchange with the DP master. You use STEP 7
to configure these address areas when configuring the CPU as a DP slave (see
Chapter 9).

Commissioning
To commission the CPU 31x-2 DP as a DP slave in the PROFIBUS subnet,
proceed as follows:
1. Switch the CPU 31x-2 DP from STOP mode to RUN.
2. Switch on all of the DP slaves.
3. Switch on the DP master.

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The CPU 31x-2 DP as a DP Slave at Start-Up

When the CPU 31x-2 DP is switched to RUN, two operating mode transitions take
place independently of each other:

The CPU switches from STOP mode to At the PROFIBUS-DP interface the
RUN. CPU starts data transfer with the DP
master.

Recognizing the Operational Modes of the DP Master

In Chapter 9 you will find the dependencies of the operating modes of the CPU
31x-2 DP as a DP slave or as a DP master.
Tip: When commissioning the CPU as a DP slave, always program OBs 82
and 86. This allows you to identify and evaluate operating modes and interruptions
in data transfer (see Table 9-8 on page 9-20).

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Maintenance 7
Maintenance = Replacement
The S7-300 is a maintenance-free programmable controller.
Maintenance involves replacing the following parts:
S Backup battery/accumulator
S Modules
S Fuses on the digital output modules

In This Section

Section Contents Page

7.1 Changing the Backup Battery/Accumulator (Not CPU 312 IFM) 7-2
7.2 Replacing Modules 7-5
7.3 Replacing Fuses on 120/230V AC Digital Output Modules 7-9

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Maintenance

7.1 Changing the Backup/Accumulator (Not CPU 312 IFM)

Replacing the Backup Battery/Accumulator

You should only change the backup battery or accumulator when the power is on,
in order to prevent the loss of data from the internal user memory, and to keep the
clock of the CPU running.

Note
The data in the internal user memory are lost if you change the backup battery
when the power is off.
Change the backup battery with the power switch in the ON position only!

To change the backup battery/accumulator proceed as follows:

Step CPU 313/314 CPU 314 IFM/315/315-2 DP/

316-2 DP/318-2
1. Open the front door of the CPU.
2. Pull the backup battery/accumulator Pull the backup battery or accumulator
out of the compartment with a out of the compartment by the cable
screwdriver.
3. Plug the connector of the new backup battery/accumulator into the
corresponding socket in the battery compartment of the CPU. The notch on the
battery connector must point to the left!
4. Place the backup battery/accumulator into the battery compartment on the CPU.
5. Close the front door of the CPU

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 Maintenance

Figure 7-1 Changing the Backup Battery in the CPU 313/314

How Often Is Replacement Necessary?

Backup battery: We recommend changing the backup battery every year.
Accumulator: The accumulator never needs changing.

Disposal
Backup batteries must be disposed of in keeping with the relevant national
environment protection regulations/guidelines.

Storing Backup Batteries

Store backup batteries in a dry and cool place.
Backup batteries can be stored for five years.

Warning
! If backup batteries are not treated properly, they can ignite, explode and cause
severe burning.
Store backup batteries in a dry and cool place.

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Maintenance

Rules for the Handling of Backup Batteries

To reduce the risk of danger when handling backup batteries, you must observe
the following rules:

Warning
! Improper handling of backup batteries can cause injuries and property damage.
Backup batteries that are not handled properly can explode and cause severe
burns.
Do not
S recharge
S overheat
S burn
S puncture
S crush
S short-circuit backup batteries!

Rules for Handling the Accumulator

You must not charge the accumulator when not inserted in the CPU! The
accumulator can only be charged by the CPU when the power is on.

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 Maintenance

7.2 Replacing Modules

Rules for Installation and Wiring

The following table tells you what you have to do when wiring, detaching and
installing the S7-300 modules.

Rules Governing ... Power ... CPU ... SM/FM/CP

Supply
Blade width of screwdriver 3.5 mm (cylindrical model)
Tightening torque
Attaching modules to the rail 0.8 to 0.8 to
to 1.1 Nm to 1.1 Nm
Terminating cables 0.5 to –
0.8 Nm
POWER OFF when replacing the ... Yes No
Operating mode of S7-300 when repla- – STOP
cing the ...
Load voltage OFF when replacing the Yes Yes
...

Initial Situation
The module you want to replace is installed and wired. You want to install a new
module of the same type.

Warning
! If you remove or plug in the S7-300 modules during data transmission via the MPI,
the data might be corrupted by disturbing pulses.
You must not plug in or remove any S7-300 modules during data transmission via
the MPI!
If you are not sure whether any communications activities are taking place, pull the
connector out of the MPI port.

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Maintenance

Removing a Module (SM/FM/CP)

Detach the module from the rail as follows:

Step 20-pin Front Connector 40-pin Front Connector

1. Set the CPU to the STOP mode with the key-operated switch.
2. Switch off the load voltage to the module.
3. Take out the labeling strip.
4. Open the front door.
5. Unlock the front connector and pull it off the module.
To do this, press down on the Remove the fixing screw from the
locking button (5) and, with the middle of the front connector. Pull
other hand, grip the front the front connector out while
connector (5a) and pull it out. holding the grips.
6. Undo the module fixing screw(s).
7. Swing the module up and off the rail.

3
5

5a
6

Figure 7-2 Unlocking the Front Connector and Detaching the Module from the Rail

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 Maintenance

Removing the Front Connector Coding Key from the Module

Prior to installing the new module, you must remove the front connector coding key
from the new module.
Reason: This part is already in the front connector (see Figure 7-3).

Figure 7-3 Removing the Front Connector Coding Key

Installing a New Module

Install the new module as follows:
1. Hook the new module of the same type onto the rail and swing it down into
place.
2. Bolt the module tight.
3. Slip the labeling strip of the old module into its guide on the new module.

3
1

0.8 to 1.1 Nm
2

Figure 7-4 Installing a New Module

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Maintenance

Removing the Front Connector Coding Key from the Front Connector
If you want to wire a used front connector for another module, just remove the front
connector coding key from the front connector by pressing it out of the front
connector with a screwdriver. This upper part of the coding key must then be
plugged back into the old module.

Putting a New Module into Service

Proceed as follows to put the new module into service:
1. Open the front door.
2. Bring the front connector back into its operating position (see Section 4.3.3)

Figure 7-5 Plugging In the Front Connector

3. Close the front door.

4. Switch the load voltage back on.
5. Set the CPU again to RUN.

Performance of the S7-300 After Module Replacement

When you have replaced a module and no errors have occurred, the CPU enters
the RUN mode. If the CPU stays in the STOP mode, you can have the cause of
the error displayed with STEP 7 (see STEP 7 User Manual).

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 Maintenance

7.3 Replacing Fuses on 120/230V AC Digital Output Modules

Fuses for Digital Outputs

Fuses are used for the individual channel groups of the digital outputs of the
following digital output modules, to protect these against short circuit:
S SM 322 DO 16 AC120V digital output module
S SM 322 DO 8 AC120/230V digital output module

Replacement Fuses
If you have to change fuses, you can use, for example, the following replacement
fuses:
S 8 A, 250 V fuse
– Wickmann 19 194-8 A
– Schurter SP001.013
– Littlefuse 217.008
S Fuse holder
– Wickmann 19 653

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Maintenance

Position of the Fuses

The digital output modules have 1 fuse per channel group. The fuses are located
at the left side of the digital output module. Figure 7-6 shows you where to find the
fuses on the digital output modules.

Fuses

Figure 7-6 Location of the Fuses on Digital Output Modules

Changing Fuses
The fuses are located at the left side of the module. To change the fuses, proceed
as follows:
1. Switch the CPU to STOP using the key switch.
2. Switch off the load voltage of the digital output module.
3. Remove the front connector from the digital output module.
4. Loosen the fixing screw of the digital output module.
5. Swing out the digital output module.
6. Remove the fuse holder from the digital output module.
7. Replace the fuse.
8. Screw the fuse holder back into the digital output module.
9. Install the digital output module (see Section 2.2.2).

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CPUs 8
In This Section

Section Contents Page

8.1 Control and Display Elements 8-2
8.2 CPU Communication Options 8-11
8.3 Test Functions and Diagnostics 8-13
8.4 CPUs – Technical Specifications 8-17

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CPUs

8.1 Control and Display Elements

Figure 8-1 shows you the control and display elements of a CPU.
The order of the elements in some CPUs might differ from the order shown in the
figure below. The individual CPUs do not always have all the elements shown here.
Table 8-1 shows you the differences.

Status and
fault LEDs
(see Section 8.1.1)

Status and
fault LEDs for DP
interface Slot for memory
(Section 8.1.1) card
(Section 8.1.4)
Mode selector
(Section 8.1.2)

Compartment for backup Multipoint interface

battery or accumulator (MPI)
(Section 8.1.3) (Section 8.1.5)

Terminals for power supply and

functional ground M
(Section 4.1.3 and 4.1.4), for L+ PROFIBUS-DP
the CPU 312 IFM M interface
Section 8.4.1) (Section 8.1.5)

Figure 8-1 Control and Display Elements of the CPUs

Differences Between CPUs

Table 8-1 The Differences in Control and Display Elements Between CPUs

Element 312 313 314 314 315 315-2 DP 316-2 DP 318-2

IFM IFM
LEDs for DP No Yes
interface
Backup battery/ No No ac- Yes
accumulator cumu-
lator
Terminal No; via Yes
connection for front
power supply con-
nector
Memory card No Yes No Yes
PROFIBUS-DP No Yes
interface

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 CPUs

8.1.1 Status and Fault Displays

Displays for the CPU:

SF ... (red) ... hardware or software faults (see Section 8.3.2)

BATF ... (red) ... battery fault (see Section 8.3.2) (not CPU 312 IFM)
DC5V ... (green) ... 5V DC supply for CPU and S7-300 bus is ok.
FRCE ... (yellow) ... force request is active (see Section 8.3.1)
RUN ... (green) ... CPU in RUN mode; LED flashes at start-up w. 1 Hz; in HALT mode w. 0.5 Hz
STOP mode ... (yellow) ... CPU in STOP or HALT or start-up; LED flashes at
memory reset request (see Section 6.5)

Displays for PROFIBUS: (see Chapter 9)

CPU 315-2 DP/ BUSF ... (red) ... hardware or software fault at PROFIBUS interface
CPU 316-2 DP

CPU 318-2 BUS1F ... (red) ... hardware or software fault at interface 1
BUS2F ... (red) ... hardware or software fault at interface 2

Figure 8-2 Status and Fault Displays of the CPUs

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CPUs

8.1.2 Mode Selector

The mode selector is the same in all CPUs.

Mode Selector Positions

The positions of the mode selector are explained in the order in which they appear
on the CPU.
You will find detailed information on the modes of the CPU in the STEP 7 online
help system.

Position Description Description

RUN-P RUN The CPU scans the user program.
PROGRAM The key cannot be taken out in this position.
mode
RUN mode RUN mode The CPU scans the user program.
The user program cannot be changed without password
confirmation.
The key can be removed in this position to prevent anyone changing
the operating mode.
STOP mode STOP mode The CPU does not scan user programs.
The key can be removed in this position to prevent anyone changing
the operating mode.
MRES mode Memory reset Momentary-contact position of the mode selector for CPU memory
reset (or a cold start as well in the case of the 318-2).
Resetting the memory using the mode selector requires a special
sequence of operations (see Section 6.5)

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 CPUs

8.1.3 Backup Battery/Accumulator

Exceptions
CPU 312 IFM has no backup battery or accumulator.
The CPU 313 does not require an accumulator since the accumulator does not
back up the software clock.

Backup Battery or Accumulator?

Table 8-2 shows the differences in the backup provided by an accumulator and a
backup battery.

Table 8-2 Using a Backup Battery or Accumulator

Backup ... Backs up Remarks Backup

with... Time
Accumula- Real-time clock only The accumulator is recharged when 120 hours
tor the power of the CPU is on. (at 25_C)
Note: 60 hours
The user program must be stored (at 60_C)
on the memory card or in the ... after
CPU 314 IFM in read-only memory. 1 hour
recharging
Backup S User program (if not Note: 1 year
battery stored on memory card The CPU can retain some of the
and protected against loss data without a battery. You only
on power failure) need a backup battery if you want to
S More data areas in data retain more data than this.
blocks are to be retained
than possible without
battery
S The real-time clock

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CPUs

8.1.4 Memory Card

Exceptions
You cannot insert a memory card with the CPU 312 IFM and 314 IFM. These
CPUs have an integrated read-only memory.

Purpose of the Memory Card

With the memory card, you can expand the load memory of your CPU.
You can store the user program and the parameters that set the responses of the
CPU and modules on the memory card. You can also save the firmware of your
CPU on the memory card (not CPU 318-2).
If you store the user program on the memory card, it will remain in the CPU when
the power is off even without a backup battery.

Available Memory Cards

The following memory cards are available:

Table 8-3 Memory Cards

Capacity Type Remarks

16 KB
32 KB The CPU supports the following functions:

64 KB
S Loading
L di off th
the user program on th
the
module into the CPU
256 KB In this function, the memory of the CPU
128 KB 5 V FEPROM is reset, the user program is loaded on
to the memory card,
card and then from the
512 KB memory card to the CPUCPU’s
s working
1 MB memory.
S Copying
Cop ing of RAM to ROM (not with
ith the
2 MB
CPU 318-2)
4 MB
128 KB
256 KB
5 V RAM O l with
Only ith th
the CPU 318
318-2
2
512 KB
1 MB
2 MB

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 CPUs

8.1.5 MPI and PROFIBUS-DP Interface

Table 8-4 CPU Interfaces

CPU 312 IFM CPU 315-2 DP CPU 318-2

CPU 313 CPU 316-2 DP
CPU 314 IFM
CPU 314
MPI interface MPI interface PROFIBUS-DP MPI/DP Interface PROFIBUS-DP
interface interface

MPI
MPI DP MPI/DP DP

– – – Reconfiguration as –
a PROFIBUS-DP
interface is
possible

MPI Interface
The MPI is the interface of the CPU for the programming device/OP and for
communication in an MPI subnet.
The typical (preset) transmission rate is 187.5 kbps (CPU 318-2: can be set up to
12 Mbps)
You must set 19.2 kbps to communicate with a S7-200.

PROFIBUS-DP Interface
CPUs with 2 interfaces offer you the PROFIBUS-DP interface, which allows them
to be connected to a PROFIBUS-DP bus system. Transmission rates up to
12 Mbps are possible.

Connectable Devices

MPI PROFIBUS-DP
S Programming device/PC and OP S PG/PC and OP
S S7 programmable controller with MPI interface S S7 programmable controllers with the
(S7-300, M7-300, S7-400, M7-400, C7-6xx) PROFIBUS-DP interface (S7-200, S7-300,
S S7-200 (Note: only 19.2 kbps) M7-300, S7-400, M7-400, C7-6xx)
S Other DP masters and DP slaves

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CPUs

Only 19.2 Kbps for S7-200 in MPI Subnet

Note
At 19.2 kbps for communication with an S7-200, the following applies:
– A maximum of 8 nodes (CPU, PG/OP, FM/CP with own MPI address) are
allowed in one subnet.
– You cannot carry out any global data communication.

Please consult the S7-200 Manual for further information!

Removing and Inserting Modules in the MPI Subnet

You must not plug in or remove any modules (SM, FM, CP) of an S7-300
configuration while data are being transmitted over the MPI.

Warning
! If you remove or plug in S7-300 modules (SM, FM, CP) during data transmission
via the MPI, the data might be corrupted by disturbing pulses.
You must not plug in or remove modules (SM, FM, CP) of an S7-300 configuration
during data transmission via the MPI!

Loss of GD packets Following Change in the MPI Subnet During Operation

Warning
! Loss of data packets in the MPI subnet:
Connecting an additional CPU to the MPI subnet during operation can lead to loss
of GD packets and to an increase in cycle time.
Remedy:
1. Disconnect the node to be connected from the supply.
2. Connect the node to the MPI subnet.
3. Switch the node on.

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 CPUs

8.1.6 Clock and Runtime Meter

Table 8-5 shows the characteristics and functions of the clock for the various
CPUs.
When you parameterize the CPU in STEP 7, you can also set functions such as
synchronization and the correction factor(see the STEP 7 online help system).

Table 8-5 Characteristics of the Clock of the CPUs

Characteristics 312 IFM 313 314 314 IFM 315 315-2 DP 316-2 DP 318-2
Type Software clock Hardware clock (integrated “real-time clock”)
Manufacturer DT#1994-01-01-00:00:00
setting
Backup Not possible S Backup battery
S Accumulator
Operating hours – 1 8
counter
Number 0 0 to 7
Value range 0 to 32767 hours 0 to 32767
hours
Accuracy ... max deviation per day:
S With power "9s
supply switched
on
0 to 60_ C
S With power
supply switched
off
0_ C +2s to –5s
25_ C "2s
40_ C +2s to –3s
60_ C +2s to –7s

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CPUs

With the Power Off

The following table shows the clock behavior with the power of the CPU off,
depending on the backup:

Backup Clock Behavior

With backup The clock continues to operate in POWER OFF (except the software
battery clock).
With accumulator The clock of the CPU continues to operate when the power is off for
the backup time of the accumulator (except the software clock).
When the power is on, the accumulator is recharged.
In the event of backup failure, an error message is not generated.
When the power comes on again, the clock continues at the clock
time at which the power went off.
None At POWER ON, the clock continues to operate using the clock time at
which POWER OFF took place. Since the CPU is not backed up, the
clock does not continue at POWER OFF.

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 CPUs

8.2 Communication Options of the CPU

The CPUs offer you the following communication options:

Table 8-6 CPU Communication Options

Communications MPI DP Description

PG/OP-CPU x x A CPU can maintain several on-line connections
simultaneously to one or more programming devices or
operator panels. One connection is reserved for a
programming device and one for an operator panel.
Communication SFCs for These functions can be used to transfer data over the MPI
non-configured S7 subnet or within an S7-300.
connections (You will find a list of the SFCs in Appendix C.1)
S Via an MPI subnet x –
S Within an S7-300 x x
Communication SFCs for x x With these S7 connections, the S7-300-CPUs are servers
configured S7 connections for S7-400 CPUs. That means the S7-400 CPUs can write
data to or read data from the S7-300 CPUs.
Global data communication x – The CPUs of the S7-300 can exchange global data.

Detailed Information
You can find out more about communication in the STEP 7 online help system and
in the Communication with SIMATIC Manual.

Routing with 31x-2 CPUs

With the 31x-2 CPUs and STEP7 as of V 5.x you can reach S7 stations online
beyond subnet borders with the programming device/PC and, for example, load
user programs or a hardware configuration or execute testing and startup
functions. To route via the DP interface, you must enable the “Programming,
modifying and monitoring via the PROFIBUS” function when configuring and
parameterizing the CPU.
The CPUs 315-2 DP and 316-2 DP provide you with additional connections for
routing. In other words, routing does not occupy any other CPU connections. With
the CPU 318-2 you must also consider the routing connections for the
corresponding interface connections.
You can find a detailed description of routing in the STEP 7 online help system.

Global Data Communication with S7-300 CPUs

Below you will find important features of global data communication in the S7-300.

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CPUs

Send and Receive Conditions

For the communication via GD circuits, you should observe the following
conditions:
S The following must apply for a GB packet sender:
Scan ratesender cycle timesender w 60 ms (CPU 318-2: w 10 ms)
S The following must apply for a GD packet receiver:
Scan ratereceiver cycle timereceiver t scan ratesender cycle timesender
Non-observance of these conditions can lead to the loss of a GD packet. The
reasons for this are:
S The performance capability of the smallest CPU in the GD circuit
S Sending and receiving of global data is carried out asynchronously by the
sender and receiver.
Loss of global data is displayed in the status field of a GD circuit if you have
configured this with STEP 7.

Note
Please note the following in relation to global data communication: global data sent
will not be acknowledged by the receiver!
The sender therefore receives no information on whether a receiver and which
receiver has received the sent global data.

Send Cycles for Global Data

If you set “Send after every CPU cycle” in STEP 7 (as of version 3.0) and the CPU
has a short CPU cycle (< 60 ms), the operating system might overwrite an unsent
CPU GD packet. Tip: The loss of global data is displayed in the status field of a
GD circuit if you have configure this using STEP 7.

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 CPUs

8.3 Testing Functions and Diagnostics

The CPUs provide you with:
S Testing functions for commissioning
S Diagnostics via LEDs and via STEP 7

8.3.1 Testing Functions

The CPUs offer you the following testing functions:

S Monitor Variables
S Modify Variables
S Forcen (note the differences between CPUs)
S Monitor block
S Set Breakpoint
You can find a detailed description of the testing functions in the STEP 7 online
help system.

Important with “Monitor Block”

The STEP 7 function “Monitor Block” increases the cycle time of the CPU.
In STEP 7 you can set a maximum permissible increase in cycle time (not in the
case of the CPU 318-2). To do this, you must set “Process Mode” when setting the
CPU parameters in STEP 7.

Different Features of Forcing S7-300

Please note the different features of forcing in the different CPUs:

CPU 318-2 CPU 312 IFM to 316-2 DP

The variables of a user program with The variables of a user program with
fixed preset values (force values) fixed preset values (force values) can
cannot be changed or overwritten by be changed or overwritten in the user
the user program. program.
(See Figure 8-3 on page 8-14)
The following can be variables: The following can be variables:
Inputs/outputs Inputs/Outputs
Peripheral I/Os You can force up to 10 variables.
Memory markers
You can force up to 256 variables.

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CPUs

Forcing with the CPU 312 IFM to 316-2 DP:

Caution
! The forced values in the process-image input table can be overwritten by write
commands (for example T IB x, = I x.y, copy with SFC, etc.) as well as by
peripheral read commands (for example L PIW x) in the user program or by
PG/OP write functions!
Outputs initialized with forced values only return the forced value if the user
program does not execute any write accesses to the outputs using peripheral write
commands (e.g. T PQB x) and if no PG/OP functions write to these outputs!
Note: The interrupt response time may increase up to 5.5 ms if forcing is active.

With S7-300 CPUs, forcing is the same as “cyclical modify”

Execute force Execute force

job for inputs job for inputs

PIQ PII PIQ PII

OS OS
transfer transfer User program transfer transfer

Forced value
overwritten by T
Forced value PQW! Forced value

Execute force T PQW Execute force

job for outputs job for outputs

OS .... Operating system execution

Figure 8-3 The Principle of Forcing with S7-300 CPUs (CPU 312 IFM to 316-2 DP)

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 CPUs

8.3.2 Diagnosis with LED Displays

In Table 8-7, only the LEDs relevant to the diagnosis of the CPU and S7-300 are
listed. You will find the significance of the PROFIBUS-DP interface LEDs explained
in Chapter 9.

Table 8-7 Diagnostic LEDs of the CPU

LED Description
SF Comes on in Hardware faults
the event of Programming errors
Parameter assignment errors
Calculation errors
Timing errors
Faulty memory card
Battery fault or no backup at power on
I/O fault/error (external I/O only)
Communication error
BATF Comes on The backup battery is missing, faulty or not charged.
when Note: It also comes on when an accumulator is connected.
The reason for this is that the user program is not backed up
by the accumulator.
STOP Comes on The CPU is not processing a user program
when
Flashes when The CPU requests a memory reset

8.3.3 Diagnosis with STEP 7

Note
Please note that despite the extensive monitoring and error response functions
provided, this is not a safety-oriented or fault-tolerant system.

If an error occurs, the CPU enters the cause of the error in the diagnostic
buffer.You can read the diagnostic buffer using the programming device.
When an error occurs or there is an interrupt event, the CPU either goes into
STOP mode or you can respond in the user program via error or interrupt OBs.
You will find a detailed description of diagnosis with STEP 7 in the STEP 7 online
help system.
In Appendix B you will find an overview of the following:
S Which errors or interrupt events you can respond to with which OBs
S Which OB you can program in which CPU

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CPUs

CPU Behavior When There Is No Error OB

If you have not programmed an error OB, the CPU reacts as follows:

CPU Goes to STOP with Missing ... CPU Remains in RUN with Missing ...
OB 80 (Time-out) OB 81 (Power supply fault)
OB 85 (Program execution error)
OB 86 (Node failure in
PROFIBUS-DP network)
OB 87 (Communication error)
OB 121 (Programming error)
OB 122 (I/O direct access
error)

CPU Behavior When There Is No Interrupt OB

If you have not programmed an interrupt OB, the CPU reacts as follows:

CPU Goes to STOP with Missing ... CPU Remains in RUN with Missing ...
OB 10/11 (Time-of-day interrupt) OB 32/35 (Watchdog interrupt)
OB 20/21 (Delay interrupt)
OB 40/41 (Process interrupt)
OB 82 (Diagnostic interrupt)

Tip for OB 35 (CPU 318-2: and OB 32)

For the watchdog interrupt OB 35/32, you can set times from 1 ms upwards. Note:
The smaller the selected watchdog interrupt period, the more likely watchdog
interrupt errors will occur. You must take into account the operating system times
of the CPU in question, the runtime of the user program and the extension of the
cycle by active programming device functions, for example.

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 CPUs

8.4 CPUs – Technical Specifications

In This Section
S You will find the technical specifications of the CPU.
S You will find the technical specifications of the integrated inputs/outputs of the
CPU 312 IFM and 314 IFM.
S You will not find the features of the CPU 31x-2 DP as a DP master/DP slave.
Refer to Chapter 9.

Section Contents Page

8.4.1 CPU 312 IFM 8-18
8.4.2 CPU 313 8-28
8.4.3 CPU 314 8-30
8.4.4 CPU 314 IFM 8-32
8.4.5 CPU 315 8-48
8.4.6 CPU 315-2 DP 8-50
8.4.7 CPU 316-2 DP 8-53
8.4.8 CPU 318-2 8-56

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CPUs

8.4.1 CPU 312 IFM

Order No.
6ES7 312-5AC02-0AB0

Special Features
S Integrated inputs and outputs (wired up via a 20-pin front connector)
S No backup battery and therefore maintenance-free
S An S7-300 with CPU 312 IFM can be mounted only on one rack

Integrated Functions of the CPU 312 IFM

Integrated Functions Description

Process interrupt Interrupt inputs: Inputs parameterized in this way trigger a process interrupt at
the corresponding signal edge.
If you wish to use the digital inputs 124.6 to 125.1 as interrupt inputs, you must
program these using STEP 7.
Counter The CPU 312 IFM offers these special functions as an alternative at the digital
inputs 124.6 to 125.1.
Frequency meter For a description of the special functions “Counter” and “Frequency meter”,
please refer to the Integrated Functions Manual.

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 CPUs

“Interrupt Inputs” of the CPU 312 IFM

If you wish to use the digital inputs 124.6 to 125.1 as interrupt inputs, you must
program these in STEP 7 in the CPU parameters.
Note the following points:
S These digital inputs have a very low signal delay. At this interrupt input, the
module recognizes pulses with a length as of approx. 10 to 50 ms. In order to
prevent interference pulses from triggering interrupts, you must connect
shielded cables to the activated interrupt inputs (see Section 4.3.4).
Note: The interrupt-triggering pulse must be at least 50 ms in length.
S The input status associated with an interrupt in the process image input table or
with L PIB always changes with the normal input delay of approx. 3 ms.

Start Information for OB 40

Table 8-8 describes the relevant temporary (TEMP) variables of OB 40 for the
“interrupt inputs” of the CPU 312 IFM. The process interrupt OB 40 is described in
the System and Standard Functions Reference Manual.

Table 8-8 Start Information for OB 40 for the Interrupt Inputs of the Integrated I/Os

Byte Variable Data Type Description

6/7 OB40_MDL_ADDR WORD B#16#7C Address of the interrupt triggering
module (the CPU here)
8 on OB40_POINT_ADDR DWORD See Figure 8-4 Signaling of the interrupt triggering
integrated inputs

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CPUs

Display of the Interrupt Inputs

You can read which interrupt input has triggered a process interrupt from the
variable OB40_POINT_ADDR. Figure 8-4 shows the allocation of the interrupt
inputs to the bits of the double word.
Note: If interrupts of different inputs occur at very short intervals (< 100 ms apart),
more than one bit can be set at the same time. This means that several interrupts
may cause OB 40 to start only once.

31 30 5 4 3 2 1 0 Bit No.

Reserved
PRIN from I 124.6
PRIN from I 124.7
PRIN from I 125.0
PRIN from I 125.1

PRIN: Process interrupt

Figure 8-4 Display of the States of the Interrupt Inputs of the CPU 312 IFM

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 CPUs

Front View

I124.0
Status and
I 1
fault LEDs
I 2
I 3
I 4
I 5
Mode selector I 6
I 7
I125.0

I 1
Q124.0
Q 1
Q 2
Q 3 Front connector
Multipoint Interface Q 4
(MPI) for front
Q 5
connection of
the onboard I/O,
power supply
and functional
ground

Figure 8-5 Front View of the CPU 312 IFM

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CPUs

Technical Specifications of the CPU 312 IFM

Memory Blocks
Working memory (integral) 6 KB
OBs See Appendix B
Load memory max. size 8 KB

integral 20 KB RAM
FBs 32
20 KB EEPROM max. size 8 KB

Speed approx. 0.7 ms per

FCs 32
max. size 8 KB
1000 binary
instructions
DBs 127 (DB 0 reserved)
max. size 8 KB
Bit memories 1024

SFCs See Appendix

Adjustable retentivity MB 0 to MB 71

SFBs See Appendix

Preset MB 0 to MB 15
Integrated functions
Counter 32

Adjustable retentivity from C 0 to C 31
Counter 1 counter, counter
frequency 10 kHz;

Preset from C 0 to C 7 2 directional compa-
Times (only updated in 64 rators
OB1!)
Frequency meter up to 10 kHz max.

Adjustable retentivity No Functions
Retentive data area 1 DB; Real-time clock Software clock
max. 72 data bytes
Communication
Maximum sum of retentive 72 bytes
data MPI
Clock memories 8 (1 memory byte)
Guaranteed PG 1
connections
Local data

Guaranteed OP 1

In all 512 bytes
connections

Per priority class 256 bytes

Free connections for 2
Nesting depth 8 per priority class PG/OP/configured S7
Digital inputs 128 + 10 integrated connections
Digital outputs 128 + 6 integrated
Guaranteed 2
Analog inputs 32 connections for
Analog outputs 32 non-configured S7
connections
Process image

Global data

Integrated 124 to 127 communication
Inputs I 124.0 to I 127.7 No. of GD circuits 4
Outputs Q 124.0 to Q 127.7 No. of send packets per 1

External 0 to 32 GD circuit
Inputs I 0.0 to I 31.7 No. of receive packets 1
Outputs Q 0.0 to Q 31.7 per GD circuit
max. net data per 22 bytes
packet
Length of consistent 8 bytes
data per packet

No. of nodes max. 32 nodes

Transmission rate 19.2;
187.5 kbps

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 CPUs

Communication – Continued Dimensions, Configuration

MPI Installation dimensions 80
125 130

Distance W
H
D (mm)
without repeaters 50 m (54.5 yd.) Weight 0.45 kg (15.75 oz)
with 2 repeaters 1100 m (1199 yd.)
with 10 repeaters in 9100 m (9919 yd.) Configuration max. 8 modules on
series 1 rack

MPI interface Non-isolated Norms, Test Specifications

Voltages, Currents Norms and test see Module

specifications Specifications
Rated voltage 24V DC Reference Manual
Power input from 24V 0.7 A (typical)
(without load current for
outputs)
Inrush current 8A
I2t 0.4 A2s
External protection for Circuit breaker;
supply lines 10 A, type B or C
Power losses 9 W (typical)

Technical Specifications of the Special Inputs of the CPU 312 IFM

Module-Specific Data Sensor Selection Data

Number of inputs 4 Input voltage
I 124.6 to 125.1
Rated value 24V DC
Cable length
For “1” signal

Shielded max. 100 m I 125.0 and I 125.1 15 to 30 V
(109 yd.) I 124.6 and I 124.7 15 to 30 V

For “0” signal –3 to 5 V
Voltages, Currents, Potentials
Input current
Number of inputs that can 4
be triggered simultaneously
For “1” signal
I 125.0 and I 125.1 min. 2 mA

(horizontal I 124.6 and I 124.7 min. 6.5 mA
configuration)
up to 60 °C 4 Input delay time

(vertical configuration)
For “0” to “1” max. 50
s
up to 40 °C 4
For “1” to “0” max. 50
s

Status, Interrupts; Diagnostics Input characteristic

E 125.0 and E 125.1 to IEC 1131, type 1
Status display 1 green LED per
to IEC 1131, type 1
channel
E 124.6 and 124.7
Interrupts
Connection of 2-wire no

Process interrupt Parameterizable BEROs
Diagnostic functions None
Permissible quiescent
current
I 125.0 and I 125.1 max. 0.5 mA
I 124.6 and I 124.7 max. 2 mA

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CPUs

Time, Frequency
Internal conditioning time
for

Interrupt processing max. 1.5 ms
Input frequency
10 kHz

Technical Specifications of the Digital Inputs of the CPU 312 IFM

Note
Alternatively, you can parameterize the inputs I 124.6 and I 124.7 as special
inputs, in which case the technical specifications listed for the special inputs apply
to the inputs I 124.6 and I 124.7.

Module-Specific Data Status, Interrupts; Diagnostics

Number of inputs 8 Status display 1 green LED per
channel
Cable length

Unshielded max. 600 m Interrupts None

Shielded max. 1000 m Diagnostic functions None
Voltages, Currents, Potentials Sensor Selection Data
Number of inputs that can 8 Input voltage
be triggered simultaneously
Rated value 24V DC

(horizontal
For “1” signal 11 to 30 V
configuration)

For “0” signal –3 to 5 V
up to 60 °C 8

(vertical configuration) Input current

up to 40 °C 8
For “1” signal 7 mA (typical)

Input delay time
Galvanic isolation No

For “0” to “1” 1.2 to 4.8 ms

For “1” to “0” 1.2 to 4.8 ms
Input characteristic to IEC 1131, Type 2
Connection of 2-wire Possible
BEROs

Permissible quiescent max. 2 mA
current

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 CPUs

Technical Specifications of the Digital Outputs of the CPU 312 IFM

Module-Specific Data Actuator Selection Data
Number of outputs 6 Output voltage
Cable length
For “1” signal min. L + (– 0.8 V)

Unshielded max. 600 m Output current

Shielded max. 1000 m
For “1” signal
Voltages, Currents, Potentials Rated value 0.5 A
Permissible range 5 mA to 0.6 A
Total current of outputs
(per group)
For “0” signal
Residual current max. 0.5 mA

(horizontal
configuration) Load impedance range 48 W to 4 kW
up to 40 °C max. 3 A Lamp load max. 5 W
up to 60 °C max. 3 A
Parallel connection of 2

(vertical configuration) outputs
up to 40 °C max. 3 A
For dual-channel Possible
Galvanic isolation No triggering of a load

Status, Interrupts; Diagnostics

For performance Not possible
increase
Status display 1 green LED per
Triggering of a digital input Possible
channel
Switching frequency
Interrupts None

For resistive load max. 100 Hz
Diagnostic functions None

For inductive load to max. 0.5 Hz
IEC 947-5-1, DC 13

For lamp load max. 100 Hz
Inductive breaking voltage 30 V (typical)
limited internally to
Short-citcuit protection of yes, electronically
the output timed

Response threshold 1 A (typical)

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CPUs

Terminal Assignment Diagram of the CPU 312 IFM

Figure 8-6 shows the terminal assignment of the CPU 312 IFM. You wire the
integrated inputs/outputs of the CPU using a 20-pin front connector (see
Section 4.3.3).

Caution
! The CPU 312 IFM has no reverse polarity protection. If the poles are reversed, the
integral outputs are defective but despite this, the CPU does not go to STOP and
the status LEDs light up. In other words, the fault is not indicated.

I124.0
I 1
I 2
I 3
I 4
I 5
I 6
I 7
I125.0

I 1
Q124.0
Q 1
Q 2
Q 3
Q 4
Q 5

Figure 8-6 Terminal Assignment Diagram of the CPU 312 IFM

Grounded Configuration Only

You can use the CPU 312 IFM in a grounded configuration only. The functional
ground is jumpered internally in the CPU 312 IFM with the M terminal (see
Figure 8-7 on page 8-27).

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 CPUs

Power Supply Connections

The power supply

for CPU 312 IFM and

for integrated I/Os
is connected to terminals 18 and 19 (see Figure 8-6).

Short-Circuit Characteristics
If a short-circuit occurs at one of the integral outputs of the CPU 312 IFM, you
must proceed as follows:
1. Switch the CPU 312 IFM to STOP or switch off the power supply.
2. Remove the cause of the short-circuit.
3. Switch the CPU 312 IFM back to RUN or switch the power supply back on.

Basic Circuit Diagram of the CPU 312 IFM

Figure 8-7 shows the basic circuit diagram of the CPU 312 IFM.

CPU

CPU power
supply

M
M
L+

Figure 8-7 Basic Circuit Diagram of the CPU 312 IFM

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CPUs

8.4.2 CPU 313

Order No.
6ES7 313-1AD03-0AB0

Technical Specifications of the CPU 313

Memory Process image 0 to 127
Working memory (integral) 12 KB Inputs I 0.0 to I 127.7
Outputs Q 0.0 to Q 127.7
Load memory

Integral 20 KB RAM Blocks

Expandable up to 4 MB
OBs See Appendix B
FEPROM (memory max. size 8 KB
card)
FBs 128
Speed approx. 0.7 ms per max. size 8 KB
1000 binary
FCs 128
instructions max. size 8 KB
Bit memories 2048
DBs 127 (DB 0 reserved)
max. size 8 KB

Adjustable retentivity MB 0 to MB 71

SFCs See Appendix C

Preset MB 0 to MB 15

SFBs See Appendix C
Counter 64
Functions

Adjustable retentivity from C 0 to C 63

Preset from C 0 to C 7 Real-time clock Software clock

Times (only updated in 128 Operating hours counter 1

OB1!)
Number 0

Adjustable retentivity from T 0 to T 31
Value range 0 to 32767 hours

Preset No retentive times
Selectivity 1 hour

Retentive data area 1 DB;

Retentive Yes
max. 72 data bytes Backup battery
Maximum sum of retentive 72 bytes
Backup time min. 1 year
data at 25 °C and
uninterrupted backup of
Clock memories 8 (1 memory byte) the CPU
Local data
Storage approx. 5 years

In all 1536 bytes at 25 °C

Per priority class 256 bytes
Nesting depth 8 per priority class;
4 additional levels
within a synchro-
nous error OB
Digital inputs 128
Digital outputs 128
Analog inputs 32
Analog outputs 32

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 CPUs

Communications Voltages, Currents

MPI Rated voltage 24V DC

Guaranteed PG 1 Current drawn from 24 V 0.7 A (typical)
connections (idle)

Guaranteed OP 1
connections Inrush current 8A

Free connections for 2 I2t 0.4 A2s
PG/OP/configured S7
External fusing for supply Circuit breaker; 2 A,
connections
lines (recommendation) type B or C

Guaranteed 4
connections for Power losses 8 W (typical)
non-configured S7 Dimensions, Configuration
connections

Global data Installation dimensions 80
125 130
communication W
H
D
No. of GD circuits 4 (mm)
No. of send packets per 1 Weight (without memory 0.53 kg (15.75 oz)
GD circuit card and backup battery)
No. of receive packets 1
per GD circuit Configuration max. 8 modules on
max. net data per 22 bytes 1 rack
packet Norms, Test Specifications
Length of consistent 8 bytes
data per packet Norms, test specifications see Module

Number of nodes max. 32; Specifications
127 with repeaters Reference Manual

Transmission rate 19.2;

Distance 187.5 kbps
without repeaters
with 2 repeaters 50 m (54.5 yd.)
with 10 repeaters in 1100 m (1199 yd.)
series 9100 m (9919 yd.)

MPI interface Non-isolated

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CPUs

8.4.3 CPU 314

Order No.
6ES7 314-1AE04-0AB0

Technical Specifications of the CPU 314

Memory Digital inputs 512
Digital outputs 512
Working memory (integral) 24 KB
Load memory Analog inputs 64
Analog outputs 64

Integral 40 KB RAM

Expandable up to 4 MB Process image 0 to 127
FEPROM (memory Inputs I 0.0 to I 127.7
card) Outputs Q 0.0 to Q 127.7
Speed approx. 0.3 ms per Blocks
1000 binary
instructions

OBs See Appendix B
max. size 8 KB
Bit memories 2048
FBs 128

Adjustable retentivity MB 0 to MB 255 max. size 8 KB

FCs 128

Preset MB 0 to MB 15 max. size 8 KB
Counter 64
DBs 127 (DB0 reserved)
max. size 8 KB

Adjustable retentivity from C 0 to C 63

SFCs See Appendix

Preset from C 0 to C 7

SFBs See Appendix
Times (only updated in 128
OB1!) Functions

Adjustable retentivity from T 0 to T 127 Real-time clock Hardware clock

Preset No retentive times Operating hours counter 1
Retentive data area 8 DBs;
Number 0
max. 4096 data
Value range 0 to 32767 hours
bytes (in total)

Selectivity 1 hour
Maximum sum of retentive 4736 bytes
Retentive Yes
data
Backup battery
Clock memories 8 (1 memory byte)

Backup time min. 1 year
Local data at 25 °C and
uninterrupted backup of

In all 1536 bytes
the CPU

Per priority class 256 bytes

Storage approx. 5 years
Nesting depth 8 per priority class; at 25 °C
4 additional levels
within a synchro-
nous error OB

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 CPUs

Buffer time of clock with ac- Voltages, Currents

cumulator
Rated voltage 24V DC
at 0_C 4 weeks (typical)
at 25_C 4 weeks (typical) Current drawn from 24 V 0.7 A (typical)
at 40_C 3 weeks (typical) (idle)
at 60_C 1 week (typical)
Inrush current 8A
Battery charging time 1 h (typical)
I2t 0.4 A2s
Communications
External fusing for supply Circuit breaker; 2 A,
MPI lines (recommendation) type B or C
S Guaranteed PG 1 Power losses 8 W (typical)
connections
Dimensions, Configuration
S Guaranteed OP 1
connections Installation dimensions 80
125
130
S Free connections for 2 W
H
D
PG/OP/configured S7 (mm)
connections Weight (without memory 0.53 kg (15.75 oz)
S Guaranteed 8 card and backup battery)
connections for
non-configured S7 Configuration max. 32 modules on
connections 4 racks
S Global data Norms, Test Specifications
communication
Norms, test specifications see Module
No. of GD circuits 4
Specifications
No. of send packets per 1
Reference Manual
GD circuit
No. of receive packets 1
per GD circuit
max. net data per 22 bytes
packet
Length of consistent 8 bytes
data per packet
S Number of nodes max. 32;
127 with repeaters
S Transmission rate 19.2;
S Distance 187.5 kbps
without repeaters 50 m (54.5 yd.)
with 2 repeaters 1100 m (1199 yd.)
with 10 repeaters in 9100 m (9919 yd.)
series
S MPI interface Non-isolated

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EWA 4NEB 710 6084-02 8-31
CPUs

8.4.4 CPU 314 IFM

Order No.
6ES7 314-5AE03-0AB0

Special Features

Integrated inputs/outputs (wired up via 40-pin front connectors)
You can find detailed information on analog value processing and on connecting
measuring sensors and loads/actuators to the analog inputs/outputs in the Module
Specifications Reference Manual. Figures 8-13 and 8-14 on page 8-47 show wiring
examples.

Integrated Functions of the CPU 314 IFM

Integrated functions Description

Process interrupt Interrupt inputs: Inputs parameterized in this way trigger a process interrupt at
the corresponding signal edge.
If you wish to use the digital inputs 126.0 to 126.3 as interrupt inputs, you must
program these using STEP 7.
Note: To prevent the interrupt response times of the CPU being increased, you
should address the analog inputs of the CPU separately in the user program
using L PIW. Double-word addressing can increase the access times by up to
200
s!
Counter The CPU 314 IFM offers these special
p functions as an alternative at digital
g
126 0 to 126.3.
inputs 126.0 126 3 For a description of these special functions,
functions please refer
Frequency meter
to the Integrated Functions Manual.
Counter A/B
Positioning
CONT_C These functions are not restricted to specific
p inputs
p and outputs
p of the CPU 314
functions, please refer to the System and
IFM For a description of these functions
IFM.
CONT_S
Standard Functions Reference Manual.
PULSEGEN

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8-32 EWA 4NEB 710 6084-02
 CPUs

“Interrupt Inputs” of the CPU 314 IFM

If you wish to use the digital inputs 126.0 to 126.4 as interrupt inputs, you must
program these in STEP 7 in the CPU parameters.
Note the following points:
These digital inputs have a very low signal delay. At this interrupt input, the module
recognizes pulses with a length as of approx. 10 to 50
s. In order to prevent
interference pulses from triggering interrupts, you must connect shielded cables to
the activated interrupt inputs (see Section 4.3.4).
Note: The interrupt-triggering pulse must be at least 50
s in length.

Start Information for OB 40

Table 8-8 describes the relevant temporary (TEMP) variables of OB 40 for the
“interrupt inputs” of CPU 314 IFM. The process interrupt OB 40 is described in the
System and Standard Functions Reference Manual.

Table 8-9 Start Information for OB 40 for the Interrupt Inputs for the Integrated I/O

Byte Variable Data Type Description

6/7 OB40_MDL_ADDR WORD B#16#7C Address of the interrupt triggering
module (the CPU here)
8 on OB40_POINT_ADDR DWORD See Figure 8-8 Signaling of the interrupt triggering
integrated inputs

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EWA 4NEB 710 6084-02 8-33
CPUs

Display of the Interrupt Inputs

You can read which interrupt input has triggered a process interrupt from the
variable OB40_POINT_ADDR. Figure 8-8 shows the allocation of the interrupt
inputs to the bits of the double word.
Note: If interrupts of different inputs occur at very short intervals (< 100
s apart),
several bits can be set at the same time. This means that more than one interrupt
may cause OB 40 to start only once.

31 30 5 4 3 2 1 0 Bit No.

Reserved
PRIN from I 126.0
PRIN from I 126.1
PRIN from I 126.2
PRIN from I 126.3

PRIN: Process interrupt

Figure 8-8 Display of the States of the Interrupt Inputs of the CPU 314 IFM

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8-34 EWA 4NEB 710 6084-02
 CPUs

Front View of the CPU 314 IFM

OUT IN OUT

Ã
M
Ä L+
M

Å Æ

À Status and fault LEDs Ä Terminals for power supply and

Á Mode selector functional ground
 Compartment for backup battery or accumulator ŠMultipoint interface (MPI)
à Jumper (removable) Æ Integrated inputs/outputs

Figure 8-9 Front View of the CPU 314 IFM

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EWA 4NEB 710 6084-02 8-35
CPUs

Technical Specifications of the CPU 314 IFM

Memory S External 0 to123
Inputs E 0.0 to E 123.7
Working memory (integral) 32 KB
Outputs A 0.0 to A 123.7
Load memory
Blocks
S Integral 48 KB RAM
48 KB FEPROM S OBs See Appendix B
max. size 8 KB
Speed approx. 0.3 ms per S FBs 128
1000 binary max. size 8 KB
instructions
S FCs 128
Bit memories 2048 max. size 8 KB
S Adjustable retentivity MB 0 to MB 143 S DBs 127 (DB 0 reser-
max. size ved)
S Preset MB 0 to MB 15 S SFCs 8 KB

Counter 64 S SFBs See Appendix C

See Appendix C
S Adjustable retentivity from C 0 to C 63
S Preset from C 0 to C 7 Integrated functions
S Counter 1 or 2 counters,
Times (only updated in 128
counting fre-
OB1!)
quency 10 kHz;
S Adjustable retentivity from T 0 to T 71 2 directional compa-
S Preset No retentive times rators

Retentive data area 2 DBs;

S Frequency meter up to 10 kHz max.
max. 144 data bytes S Positioning Channel 1
(in total)
Functions
Maximum sum of retentive 144 bytes
Real-time clock Hardware clock
data
Operating hours counter 1
Clock memories 8 (1 memory byte)
S Number 0
Local data
S Value range 0 to 32767 hours
S In all 1536 bytes
S Selectivity 1 hour
S Per priority class 256 bytes
S Retentive Yes
Nesting depth 8 per priority class; Backup battery
4 additional levels
within a synchro- S Backup time min. 1 year
nous error OB at 25 °C and
uninterrupted backup of
Digital inputs 496 + 20 integrated the CPU
(of which 4 are spe-
cial inputs) S Storage approx. 5 years
Digital outputs 496 + 16 integrated at 25 °C
Buffer time of clock with ac-
Analog inputs 64 + 4 integrated
cumulator
Analog outputs 64 + 1 integrated
at 0_C typ. 4 weeks
Process image
at 25_C typ. 4 weeks
S Integrated 124 to 127 at 40_C typ. 3 weeks
Inputs E 124.0 to E 127.7
at 60_C typ. 1 week
Outputs A 124.0 to A 127.7
Battery charging time 1 h (typical)

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 CPUs

Communications Voltages, Currents

MPI Rated voltage 24V DC

Guaranteed PG 1 Current drawn from 24 V 1.0 A (typical)
connections (idle)

Guaranteed OP 1
connections Inrush current 8A

Free connections for 2 I2t 0.4 A2s
PG/OP/configured S7
External fusing for supply Circuit breaker; 2 A,
connections
lines (recommendation) type B or C

Guaranteed 8
PG supply on MPI (15 to
connections for
30V DC) max. 200 mA
non-configured S7
connections Power losses 16 W (typical)

Global data Dimensions, Configuration
communication
No. of GD circuits 4 Installation dimensions 160
125
130
No. of send packets per 1 W
H
D (mm)
GD circuit
No. of receive packets 1 Weight (without memory 0.9 kg (15.75 oz)
per GD circuit card and backup battery)
max. net data per 22 bytes Configuration max. 31 modules on
packet 4 racks
Length of consistent 8 bytes
data per packet Norms, Test Specifications

Number of nodes max. 32; Norms, test specifications see Module
127 with repeaters Specifications

Transmission rate 19.2; Reference Manual

Distance 187.5 kbps
without repeaters 50 m (54.5 yd.)
with 2 repeaters 1100 m (1199 yd.)
with 10 repeaters in 9100 m (9919 yd.)
series

MPI Interface Non-isolated

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CPUs

Characteristic Features of the Integrated Inputs and Outputs of the CPU 314 IFM

Table 8-10 Characteristic Features of the Integrated Inputs and Outputs of the CPU 314 IFM

Inputs/Outputs Characteristics
Analog inputs
Voltage inputs

10 V All information required for

Current inputs
20 mA
Analog value display and

Resolution 11 bits + sign bit
Connecting measuring sensors

Galvanically isolated and loads/actuators to the analog
inputs and outputs
Analog output
Voltage output

10 V
can be found in the Module

Current output
20 mA Specifications Reference Manual.

Resolution 11 bits + sign bit

Galvanically isolated
Digital
g inputs
p Special Inputs (I 126.0 to I 126.3) “Standard” Inputs

Input frequency up to 10 kHz
Galvanically isolated

Non-isolated

Rated input voltage 24V DC

Suitable for switch and 2-wire proximity switches (BEROs)
Digital outputs
Output current 0.5 A

Rated load voltage 24V DC

Galvanically isolated

Suitable for solenoid valves and DC contactors

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8-38 EWA 4NEB 710 6084-02
 CPUs

Technical Specifications of the Analog Inputs of the CPU 314 IFM

Module-Specific Data Interference Suppression, Error Limits, Conti-
nued
Number of inputs 4
Basic error limits
Cable length (operational limit at 25 °C,

Shielded max. 100 m relative to input range)
(109 yd.)
Voltage input
0.9 %
Voltages, Currents, Potentials
Current input
0.8 %
Galvanic isolation Temperature error (related
0.01 %/K

between channels and Yes to input range)
backplane bus Linearity error (related to
0.06 %
Permissible potential input range)
difference Repeatability (in the settled
0.06 %

between inputs and 1.0V DC state at 25 °C, relative to
MANA (UCM) input range)

between MANA and 75V DC Status, Interrupts; Diagnostics
Minternal (UISO) 60V AC
Interrupts None
Insulation tested at 500V DC
Diagnostic functions None
Analog Value Generation
Sensor Selection Data
Measuring principle Momentary value
encoding Input ranges
(successive (rated value)/input
Conversion time/resolution approximation) resistance
(per channel)
Voltage
10 V/50 kW

Basic conversion time
Current
20 mA/105.5 W

Resolution (inc. 100 ms
Permissible input voltage max. 30 V
overdrive range) 11 bits + sign bit for voltage input continuous;
(destruction limit) 38 V for max. 1 s
Interference Suppression, Error Limits (pulse duty factor
1:20)
Interference voltage
suppression Permissible input current for 34 mA
> 40 dB
current input (destruction

Common-mode limit)
interference (UCM < 1.0
V) Connection of signal
encoders
Crosstalk between the > 60 dB
inputs
For voltage Possible
measurement
Operational error limits
For current
(throughout temperature measurement
range, relative to input
range) as 2-wire measurement Not possible
transducer

Voltage input
1.0 %
as 4-wire measurement Possible

Current input
1.0 % transducer

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CPUs

Technical Specifications of the Analog Output of the CPU 314 IFM

Module-Specific Data Output ripple; Range 0 to
0.05 %
50 kHz (relative to output
Number of outputs 1
range)
Cable length Status, Interrupts; Diagnostics

Shielded max. 100 m
(109 yd.) Interrupts None

Voltages, Currents, Potentials Diagnostic functions None

Galvanic isolation Actuator Selection Data

Between channels and Yes Output ranges
backplane bus (rated values)

Permissible potential
Voltage
10 V

difference
Current
20 mA

Between MANA and 75V DC Load impedance
Minternal (UISO) 60V AC

For voltage output min. 2.0 kW
Insulation tested at 500V DC capacitive load max. 0.1 mF
Analog Value Generation
For current output max. 300 W

Resolution (incl. overdrive 11 bits + sign bit inductive load max. 0.1 mH
range) Voltage output
Conversion time 40 ms
Short-circuit protection Yes
Settling time
Short-circuit current max. 40 mA

For resistive load 0.6 ms
Current output

For capacitive load 1.0 ms

Idle voltage max. 16 V

For inductive load 0.5 ms
Destruction limit for
Connection of substitute No
externally applied
values
voltages/currents
Interference Suppression, Error Limits
Voltages at the output max.
15 V
Operational error limits with ref. to MANA continuous;
(throughout temperature
15 V for max. 1 s
range, relative to output (pulse duty factor
range) 1:20)

Voltage output
1.0 %
Current max. 30 mA

Current output
1.0 % Connection of actuators
Basic error limit (operational
For voltage output
limit at 25 °C, relative to 2-wire connection Possible
output range) 4-wire connection Not possible

Voltage output
0.8 %
For current output

Current output
0.9 % 2-wire connection Possible
Temperature error (relative
0.01 %/K
to output range)
Linearity error (relative to
0.06 %
output range)
Repeat accuracy (in the
0.05 %
settled state at 25 °C,
relative to output range)

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8-40 EWA 4NEB 710 6084-02
 CPUs

Technical Specifications of the Special Inputs of the CPU 314 IFM

Module-Specific Data Sensor Selection Data
Number of inputs 4 Input voltage
I 126.0 to 126.3
Rated value 24V DC
Cable length
For “1” signal 11 to 30 V or

Shielded max. 100 m 18 to 30 V for angle
(109 yd.) step encoder for int.
function
Voltages, Currents, Potentials “Positioning”
Number of inputs that can 4
For “0” signal –3 to 5 V
be triggered simultaneously
Input current

(horizontal
For “1” signal 6.5 mA (typical)
configuration)
up to 60 °C 4 Input delay time

(vertical configuration)
For “0” to “1” < 50
s (17 ms
typical)
up to 40 °C 4

For “1” to “0” < 50
s (20 ms
Status, Interrupts; Diagnostics typical)
Status display 1 green LED per Input characteristic to IEC 1131, Type 2
channel
Connection of 2-wire Possible
Interrupts BEROs

Process interrupt Parameterizable
Permissible quiescent max. 2 mA
Diagnostic functions None current
Time, Frequency
Internal conditioning time
for

Interrupt processing max. 1.2 ms
Input frequency
10 kHz

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CPUs

Technical Specifications of the Digital Inputs of the CPU 314 IFM

Module-Specific Data Status, Interrupts; Diagnostics
Number of inputs 16 Status display 1 green LED per
channel
Cable length

Unshielded max. 600 m Interrupts None

Shielded max. 1000 m Diagnostic functions None
Voltages, Currents, Potentials Sensor Selection Data
Rated load current L+ 24V DC Input voltage

Polarity reversal Yes
Rated value 24V DC
protection
For “1” signal 11 to 30 V
Number of inputs that can 16
For “0” signal –3 to 5 V
be triggered simultaneously
Input current

(horizontal
For “1” signal 7 mA (typical)
configuration)
up to 60 °C 16 Input delay time

(vertical configuration)
For “0” to “1” 1.2 to 4.8 ms
up to 40 °C 16
For “1” to “0” 1.2 to 4.8 ms

Galvanic isolation Input characteristic to IEC 1131, Type 2

Between channels and Yes Connection of 2-wire Possible
backplane bus BEROs
Permissible potential
Permissible quiescent max. 2 mA
difference current

Between different 75V DC
circuits 60V AC
Insulation tested at 500V DC
Current consumption

From L+ supply max. 40 mA

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8-42 EWA 4NEB 710 6084-02
 CPUs

Technical Specifications of the Digital Outputs of the CPU 314 IFM

Remarks
When the supply voltage is switched on a pulse occurs on the digital outputs! This
can be 50 ms long within the permissible output current range. You must not,
therefore, use the digital outputs to trigger high-speed counters.
Module-Specific Data Actuator Selection Data
Number of outputs 16 Output voltage
Cable length
For “1” signal min. L + (– 0.8 V)

Unshielded max. 600 m Output current

Shielded max. 1000 m
For “1” signal
Voltages, Currents, Potentials Rated value 0.5 A
Permissible range 5 mA to 0.6 A
Rated load current L+ 24V DC

For “0” signal max. 0.5 mA

Polarity reversal No (residual current)
protection
Load impedance range 48 W to 4 kW
Total current of outputs
(per group) Lamp load max. 5 W

(horizontal Parallel connection of 2
configuration) outputs
up to 40 °C max. 4 A
For dual-channel Possible, only
up to 60 °C max. 2 A triggering of a load outputs of the same

(vertical configuration) group
up to 40 °C max. 2 A
For performance Not possible
increase
Galvanic isolation
Triggering of a digital input Possible

Between channels and Yes
backplane bus Switching frequency

Between the channels Yes
For resistive load max. 100 Hz
in groups of 8
For inductive load to max. 0.5 Hz
IEC 947-5-1, DC 13
Permissible potential
difference
For lamp load max. 100 Hz

Between different 75V DC Inductive breaking voltage L+ (– 48 V) typical
circuits 60V AC limited internally to
Insulation tested at 500V DC Short-citcuit protection of yes, electronically
the output timed
Current consumption

Response threshold 1 A (typical)

From L+ supply max. 100 mA
(no-load)
Status, Interrupts; Diagnostics
Status display 1 green LED per
channel
Interrupts None
Diagnostic functions None

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CPUs

Terminal Assignment Diagram of the CPU 314 IFM

Figure 8-10 shows the terminal assignment of the CPU 314 IFM.
For wiring up the integrated I/Os you require two 40-pin front connectors (order
number: 6ES7 392-1AM00-0AA0).
Always wire up digital inputs 126.0 to 126.3 with shielded cable due to their low
input delay time.

Caution
! Wiring errors at the analog outputs can cause the integrated analog I/O of the
CPU to be destroyed! (for example, if the interrupt inputs are wired by mistake to
the analog output).
The analog output of the CPU is only indestructible up to 15 V (output with respect
to MANA).

Digital inputs Digital outputs

1L+ 2L+
I126.0 1L+ 124.0 124.0
Special I126.1 124.1 124.1
inputs I126.2 124.2 124.2
I126.3 124.3 124.3
AOU PQW 128 124.4 124.4
Analog
outputs AOI 124.5 124.5
AIU PIW 128 124.6 124.6
AII 124.7 124.7
AI–
2M

3L+
AIU PIW 130 125.0 125.0
Analog AII 125.1 125.1
inputs AI– 125.2 125.2
AIU PIW 132 125.3 125.3
AII
125.4 125.4
AI–
125.5 125.5
AIU PIW 134
125.6 125.6
AII
AI– 125.7 125.7
1M 3M
MANA

Figure 8-10 Terminal Assignment Diagram of the CPU 314 IFM

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 CPUs

Basic Circuit Diagrams of the CPU 314 IFM

Figures 8-11 and 8-12 show the basic circuit diagrams for the integrated
inputs/outputs of the CPU 314 IFM.

L+

CPU interface
+

Ref

M
DAC
V
M MANA A

Multiplexer
V
A

ADC

M MANA
CPU interface

Internal supply
MANA

Figure 8-11 Basic Circuit Diagram of the CPU 314 IFM (Special Inputs and Analog Inputs/Outputs)

S7-300 Programmable Controller Hardware and Installation

EWA 4NEB 710 6084-02 8-45
CPUs

1 L+ 2L+
24V

M
CPU 2M
interface 3L+

24V

1M M 3M
24V

Figure 8-12 Basic Circuit Diagram of the CPU 314 IFM (Digital Inputs/Outputs)

S7-300 Programmable Controller Hardware and Installation

8-46 EWA 4NEB 710 6084-02
 CPUs

Wiring the Analog Inputs

L+
1L+

2-wire measuring
transducer
AIU
AII
AI_

AI_ and MANA – we recommend connecting

them with a bridge.

MANA
M

Figure 8-13 Wiring the Analog Inputs of the CPU 314 IFM with a 2-Wire Measuring Transducer

1L+ Shielded cables

L+ M

AIU
AII 4-wire measu-
AI_ ring transducer

AIU
M
AII
AI_ Unwired channel groups:
Connect AI_ with MANA.

With a 4-wire measuring transducer we recommend

connecting AI_ with MANA.
MANA

Figure 8-14 Wiring the Analog Inputs of the CPU 314 IFM with a 4-Wire Measuring Transducer

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CPUs

8.4.5 CPU 315

Order No.
6ES7 315-1AF03-0AB0

Technical Specifications of the CPU 315

Memory Analog inputs 128
Analog outputs 128
Working memory (integral) 48 KB
Load memory Process image 0 to 127
S Integral 80 KB RAM Inputs I 0.0 to I 127.7
Outputs Q 0.0 to Q 127.7
S Expandable up to 4 MB
FEPROM (memory Blocks
card)
S OBs See Appendix B
Speed approx. 0.3 ms per max. size 16 KB
1000 binary S FBs 192
instructions max. size 16 KB
Bit memories 2048 S FCs 192
S Adjustable retentivity MB 0 to MB 255 max. size 16 KB
S DBs 254 (DB0 reserved)
S Preset MB 0 to MB 15 max. size 16 KB
S SFCs See Appendix C
Counter 64
S SFBs See Appendix C
S Adjustable retentivity from C 0 to C 63
S Preset from C 0 to C 7 Functions

Times (only updated in 128 Real-time clock Hardware clock

OB1!) Operating hours counter 1
S Adjustable retentivity from T 0 to T 127 S Number 0
S Preset No retentive times S Value range 0 to 32767 hours
Retentive data area 8 DBs; S Selectivity 1 hour
max. 4096 data S Retentive Yes
bytes (in total)
Backup battery
Maximum sum of retentive 4736 bytes
S Backup time min. 1 year
data
at 25 °C and
Clock memories 8 (1 memory byte) uninterrupted backup of
the CPU
Local data
S In all 1536 bytes S Storage approx. 5 years
at 25 °C
S Per priority class 256 bytes
Buffer time of clock with ac-
Nesting depth 8 per priority class; cumulator
4 additional levels
at 0_C 4 weeks (typical)
within a synchro-
at 25_C 4 weeks (typical)
nous error OB
at 40_C 3 weeks (typical)
Digital inputs 1024 at 60_C 1 week (typical)
Digital outputs 1024

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 CPUs

Battery charging time 1 h (typical) Dimensions, Configuration

Communications Installation dimensions 80
125
130
W
H
D (mm)
MPI

Guaranteed PG 1 Weight (without memory 0.53 kg (15.75 oz)
connections card and backup battery)

Guaranteed OP 1 Configuration max. 32 modules on
connections 4 racks

Free connections for 2 Norms, Test Specifications
PG/OP/configured S7
connections Norms, test specifications see Module
Specifications

Guaranteed 8
Reference Manual
connections for
non-configured S7
connections

Global data
communication
No. of GD circuits 4
No. of send packets per 1
GD circuit
No. of receive packets 1
per GD circuit
max. net data per 22 bytes
packet
Length of consistent 8 bytes
data per packet

Number of nodes max. 32;
127 with repeaters

Transmission rate 19.2;

Distance 187.5 kbps
without repeaters 50 m (54.5 yd.)
with 2 repeaters 1100 m (1199 yd.)
with 10 repeaters in 9100 m (9919 yd.)
series

MPI interface Non-isolated
Voltages, Currents
Rated voltage 24V DC
(– 10 %/+ 15 %)
Current drawn from 24 V 0.7 A (typical)
(idle)
Inrush current 8A
I2t 0.4 A2s
External fusing for supply Circuit breaker; 2 A,
lines type B or C
(recommendation)
Power losses 8 W (typical)

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CPUs

8.4.6 CPU 315-2 DP

Order No.
6ES7 315-2AF03-0AB0

DP master or DP slave
You can use the CPU 315-2 DP with its 2nd interface (PROFIBUS-DP interface)
either as a DP master or as a DP slave in a PROFIBUS-DP network.
See Chapter 9 for a detailed description of the PROFIBUS-DP features of the
CPU 315-2 DP.

Technical Specifications of the CPU 315-2 DP

Memory Nesting depth 8 per priority class;
4 additional levels
Working memory (integral) 64 KB
within a synchro-
Load memory nous error OB

Integral 96 KB RAM
Digital inputs 1024

Expandable up to 4 MB Digital outputs 1024
FEPROM (memory (central and in a distributed
card) configuration)
Speed approx. 0.3 ms per Analog inputs 128
1000 binary instr. Analog outputs 128
Bit memories 2048 (central and in a distributed
configuration)

Adjustable retentivity MB 0 to MB 255

Preset MB 0 to MB 15 Process image 0 to 127
Inputs I 0.0 to I 127.7
Counter 64
Outputs Q 0.0 to Q 127.7

Adjustable retentivity from C 0 to C 63

Preset from C 0 to C 7 DP Address Area 1 KB (see Section 9)
Blocks
Times (only updated in 128
OB1!)
OBs See Appendix B

Adjustable retentivity from T 0 to T 127 max. size 16 KB

Preset No retentive times
FBs 192
max. size 16 KB
Retentive data area 8 DBs;
FCs 192
max. 4096 data max. size 16 KB
bytes (in total)

DBs 254 (DB reserved)
Maximum sum of ret. data 4736 bytes max. size 16 KB 0
Clock memories 8 (1 memory byte)
SFCs See Appendix C

SFBs See Appendix C
Local data

In all 1536 bytes

Per priority class 256 bytes

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8-50 EWA 4NEB 710 6084-02
 CPUs

Functions S Transmission rate 19.2;

Real-time clock Hardware clock S Distance 187.5 kbps
without repeaters 50 m (54.5 yd.)
Operating hours counter 1 with 2 repeaters 1100 m (1199 yd.)
S Number 0 with 10 repeaters in 9100 m (9919 yd.)
S Value range 0 to 32767 hours series

S Selectivity 1 hour S MPI interface Non-isolated

S Retentive Yes PROFIBUS-DP
Backup battery S Possible no. of DP 64
S Backup time min. 1 year slaves
at 25 °C and S Address area per DP 244 bytes inputs/
uninterrupted backup of slave outputs
the CPU largest consistent block 32 bytes
S Storage approx. 5 years S Transmission rate up to 12 Mbps
at 25 °C S Transmission rate no
detection as a DP slave
Buffer time of clock with ac-
cumulator S SYNC/FREEZE yes
(as DP master)
at 0_C typ. 4 weeks
S Routing yes
at 25_C typ. 4 weeks connections max. 4
at 40_C typ. 3 weeks S Direct communication Yes
at 60_C typ. 1 week S Equidistance Yes
Battery charging time 1 h (typical) S Intermediate memory 244 bytes inputs
(as a DP slave)
Communications and 244 bytes out-
puts, up to 32 ad-
MPI dress areas can be
S Guaranteed PG 1 configured, max.
connections 32 bytes per ad-
S Guaranteed OP 1 dress area
connections S Distance Depending on the
S Free connections for 2 transmission rate
PG/OP/configured S7 (see Section 5.1.3)
connections
S Guaranteed 8 S PROFIBUS-DP Galvanically isolated
connections for interface
non-configured S7
connections Voltages, Currents
S Global data Rated voltage 24V DC
communication (– 10 %/+ 15 %)
No. of GD circuits 4
No. of send packets per 1 Current drawn from 24 V 0.9 W (typical)
GD circuit (idle)
No. of receive packets 1 Inrush current 8A
per GD circuit
max. net data per 22 bytes I2t 0.4 A2s
packet
External fusing for supply Circuit breaker; 2 A,
Length of consistent 8 bytes
lines (recommendation) type B or C
data per packet
S Number of nodes max. 32; Power losses 10 W (typical)
127 with repeaters

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CPUs

Dimensions, Configuration Norms, Test Specifications

Installation dimensions 80
125
130 Norms, test specifications see Module
W
H
D (mm) Specifications
Reference Manual
Weight (without memory 0.53 kg (15.75 oz)
card and backup battery)
Configuration max. 32 modules on
4 racks

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 CPUs

8.4.7 CPU 316-2 DP

Order No.
6ES7 316-2AG00-0AB0

DP master or DP slave
You can use the CPU 316-2 DP with its 2nd interface (PROFIBUS-DP interface)
either as a DP master or as a DP slave in a PROFIBUS-DP network.
See Chapter 9 for a detailed description of the PROFIBUS-DP features of the
CPU 316-2 DP.

Technical Specifications of the CPU 316-2 DP

Memory Nesting depth 8 per priority class;
4 additional levels
Working memory (integral) 128 KB
within a synchro-
Load memory nous error OB

Integral 192 KB RAM
Digital inputs 2048

Expandable up to 4 MB Digital outputs 2048
FEPROM (memory (central and in a distributed
card) configuration)
Speed approx. 0.3 ms per Analog inputs 128
1000 binary Analog outputs 128
instructions (central and in a distributed
Bit memories 2048 configuration)

Adjustable retentivity MB 0 to MB 255 Process image 0 to 127

Preset MB 0 to MB 15 Inputs I 0.0 to I 127.7
Outputs Q 0.0 to Q 127.7
Counter 64

Adjustable retentivity from C 0 to C 63 DP Address Area 2 KB

Preset from C 0 to C 7 (see Section 9)
Blocks
Times (only updated in 128
OB1!)
OBs See Appendix B

Adjustable retentivity from T 0 to T 127 max. size 16 KB

Preset No retentive times
FBs 256
max. size 16 KB
Retentive data area 8 DBs;
FCs 512
max. 4096 data max. size 16 KB
bytes (in total)

DBs 511 (DB reserved)
Maximum sum of retentive 4736 bytes max. size 16 KB 0
data
SFCs See Appendix C
Clock memories 8 (1 memory byte)
SFBs See Appendix C
Local data

In all 1536 bytes

Per priority class 256 bytes

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CPUs

Functions S Transmission rate 19.2;

Real-time clock Hardware clock S Distance 187.5 kbps
without repeaters 50 m (54.5 yd.)
Operating hours counter 1 with 2 repeaters 1100 m (1199 yd.)
S Number 0 with 10 repeaters in 9100 m (9919 yd.)
S Value range 0 to 32767 hours series

S Selectivity 1 hour S MPI interface Non-isolated

S Retentive Yes PROFIBUS-DP
Backup battery S Possible no. of DP 125
S Backup time min. 1 year slaves
at 25 °C and S Address area per DP 244 bytes inputs/
uninterrupted backup of slave outputs
the CPU largest consistent block 32 bytes
S Storage at 25 °C approx. 5 years S Transmission rate up to 12 Mbps
S Transmission rate no
Buffer time of clock with ac- detection as a DP slave
cumulator
S SYNC/FREEZE yes
at 0_C typ. 4 weeks (as DP master)
at 25_C typ. 4 weeks S Routing yes
at 40_C typ. 3 weeks connections max. 4
at 60_C typ. 1 week S Direct communication Yes

Battery charging time 1 h (typical) S Equidistance Yes

244 bytes inputs
S Intermediate memory and 244 bytes out-
Communications (as a DP slave)
puts, up to 32 ad-
MPI dress areas can be
S Guaranteed PG 1 configured, max. 32
connections bytes per address
S Guaranteed OP 1 area
connections Depending on the
S Distance
S Free connections for 2 transmission rate
PG/OP/configured S7 (see Section 5.1.3)
connections S PROFIBUS-DP Galvanically isolated
S Guaranteed 8 interface
connections for
Voltages, Currents
non-configured S7
connections Rated voltage 24V DC
S Global data (– 10 %/+ 15 %)
communication
Current drawn from 24 V 0.9 W (typical)
No. of GD circuits 4
(idle)
No. of send packets per 1
GD circuit Inrush current 8A
No. of receive packets 1
per GD circuit I2t 0.4 A2s
max. net data per 22 bytes External fusing for supply Circuit breaker; 2 A,
packet lines (recommendation) type B or C
Length of consistent 8 bytes
data per packet Power losses 10 W (typical)
S Number of nodes max. 32;
127 with repeaters

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 CPUs

Dimensions, Configuration Configuration max. 32 modules on

4 racks
Installation dimensions 80
125
130
W
H
D (mm) Norms, Test Specifications
Weight (without memory 0.53 kg (15.75 oz) Norms, test specifications see Module
card and backup battery) Specifications
reference Manual

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CPUs

8.4.8 CPU 318-2

Order No.
6ES7 318-2AF00-0AB0

Special Features

4 accumulators

The MPI interface can be reconfigured: MPI or PROFIBUS DP (DP master).

Data areas can be set (process image, local data)
For more information on the differences between the CPU 318-2 and the other
CPUs, see Section 11.1.

DP master or DP slave
You can use the CPU 318-2 DP either as a DP master or as a DP slave in a
PROFIBUS-DP network.
See Chapter 9 for a detailed description of the PROFIBUS-DP features of the
CPU 318-2.

Definable Data Areas and Occupied Working Memory

You can change the size of the process image for the inputs/outputs and the local
data areas when parameterizing the CPU 318-2.
If you increase the preset values for the process image and local data, this
occupies additional working memory that is then no longer available for user
programs.
The following proportions must be taken into consideration:

Process image input table: 1 byte PII occupied 12 bytes in the working
memory
Process image output table: 1 byte PIQ occupied 12 bytes in the working
memory
For example:
256 bytes in the PII occupy 3072 bytes and
2047 bytes in the PII occupy 24564 bytes in the working memory.

Local data 1 local data byte occupies 1 byte in the working memory
There are 256 preset bytes per priority class. With 14 priority classes there are
therefore 3584 bytes occupied in the working memory. With a maximum size of
8192 bytes you can still allocate 4608 bytes, which are then no longer available
for the user program in the working memory.

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 CPUs

Communication
You can reconfigure the first interface of the CPU from an MPI interface to a DP
interface (DP master).
You can run the CPU as a DP master or a DP slave via the second DP interface.
In routing, the maximum number of possible connections is reduced for each of the
two interfaces by 1 connection for each active PG/OP connection that the CPU
318-2 uses as a gateway.

Technical Specifications of the CPU 318-2

Memory Nesting depth 16 per priority class;
3 additional levels
Working memory (integral) 512 KB
within a synchro-

For user program 256 KB nous error OB

For data 256 KB
Address area 8 KB
Load memory (central and in a distributed

Integral 64 KB RAM configuration)

Expandable up to 4 MB Process image (default) 0 to 255
FEPROM (memory
Inputs I 0.0 to I 255.7
card) or up to 2 MB
Outputs Q 0.0 to Q 255.7
RAM (memory card)
Speed approx. 0.1 ms per Process image (expanda- to 2047
1000 binary ble)
instructions Inputs I 0.0 to I 2047.7
Outputs Q 0.0 to Q 2047.7
Bit memories 8192

Adjustable retentivity MB 0 to MB 1023 Blocks

Preset MB 0 to MB 15
OBs See Appendix B
max. size 64 KB
Counter 512

FBs 1024

Adjustable retentivity from C 0 to C 511 max. size 64 KB

Preset from C 0 to C 7
FCs 1024
max. size 64 KB
Times 512

Adjustable retentivity from T 0 to T 511

DBs 2047 (DB 0 reser-
ved)

Preset No retentive times max. size 64 KB
Retentive data area 8 DBs;
SFCs See Appendix C
max. 8192 data
SFBs See Appendix C
bytes (in total)
Maximum sum of retentive 11 KB
data
Clock memories 8 (1 memory byte)
Local data

Preset 4096 bytes
expandable to 8192 bytes

Per priority class 256 bytes

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CPUs

Functions Communications
Real-time clock Hardware clock Total number of max. 32;
connections using both
Operating hours counter 8 interfaces
S Number 0 to 7 (PG/OP/configured/not
S Value range 0 to 32767 hours configured S7 connections
with terminal point on the
S Selectivity 1 hour
CPU)
S Retentive Yes
1st MPI/DP Interface
Backup battery
MPI Functionality
S Backup time min. 1 year
at 25 °C and S Connections for max. 32
uninterrupted backup of PG/OP/configured/not
the CPU (incl. 1 MB configured S7
RAM memory card) connections/routing
Of these, the following 1 PG and 1 OP con-
S Storage approx. 5 years
are reserved: nection
at 25 °C
Buffer time of clock with ac-
S Global data
communication
cumulator
No. of GD circuits 8
at 0_C typ. 4 weeks No. of send packets per 1
at 25_C typ. 4 weeks GD circuit
at 40_C typ. 3 weeks No. of receive packets 2
per GD circuit
at 60_C typ. 1 week
max. net data per 54 bytes
Battery charging time 1 h (typical) packet
Length of consistent 32 bytes
data per packet
S Number of nodes max. 32;
127 with repeaters
S Transmission rate 9.6; 19.2; 93.75;
187.5; 500 kbps;
S Distance 1.5; 3; 6; 12 Mbps
see Tables 5-3 and
5-4 on page 5-12

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 CPUs

DP Functionality
Intermediate memory 244 bytes inputs and

Connections for max. 32 (as a DP slave) 244 bytes outputs,
PG/OP/configured/non- up to 32 address
configured S7 areas can be confi-
connections/routing gured, max. 32 bytes
per address area
Of these, the following 1 PG and 1 OP con-
are reserved: nection

Distance see Table 5-4 on
page 5-12

Connectable DP slaves 32

Address area per DP 244 bytes inputs/ Voltages, Currents
slave outputs Rated voltage 24V DC
largest consistent block 32 bytes (– 10 %/+ 15 %)

Transmission rate up to 12 Mbps
Current drawn from 24 V 1.2 A (typical)

SYNC/FREEZE Yes
(idle)

Routing Yes
Inrush current 8A

Direct communication Yes

Equidistance Yes I2t 0.4 A2s

Intermediate memory 244 bytes inputs and External fusing for supply Circuit breaker; 2 A,
(as a DP slave) 244 bytes outputs, lines type B or C
up to 32 address (recommendation)
areas can be confi-
gured, max. 32 bytes Power losses 12 W (typical)
per address area Dimensions, Configuration
2nd DP Interface Installation dimensions 160
125
130

Connections for max. 16 W
H
D (mm)
PG/OP/configured S7 Weight (without memory 0.93 kg (15.75 oz)
connections/routing card and backup battery)

Connectable DP slaves 125
Configuration max. 32 modules on

Address area per DP 244 bytes inputs/
4 racks
slave outputs

Transmission rate up to 12 Mbps Norms, Test Specifications

Transmission rate no Norms, test specifications see Module
detection as a DP slave Specifications

SYNC/FREEZE yes Reference Manual
(as DP master)

Routing Yes

Direct communication Yes

Equidistance Yes

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CPUs

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CPU 31x-2 as DP Master/DP Slave and
Direct Communication 9
Introduction
In this chapter you will find the features and technical specifications of the CPUs
315-2 DP, 316-2 DP and 318-2. You will need these in order to use the CPU as a
DP master or a DP slave and configure it for direct communication.
Declaration: Since the DP master/DP slave behavior is the same for all CPUs, the
CPUs are described below as CPU 31x-2.

In This Chapter

Section Contents Page

9.1 DP Address Areas of the CPU 31x-2 9-2
9.2 CPU 31x-2 as DP Master 9-3
9.3 Diagnostics of the CPU 31x-2 as DP Master 9-4
9.4 CPU 31x-2 as DP Slave 9-10
9.5 Diagnostics of the CPU 31x-2 as DP Slave 9-15
9.6 Parameter Assignment Frame and Configuration Frame 9-29
9.7 Direct Communication 9-36
9.8 Diagnostics in Direct Communication 9-37

Additional Literature
Descriptions and notes pertaining to configuration in general, configuration of a
PROFIBUS subnet and diagnostics in the PROFIBUS subnet can be found in the
STEP 7 online help system.

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CPU 31x-2 as DP Master/DP Slave and Direct Communication

9.1 DP Address Areas of the CPUs 31x-2

Address Areas of the CPU 31x-2

Address Area 315-2 DP 316-2 DP 318-2

DP address area 1024 bytes 2048 bytes 8192 bytes
for both inputs and
outputs
Number of those in Bytes 0 to 127 Bytes 0 to 127 Bytes 0 to 255
the process image (default)
for both inputs and Can be set up to
outputs byte 2047

DP diagnostic addresses occupy 1 byte for the DP master and for each DP slave
in the address area for the inputs. Under these addresses, for example, the DP
standard diagnosis for the respective nodes can be called (LADDR parameter of
SFC 13). The DP diagnostic addresses are specified during configuration. If you do
not specify any DP diagnostic addresses, STEP 7 allocates the addresses from the
highest byte address downwards as DP diagnostic addresses.

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 CPU 31x-2 as DP Master/DP Slave and Direct Communication

9.2 CPU 31x-2 as DP Master

Introduction
This section covers the features and technical specifications of the CPU when it is
used as a DP master.
The features and technical specifications of the CPU 31x-2 as the “standard” CPU
are listed in Section 8.

Prerequisites
Should the MPI/DP interface be a DP interface? If so, you must then configure the
interface as a DP interface.
Before the CPU can be put into operation, it must be configured as a DP master.
This means carrying out the following steps in STEP 7:
S Configure the CPU as a DP master.
S Assign a PROFIBUS address.
S Assign a master diagnostic address.
S Integrate DP slaves into the DP master system.
Is a DP slave a CPU 31x-2?
If so, you will find that DP slave in the PROFIBUS-DP catalog as
“pre-configured station”. This DP slave CPU must be assigned a slave
diagnostic address in the DP master. You must then interconnect the DP
master with the DP slave CPU and stipulate the address areas for data
interchange with the DP slave CPU.

Programming, Modifying and Monitoring via the PROFIBUS

As an alternative to the MPI interface, you can program the CPU or execute the
PG’s Monitor and Modify functions via the PROFIBUS-DP interface.

Note
The use of Monitor and Modify via the PROFIBUS-DP interface lengthens the DP
cycle.

Equidistance
As of STEP7 V 5.x you can parameterize bus cycles of the same length
(equidistant) for PROFIBUS subnets. You can find a detailed description of
equidistance in the STEP7 online help system.

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CPU 31x-2 as DP Master/DP Slave and Direct Communication

Power-Up of the DP Master System

CPU 31x-2 DP is DP Master CPU 318-2 is DP Master

You can also set power-up time monitoring Using the parameters
of the DP slaves with the “Transfer of parameters to modules” and
“Transfer of parameters to modules” “Ready message from modules” you can
parameter. set power-up time monitoring for the DP
slaves.
This means that the DP slaves must be powered up and parameterized by the CPU (as
DP master) in the set time.

PROFIBUS Address of the DP Master

You cannot set the 126 as the PROFIBUS address for the CPU 31x-2.

9.3 Diagnostics of the CPU 31x-2 as DP Master

Diagnosis with LEDs

Table 9-1 explains the meaning of the BUSF LED.
The BUSF LED assigned to the interface configured as the PROFIBUS-DP
interface will always come on or flash.

Table 9-1 Meaning of the BUSF LED of the CPU 31x-2 as DP Master

BUSF Description Remedy

LED off Configuring data OK; –
all configured slaves are addressable.
LED on S Bus fault (hardware fault). S Check the bus cable for short or interruption.
S DP interface fault. S Evaluate the diagnostic data. Reconfigure or
S Different transmission rates in correct the configuring data.
multiple DP master mode.
LED S Station failure. S Ensure that the bus cable is connected to the
flashes CPU 31x-2 and that the bus is not interrupted.
S At least one of the configured slaves S Wait until the CPU 31x-2 has powered up. If the
cannot be addressed. LED does not stop flashing, check the DP
slaves or evaluate the diagnostic data for the
DP slaves.

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 CPU 31x-2 as DP Master/DP Slave and Direct Communication

Reading Out the Diagnostic Data with STEP 7

Table 9-2 Reading Out the Diagnostic Data with STEP 7

DP Master Block or Application See...

Register in
STEP 7
CPU 31x-2 DP slave Display slave diagnosis as plain See the section on hardware
diagnosis text on the STEP 7 user diagnostics in the STEP 7 online
register interface help system and in the STEP 7
User Manual
SFC 13 Read out slave diagnosis Configuration for the CPU 31x-2,
“DPNRM_DG” (store in the data area of the see Section 9.5.4; SFC, see
user program) System and Standard Functions
Reference Manual
Configuration for other slaves,
see their description
SFC 59 Read out data records of the S7
“RD_REC” diagnosis (store in the data
area of the user program)
System and Standard Functions
SFC 51 Read out system state sublists. Reference Manual
“RDSYSST” Call SFC 51 in the diagnostic
interrupt with the system state
list ID W#16#00B4, and read
out the system state list of the
slave CPU.

Evaluating a Diagnosis in the User Program

The following figures show you how to evaluate the diagnosis in the user program.
Note the order number for the CPU 315-2 DP:

CPU 315-2 DP < 6ES7 315-2AF03-0AB0 CPU 315-2 DP as of

6ES7 315-2AF03-0AB0
CPU 316-2 DP as of
6ES7 316-2AG00-0AB0
CPU 318-2 as of 6ES7 318-2AJ00-0AB0
See Figure 9-1 on page 9-6 See Figure 9-2 on page 9-7

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CPU 31x-2 as DP Master/DP Slave and Direct Communication

CPU 315-2 DP smaller than 6ES7 315-2AF03-0AB0

Diagnostic event

OB82 is called

Read out the parameter OB 82_MDL_TYPE

in the local data of OB 82:
The module class is in the bits 0 to 3 (DP
slave type)

0011 = 1011 = Other identifier:

DP slave according to CPU as DP slave (I slave) S7 DP slave
the standard

Read out OB82_MDL_ADDR Read out OB82_MDL_ADDR Read out OB82_MDL_ADDR

(Diagnostic address of the DP (Diagnostic address of the and
slave = STEP7 DP slave = STEP7 Read out OB82_IO_FLAG
diagnostic address) diagnostic address) (= identifier I/O module)

Call SFC 13 Enter bit 0 of OB82_IO_Flag as bit

15 in OB82_MDL_ADDR
±
Result: diagnostic address
Enter the diagnostic “OB82_MDL_ADDR*”
address in the LADDR
parameter

Call SFC 13 Call SFC 51 For the diagnosis of the

modules involved:
± ±
Enter the diagnostic Call SFC 51
Enter the diagnostic
address in the LADDR ±
address in the INDEX
parameter Enter the diagnostic address
parameter (always the
input address here) “OB82_MDL_ADDR*” in the
INDEX parameter
Enter the ID W#16#00B3
in the SZL_ID parameter Enter the ID W#16#00B3 in
(= diagnostic data of a the SZL_ID parameter
module) (=diagnostic data of a
module)

Figure 9-1 Diagnostics with CPU 315-2 DP < 315-2AF03

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 CPU 31x-2 as DP Master/DP Slave and Direct Communication

CPU 315-2 DP as of 6ES7 315-2AF03-0AB0

CPU 316-2 DP;
318-2 Diagnostic event

OB82 is called

Read out OB82_MDL_ADDR

and
Read out OB82_IO_FLAG
(= identifier I/O module)

Enter bit 0 of OB82_IO_Flag as bit

15 in OB82_MDL_ADDR
Result: diagnostic address
“OB82_MDL_ADDR*”

For diagnosis of the whole DP slave: For the diagnosis of the modules involved:
Call SFC 13 Call SFC 51
± ±
Enter the diagnostic address Enter the diagnostic address
“OB82_MDL_ADDR*” in the LADDR “OB82_MDL_ADDR*” in the INDEX parameter
parameter Enter the ID W#16#00B3 in the SZL_ID parameter
(=diagnostic data of a module)

Figure 9-2 Diagnostics with CPU 31x-2 (315-2 DP as of 315-2AF03)

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CPU 31x-2 as DP Master/DP Slave and Direct Communication

Diagnostic Addresses
With the CPU 31x-2 you assign diagnostic addresses for the PROFIBUS-DP bus
system. Make sure during configuration that DP diagnostic addresses are assigned
to both the DP master and the DP slave.

CPU 31x-2 as DP Master CPU 31x-2 as DP Slave

PROFIBUS
During configuration you must specify two diagnostic addresses:

Diagnostic address Diagnostic address

When you configure the DP master, you When you configure the DP slave, you
must specify (in the associated project of must also specify (in the associated
the DP master) a diagnostic address for project of the DP slave) a diagnostic
the DP slave. In the following, this address that is allocated to the DP slave.
diagnostic address is referred to as In the following, this diagnostic address
allocated to the DP master. is referred to as allocated to the DP
slave.
The DP master receives information on The DP slave receives information on
the status of the DP slave or on a bus the status of the DP master or on a bus
interruption via this diagnostic address interruption via this diagnostic address
(see also Table 9-3). (see also Table 9-8 on page 9-20).

Figure 9-3 Diagnostic Addresses for DP Master and DP Slave

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 CPU 31x-2 as DP Master/DP Slave and Direct Communication

Event Detection
Table 9-3 shows how the CPU 31x-2 as DP master recognizes status changes in a
CPU as DP slave or interruptions in data transfer.

Table 9-3 Event Detection of the CPU 31x-2 as DP Master

Event What Happens in the DP Master

Bus interruption S OB 86 is called and a station failure reported
(short-circuit, plug (incoming event;
pulled) Diagnostic address of the DP slave, assigned to the DP
master)
S With I/O access: OB 122
is called up (I/O access error)
DP slave: S OB 82 is called and Module fault reported
RUN → STOP (incoming event;
Diagnostic address of the DP slave assigned to the DP
master;
Variable OB82_MDL_STOP=1)
DP slave: S OB 82 is called and Module ok reported.
STOP → RUN (outgoing event;
diagnostic address of the DP slave assigned to the DP
master;
Variable OB82_MDL_STOP=0)

Evaluation in the User Program

Table 9-4 shows you how you can, for example, evaluate RUN-STOP transitions of
the DP slave in the DP master (see Table 9-3).

Table 9-4 Evaluating RUN-STOP Transitions of the DP Slaves in the DP Master

In the DP Master In the DP Slave (CPU 31x-2 DP)

Diagnostic addresses: (example) Diagnostic addresses: (example)
Master diagnostic address=1023 Slave diagnostic address=422
Slave diagnostic address in the master Master diagnostic address=Irrelevant
system=1022

The CPU calls OB 82 with the following CPU: RUN → STOP

information: CPU generates a DP slave diagnostic frame
S OB 82_MDL_ADDR:=1022 (see Section 9.5.4).
S OB82_EV_CLASS:=B#16#39
(incoming event)
S OB82_MDL_DEFECT:=Module fault
Tip: This information is also in the CPU’s
diagnostic buffer
In the user program, you should also include
the SFC 13 “DPNRM_DG” to read out the DP
slave diagnostic data.

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CPU 31x-2 as DP Master/DP Slave and Direct Communication

9.4 CPU 31x-2 as DP Slave

Introduction
This section lists the characteristics and technical specifications for the CPU when
it is operated as a DP slave.
The characteristics and technical specifications of the CPU as the “standard” CPU
can be found in Section 8.

Prerequisites
Should the MPI/DP interface be a DP interface? If so, you must configure the
interface as a DP interface.
Prior to start-up, the CPU must be configured as a DP slave. This means carrying
out the following steps in STEP 7:
S “Switch on” the CPU as DP slave.
S Assign a PROFIBUS address.
S Assign a slave diagnostic address.
S Stipulate the address areas for data interchange with the DP master.

Device Master Files

You need a device master file to configure the CPU 31x-2 as a DP slave in a DP
master system.
The device master file is included in COM PROFIBUS as of version 4.0.
If you are working with an older version or another configuration tool, you can get
the device master file from the following sources:
S On the Internet at http://www.ad.siemens.de/csi_e/gsd
or
S Via modem from the SSC (Interface Center) Fuerth by calling +49/911/737972.

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 CPU 31x-2 as DP Master/DP Slave and Direct Communication

Programming, Modifying and Monitoring via the PROFIBUS

As an alternative to the MPI interface, you can program the CPU or execute the
PG’s Monitor and Modify functions via the PROFIBUS-DP interface. To do so, you
must enable these functions when configuring the CPU as a DP slave in STEP 7.

Note
The use of Monitor and Modify via the PROFIBUS-DP interface lengthens the DP
cycle.

Data Transfer Via an Intermediate Memory

The CPU 31x-2 provides an intermediate memory as DP slave for the
PROFIBUS DP bus system. The data transfer between the CPU as DP slave and
the DP master always takes place via this intermediate memory. You can configure
up to 32 address areas for this.
This means that the DP master writes its data in these address areas in the
intermediate memory and that the CPU reads this data in the user program and
vice versa.

DP master CPU 31x-2 as DP slave

Intermediate I/O I/O

memory in the I/O
address area

PROFIBUS

Figure 9-4 Intermediate Memory in the CPU 31x-2 as DP Slave

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CPU 31x-2 as DP Master/DP Slave and Direct Communication

Address Areas of the Intermediate Memory

In STEP 7 you configure input and output address areas:
S You can configure up to 32 input and output address areas.
S Each of these address areas can have up to 32 bytes.
S You can configure a maximum of 244 bytes for inputs and 244 bytes for
outputs.
The following table shows the principle of address areas. You can also find this
figure in the STEP 7 configuration.

Table 9-5 Configuration Example for the Address Areas of the Intermediate Memory

Type Master Type Slave Length Unit Consistency

Address Address
1 E 222 A 310 2 Byte Unit
2 A 0 E 13 10 Word Total length
:
32
Address areas in Address areas in These address area parameters must
the DP master CPU the DP slave CPU be identical for DP master and DP
slave

Rules
The following rules must be followed when using the intermediate memory:
S Allocating the address areas:
– Input data of the DP slave are always output data of the DP master
– Output data of the DP slave are always input data of the DP master
S The addresses can be freely allocated. In the user program, access the data
with Load/Transfer statements or with SFCs 14 and 15. You may also specify
addresses from the process input or process output image (also see
Section 3.2).

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Note
You assign addresses for the intermediate memory from the DP address area of
the CPU 31x-2.
You cannot assign addresses already allocated to the intermediate memory to the
I/O modules in the CPU 31x-2!

S The lowest address in any given address area is that address area’s start
address.
S The length, unit and consistency of the address areas for DP master and DP
slave must be identical.

S5 DP Master
If you are using an IM 308 C as a DP master and the CPU 31x-2 as a DP slave,
the exchange of consistent data requires the following:
In the IM 308 C, you must program FB 192 to enable the exchange of consistent
data between DP master and DP slave. With FB 192, the data of the CPU 31x-2
data is output or read out contiguously only in a single block.

S5-95 as a DP master
If you are using an AG S5-95 as a DP master, you must also set its bus
parameters for the CPU 31x-2 as a DP slave.

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Sample Program
Below you will see a small sample program for the exchange of data between DP
master and DP slave. The addresses used in the example are those from
Table 9-5.

In the DP Slave CPU In the DP Master CPU

L 2 Data
T MB 6 preprocessing in
L IB 0 DP slave
T MB 7
L MW 6 Forward data to
T PQW 310 DP master
L PIB 222 Postprocess
T MB 50 receive data in
L PIB 223 DP master
L B#16#3
+ I
T MB 51
L 10 Data Processing
+ 3 in DP master
T MB 60
CALL SFC 15 Send data to DP
LADDR:= W#16#0 slave
RECORD:= P#M60.0 Byte20
RET_VAL:=MW 22
CALL SFC 14 Receive data
LADDR:=W#16#D from DP master
RET_VAL:=MW 20
RECORD:=P#M30.0 Byte20
L MB 30 Postprocess
L MB 7 receive data
+ I
T MW 100

Data Transfer in STOP Mode

The DP slave CPU goes into STOP mode: The data in the intermediate memory of
the CPU is overwritten with “0”. In other words, the DP master reads “0”.
The DP master goes into STOP mode: The current data in the intermediate
memory of the CPU is preserved and can still be read by the CPU.

PROFIBUS address
You cannot set the 126 as the PROFIBUS address for the CPU 31x-2.

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9.5 Diagnostics of the CPU 31x-2 as DP Slave

In This Section

In Contents Page
Section
9.5.1 Diagnosis with LEDs 9-16
9.5.2 Diagnosis with STEP 5 or STEP 7 9-16
9.5.3 Reading Out the Diagnostic Data 9-17
9.5.4 Format of the Slave Diagnostic Data 9-21
9.5.5 Station Status 1 to 3 9-22
9.5.6 Master PROFIBUS Address 9-24
9.5.7 Manufacturer Identification 9-24
9.5.8 Module Diagnostics 9-25
9.5.9 Station Diagnostics 9-26
9.5.10 Interrupts 9-28

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9.5.1 Diagnosis with LEDs

Diagnosis with LEDs – CPU 31x-2

Table 9-6 explains the meaning of the BUSF LEDs.
The BUSF LED assigned to the interface configured as the PROFIBUS-DP
interface will always come on or flash.

Table 9-6 Meaning of the BUSF LEDs in the CPU 31x-2 as DP Slave

BUSF Description Remedy

LED off Configuring OK. –
LED The CPU 31x-2 is incorrectly S Check the CPU 31x-2.
flashes parameterized. There is no data S Check to make sure that the bus connector is
interchange between the DP master and properly inserted.
the CPU 31x-2.
S Check for interruptions in the bus cable to the
Reasons: DP master.
master
S Timeout. S Check configuring data and parameters.
S Bus communication via PROFIBUS
interrupted.
S Incorrect PROFIBUS address.
LED on S Short-circuit on bus.
bus S Check the bus configuration
configuration.

9.5.2 Diagnosis with STEP 5 or STEP 7

Slave Diagnosis
The slave diagnosis complies with EN 50170, Volume 2, PROFIBUS. Depending
on the DP master, the diagnosis can be read for all DP slaves that comply with the
standard using STEP 5 or STEP 7.
The following sections describe how the slave diagnosis is read and structured.

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S7 Diagnosis
An S7 diagnosis can be requested for all the modules in the SIMATIC S7/M7 range
of modules in the user program. The structure of the S7 diagnostic data is the
same for both central and distributed modules.
The diagnostic data of a module is in data records 0 and 1 of the system data area
of the module. Data record 0 contains 4 bytes of diagnostic data describing the
current state of a module. The data record 1 also contains module-specific
diagnostic data.
You can find out how to configure the diagnostic data in the System and Standard
Functions Reference Manual.

9.5.3 Reading Out the Diagnostic Data

Table 9-7 Reading Out the Diagnostic Data with STEP 5 and STEP 7 in the Master System

Programmable Block or Application See...

Controller with DP Register in
Master STEP 7
SIMATIC S7/M7 DP slave Displaying slave diagnosis as See the section on
diagnosis plain text to the STEP 7 surface hardware diagnostics in
register the STEP 7 online help
system and in the STEP 7
User Manual
SFC 13 Reading out slave diagnosis See Section 9.5.4; SFC:
“DP NRM_DG” (store in the data area of the user see System and Standard
program) Functions Reference
Manual
SFC 51 Reading out system state sublist. System and Standard
“RDSYSST” In the diagnostic interrupt alarm Functions Reference
with the system state list ID Manual
W#16#00B4, calling SFC 51 and
reading out the system state list
of the slave CPU.
SFC 59 Reading out data records of the
“RD_REC” S7 diagnosis (store in the data
area of the user program)
FB 99/FC 99 Evaluating slave diagnosis On the Internet at
http://www.ad.siemens.de/
simatic-cs
ID 387 257
SIMATIC S5 with FB 192 Reading out slave diagnosis Configuration – see
IM 308-C as DP “IM308C” (store in the data area of the user Section 9.5.4 FBs – see
master program)
g ) ET 200 Distributed I/O
D i M
Device Manuall
SIMATIC S5 with FB 230
S5-95U programmable “S_DIAG”
controller as DP
master

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Example of Reading Out the Slave Diagnosis with FB 192 “IM 308C”
Here you will find an example of how to use FB 192 to read out the slave diagnosis
for a DP slave in the STEP 5 user program.

Assumptions
The following assumptions are made for this STEP 5 user program:
S As a DP master, the IM 308-C occupies the page frames 0... 15 (number 0 of
the IM 308-C).
S The DP slave has the PROFIBUS address 3.
S The slave diagnosis should be stored in data block 20. You can also use any
data block for this.
S The slave diagnosis consists of 26 bytes.

STEP 5 User Program

STL Description
:A DB 30
:SPA FB 192
Name :IM308C
DPAD : KH F800 Default address area of the IM 308-C
IMST : KY 0, 3 IM no. = 0, PROFIBUS address of the DP slave = 3
FCT : KC SD Function: Read slave diagnosis
GCGR : KM 0 Not evaluated
TYP : KY 0, 20 S5 data area: DB 20
STAD : KF +1 Diagnostic data as of data word 1
LENG : KF 26 Length of dignostic data = 26 bytes
ERR : DW 0 Error code storage in DW 0 of the DB 30

Example of Reading Out the S7 Diagnosis with SFC 59 “RD_REC”

Here you will find an example of how to use the SFC 59 to read out the data
records of the S7 diagnosis for a DP slave in the STEP 7 user program. Reading
out the slave diagnosis with SFC 13 is similar.

Assumptions
The following assumptions are made for this STEP 7 user program:
S The diagnosis for the input module with the address FFFFH is to be read out.
S Data record 1 is to be read out.
S Data record 1 is to be stored in DB 10.

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STEP 7User Program

STL Description

CALL SFC 59

REQ :=TRUE Request to Read

IOID :=B#16#54 Identifier of the Address Area, here the I/O input
LADDR :=W#16#FFFF Logical address of the module
RECNUM :=B#16#1 Data record 1 is to be read out
RET_VAL := Errors result in the output of an error code
BUSY :=TRUE Reading process is not finished
RECORD :=DB 10 Destination area for the read data record 1 is data
block 10

Diagnostic Addresses
With the CPU 31x-2, you assign diagnostic addresses for the PROFIBUS-DP bus
system. During configuration, make sure that DP diagnostic addresses are
assigned to both the DP master and the DP slave.

CPU 31x-2 as DP Master CPU 31x-2 as DP Slave

PROFIBUS

During configuration you specify two diagnostic addresses:

Diagnostic address Diagnostic address

When you configure the DP master, you When you configure the DP slave, you
must specify (in the associated project of must also specify (in the associated
the DP master) a diagnostic address for project for the DP slave) a diagnostic
the DP slave. In the following, this address that is allocated to the DP slave.
diagnostic address is referred to as In the following, this diagnostic address
allocated to the DP master. is referred to as allocated to the DP
slave.
The DP master receives information on The DP slave receives information on
the status of the DP slave or on a bus the status of the DP master or on a bus
interruption via this diagnostic address interruption via this diagnostic address
(see also Table 9-3 on page 9-9). (see also Table 9-8).

Figure 9-5 Diagnostic Addresses for DP Master and DP Slave

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Event Detection
Table 9-8 shows how the CPU 31x-2 as DP slave recognizes status changes or
interruptions in the transfer of data.

Table 9-8 Event Detection of the CPU 31x-2 as DP Slave

Event What Happens in the DP Slave

Bus interruption S OB 86 is called and Station failure reported
(short-circuit, plug (incoming event; diagnostic address of the DP slave assigned
pulled) to the DP slave)
S In the case of I/O access: OB 122
is called (I/O access error)
DP master: S OB 82 is called and Module fault reported
RUN → STOP (incoming event;
diagnostic address of the DP slave assigned to the DP slave)
Variable OB82_MDL_STOP=1)
DP master: S OB 82 is called and Module ok reported.
STOP → RUN (outgoing event;
diagnostic address of the DP slave assigned to the DP slave)
Variable OB82_MDL_STOP=0)

Evaluation in the User Program

Table 9-9 shows you how you can, for example, evaluate RUN-STOP transitions of
the DP master in the DP slave (see Table 9-8).

Table 9-9 Evaluating RUN-STOP Transitions in the DP Master/DP Slave

In the DP Master In the DP Slave

Diagnostic addresses: (sample) Diagnostic addresses: (example)
Master diagnostic address=1023 Slave diagnostic address=422
Slave diagnostic address in the master Master diagnostic address=not relevant
system=1022
CPU: RUN → STOP The CPU calls OB 82 with the following
information:
S OB 82_MDL_ADDR:=422
S OB82_EV_CLASS:=B#16#39
(incoming event)
S OB82_MDL_DEFECT:=module fault
Tip: This information is also in the CPU’s
diagnostic buffer

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9.5.4 Structure of the Slave Diagnostic Data

Structure of the Slave Diagnostic Data

Byte 0
Byte 1 Station status 1 to 3
Byte 2

Byte 3 Master PROFIBUS address

Byte 4 High byte

Manufacturer
Byte 5 Low byte identification

Byte 6 Module diagnosis

to . (the length depends on the
Byte x . number of address areas
. configured for the intermediate
memory1)

Byte x+1 Station diagnosis

to .
(the length depends on the
Byte y .
number of address areas
.
configured for the intermediate
memory)

1 Exception: If the DP master is incorrectly configured, the DP slave

interprets 35 configured address areas (46H).

Figure 9-6 Structure of the Slave Diagnostic Data

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9.5.5 Station Status 1 to 3

Definition
Station status 1 to 3 provides an overview of the status of a DP slave.

Station Status 1

Table 9-10 Structure of Station Status 1 (Byte 0)

Bit Description Remedy

0 1: DP slave cannot be addressed by S Is the correct DP address set on the DP
DP master. slave?
S Is the bus connector inserted?
S Does the DP slave have power?
S Is the RS 485 repeater correctly set?
S Execute a Reset on the DP slave.
1 1: DP slave is not ready for data S Wait; the DP slave is still doing its run-up.
interchange.
2 1: The configuration data which the S Was the software set for the right station
DP master sent to the DP slave do type or the right DP slave configuration?
not correspond with the DP slave’s
actual configuration.
3 1: Diagnostic interrupt, generated by a S You can read out the diagnostic data.
RUN/STOP transition on the CPU
0: Diagnostic interrupt, generated by a
STOP/RUN transition on the CPU
4 1: Function is not supported, for S Check the configuring data.
instance changing the DP address
at the software level.
5 0: This bit is always “0”. –
6 1: DP slave type does not correspond S Was the software set for the right station
to the software configuration. type? (parameter assignment error)
7 1: DP slave was parameterized by a S Bit is always “1” when, for instance, you are
different DP master to the one that currently accessing the DP slave via the PG
currently has access to it. or a different DP master.
The DP address of the master that
parameterized the slave is located in the
“Master PROFIBUS address” diagnostic
byte.

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Station Status 2

Table 9-11 Structure of Station Status 2 (Byte 1)

Bit Description
0 1: DP slave must be parameterized again and reconfigured.
1 1: A diagnostic message has arrived. The DP slave cannot continue
operation until the error has been rectified (static diagnostic message).
2 1: This bit is always “1” when there is a DP slave with this DP address.
3 1: The watchdog monitor has been activated for this DP slave.
4 0: This bit is always “0”.
5 0: This bit is always “0”.
6 0: This bit is always “0”.
7 1: DP slave is deactivated, that is to say, it has been removed from the
scan cycle.

Station Status 3

Table 9-12 Structure of Station Status 3 (Byte 2)

Bit Description
0
to 0: These bits are always “0”.
6
7 1: S More diagnostic messages have arrived than the DP slave can
buffer.
S The DP master cannot enter all the diagnostic messages sent by the
DP slave in its diagnostic buffer.

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9.5.6 Master PROFIBUS Address

Definition
The DP address of the DP master is stored in the master PROFIBUS address
diagnostic byte:
S The master that parameterized the DP slave
S The master that has read and write access to the DP slave

Master PROFIBUS address

Table 9-13 Structure of the Master PROFIBUS Address (Byte 3)

Bit Description
0 to 7 DP address of the DP master that parameterized the DP slave and
has read/write access to that DP slave.
FFH: DP slave was not parameterized by a DP master.

9.5.7 Manufacturer ID

Definition
The manufacturer identification contains a code specifying the DP slave’s type.

Manufacturer Identification

Table 9-14 Structure of the Manufacturer Identification (Bytes 4 and 5)

Byte 4 Byte 5 Manufacturer Identification for

80H 2FH CPU 315-2 DP
80H 6FH CPU 316-2 DP
80H 7FH CPU 318-2

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9.5.8 Module Diagnosis

Definition
The module diagnosis specifies which of the configured address areas of the
intermediate memory an input has been made for.

7 0 Bit No.
Byte 6 0 1

Length of the module diagnosis,

including byte 6 (up to 6 bytes, depending on the number of configured
address areas)
Code for module diagnosis
7 6 5 4 3 1 Bit No.
Byte 7

Desired config.0actual config.

Preset configuration 0actual configuration or slave CPU in STOP mode
Desired config.0actual config.
Entry for 1st configured address area
Entry for 2nd configured address area
Entry for 3rd configured address area
Entry for 4th configured address area
Entry for 5th configured address area

7 6 5 4 3 2 1 0 Bit No.
Byte 88
Byte

Entry for 6th to 13th configured address area

7 6 5 4 3 2 1 0 Bit No.
Byte 9

Entry for 14th to 21st configured address area

7 6 5 4 3 2 1 0 Bit No.
Byte 10

Entry for 22nd to 29th configured address area

7 6 5 4 3 2 1 0 Bit No.
Byte 11 0 0 0 0 0

Entry for 30th configured address area

Entry for 31st configured address area
Entry for 32nd configured address area

Figure 9-7 Structure of the Module Diagnosis of the CPU 31x-2

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9.5.9 Station Diagnosis

Definition
The station diagnosis gives detailed information on a DP slave. The station
diagnosis begins as of byte x and can have a maximum of 20 bytes.

Station Diagnosis
The following figure describes the structure and content of the bytes for a
configured address area of the intermediate memory.

7 6 0 Bit No.
Byte x 0 0

Length of the station diagnosis

incl. byte x (= max. 20 bytes)
Code for station diagnostics

Byte x+1 01H: Code for diagnostic interrupt

02H: Code for process interrupt
7 0
Byte x+2 Number of the configured address
area of the intermediate memory
The rule is: Number+3
(example:
CPU = 02H
Address area 1 = 04H
Address area 2 = 05H etc.)

Byte x+3 0 0 0 0 0 0 0 0 (Always 0)

Byte x +4
to Diagnostic data (see Figure 9-9) or
byte x +7 interrupt data

Figure 9-8 Structure of the Station Diagnosis

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As of byte x +4
The purpose of the bytes beginning with byte x+4 depends on byte x+1 (see
Figure 9-8).

Byte x+1 Contains the Code for...

Diagnostic Interrupt (01H) Process Interrupt (02H)
The diagnostic data contain the 16 bytes of For a process interrupt, you can program four
status information from the CPU. Figure 9-9 bytes of interrupt information. These four
shows the contents of the first four bytes of bytes are forwarded to the DP master in
diagnostic data. The next 12 bytes are always STEP 7 with the SFC 7 command
0. “DP_PRAL” (see Section 9.5.10).

Bytes x+4 to x+7 for Diagnostic Interrupts

Figure 9-9 shows the configuration and contents of bytes x +4 to x +7 for
diagnostic interrupt. The contents of these bytes correspond to the contents of
data record 0 of the diagnostic data in STEP 7 (in this case, not all bits are
assigned).

7 0 Bit No.
Byte x+4 0 0 0 0 0 0 0

0: Module ok.
1: Module fault

7 4 3 0 Bit No.
Byte x+5 0 0 0 0 1 0 1 1

Identifier for the address area of the

intermediate memory (constant)
7 2 0 Bit No.
Byte x+6 0 0 0 0 0 0 0

0: RUN mode
1: STOP mode

7 0 Bit No.
Byte x+7 0 0 0 0 0 0 0 0

Figure 9-9 Bytes +4 to +7 for Diagnostic and Process Interrupts

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9.5.10 Interrupts

Interrupts with the S7/M7 DP Master

In the CPU 31x-2 as DP slave you can trigger a process interrupt in the DP master
from the user program. OB 40 is called in the DP master’s user program by calling
SFC 7 “DP_PRAL”. SFC 7 allows you to forward interrupt information in a
doubleword to the DP master; this information can then be evaluated in OB 40 in
variable OB40_POINT_ADDR. You can program the interrupt information as
desired. A detailed description of SFC 7 “DP_PRAL” can be found in the reference
manual entitled System Software S7-300/400 - System and Standard Functions.

Interrupts with Another DP Master

If you are running the CPU 31x-2 with another DP master, these interrupts are
reflected in the station diagnosis of the CPU 31x-2. You must postprocess the
relevant diagnostic events in the DP master’s user program.

Note
Note the following in order to be able to evaluate diagnostic interrupts and process
interrupts via the device-related diagnostics when using a different DP master:
S The DP master should be able to store the diagnostic messages, that is, the
DP master should have a ring buffer in which to place these messages. If the
DP master can not store diagnostic messages, only the last diagnostic
message would be available for evaluation.
S You must scan the relevant bits in the device-related diagnostic data in your
user program at regular intervals. You must also take the PROFIBUS-DP’s bus
cycle time into consideration so that you can scan the bits at least once in sync
with the bus cycle time, for example.
S When using an IM 308-C as DP master, you can not utilize process interrupts
in device-related diagnostics, as only incoming interrupts can be signaled, not
outgoing interrupts.

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9.6 Parameter Assignment Frame and Configuration Frame

With STEP 7
When you configure and parameterize the address areas of the intermediate
memory of the CPU 31x-2 with STEP 7, STEP 7 and the online help system
support you.

With COM PROFIBUS

When you configure and parameterize the address areas of the intermediate
memory of the CPU 31x-2 with COM PROFIBUS V 4.0, COM PROFIBUS and the
online help system support you.

Configuration/Parameterization
When you enter the address areas of the intermediate memory of the CPU 31x-2
using a configuration frame and a parameter assignment frame, e.g. CP 342-5 in
an S7-300 or CP 5431 as DP master or another DP master, you will find the
structure of the configuration frame and the parameter assignment frame in the
following sections.

In This Section
The following section contains all the information you need to configure and
parameterize the address areas of the intermediate memory with a software tool.

Section Contents Page

9.6.1 Structure of the Parameter Assignment Frame 9-30
9.6.2 Structure of the Configuration Frame (S7 Format) 9-32
9.6.3 Structure of the Configuration Frame for Non-S7 DP Masters 9-34

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9.6.1 Structure of the Parameter Assignment Frame

Definition: Parameter Assignment Frame

All the values of a DP slave that can be parameterized are stored in the parameter
assignment frame. The length of the parameter assignment frame may not exceed
178 bytes.

Structure of the Parameter Assignment Frame

The length of the parameter assignment frame for the CPU 31x-2 is 10 bytes:
S Standardized portion (bytes 0 to 6)
S Parameters of the CPU 31x-2 (bytes 7 to 9).

Standard Part
The first seven bytes of the parameter assignment frame are standardized to
EN 50170; for the CPU 315-2, for example, they can have the following contents:

Byte 0 88H Station status

Byte 1 01H WD factor 1
Byte 2 06H WD factor 2
Byte 3 0BH TRDY
Byte 4 80H Manufacturer identification high byte
Byte 5 2FH Manufacturer identification low byte
Byte 6 00H Group identification

Figure 9-10 Standardized Portion of the Parameter Assignment Frame (Example)

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Configuration of the Parameters for the CPU 31x-2

The length of the parameters for the CPU 31x-2 is 3 bytes: The default assignment
for these 3 bytes is: C0H 60H 00H.
The parameters have the following meanings:

7 2 Bit No.
Byte 7 0 0 0 0 0

Watchdog base 0: 10 ms (another DP master)

1: 1 ms (S7/M7 DP master)

Fail Safe Mode: Is set by STEP 7 or COM PROFIBUS,

depending on DP master
0: Another DP master
1: S7/M7 DP master

6 5
Byte 8 0 0 0 0 0 0

Diagnostic interrupt enable

Process interrupt enable

Byte 9 0 0 0 0 0 0 0 0

Figure 9-11 Parameters for the CPU 31x-2

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9.6.2 Structure of the Configuration Frame (S7 Format)

Structure of the Configuration Frame

The length of the configuration frame depends on the number of address areas
configured for the CPU’s intermediate memory. The first 15 bytes in the
configuration frame are reserved. The format of the configuration frame is as
follows:

Table 9-15 Structure of the Configuration Frame

Byte
Config red Address Area
Configured
n n+1 n+2 n+3 n+4
04 00 00 AD C4
These bytes are reserved: 04 00 00 8B 41
04 00 00 8F C0
1st configured address area (n = 15)
2nd configured address area (n = 20) See Table 9-16
...
32nd configured address area (n = 170)

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Identifiers for the Address Areas

The identifiers for configuring depend on the type of the address area. Table 9-16
lists all the identifiers for the address areas.

Table 9-16 Identifiers for the Address Areas of the Intermediate Memory

Identifiers (hexadecimal)
Special Length Manufacturer-specific data
Address Area identifier byte Comment length = 3
format
Byte 0 Byte 1 Byte 2 Byte 3 Byte 4
Input See Figure See 00H 83H 40H
9-12 Figure
Output 9-13 00H 93H 40H

7 6 5 4 3 2 1 0 Bit No.
Byte 0 0 0

0011: Number of manufacturer-specific

data (bytes 2, 3 and 4 in Table 9-16)
00: Blank space
01: 1-byte length byte for inputs follows
10: 1-byte length byte for outputs follows

Figure 9-12 Description of Byte 0 of the CPU’s Address Area Identifiers

7 6 5 4 3 2 1 0 Bit No.
Byte 1

Length of the inputs/outputs (0: 1 Byte or word

in bytes or words + 1 1: 2 bytes/word)
0: Length in bytes
1: Length in words

Consistency over...
0: Byte or word
1: Total length

Figure 9-13 Description of Byte 1 of the CPU’s Address Area Identifiers

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Example of a Configuration Frame

Below is a sample configuration frame for the CPU 315-2 DP.
Format:
S A power supply module
S The CPU 315-2 DP
S An address area in the DP master (= output address area in the DP slave), two
bytes in length and with consistency over the entire area
The configuration frame thus comprises 20 bytes and looks like this:

04 00 00 AD C4 04 00 00 8B 41 04 00 00 8F C0 43 81 00 83 40

Permanent Permanent Permanent 1st configured input

value value value address area of the
CPU’s intermediate
memory

9.6.3 Structure of the Configuration Frame for Non-S7 DP Masters

Type/Device Master File

If your DP master does not support the configuration frame in S7 format (see
Section 9.6.2), you can obtain a type/device master file in non-S7 format by calling
the SSC (Interface Center) Fuerth.
The device master file can be obtained via modem from the SSC (Interface
Center) Fuerth by calling +49/911/737972.

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Structure of the Configuration Frame

The length of the configuration frame depends on the number of address areas
configured for the CPU’s intermediate memory. The first three bytes of the
configuration frame are always “0”. The format of the configuration frame is as
follows:
In this format, you can only configure a length of no more than 16 bytes or 16
words. For a length of 32 bytes, you would thus have to configure a length of 16
words.

Table 9-17 Structure of the Configuration Frame for Non-S7 DP Masters

Configured Byte
Address
Areas
1. 0 0 0 0 0 0 0 0
2. 0 0 0 0 0 0 0 0
3. 0 0 0 0 0 0 0 0
4. 7 6 5 4 3 2 1 0 Bit No.

in bytes or words

:
Length of the inputs/outputs in
bytes or words
01: Inputs
: 10: Outputs
0: Length in bytes
1: Length
g in words
32nd Consistency over...
0: Byte or word
1: Total length

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9.7 Direct Communication

As of STEP 7 V 5.x you can configure direct communication for PROFIBUS nodes.
The CPU 31x-2 can take part in direct communication as the sender or receiver.
Direct communication is a special communication relationship between
PROFIBUS-DP nodes.

Principle
Direct communication is characterized by the fact that the PROFIBUS-DP nodes
listen in to find out which data a DP slave is sending back to its DP master.
Using this function the eavesdropper (receiver) can directly access changes in the
input data of remote DP slaves.
During configuration in STEP 7, in addition to defining the relevant I/O input
addresses, you can also define which of the receiver’s address areas the required
data from the sender will be read to.
A CPU 31x-2 can be one of the following:
Sender as DP slave
Receiver as DP slave or DP master or as CPU not included in a
master system (see Figure 9-14).

Example
Figure 9-14 gives you an example of the direct communication relationships you
can configure. In the figure all the DP masters and DP slaves are CPU 31x-2s.
Note that other DP slaves (ET 200M, ET 200X, ET 200S) can only be senders.

DP master
DP master
system 1
system 2

CPU CPU 31x-2 as CPU 31x-2 as

31x-2 DP master DP master
1 2

PROFIBUS

DP slave CPU DP slave

CPU CPU 3 31x-2 5
31x-2 31x-2 as DP
as DP as DP slave 4
slave 1 slave 2

Figure 9-14 Direct Communication with CPU 31x-2

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9.8 Diagnostics in Direct Communication

Diagnostic Addresses
In direct communication you allocate a diagnostic address in the receiver:

CPU 31x-2 as Sender CPU 31x-2 as Receiver

PROFIBUS

Diagnostic address

During configuration you define in the

receiver a diagnostic address that is
allocated to the sender.
The receiver receives information on the
status of the sender or on a bus
interruption via this diagnostic address
(see also Table 9-18).

Figure 9-15 Diagnostic Address for the Receiver During Direct Communication

Event Detection
Table 9-18 shows how the CPU 31x-2 as receiver detects interruptions in the
transfer of data.

Table 9-18 Event Detection of the CPU 31x-2 as Receiver During Direct Communication

Event What Happens in the Receiver

Bus interruption S OB 86 is called and Station failure reported
(short-circuit, plug (incoming event; diagnostic address of the receiver, assigned
pulled) to the sender)
S In the case of I/O access: OB 122
is called (I/O access error)

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Evaluation in the User Program

Table 9-19 shows you how you can, for example, evaluate the station failure of the
sender in the receiver (see also Table 9-18).

Table 9-19 Evaluation of the Station Failure of the Sender During Direct Communication

In the Sender In the Receiver

Diagnostic addresses: (example) Diagnostic address: (example)
Master diagnostic address=1023 Diagnostic address=444
Slave diagnostic address in the master
system=1022

Station failure The CPU calls OB 86 with the following

information:
S OB 86_MDL_ADDR:=444
S OB86_EV_CLASS:=B#16#38
(incoming event)
S OB86_FLT_ID:=B#16#C4
(failure of a DP station)
Tip: This information is also in the CPU’s
diagnostic buffer

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Cycle and Response Times of the S7-300 10
Introduction
In this section, we explain what the cycle time and the response time of the S7-300
consist of.
You can use the programming device to read out the cycle time of your user
program on the CPU (see the STEP 7 online help system).
The example below shows you how to calculate the cycle time.
The response time is more important for the process. In this chapter we will show
you in detail how to calculate the response time.

In This Chapter

Section Contents Page

10.1 Cycle Time 10-2
10.2 Response Time 10-3
10.3 Calculation Example for Cycle Time and Response Time 10-10
10.4 Interrupt Response Time 10-14
10.5 Calculation Example for the Interrupt Response Time 10-16
10.6 Reproducibility for Delay and Watchdog Interrupt 10-16

Further Information
You will find further information on the processing times in ...
S ... the S7-300 instruction list. There you will find all the STEP 7 instructions
which can be processed on the various CPUs, together with their execution
time.
S ....see Appendix C. Here you will find a list of all the SFCs/SFBs integrated in
the CPUs, as well as the STEP 7 IEC functions and their execution times.

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10.1 Cycle Time

Cycle Time – A Definition

The cycle time is the time that elapses during one program cycle.

Component Parts of the Cycle Time

The cycle time comprises:

Factors Remarks
Operating system execution time
Process image transfer time (PII and See Section 10.2
PIQ)
User program execution time Can be calculated on the basis of the execution times of the
individual instructions (see the S7-300 Instruction List ) and a
CPU-specific factor (see Table 10-3)
S7 timer (not in the case of the
CPU 318-2)
PROFIBUS DP See Section 10.2

Integrated functions
Communication via the MPI You parameterize the maximum permissible cycle load produced
by communication in percent in STEP 7
Loading through interrupts See Sections 10.4 and 10.5

Figure 10-1 shows the component parts of the cycle time

Operating
system
PII
User
program
Operating
system
Interrupts

User
program

PIQ

Figure 10-1 Component Parts of the Cycle Time

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Extending the Cycle Time

Note that the cycle time of a user program is extended by the following:
S Time-controlled interrupt handling
S Process interrupt handling (see also Section 10.4)
S Diagnostics and error handling (see also Section 10.4)
S Communication via MPI

10.2 Response Time

Response Time – A Definition

The response time is the time between detection of an input signal and
modification of an associated output signal.

Factors
The response time depends on the cycle time and the following factors:

Factors Remarks
Delay of the inputs and outputs The delay times are given in the technical specifications
S In the Module Specifications Reference Manual for the
signal modules
S In Section 8.4.1 for the integrated inputs/outputs of the
CPU 312 IFM.
S In Section 8.4.4 for the integrated inputs/outputs of the
CPU 314 IFM.
Additional bus runtimes on the PROFIBUS CPU 31x-2 DP only
subnet

Range of Fluctuation
The actual response time lies between a shortest and a longest response time.
You must always reckon on the longest response time when configuring your
system.
The shortest and longest response times are considered below to let you get an
idea of the width of fluctuation of the response time.

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Shortest Response Time

Figure 10-2 shows you the conditions under which the shortest response time is
reached.

Delay of the inputs

The status of the observed input changes

PII immediately before reading in the PII. The
change in the input signal is therefore taken
Operating account of in the PII.
Response Time

system
The change in the input signal is processed
User
by the user program here.
program
The response of the user program to the
PIQ input signal change is passed on to the
outputs here.

Delay of the outputs

Figure 10-2 Shortest Response Time

Calculation
The (shortest) response time consists of the following:
S 1 process image transfer time for the inputs +
S 1 operating system execution time +
S 1 program execution time +
S 1 process image transfer time for outputs +
S Execution time of S7 timer
S Delay of the inputs and outputs
This corresponds to the sum of the cycle time and the delay of the inputs and
outputs.

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Longest Response Time

Figure 10-3 shows the conditions that result in the longest response time.

Delay of the inputs + bus runtime on

the PROFIBUS-DP

While the PII is being read in, the status of

PII the observed input changes. The change in
the input signal is no longer taken into
Operating account in the PII.
system

User
program
Response Time

PIQ

PII The change in the input signal is taken

account of in the PII here.

Operating
system

User The change in the input signal is processed

program by the user program here.

The response of the user program to the

PIQ input signal change is passed on to the
outputs here.

Delay of the outputs + bus runtime on

the PROFIBUS-DP

Figure 10-3 Longest Response Time

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Calculation
The (longest) response time consists of the following:
S 2 process image transfer time for the inputs +
S 2 process image transfer time for the outputs +
S 2 operating system execution time +
S 2 program execution time +
S 2 Bus runtime on the PROFIBUS-DP bus system (with CPU 31x-2 DP)
S Execution time of the S7 timer +
S Delay of the inputs and outputs
This corresponds to the sum of the double cycle time and the delay of the inputs
and outputs plus the double bus runtime.

Operating System Processing Time

Table 10-1 contains all the times needed to calculate the operating system
processing times of the CPUs.
The times listed do not take account of
S Test functions, e.g. monitor, modify
S Functions: Load block, delete block, compress block
S Communication

Table 10-1 Operating System Processing Times of the CPUs

Sequence CPU CPU CPU CPU CPU CPU CPU CPU

312 IFM 313 314 314 IFM 315 315-2 DP 316-2 DP 318-2
Cycle control 600 to 540 to 540 to 770 to 390 to 500 to 500 to 200 to
1200 ms 1040 ms 1040 ms 1340 ms 820 ms 1030 ms 1030 ms 340 ms

Process Image Update

Table 10-2 lists the CPU times for the process image update (process image
transfer time). The times specified are “ideal values” which are prolonged by
interrupts or by communication of the CPU.
(Process image = PI)
The CPU time for the process image update is calculated as follows:
K + number of bytes in the PI in rack “0” A
+ number of bytes in the PI in racks “1 to 3” B
+ number of bytes in the PI via DP D
= Process image transfer time

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Table 10-2 Process Image Update of CPUs

Components CPU CPU CPU CPU CPU CPU CPU CPU

312 IFM 313 314 314 IFM 315 315-2 316-2 318-2
DP DP
K Base load 162 ms 142 ms 142 ms 147 ms 109 ms 10 ms 10 ms 20 ms
A For each byte in rack 14.5 ms 13.3 ms 13.3 ms 13.6 ms 10.6 ms 20 ms 20 ms 6 ms
“0” (per (per
word) word)
B For each byte in racks 16.5 ms 15.3 ms 15.3 ms 15.6 ms 12.6 ms 22 ms 22 ms 12.4 ms
“1 to 3” (per (per
word) word)
D For each byte in DP – – – – – 12 ms 12 ms 1 ms
area for integrated DP (per (per
interface word) word)

User Program Processing Time:

The user program processing time is made up of the sum of the execution times
for the instructions and the SFB/SFCs called up. These execution times can be
found in the Instruction List. Additionally, you must multiply the user program
processing time by a CPU-specific factor. This factor is listed in Table 10-3 for the
individual CPUs.

Table 10-3 CPU-specific Factors for the User Program Processing Time

Se- CPU CPU 313 CPU 314 CPU CPU 315 CPU CPU CPU
quence 312 IFM 314 IFM 315-2 DP 316-2 DP 318-2
Factor 1,23 1,19 1,15 1,15 1,15 1,19 1,19 1,025

S7 timers
In the case of the CPU 318-2, the updating of the S7 timers does not extend the
cycle time.
The S7 timers are updated every 10 ms.
You can find out in Section 10.3 how to include the S7 timers in calculations of the
cycle and response times.

Table 10-4 Updating the S7 Timers

Sequence 312 IFM 313 314 314 IFM 315 315-2 DP 316-2 DP
Updating the S7 Number of Number of simultaneously active S7 timers 8 ms
timers (every 10 ms) simulta-
neously
active
S7 timers
10 ms

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PROFIBUS-DP interface
In the case of the CPU 315-2 DP/316-2 DP, the cycle time is typically extended by
5% when the PROFIBUS-DP interface is used.
In the case of the CPU 318-2, there is no increase in cycle time when the
PROFIBUS-DP interface is used.

Integrated functions
In the case of the CPU 312-IFM and the CPU 314-IFM, the cycle time is increased
by a maximum of 10 % when integrated functions are used. In addition, you must,
where applicable, take into account the update of the instance DB at the scan
cycle checkpoint.
Table 10-5 shows the update times of the instance DB at the scan cycle
checkpoint, together with the corresponding SFB runtimes.

Table 10-5 Update Time and SFB Runtimes

CPU 312 IFM/314 IFM Update Time of the SFB Runtime

Instance DB at the Scan
Cycle Checkpoint
IF Frequency measurement 100 ms 220 ms
(SFB 30)
IF Counting (SFB 29) 150 ms 300 ms
IF Counting (Parallel 100 ms 230 ms
counter) (SFB 38)
IF Positioning (SFB 39) 100 ms 150 ms

Delay of the Inputs and Outputs

You must take account of the following delay times, depending on the module:
S For digital inputs: The input delay time
S For digital outputs: Negligible delay times
S For relay outputs: Typical delay times of between 10 ms and 20 ms.
The delay of the relay outputs depends, among other things, on the
temperature and voltage.
S For analog inputs: Cycle time of the analog input
S For analog outputs: Response time of the analog output

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Bus Runtimes in the PROFIBUS Subnet

When you have configured your PROFIBUS subnet using STEP 7, STEP 7 will
calculate the typical bus runtime to be expected. You can then display the bus
runtime of your configuration on the programming device (see STEP 7 User
Manual).
An overview of the bus runtime is provided in Figure 10-4. In this example, we
assume that each DP slave has an average of 4 bytes of data.

Bus runtime
7 ms
Transmission rate: 1.5 Mbps

6 ms

5 ms

4 ms

3 ms

2 ms

1 ms
Min. slave Transmission rate: 12 Mbps
interval
1 2 4 8 16 32 64 Number of DP slaves

Figure 10-4 Overview of the Bus Runtime on PROFIBUS-DP at 1.5 Mbps and 12 Mbps

If you run a PROFIBUS subnet with several masters, you must allow for the bus
runtime of each master (i.e. total bus runtime = bus runtime number of
masters).

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Extending the Cycle by Nesting Interrupts

Table 10-6 shows typical extensions of the cycle time through nesting of an
interrupt. The program runtime at the interrupt level must be added to these. If
several interrupts are nested, the corresponding times need to be added.

Table 10-6 Extending the Cycle by Nesting Interrupts

Interrupts 312 IFM 313 314 314 IFM 315 315-2 DP 316-2 DP 318-2
Process approx. approx. approx. approx. approx. approx. approx. approx.
interrupt 840 ms 700 ms 700 ms 730 ms 480 ms 590 ms 590 ms to 340ms
Diagnostic – approx. approx. approx. approx. approx. approx. approx.
interrupt 880 ms 880 ms 1000 ms 700 ms 860 ms 860 ms 450 ms
Time-of- – – approx. approx. approx. approx. approx. approx.
day 680 ms 700 ms 460 ms 560 ms 560 ms 350 ms
interrupt
Delay – – approx. approx. approx. approx. approx. approx.
interrupt 550 ms 560 ms 370 ms 450 ms 450 ms 260 ms
Watchdog – – approx. approx. approx. approx. approx. approx.
interrupt 360 ms 380 ms 280 ms 220 ms 220 ms 260 ms
Program- – approx. approx. approx. approx. approx. approx. approx.
ming/ 740 ms 740 ms 760 ms 560 ms 490 ms 490 ms 130/ 155/
access 285 ms
error/
program
execution
error

10.3 Calculation Examples for Cycle Time and Response Time

Component Parts of the Cycle Time

Remember: The cycle time consists of the following:
S Process image transfer time +
S Operating system processing time +
S User program processing time +
S Processing time of S7 timers

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Sample Configuration 1
You have configured an S7-300 with the following modules on one rack:
S 1 CPU 314
S 2 SM 321 DI 32 DC 24 V digital input modules (4 bytes each in the PI)
S 2 SM 322 DO 32 DC 24 V/0.5A digital output modules (4 bytes each in the PI)
According to the Instruction List, the user program has a runtime of 1.5 ms.
There is no communication.

Calculation
In this example, the cycle time is calculated from the following times:
S Process image transfer time
Process image of the inputs: 147 ms + 8 bytes 13.6 ms = ca. 0.26 ms
Process image of the outputs: 147 ms + 8 bytes 13.6 ms = ca. 0.26 ms
S Operating system runtime
Cyclic control: approx. 1 ms
S User program processing time:
approx. 1.5 ms CPU-specific factor 1.15 = approx. 1.8 ms
S Processing time of S7 timers
Assumption: 30 S7 timers are in operation.
For 30 S7 timers, the single update takes
30 8 ms = 240 ms.
Adding the process image transfer time, the operating system processing time
and the user program processing time gives us the time interval:
0.26 ms + 0.26 ms + 1 ms + 1.8 ms = 3.32 ms.
Since the S7 timers are called every 10 ms, a maximum of one call can be
made in this time interval, i.e. the cycle time can be increased through the S7
timers by a maximum of 240 ms.
The cycle time is calculated from the sum of the listed times:
Cycle time= 0.26 ms + 0.26 ms + 1 ms + 1.8 ms + 0.024 ms = 3.34 ms

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Parts of the Response Time

Remember: The response time is the sum of the following:
S 2 process image transfer time of the inputs +
S 2 process image transfer time of the outputs +
S 2 operating system processing time +
S 2 program processing time +
S Processing time of the S7 timers +
S Delay times of the inputs and outputs
Tip: Simple calculation: Calculated cycle time 2 + delay times.
For sample configuration 1 the following therefore applies: 3.34 ms 2+
delay timesI/O modules.

Sample Configuration 2
You have configured an S7-300 with the following modules on two racks:
S 1 CPU 314
S 4 SM 321 DI 32 DC 24 V digital input modules (4 bytes each in the PI)
S 3 SM 322 DO 16 DC 24 V/0.5A digital output modules (2 bytes each in the
process image)
S 2 SM 331 AI 8 12Bit analog input modules (not in the process image)
S 2 SM 332 AOI 4 12Bit analog output modules (not in the process image)

User program
According to the Instruction List, the user program has a runtime of 2 ms. By
taking into account the CPU-specific factor of 1.15, the resulting runtime is approx.
2.3 ms. The user program employs up to 56 S7 timers simultaneously. No activities
are required at the scan cycle checkpoint.

Calculation
In this example, the response time is calculated from the following times:
S Process image transfer time
Process image of the inputs: 147 ms + 16 bytes 13.6 ms = ca. 0.36 ms
Process image of the outputs: 147 ms + 6 bytes 13.6 ms = ca. 0.23 ms
S Operating system processing time
Cyclic control: approx. 1 ms
S User program processing time: 2.3 ms

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S 1st intermediate calculation The time base for calculating the processing time
of the S7 timers is the sum of all previously listed times:
2 0.36 ms (process image transfer time of inputs)
+ 2 0.23 ms (process image transfer time of outputs) +
2 1 ms (operating system processing time) +
2 2.3 ms (user program processing time) [7.8 ms.
S Processing time of S7 timers
A one-off update of 56 S7 timers takes 56 8 ms = 448 ms [ 0.45 ms.
Since the S7 timers are called every 10 ms, a maximum of one call can be
made in the cycle time, i.e. the cycle time can be increased through the S7
timers by a maximum of 0.45 ms.
S 2nd intermediate calculation: The response time excluding the delay times
of the inputs and outputs is calculated from the sum of:
8.0 ms (result of the first subtotal)
+ 0.45 ms (processing time of the S7 timers)
=8.45 ms.
S Delay times of the inputs and outputs
– The SM 321 DI 32 DC 24 V digital input module has an input delay of
4.8 ms per channel.
– The output delay of the SM 322; DO 16 DC 24 V/0.5A digital output group
can be ignored.
– The SM 331; AI 8 12Bit analog input module was parameterized for
interference frequency suppression of 50 Hz. This yields a conversion time
of 22 ms per channel. Since 8 channels are active, the cycle time for the
analog input module is 176 ms.
– The SM 332; AO 4 12Bit analog output module was parameterized for the
measurement range 0 ...10V. The conversion time is 0.8 ms per channel.
Since 4 channels are active, a cycle time of 3.2 ms is obtained. A settling
time of 0.1 ms for a resistive load must be added to this figure. This yields a
response time of 3.3 ms for an analog output.
S Response times with delay times for inputs and outputs:
S Case 1: An output channel of the digital output module is set when a digital
input signal is read in. This results in a response time of:
Response time = 4.8 ms + 8.45 ms = 13.25 ms.
S Case 2 An analog value is read in and an analog value is output. This results in
a response time of:
Response time = 176 ms + 8.45 ms + 3.3 ms = 187.75 ms.

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10.4 Interrupt Response Time

Interrupt Response Time – A Definition

The interrupt response time is the time that elapses between the first occurrence of
an interrupt signal and the calling of the first instruction in the interrupt OB.
The following rule generally applies: High-priority interrupts are executed first. This
means the interrupt response time is increased by the program processing time of
the higher-priority interrupt OBs and the interrupt OBs of equal priority that have
not yet been executed.

Calculation
The interrupt response time is calculated as follows:
Shortest interrupt response time =
Minimum interrupt response time of the CPU +
Minimum interrupt response time of the signal modules +
Bus runtime on the PROFIBUS-DP
Longest interrupt response time =
Maximum interrupt response time of the CPU +
Maximum interrupt response time of the signal modules +
2 bus runtime on the PROFIBUS-DP bus system

Process Interrupt Response Time of the CPUs

Table 10-7 lists the process interrupt response times of the CPUs (without
communication).

Table 10-7 Process Interrupt Response Times of the CPUs

CPU Min. Max.

312 IFM 0.6 ms 1.5 ms
313 0.5 ms 1.1 ms
314 0.5 ms 1.1 ms
314 IFM 0.5 ms 1.1 ms
315 0.3 ms 1.1 ms
315-2 DP 0.4 ms 1.1 ms
316-2 DP 0.4 ms 1.1 ms
318-2 0.23 ms 0.41 ms

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Diagnostic Interrupt Response Times of the CPUs

Table 10-8 lists the diagnostic interrupt response times of the CPUs (without
communication).

Table 10-8 Diagnostic Interrupt Response Times of the CPUs

CPU Min. Max.

312 IFM – –
313 0.6 ms 1.3 ms
314 0.6 ms 1.3 ms
314 IFM 0.7 ms 1.3 ms
315 0.5 ms 1.3 ms
315-2 DP 0.6 ms 1.3 ms
316-2 DP 0.6 ms 1.3 ms
318-2 0.32 ms 0.52 ms

Signal Modules
The process interrupt response time of the signal modules is composed of the
following components:
S Digital input modules
Process interrupt response time = internal interrupt preparation time + input
delay
You will find the times in the data sheet for the individual analog input module.
S Analog input modules
Process interrupt response time = internal interrupt preparation time +
conversion time
The internal interrupt preparation time for the analog input modules is negligible.
The conversion times can be found in the data sheet for the individual digital
input modules.
The diagnostic interrupt response time of the signal modules is the time that
elapses between the detection of a diagnostic event by the signal module and the
triggering of the diagnostics interrupt by the signal module. This time is negligible.

Process Interrupt Handling

Process interrupt handling begins when the process interrupt OB 40 is called.
Higher-priority interrupts cause the process interrupt handling routine to be
interrupted. Direct accesses to the I/O are made at the execution time of the
instruction. When the process interrupt handling routine has
finished, either cyclic program execution continues or further same-priority or
lower-priority interrupt OBs are called up and executed.

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10.5 Calculation Example for the Interrupt Response Time

Parts of the Interrupt Response Time

Remember: The process interrupt response time consists of the following:
S The process interrupt response time of the CPU and
S The process interrupt response time of the signal module.
Example: You have configured an S7-300 with a CPU 314 and four digital
modules. One digital input module is the SM 321; DI 16 DC 24V; with process
and diagnostic interrupt. You have only enabled the process interrupt when setting
the parameters for the CPU and the SM. You decided not to use time-controlled
processing, diagnostics or error handling. You configured an input delay of 0.5 ms
for the digital input module. No activities are necessary at the scan cycle
checkpoint. There is no communication via the MPI.

Calculation
The process interrupt response time in this example is calculated from the
following times:
S Process interrupt response time of the CPU 314: approx. 1.1 ms
S Process interrupt response time of the SM 321; DI 16 DC 24V:
– Internal interrupt preparation time: 0.25 ms
– Input delay 0.5 ms
The process interrupt response time is calculated from the sum of the listed times:
Process interrupt response time = 1.1 ms + 0.25 ms + 0.5 ms =
approx. 1.85 ms.
This process interrupt response time elapses from the time a signal is applied to
the digital input until the first instruction in OB 40.

10.6 Reproducibility of Delay and Watchdog Interrupts

Reproducibility – A Definition
Delay Interrupt:
The interval between the call-up of the first instruction in the OB and the
programmed time of the interrupt.
Watchdog Interrupt:
The fluctuation of the time interval between two successive call-ups, measured in
each case between the first instruction in the OB.

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10-16 EWA 4NEB 710 6084-02
 Cycle and Response Times of the S7-300

Reproducibility
Table 10-9 lists reproducibility of the delay and watchdog interrupts of the CPUs
(without communication).

Table 10-9 Reproducibility of the Delay and Watchdog Interrupts of the CPUs

CPU Reproducibility
Delay Interrupt Watchdog Interrupt
314 approx. –1/+0.4 ms approx. $0.2 ms
314 IFM approx. –1/+0.4 ms approx. $0.2 ms
315 approx. –1/+0.4 ms approx. $0.2 ms
315-2 DP approx. –1/+0.4 ms approx. $0.2 ms
316-2 DP approx. –1/+0.4 ms approx. $0.2 ms
318-2 approx. –0.8/+0.34 ms approx. $0.05 ms

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Cycle and Response Times of the S7-300

S7-300 Programmable Controller Hardware and Installation

10-18 EWA 4NEB 710 6084-02
CPU Functions Dependent on the CPU and
STEP 7 Version 11
In This Chapter
In this chapter we describe the functional differences between the various CPU
versions.
These differences are determined by the following factors:
S By the performance features of the CPUs, especially the CPU 318-2 in
comparison with other CPUs.
S By functionality of the CPUs described in this manual in comparison to previous
versions.

Section Contents Page

11.1 The Differences Between the CPU 318-2 and the CPU 312 IFM to 11-2
316-2 DP
11.2 The Differences Between the CPUs and Their Previous Versions 11-4

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EWA 4NEB 710 6084-02 11-1
CPU Functions Dependent on the CPU and STEP 7 Version

11.1 The Differences Between the CPU 318-2 and the

CPU 312 IFM to 316-2 DP

4 accumulators

CPU 318-2 CPUs 312 IFM to 316-2 DP

4 accumulators 2 accumulators

The following table shows you what to watch for if you want to use an STL user
program of a CPU 312 IFM to a CPU 316-2 DP for the CPU 318-2.

Instructions User Program from the CPU 312 IFM to 316-2 DP for the
CPU 318
Integer math instructions The CPU 318 transfers the contents of accumulators 3 and 4
(+D, –D, *D, /D, MOD) to accumulators 2 and 3 after these operations.
If accumulator 2 is evaluated in the (accepted) user program,
you now receive incorrect values with the CPU 318-2
because the value has been overwritten by the contents of
accumulator 3.

Configuration
The CPU 318-2 only accepts a project from a CPU 312 IFM to 316-2 DP if it has
been created for these CPUs with STEP 7 V 5.x.
You cannot use programs that contain configuration data for FMs (FM 353/354, for
example) or CPs (SDB 1xxx) for the CPU 318-2.
You must revise or recreate the relevant project.

Starting a Timer in the User Program

If you start a timer in the user program (with SI T, for example), there must be a
number in BCD format in the accumulator of the CPU 318-2.

Global Data Status

CPU 318-2 CPUs 312IFM to 316-2DP

You can specify the global data status from You can specify the global data status from
the memory marker/data area. the I/O area and the memory marker/data
area.

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11-2 EWA 4NEB 710 6084-02
 CPU Functions Dependent on the CPU and STEP 7 Version

MPI Addressing

CPU 318-2 CPUs 312 IFM to 316-2 DP

The CPU addresses the MPI nodes within its The CPUs address the MPI nodes within their
configuration (FM/CP) via the module start configuration via the MPI address.
address.
If FM/CP are in the central configuration of an If FM/CP are in the central configuration of an
S7-300 with their own MPI address, the CPU forms S7-300 with their own MPI address, the FM/CP and
its own communication bus (via the backplane bus) CPU MPI nodes are in the same CPU subnet.
with the FM/CP, separate from the other subnets.
The MPI address of the FM/CP is no longer
relevant for the nodes of other subnets.
Communication to the FM/CP takes place via the
CPU MPI address.

You have an S7-300 configuration with FM/CP addressed via the MPI and want to
replace the CPU 312 IFM ... 316 with a CPU 318-2. Figure 11-1 on page 11-3
shows an example.

S7-300 PG
The CPU 316 is replaced
with a CPU 318-2

S7-300 S7-300 S7-300 with CPU 316

OP 25 OP 25 FM FM FM
RS 485
repeater

PG

Figure 11-1 Sample Configuration

S7-300 Programmable Controller Hardware and Installation

EWA 4NEB 710 6084-02 11-3
CPU Functions Dependent on the CPU and STEP 7 Version

After the CPUs have been swapped, you must proceed as follows (based on the
above example):
S Replace the CPU 316 with the CPU 318-2 in the STEP 7 project.
S Reconfigure the operator panel/programming device. This means reallocating
the programmable controller and reassigning the destination address (= MPI
address of the CPU 318-2 and the slot of the relevant FM)
S Reconfigure the configuration data for the FM/CP to be loaded onto the CPU.
This is necessary to ensure that the FM/CP in this configuration remain accessible
to the operator panel/programming device.

11.2 The Differences Between the CPUs 312 IFM to 316 and
Their Previous Versions

Memory Cards and Backing Up Firmware on Memory Card

As of the following CPUs:

CPU Order No. As of Version

Firmware Hardware
CPU 313 6ES7 313-1AD03-0AB0 1.0.0 01
CPU 314 6ES7 314-1AE04-0AB0 1.0.0 01
CPU 315 6ES7 315-1AF03-0AB0 1.0.0 01
CPU 315-2 6ES7 315-2AF03-0AB0 1.0.0 01
CPU 316-2 6ES7 316-1AG00-0AB0 1.0.0 01

You can:
S Insert the 16 bit-wide memory cards:
256 KB FEPROM 6ES7 951-1KH00-0AA0
1 MB FEPROM 6ES7 951-1KK00-0AA0
2 MB FEPROM 6ES7 951-1KL00-0AA0
4 MB FEPROM 6ES7 951-1KM00-0AA0
S Back up the CPU firmware on memory card

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11-4 EWA 4NEB 710 6084-02
 CPU Functions Dependent on the CPU and STEP 7 Version

MPI Addressing

You Have a CPU as of Order Number and You Have a CPU as of Order Number and
Version: Version:
6ES7 312-5AC01-0AB0, version 01
6ES7 313-1AD02-0AB0, version 01
6ES7 314-1AE03-0AB0, version 01
6ES7 314-5AE02-0AB0, version 01
6ES7 315-1AF02-0AB0, version 01
6ES7 315-2AF02-0AB0, version 01
6ES7 316-1AG00-0AB0, version 01 –
and STEP 7 as of V4.02 and STEP 7 < V4.02
The CPU accepts the MPI addresses configured by The CPU automatically establishes the MPI
you in STEP 7 for the relevant CP/FM in an S7-300 address of the CP/FM in an S7-300 on the
pattern MPI addr. CPU;MPI addr.+1 MPI addr.+2
or etc.
automatically determines the MPI address of the
CP/FM in an S7-300 on the pattern
MPI addr. CPU; MPI addr.+1 MPI addr.+2 etc.

CPU CP CP CPU CP CP

MPI MPI MPI MPI MPI MPI

addr. addr. addr. addr. addr.+1 addr.+2
“x” “z”

MPI with 19.2 kbps

With STEP 7 as of V4.02 you can set a transmission rate for the MPI of 19.2 kbps.
The CPUs support 19.2 kbps as of the following order numbers:
6ES7 312-5AC01-0AB0, version 01
6ES7 313-1AD02-0AB0, version 01
6ES7 314-1AE03-0AB0, version 01
6ES7 314-5AE02-0AB0, version 01
6ES7 315-1AF02-0AB0, version 01
6ES7 315-2AF02-0AB0, version 01

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CPU Functions Dependent on the CPU and STEP 7 Version

CPU 315-2 DP

CPU 315-2 DP v 6ES7 315-2AF03-0AB0 As of 6ES7

and STEP 7 < V 5.x 315-2AF03-0AB0 and
STEP 7 as of V 5.x
Direct communication No Yes
Equidistance No Yes
Activation/deactivation of DP No Yes
slaves
Routing No Yes
Reading out of slave See Figure 9-1 on page 9-6 See Figure 9-2 on page 9-7
diagnosis

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11-6 EWA 4NEB 710 6084-02
Tips and Tricks 12
Behavior of the Hardware Clock When the Power Is Off
The following table shows the behavior of the clock when the power of the CPU is
off, depending on the backup:

Backup Clock Behavior

With backup The clock continues to operate in power off mode.
battery
With accumulator The clock continues to operate in power off mode for the backup time
of the accumulator. In POWER ON mode, the accumulator is
recharged.
In the event of backup failure, no error message is generated. At
POWER ON, the clock continues to operate using the clock time at
which power off took place.
None At POWER ON, the clock continues to operate using the clock time at
which power off took place. Since the CPU is not backed up, the
clock does not continue at power off.

Tip on the “Monitoring Time for ...” Parameter in STEP 7

If you are not sure of the required times in the S7-300, parameterize the highest
values for the parameters of “Monitoring Time for
S Transfer of parameters to modules”
S Ready message from modules”

CPU 31x-2 DP is DP Master CPU 318-2 is DP Master

You can also set power-up time monitoring You can set power-up time monitoring for
for the DP slaves with the “Transfer of the DP slaves with both of the above
parameters to modules” parameter. parameters.
This means that the DP slaves must be powered up and parameterized by the CPU (as
DP master) in the set time.

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EWA 4NEB 710 6084-02 12-1
Tips and Tricks

FM in a Distributed Configuration in an ET 200M (CPU 31x-2 is DP Master)

If you use the FM 353/354/355 in an ET 200M with the IM 153-2 and remove and
insert the FM in the ET 200M, then you must subsequently turn the power supply
of the ET 200M off and on.
The reason for this is that the CPU does not write the new parameters into the FM
until power of the ET 200M is switched on.

The Retentive Feature of Data Blocks

You must note the following for the retentivity of data areas in data blocks:

With Backup Battery Without Backup Battery

CPU program on Memory Memory card not plugged
Card or in the integral in
EPROM of the
312 IFM/314 IFM
All DBs are retentive, All DBs (retentive, The DBs parameterized as
whatever parameterization non-retentive) are transferred retentive retain their contents
has been performed. The from the memory card or from
DBs generated using SFC 22 the integral EPROM into RAM
“CREAT_DB” are also on restart.
retentive.
t ti
S The DBs or data areas generated using SFC 22
“CREAT_DB” are not retentive.
S After a power failure, the retentive data areas are retained.
Note:These data areas are stored in the CPU, not on the
memory card. The non-retentive data areas contain
whatever has been programmed on EPROM.

Watchdog Interrupt: Periodicity > 5 ms

For the watchdog interrupt, you should set periodicity > 5 ms. In the case of lower
values, the danger of frequent occurrence of watchdog interrupt errors increases
depending on, for example, the
S Program execution time of an OB 35 program
S Frequency and program execution time of higher priority classes
S Programming device functions.

Process Interrupt of I/O Modules

In the case of process interrupt-critical applications, insert the process
interrupt-triggering modules as near as possible to the CPU.
The reason for this is that an interrupt is read most quickly by rack 0, slot 4 and
then in ascending order of the slots.

S7-300 Programmable Controller Hardware and Installation

12-2 EWA 4NEB 710 6084-02
Standards, Certificates and Approvals A
Introduction
This Appendix provides the following information on the S7-300 modules and
components:
S The most important standards and criteria met by S7-300 and
S Approvals that have been granted for the S7-300.

IEC 1131
The S7-300 programmable controller meets the requirements and criteria to
standard IEC 1131, Part 2.

CE Symbol
Our products meet the requirements and protection guidelines of the following EC
Directives and comply with the harmonized European standards (EN) issued in the
Official Journal of the European Communities with regard to programmable
controllers:
S 89/336/EEC “Electromagnetic Compatibility” (EMC Directive)
S 73/23/EEC “Electrical Equipment Designed for Use between Certain Voltage
Limits” (Low-Voltage Directive)
The declarations of conformity are held at the address below, where they can be
obtained if and when required by the respective authorities:
Siemens Aktiengesellschaft
Automation Group
A&D AS E 4
P.O. Box 1963
D-92209 Amberg
Federal Republic of Germany

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EWA 4NEB 710 6084-02 A-1
Standards, Certificates and Approvals

EMC Guidelines
SIMATIC products have been designed for use in the industrial area.
They can also be used in residential environments
(residential, commercial and light industry) with individual approval. You must
acquire the individual approval from the respective national authority or testing
body. In Germany individual approval is granted by the Bundesamt für Post und
Telekommunikation and its associated offices.

Area of Application Requirements:

Emitted Immunity
interference
Industry EN 50081-2 : 1993 EN 50082-2 : 1995
Domestic Individual approval EN 50082-1 : 1992

UL Recognition
UL Recognition Mark
Underwriters Laboratories (UL) to
UL standard 508, Report 116536

CSA Certification
CSA Certification Mark
Canadian Standard Association (CSA) to
Standard C22.2 No. 142, File No. LR 48323

FM Approval
FM Approval to Factory Mutual Approval Standard Class Number 3611, Class I,
Division 2, Group A, B, C, D.

Warning
! Personal injury or property damage can result.
In hazardous areas, personal injury or property damage can result if you withdraw
any connectors while an S7-300 is in operation.
Always isolate the S7-300 in hazardous areas before withdrawing connectors.

S7-300 Programmable Controller Hardware and Installation

A-2 EWA 4NEB 710 6084-02
 Standards, Certificates and Approvals

PNO

CPU Certificate No. As ...

DP Master DP Slave
315-2 DP Z00349 Z00258
316-2 DP
318-2

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Standards, Certificates and Approvals

S7-300 Programmable Controller Hardware and Installation

A-4 EWA 4NEB 710 6084-02
OBs B
In This Appendix
In this appendix you will find an overview of which organization blocks can be
executed in which CPU.
The operating system of the CPU is designed for event-controlled user program
processing. The following table shows which organization blocks (OBs) the
operating system invokes in response to which events.
You can find a detailed description of the OBs in the STEP 7 online help system.

OBs for ... Possible Start Events Excep-

tions
Cycle OB 1 Cycle 1101H OB1 starting event –
1103H Running OB1 start event (conclusion
of the free cycle)
OB 90 Background OB OB 90 initiated by... Only
1191H Restart 318-2
1192H Deletion of a block
1193H Transfer of a block in RUN mode
1195H OB 90 start event
Start-up OB 100 Start-up at STOP-RUN 1381H Manual restart requests –
transition 1382H Automatic restart requests
OB 102 Cold start 1385H Manual cold-start request Only
1386H Automatic cold-start request 318-2

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OBs

OBs for ... Possible Start Events Excep-

tions
Inter- OB 10 Time-of-day interrupt 1111H Time-of-day interrupt event Not
rupts 312 IFM
OB 11 1112H Only:
318-2
OB 20 Delay Interrupt 1121H Delay interrupt event Not
312 IFM
OB 21 1122H Only:
318-2
OB 32 Watchdog interrupt 1133H Watchdog interrupt event Only:
318-2
OB 35 1136H Not
312 IFM
OB 40 Process interrupt 1141H Process interrupt –
OB 41 1141H Only:
318-2
OB 82 Diagnostic interrupt 3842H Module o. k. Not
3942H Module fault 312 IFM

Error re- OB 80 Timing error 3501H Cycle time violation Not

sponses 3502H OB or FB request error 312 IFM
Time-of-day interrupt elapsed due to
3505H time jump
Multiple OB request error caused start
3507H info buffer overflow
OB 81 Power supply error 3822H BAF: Backup voltage returns to CPU Not
3922H BAF: No backup voltage in CPU 312 IFM

OB 85 Program execution 35A1H No OB or FB Not

error 35A3H Error during access of a block by the 312 IFM
operating system
39B1H I/O access error during process image
updating of the inputs
39B2H I/O access error during transfer of the
process image to the output modules
OB 86 Station failure in ??? – Only CPU
PROFIBUS-DP subnet 31x-2 DP
OB 87 Communication error 35E1H Incorrect frame identifier in GD Not
35E2H GD packet status cannot be entered 312 IFM
in DB
35E6H GD whole status cannot be entered in
DB

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 OBs

OBs for ... Possible Start Events Excep-

tions
Error OB 121 Programming error 2521H BCD conversion error Not
respons 2522H Range length error during reading 312 IFM
es
2523H Range length error during writing
2524H Range error during reading
2525H Range error during writing
2526H Timer number error
2527H Counter number error
2528H Alignment error during reading
2529H Alignment error during writing
2530H Write error during access to DB
2531H Write error during access to DI
2532H Block number error opening a DB
2533H Block number error opening a DI
2534H Block number error at FC call
2535H Block number error at FB call
253AH DB not loaded
253CH FC not loaded
253EH FB not loaded
OB 122 I/O direct access error 2944H I/O access error at nth read access Not
(n > 1) 312 IFM
2945H I/O access error at nth write access
(n > 1)

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EWA 4NEB 710 6084-02 B-3
OBs

OB 121 and 122 (Special Features in the CPUs 313 to 316-2 DP)
Please note the following special feature of the S7-300 (except in the CPU 312
IFM/318-2) with OBs 121 and 122:

Note
Please note the following special features with OBs 121 and 122:
The CPU enters in the OBs’ local data value “0” in the following temporary
variables of the variable declaration table:
S Byte no. 3: OB121_BLK_TYPE or OB122_BLK_TYPE
(type of the block in which the error has occurred)
S Byte nos. 8 and 9: OB121_BLK_NUM or OB122_BLK_NUM
(number of the block in which the error has occurred)
S Byte nos. 10 and 11: OB121_PRG_ADDR or OB122_PRG_ADDR
(address of the block in which the error has occurred)

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Execution Times of the SFCs/SFBs and
IEC Functions C
Introduction
The CPUs provide you with various system functions, for example, for program
handling and diagnostics. You invoke these system functions in your user program
with the number of the SFC or SFB.
IEC functions, which you can call from your user program, are integrated in
STEP 7.
You can find a detailed description of all SFCs, SFBs and IEC functions in the
STEP 7 online help system.

Contents
This Appendix shows the execution times for the SFCs/SFBs and for each IEC
function. The execution times depend on the CPU used.

Appendix Contents Page

C.1 SFCs and SFBs C-2
C.2 IEC Timers and IEC Counters C-8
C.3 IEC Functions C-8

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Execution Times of the SFCs/SFBs and IEC Functions

C.1 SFCs and SFBs

SFC Name Description Execution Time in ms

No.
312 313 314 314 315 315- 316- 318-
IFM IFM 2 DP 2 DP 2
0 SET_CLK Sets the clock time 290 240 240 137
1 READ_CLK Reads the clock time 205 190 185 28
2 SET_RTM Sets the operating hours – 65 60 21
counter
3 CTRL_RTM Starts/stops the operating – 55 55 21
hours counter
4 READ_RTM Reads the operating – 90 80 24
hours counter
5 GADR_LGC Reads the free address – – – 170 – 38
of the channel x of the si-
gnal module on module
slot y.
6 RD_SINFO Reads the start informa- 180 150 120 34
tion of the current OB.
7 DP_PRAL Triggers a process inter- – – – 100 – 29
rupt from the user pro-
gram of the CPU as DP
slave through to DP ma-
ster.
11 SYC_FR Synchronizes outputs on – – – 124
the PROFIBUS-DP bus +2.1*
12 D_ACT_DP Activates or deactivates – – – –
DP slaves
13 DPNRM_DG Reads the DP-compliant – – – 180 – 97
slave diagnosis
14 DPRD_DAT Reads consistent data – – – 180 – 47
from DP standard slaves
with a DP standard identi-
fier > 4 bytes
15 DPWR_DAT Writes consistent data – – – 180 – 47
from DP standard slaves
with a DP standard identi-
fier > 4 bytes
17 ALARM_SQ Generates a message – – 310 250 74
and sends it to display
devices. The message
can be acknowledged by
the display device.

* ms per request

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 Execution Times of the SFCs/SFBs and IEC Functions

SFC Name Description Execution Time in ms

No.
312 313 314 314 315 315- 316- 318-
IFM IFM 2 DP 2 DP 2
18 ALARM_S Generates a message – – 310 250 74
and sends it to a display
device. The message is
always acknowledged.
19 ALARM_SC Determines the acknow- – – 130 110 56
ledgment state, the last
ALARM_SQ received
message and the state of
the message-initiating si-
gnal at the last call-up of
the SFC 17 “ALARM_SQ”
or the SFC 18
“ALARM_S”.
20 BLKMOV Copies variables of ran- 105 90+2* 75+2* 43 +
dom type +2* 0.17*
21 FILL Sets array default varia- 105 90+3.2* 75+2* 45 +
bles +3.2 0.12*
*
22 CREAT_DB Generates a data block of 126 110+3.5** 100+3.5** 27
specified length in a spe- +3.5
cified area **
23 DEL_DB Deletes a data block – – – 22
24 TEST_DB Tests a data block – 134 98 110 108 126 134 30
25 COMPRESS Compresses a user pro- – – – 22
gram
26 UPDAT_PI Updates process image – – – 32 +
of the inputs 4.2***
27 UPDAT_PO Updates process image – – – 30 +
of the outputs 3.5***
28 SET_TINT Sets the times of a time- – 190 190 51
of-day interrupt
29 CAN_TINT Cancels the times of a – 50 50 22
time-of-day interrupt
30 ACT_TINT Activates a time-of-day – 50 50 19
interrupt
31 QRY_TINT Queries the status of a – 85 75 30
time-of-day interrupt
32 SRT_DINT Starts a delay interrupt – 85 80 45
33 CAN_DINT Cancels a delay interrupt – 50 50 29

* ms per byte
** ms per DB in stated area
*** ms per module

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Execution Times of the SFCs/SFBs and IEC Functions

SFC Name Description Execution Time in ms

No.
312 313 314 314 315 315- 316- 318-
IFM IFM 2 DP 2 DP 2
34 QRY_DINT Queries started delay in- – 80 80 32
terrupts
36 MSK_FLT Masks sync faults 185 150 110 21
37 DMSK_FLT Enables sync faults 205 160 130 23
38 READ_ERR Reads and erases pro- 205 160 115 23
gramming and access er-
rors that have occurred or
have been disabled
39 DIS_IRT Disables the handling of 300 215 200 42
new interrupts
40 EN_IRT Enables the handling of 490 305 280 42
new interrupt events
41 DIS_AIRT Delays the handling of in- 55 35 35 18
terrupts
42 EN_AIRT Enables the handling of 55 35 35 18
interrupts
43 RE_TRIGR Re-triggers the scan time 40 30 30 98
monitor
44 REPL_VAL Copies a substitute value – 45 45 20
into accumulator 1 of the
level causing the error
46 STP Forces the CPU into the – – – –
STOP mode
47 WAIT Implements waiting times 200 200 200 5
48 SNC_RTCB Sychronizes slave clocks – – – 17
49 LGC_GADR Converts a free address 140 140 140 38
to the slot and rack for a
module
50 RD_LGADR Reads all the declared 190 190 190 77
free addresses for a mo-
dule
51 RDSYSST Reads out the information 350 280+10*** 270+10*** 150
from the system state list +10
SFC 51 is not interrupti- ***
ble through interrupts.
52 WR_ Writes specific diagnostic 140 110 110 82
USMSG information in the diagno-
stic buffer
54 RD_DPARM Reads predefined dyna- 1300 1300 1300 116
mic parameters from a
module
55 WR_PARM Writes dynamic parame- 1000 1600 1600 118
ters to a module

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 Execution Times of the SFCs/SFBs and IEC Functions

SFC Name Description Execution Time in ms

No.
312 313 314 314 315 315- 316- 318-
IFM IFM 2 DP 2 DP 2
56 WR_DPARM Writes predefined dyna- 1600 1750 1750 101
mic parameters to a mo-
dule
57 PARM_MOD Assigns a module’s para- 1920 2200 2200 87
meters
58 WR_REC Writes a module-specific 1400 1400+32 1400+32 720+
data record +32 15*
*
59 RD_REC Reads a module-specific 500 500 500 810+
data record 15*
60 GD_SND Programmed transmis- – – – 200+
sion of a GD packet 9.4*
61 GD_RCV Programmed acceptance – – – 56
of a GD packet
64 TIME_TICK Reads out the system 56 45 45 18
time
You can read out the sy-
stem time with an
accuracy in the ms range.
65 X_SEND Sends data to a commu- 510 420 310 300
nication partner external
to your own S7 station.
66 X_RCV Receives data from a 190 160 120 220
communication partner
external to your own S7
station.
67 X_GET Reads data from a com- 310 250 190 130+
munication partner exter- 8.3*
nal to your own S7 sta-
tion. The communication
partner has no associa-
ted SFC.
68 X_PUT Writes data to a commu- 310 250 190 130+
nication partner outside 8.3*
your own S7 station. The
communication partner
has no associated SFC.
69 X_ABORT Aborts an existing con- 150 120 100 138
nection to a communica-
tion partner external to
your own S7 station.

* ms per byte
*** ms per byte of a data record

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Execution Times of the SFCs/SFBs and IEC Functions

SFC Name Description Execution Time in ms

No.
312 313 314 314 315 315- 316- 318-
IFM IFM 2 DP 2 DP 2
72 I_GET Reads data from a com- 300 250 190 140+
munication partner within 9.8*
your own S7 station.
73 I_PUT Writes data to a commu- 300 250 190 150+
nication partner within 10.6*
your own S7 station.
74 I_ABORT Aborts an existing con- 150 120 100 138
nection to a communica-
tion partner within your
own S7 station.
79 SET Sets a bit field in the I/O – – – 56
area
80 RSET Deletes a bit field in the – – – 56
I/O area
81 UBLKMOV Consistent data transmis- – – – 42 +
sion with PUT/GET 0.17*

* ms per byte

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 Execution Times of the SFCs/SFBs and IEC Functions

Functions for the integrated inputs/outputs (only 312 IFM and 314 IFM)
The CPUs 312 IFM and 314 IFM provide the following system functions for the
special channels of the onboard I/O:
The SFBs 29, 30, 38 and 39 are described in the Integrated Functions Manual.
The SFBs 41, 42 and 43 are described in the STEP 7 System and Standard
Functions Reference Manual.

SFB- Name Description Execution Time in ms

No.
312 IFM 314 IFM
29 HS_COUNT Counts pulses at the special inputs of the inte- approx. 300 approx. 300
grated inputs/outputs
30 FREQ_MES Measures frequency via a special input of the approx. 220 approx. 220
integrated inputs/outputs
38 HSC_A_B Counts pulses with 2 counters A and B at the – approx. 230
special inputs of the integrated inputs/outputs
39 POS Controlled positioning of axes in cooperation – approx. 150
with the user program
41 CONT_C Continuous control – approx.
3300
42 CONT_S Step control – approx.
2800
43 PULSEGEN Pulse generation – approx.
1500

Implementation of a Sequence Processor

SFB Name Description Execution Time in ms

No.
312 313 314 314 315 315- 316- 318-
IFM IFM 2 DP 2 DP 2
32 DRUM Implements a sequence 480 360 300 33
processor with a maxi-
mum of 16 sequences.

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Execution Times of the SFCs/SFBs and IEC Functions

C.2 IEC Timers and IEC Counters

SFB Name Description Execution Time in ms

No.
312 313 314 314 315 315- 316- 318-
IFM IFM 2 DP 2 DP 2
IEC Timers
3 TP Generates a pulse of du- 140 100 90 23
ration PT.
4 TON Delays a leading edge of 140 100 90 23
duration PT.
5 TOF Delays of falling edge of 145 100 90 18
duration PT.
IEC Counters
0 CTU Counts up. The counter is 120 80 70 16
increased by 1 for each
leading edge.
1 CTD Counts down. The coun- 120 80 70 16
ter is decreased by 1 for
each leading edge.
2 CTUD Counts up and count 150 95 80 19
down.

C.3 IEC Functions

You can use the following functions in STEP 7:

FC Name Description Execution Time in ms

No.
DATE_AND_TIME
3 D_TOD_DT Concatenates the data formats DATE and approx. 680
TIME_OF_DAY (TOD) and convert to data
format DATE_AND_TIME.
6 DT_DATE Extracts the DATE data format from the approx. 230
DATE_AND_TIME data format.
7 DT_DAY Extracts the day of the week from the data approx. 230
format DATE_AND_TIME.
8 DT_TOD Extracts the TIME_OF_DAY data format approx. 200
from the DATE_AND_TIME data format.

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 Execution Times of the SFCs/SFBs and IEC Functions

FC Name Description Execution Time in ms

No.
Time Formats
33 S5TI_TIM Converts S5 TIME data format to TIME data approx. 80
format
40 TIM_S5TI Converts TIME data format to S5 TIME data approx. 160
format
Duration
1 AD_DT_TM Adds a duration in the TIME format to a time 750
in the DT format. The result is a new time in
the DT format.
35 SB_DT_TM Subtracts a duration in the TIME format from 750
a time in the DT format. The result is a new
time in the DT format.
34 SB_DT_DT Subtracts two times in the DT format. The 700
result is a duration in the TIME format.
Compare DATE_AND_TIME
9 EQ_DT Compares the contents of two variables in 190
the DATE_AND_TIME format for equal to.
12 GE_DT Compares the contents of two variables in 190
the DATE_AND_TIME format for greater
than or equal to.
14 GT_DT Compares the contents of two variables in 190
the DATE_AND_TIME format for greater
than.
18 LE_DT Compares the contents of two variables in 190
the DATE_AND_TIME format for less than or
equal to.
23 LT_DT Compares the contents of two variables in 190
the DATE_AND_TIME format for less than.
28 NE_DT Compares the contents of two variables in 190
the DATE_AND_TIME format for not equal
to.
Compare STRING
10 EQ_STRNG Compares the contents of two variables in 150+ (n 32)
the STRING format for equal to.
13 GE_STRNG Compares the contents of two variables in 150+ (n 32)
the STRING format for greater than or equal
to.
15 GT_STRNG Compares the contents of two variables in 140+ (n 38)
the STRING format for greater than.
19 LE_STRNG Compares the contents of two variables in 150+ (n 32)
the STRING format for less than or equal to.
L, P = block parameters (if 1 + P = 0, then the execution time L + P = 254 ms)
n = number of characters
k = number of characters in parameter IN1

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Execution Times of the SFCs/SFBs and IEC Functions

FC Name Description Execution Time in ms

No.
24 LT_STRNG Compares the contents of two variables in 140+ (n 38)
the STRING format for less than.
29 NE_STRNG Compares the contents of two variables in 150+ (n 32)
the STRING format for not equal to.
STRING Variable Processing
21 LEN Reads the length of a STRING 90
variable.
20 LEFT Reads the first L characters of a STRING 150+ (L 26)
variable.
32 RIGHT Reads the last L characters of a STRING 150+ (L 26)
variable.
26 MID Reads the middle L characters of a STRING 150+ (L 26)
variable (starting at the defined character).
2 CONCAT Concatenates two STRING variables in one 180+ (n 28)
STRING variable.
17 INSERT Inserts a STRING variable into another 250+ (n 26)
STRING variable at a defined point.
4 DELETE Deletes L characters of a STRING variable. 300+ ((L + P) 27)

31 REPLACE Replaces L characters of a STRING variable 300+ ((L + P) 27)

with a second STRING variable.
11 FIND Finds the position of the second STRING k 50
variable in the first STRING variable.
Format Conversions with STRING
16 I_STRNG Converts a variable from INTEGER format to 1110
STRING format.
5 DI_STRNG Converts a variable from INTEGER (32-bit) 1500
format to STRING format.
30 R_STRNG Converts a variable from REAL format to 1720
STRING format.
38 STRNG_I Converts a variable from STRING format to 500
INTEGER format.
37 STRNG_DI Converts a variable from STRING format to 840
INTEGER (32-bit) format.
39 STRNG_R Converts a variable from STRING format to 200
REAL format.
Number Processing
22 LIMIT Limits a number to a defined limit 450
value.
25 MAX Selects the largest of three numeric varia- 430
bles.
L, P = block parameters (if 1 + P = 0, then the execution time L + P = 254 ms)
n = number of characters
k = number of characters in parameter IN1

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 Execution Times of the SFCs/SFBs and IEC Functions

FC Name Description Execution Time in ms

No.
27 MIN Selects the smallest of three numeric varia- 430
bles.
36 SEL Selects one of two variables. 320
L, P = block parameters (if 1 + P = 0, then the execution time L + P = 254 ms)
n = number of characters
k = number of characters in parameter IN1

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Execution Times of the SFCs/SFBs and IEC Functions

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System Status List in the CPUs D
Introduction
The CPU is able to provide you, the S7-300 user, with certain information. The
CPU stores this information in the “System status list”.
In this appendix you will find the sublists of the system state list made available by
the CPUs.

Reading the System State List

You can use SFC 51 “RDSYSST” to read the entries in the system status list from
the user program (see the STEP 7 online help system).

Listing the Sublists

Table C-1 below shows the individual sublists of the system status list with the
entries relevant for the individual CPUs.

Table D-1 Sublists of the System Status List of the CPUs

SZL_ID Sublist Index Record Contents Remarks

(= ID of the in- (Sublist Excerpt)
dividual re-
cords of the
sublist)
CPU identification CPU type and version –
0111H One record of the sublist 0001H number

CPU features –
0012H All records of the sublist
0112H Only those records of a group 0000H STEP 7 processing
of features 0100H Time system in the CPU
0300H STEP 7 operation set
0F12H Header information only

0013H User memory areas – Work memory –

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System Status List in the CPUs

Table D-1 Sublists of the System Status List of the CPUs, continued

SZL_ID Sublist Index Record Contents Remarks

(= ID of the in- (Sublist Excerpt)
dividual re-
cords of the
sublist)
0014H Operating system areas – Process image of the inputs –
(number in bytes)
Process image of the
outputs (number in bytes)
Number of memory markers
Number of timers
Number of counters
Size of the I/O address area
Entire local data area of the
CPU (in bytes)
Block types –
0015H All records of the sublist – OBs (number and size)
DBs (number and size)
SDBs (number and size)
FCs (number and size)
FBs (number and size)
State of module LEDs – –
0019H Status of each LED
0F19H Header information only
0132H Communications status 0001H Number and type of –
information on the connections
communications type 0005H Diagnostics status data
specified
0008H Time system, correction
factor, operating hours
counter, date/time of day
Interrupt status; – –
0222H Record for the specified OB number
interrupt

0232H CPU Protection Level 0004H CPU protection level and –

position of the key switch
0692H Status information of _ OK status of individual racks –
module rack
for all racks of an S7-300

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 System Status List in the CPUs

Table D-1 Sublists of the System Status List of the CPUs, continued

SZL_ID Sublist Index Record Contents Remarks

(= ID of the in- (Sublist Excerpt)
dividual re-
cords of the
sublist)
0D91H Module status information Features/parameters of the –
module plugged in
of all modules in the specified 0000H Rack 0
rack (all CPUs) Rack 1
0001H
0002H Rack 2
0003H Rack 3

Diagnostic buffer – Event information –

00A0H All entered event information The information in each case
01A0H The x latest information depends on the event
entries
Module diagnostics
00B1H Data record 0 of the module Module starting Module-dependent
diagnostics information address diagnostics information
00B2H Complete module-dependent Module rack
record of the module and slot number
diagnostics information
00B3H Complete module-dependent Module starting
record of the module address
diagnostics information

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System Status List in the CPUs

PROFIBUS-DP Sublists
Below you will find a list of the sublists that the CPU 315-2 DP can evaluate in its
role as DP master or DP slave in addition to those listed in Table D-2.

Table D-2 Sublists of the System Status List of the CPU 315-2 DP as DP Master

SZL_ID Sublist Index Record Contents Remarks

(= ID of the in- (Sublist Excerpt)
dividual re-
cords of the
sublist)
Module status information in
the CPU
0A91H Status information of all DP not 318-2
subsystems and DP masters
0C91H Module status information of a Module starting Features/parameters of the
module address module plugged in
Module status information –
0D91H In the station named xxyyH All modules of station yy in
(for CPU 315-2 DP) the DP subnet xx
As DP slave: Status data for
transfer memory areas
Status information of –
module rack or stations in
DP network
0092H Target status of racks in 0000H Information on the state of
central configuration or of the mounting rack in the
stations in a subnet central configuration
0292H Actual status of racks in Subnet ID Information of status of
central configuration or of stations in subnet
stations in a subnet
0692H OK status of expansion racks
in central configuration or of
stations in a subnet
00B4H Module diagnostics –
All standard diagnostic data of Module start Module-dependent
a station (only with DP master) address diagnostic information
(Diagnostic
address)

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D-4 EWA 4NEB 710 6084-02
Dimensioned Drawings E
Introduction
In this appendix you will find dimensioned drawings of the CPUs for the S7-300.
You need the specifications in these drawings in order to dimension the S7-300
configuration. The dimensioned drawings of the other S7-300 modules and
components are contained in the Module Specifications Reference Manual.

CPU 312 IFM

Figure E-1 shows the dimensioned drawing of the CPU 312 IFM.

195 with front door open

130

80 120

43 23 9 25
125

130

Figure E-1 Dimensioned Drawing of the CPU 312 IFM

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Dimensioned Drawings

CPU 313/314/315/315-2 DP/316-2 DP

Figure E-2 shows the dimensioned drawing of the CPU 313/314/315/315-2
DP/316-2 DP. The dimensions are the same for all the CPUs listed. Their
appearance can differ (see Chapter 8). For example, the CPU 315-2 DP has two
LED strips.

180
120
80 130
125

Figure E-2 Dimensioned Drawing of the CPU 313/314/315/315-2 DP/316-2 DP

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E-2 EWA 4NEB 710 6084-02
 Dimensioned Drawings

CPU 318-2
Figure E-3 shows the dimensioned drawing of the CPU 318-2, front view. The side
view is illustrated in Figure E-2

160

125
Figure E-3 Dimensioned Drawing of the CPU 318-2

CPU 314 IFM, Front View

Figure E-4 shows the dimensioned drawing of the CPU 314 IFM, front view. The
side view is shown in Figure E-5.

160
125

Figure E-4 Dimensioned Drawing of the CPU 314 IFM, Front View

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EWA 4NEB 710 6084-02 E-3
Dimensioned Drawings

CPU 314 IFM, Side View

Figure E-5 shows the dimensioned drawing of the CPU 314 IFM, side view.

180

130
120

Figure E-5 Dimensioned Drawing of the CPU 314 IFM, Side View

S7-300 Programmable Controller Hardware and Installation

E-4 EWA 4NEB 710 6084-02
Guidelines for Handling Electrostatic
Sensitive Devices (ESD) F
Introduction
In this appendix, we explain
S what is meant by “electrostatic sensitive devices”
S the precautions you must observe when handling and working with electrostatic
sensitive devices.

Contents
This chapter contains the following sections on electrostatic sensitive devices:

Section Contents Page

F.1 What is ESD? F-2
F.2 Electrostatic Charging of Persons F-3
F.3 General Protective Measures against Electrostatic Discharge F-4
Damage

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Guidelines for Handling Electrostatic Sensitive Devices (ESD)

F.1 What is ESD?

Definition
All electronic modules are equipped with large-scale integrated ICs or components.
Due to their design, these electronic elements are very sensitive to overvoltages
and thus to any electrostatic discharge.
These electrostatic sensitive devices have the internationally recognized
shortformESD.
Electrostatic sensitive devices are labeled with the following symbol:

Caution
! Electrostatic sensitive devices are subject to voltages that are far below the
voltage values that can still be perceived by human beings. These voltages are
present if you touch a component or the electrical connections of a module without
previously being electrostatically discharged. In most cases, the damage caused
by an overvoltage is not immediately noticeable and results in total damage only
after a prolonged period of operation.

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F-2 EWA 4NEB 710 6084-02
 Guidelines for Handling Electrostatic Sensitive Devices (ESD)

F.2 Electrostatic Charging of Persons

Charging
Every person with a non-conductive connection to the electrical potential of its
surroundings can be charged electrostatically.
Figure F-1 shows you the maximum values for electrostatic voltages to which a
person can be exposed by coming into contact with the materials indicated in the
figure. These values are in conformity with the specifications of IEC 801-2.

Voltage in kV
(kV)
16 1 Synthetic material
15
14 2 Wool
13
3 Antistatic material,
12 for example, wood
11 1 or concrete
10
9
8
7
6
5
4 2
3
2
3
1
5 10 20 30 40 50 60 70 80 90 100 Relative air
humidity in %

Figure F-1 Electrostatic Voltages which can Build up on a Person

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EWA 4NEB 710 6084-02 F-3
Guidelines for Handling Electrostatic Sensitive Devices (ESD)

F.3 General Protective Measures against Electrostatic Discharge

Damage

Ensuring Sufficient Grounding

Make sure that the personnel, working surfaces and packaging are sufficiently
grounded when handling electrostatic sensitive devices. You thus avoid
electrostatic charging.

Avoiding Direct Contact

You should touch electrostatic sensitive devices only if it is unavoidable
(for example, during maintenance work). Hold modules without touching the pins of
components or printed conductors. In this way, the discharged energy cannot
affect the sensitive devices.
If you have to carry out measurements on a module, you must discharge your
body before you start the measurement by touching grounded metallic parts. Use
grounded measuring devices only.

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Replacement Parts and Accessories for
the CPUs of the S7-300 G
Replacement Parts
Table G-1 lists all the parts you can order separately or later for the CPUs of the
S7-300 programmable controllers.

Table G-1 Accessories and Replacement Parts

S7-300 Parts Order No. Acces- Re-

sories place-
ment
Parts
Bus connector 6ES7 390-0AA00-0AA0 – X
Power connector between power supply unit and CPU 6ES7 390-7BA00-0AA0 – X
2 Key for CPU (for mode selector) 6ES7 911-0AA00-0AA0 – X
Backup battery 6ES7 971-1AA00-0AA0 X –
Accumulator for real-time clock 6ES7 971-5BB00-0AA0 X –
Memory card X
5 V - FEPROM
S 16 KB 6ES7 951-0KD00-0AA0
S 32 KB 6ES7 951-0KE00-0AA0
S 64 KB 6ES7 951-0KF00-0AA0
S 128 KB 6ES7 951-0KG00-0AA0
S 256 KB 6ES7 951-1KH00-0AA0
S 512 KB 6ES7 951-0KJ00-0AA0
S 1 MB 6ES7 951-1KK00-0AA0
S 2 MB 6ES7 951-1KL00-0AA0
S 4 MB 6ES7 951-1KM00-0AA0
5 V RAM
S 128 KB 6ES7 951-0KG00-0AA0
S 256 KB 6ES7 951-1AH00-0AA0
S 512 KB 6ES7 951-1AJ00-0AA0
S 1 MB 6ES7 951-1AK00-0AA0
S 2 MB 6ES7 951-1AL00-0AA0
Labeling strip (Qty 10) 6ES7 392-2XX00-0AA0 – X
Slot numbering label 6ES7 912-0AA00-0AA0 – X

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Replacement Parts and Accessories for the CPUs of the S7-300

Table G-1 Accessories and Replacement Parts, continued

S7-300 Parts Order No. Acces- Re-

sories place-
ment
Parts
20-pin front connector X –
S Screw terminals 6ES7 392-1AJ00-0AA0
S Spring-loaded terminals 6ES7 392-1BJ00-0AA0
40-pin front connector X –
S Screw terminals 6ES7 392-1AM00-0AA0
S Spring-loaded terminals 6ES7 392-1BM01-0AA0
Shield contact element 6ES7 390-5AA00-0AA0 X –
Shield terminals for X –
S 2 cables with a shield diameter of 2 to 6ES7 390-5AB00-0AA0
6 mm (0.08 to 0.23 in.) each
S 1 cable with a shield diameter of 3 to 6ES7 390-5BA00-0AA0
8 mm (0.12 to 0.31 in.)
S 1 cable with a shield diameter of 4 to 6ES7 390-5CA00-0AA0
13 mm (0.16 to 0.51 in.)
Instruction List 6ES7 398-8AA03-8AN0 X –

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G-2 EWA 4NEB 710 6084-02
SIMATIC S7 Reference Literature H
Introduction
This Appendix contains references
S to manuals that you require for configuring and programming the S7-300,
S to manuals describing the components of a PROFIBUS-DP network,
S to technical books providing information beyond the S7-300,

Manuals on Configuration and Commissioning

Comprehensive user documentation is available to assist you in configuring and
programming the S7-300. You can select and use this documentation as required.
Table H-1 gives you an overview of the documentation for STEP 7.

Table H-1 Manuals for Configuring and Programming the S7-300

Title Contents
System Software for S7-300/400 The programming manual offers basic information on the design
Program Design of the operating system and a user program of an S7-300. For
Programming Manual novice users of an S7-300/400 it provides an overview of the
programming principles on which the design of user programs is
based.
Standard Software for S7 und M7 The STEP 7 User Manual describes the principle and functions of
STEP 7 the STEP 7 software for programmable logic controllers. The
User Manual manual provides both novice and experienced users of STEP 5
with an overview of the procedures used to configure, program
and start up an S7-300/400. STEP 7 includes an online help
system for detailed answers to questions regarding the use of the
software.
Statement List (STL) for S7-300/400 The manuals for the STL, LAD and SCL packages each comprise
Programming the user manual and the language description. For programming
Manual an S7-300/400 you need only one of the languages, but, if
required you can switch between the language to be used in a
required,
Ladder Logic (LAD) for S7-300 and project. If it is the first time that you use one of the languages, the
S7-400 manuals will help you in getting familiar with the programming
Programming principles.
Manual When working with the software, you can use the on
on-line
line hel
help,,
Structured Control Language (SCL)1 which provides you with detailed information on editors and
for S7-300 and S7-400 compilers.
Programming
Manual

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SIMATIC S7 Reference Literature

Table H-1 Manuals for Configuring and Programming the S7-300, continued

Title Contents
GRAPH1 for S7-300 and S7-400 With the GRAPH, HiGraph, CFC languages, you can implement
Sequential Function Charts sequential function charts, state diagrams or graphic
Manual interconnections of blocks. Each of the manuals comprises a user
manual and a language description.
description If it is the first time that you
HiGraph1 for S7-300 and S7-400 use one of these languages, the manual will help you in getting
Programming State Diagrams familiar with the programming principles. When working with the
Manual software, you can also use the on-line help (not for HiGraph),
which
hi h provides
id you withith d
detailed
t il d iinformation
f ti on editors
dit andd
Continuous Function Charts (CFC)1
compilers.
for S7 and M7
Programming Continuous Function
Charts
Manual
System Software for S7-300 and The S7-CPU’s offer systems and standard functions which are
S7-400 integrated in the operating system. You can use these functions
System and Standard Functions when writing programs in one of the languages, that is STL, LAD
Reference Manual and SCL. The manual provides an overview of the functions
available with S7 and, for reference purposes, detailed interface
descriptions which you require in your user program.
1 Optional system software packages for S7-300/400

Communication Manual
The Communication with SIMATIC manual gives you an introduction to and
overview of the communication possible in SIMATIC.

S7-300 Programmable Controller Hardware and Installation

H-2 EWA 4NEB 710 6084-02
 SIMATIC S7 Reference Literature

Manuals for PROFIBUS-DP

For the configuration and startup of a PROFIBUS-DP network, you will need the
descriptions of the other nodes and network components integrated in the network.
To help you with this, you can order the manuals listed in Table H-2.

Table H-2 Manuals for PROFIBUS-DP

Manual
ET 200 Distributed I/O System
SIMATIC NET - PROFIBUS Networks
ET 200M Distributed I/O Station
SINEC L2-DP Interface of the S5-95U Programmable Controller
ET 200B Distributed I/O Station
ET 200C Distributed I/O Station
ET 200U Distributed I/O Station
ET 200 Handheld Unit
Technical Overviews
S7/M7 Programmable Controllers
Distributed I/O with PROFIBUS-DP and AS-I

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EWA 4NEB 710 6084-02 H-3
SIMATIC S7 Reference Literature

Technical Literature
Table H-3 lists a selection of technical literature which you can obtain directly from
Siemens or from book retailers.

Table H-3 List of Books You Can Order

Title Siemens Order Number Book Retailers’ Order

Number
Speicherprogrammierbare Steuerungen, A19100-L531-F913 ISBN 3-8009-8031-2
Grundbegriffe
Siemens-AG, Berlin and Munich, 1989
SPS Speicherprogrammierbare Steuerungen A19100-L531-G231 ISBN 3-486-21114-5
vom Relaisersatz bis zum CIM-Verbund
Eberhardt E. Grötsch
Oldenbourg Verlag; Munich, Vienna 1989
Speicherprogrammierbare Steuerungen SPS; – ISBN 3-528-24464-X
Band 1: Verknüpfungs- und Ablaufsteuerungen;
von der Steuerungsaufgabe zum
Steuerungsprogramm
Günter Wellenreuther, Dieter Zastrow
Braunschweig (3rd edition) 1988
Steuern und Regeln mit SPS – ISBN 3-7723-5623-0
Andratschke, Wolfgang
Franzis-Verlag
Dezentralisieren mit PROFIBUS DP A19100-L531-B714 ISBN 3-89578-074-X
Aufbau, Projektierung und Einsatz des
PROFIBUS DP mit SIMATIC S7
Josef Weigmann, Gerhard Kilian
Publicis MCD Verlag, 1998

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Safety of Electronic Control Equipment I
Introduction
The information provided here is of a predominantly fundamental nature and
applies regardless of the type of electronic control system and its manufacturer.

Reliability
Maximum reliability of the SIMATIC systems and components is achieved by
implementing the following extensive and cost-effective measures during the
development and manufacture:
This includes the following:
S Use of high-quality components;
S Worst-case design of all circuits;
S Systematic and computer-controlled testing of all components supplied by
subcontractors;
S Burn-in of all LSI circuits (e.g. processors, memories, etc.);
S Measures to prevent static charge building up when handling MOS ICs;
S Visual checks at different stages of manufacture;
S Continuous heat-run test at elevated ambient temperature over a period of
several days;
S Careful computer-controlled final testing;
S Statistical evaluation of all faulty systems and components to enable the
immediate initiation of suitable corrective measures;
S Monitoring of the most important control components using on-line tests
(watchdog for the CPU, etc.).
These measures are basic measures. They prevent or rectify a large proportion of
possible faults.

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Safety of Electronic Control Equipment

Risks
In all cases where the occurrence of failures can result in material damage or injury
to persons, special measures must be taken to enhance the safety of the
installation – and therefore also of the situation. For this type of application,
relevant, plant-specific regulations exist that must be observed on installing the
control systems (e.g. VDE 0116 for burner control systems).
For electronic control equipment with a safety function, the measures that have to
be taken to prevent or rectify faults are based on the risks involved in the
installation. Above a certain potential danger, the basic measures listed above are
no longer sufficient. In such cases, additional measures (e.g. redundant
configurations, tests, etc.) must be implemented for the control equipment and
certified (DIN VDE 0801). The S5-95F fail-safe programmable controller has been
prototype tested by the German Technical Inspectorate, BIA and GEM III and
several certificates have been granted. It is, therefore, just as able as the S5-115F
fail-safe PLC that has already been tested to control and monitor safety-related
areas of the installation.

Subdivision into Safety-Related and Non-Safety-Related Areas

In almost every installation there are sections that perform safety-related tasks
(e.g. Emergency Stop pushbuttons, protective guards, two-hand-operated
switches). To avoid the need to examine the entire controller from the aspect of
safety, the controller is usually divided into a safety-related and
non-safety-related area. In the non-safety-related area, no special demands are
placed on the safety of the control equipment because any failure in the electronics
will have no effect on the safety of the installation. In the safety-related area,
however, the only control systems and switchgear that are permitted to be used
are those that comply with the relevant regulations.
The following divisions are common in practical situations:
1. For control equipment with few safety-related functions (e.g. machine controls)
The conventional PLC is responsible for machine control and the safety-related
functions are implemented with the fail-safe S5-95F mini PLC.
2. For control equipment with a medium degree of safety-related functionality (e.g.
chemical installations, cable cars)
The non-safety-related area is also implemented here with a conventional PLC
and the safety-related area is implemented with a tested fail-safe PLC (S5-115F
or several S5-95Fs).
The entire installation is implemented with a fail-safe control system.
3. For control equipment with mainly safety-related functions (e.g. burner control
systems)
The entire control system is implemented with fail-safe technology.

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 Safety of Electronic Control Equipment

Important Information
Even when electronic control equipment has been configured for maximum design
safety, for example using multi-channel setups, it is still of the utmost importance
that the instructions given in the operating manual are followed exactly. Incorrect
handling can render measures intended to prevent dangerous faults ineffective, or
generate additional sources of danger.

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Safety of Electronic Control Equipment

S7-300 Programmable Controller Hardware and Installation

I-4 EWA 4NEB 710 6084-02
Siemens Worldwide J
In This Appendix
In this appendix you will find a list of the following:
S Siemens offices in the Federal Republic of Germany
S All European and non-European offices and representatives of Siemens AG.

S7-300 Programmable Controller Hardware and Installation

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Siemens Worldwide

SIMATIC Partners in the Federal Republic of Germany

N Branch ZN 01189 Dresden ZN 74076 Heilbronn ZN 04105 Leipzig ZN 18069 Rostock

AUT 1, Mr Lehmann AUT P/S, Mr Gaul AUT P 2, Ms Kiesewetter AUT, Ms Langhammer
Karlsruher Str. 111 Neckarsulmer Str. 59 Springerstr. 15 Industriestr. 15

% (03 51) 40 222 77 % (0 71 31) 1 832 03 % (03 41) 2 1030 07 % (03 81) 7821 71
N 52066 Aachen Fax (03 51) 40 222 74 Fax (0 71 31) 1 833 20 Fax (03 41) 2 1030 63 Fax (03 81) 7821 75
AUT P 13, Mr Georgens
Kurbrunnenstr. 22
ZN 40219 Düsseldorf ZN 76185 Karlsruhe ZN 39106 Magdeburg ZN 66111 Saarbrücken
% (02 41) 4 512 52 AUT P 15, Mr Becker AUT 14 P, Mr Boltz
Bannwaldallee 48
AUT VG 33, Mr Ganschinietz AUT, Mr Müller
Fax (02 41) 4 513 98 Lahnweg 10 Sieverstorstr. 3233 MartinLutherStr. 25
% (02 11) 3 9916 64 % (07 21) 9 9224 13 % (03 91) 5 8817 21 % (06 81) 3 8622 89
N 86159 Augsburg Fax (02 11) 3 9918 48 Fax (07 21) 9 9225 85 Fax (03 91) 5 8817 22 Fax (06 81) 3 8621 11
AUT S11, Mr Hirth
WernervonSiemens Str. 6
ZN 99097 Erfurt ZN 34117 Kassel ZN 68165 Mannheim ZN 57072 Siegen
% (08 21) 25 954 50 AUT P 22, Mr Skudelny AUT P 13, Mr Uhlig AUT 16 P, Mr Sulzbacher AUT P 11, Mr Patz
Fax (08 21) 25 954 08 Haarbergstr. 47 BürgermeisterBrunnerStr.15 Dynamostr. 4 Sandstr. 4248
% (03 61) 4 2523 51 % (05 61) 78 863 32 % (06 21) 4 5628 43 % (02 71) 23 022 40
N 95448 Bayreuth Fax (03 61) 4 2523 50 Fax (05 61) 78 864 48 Fax (06 21) 4 5625 45 Fax (02 71) 23 022 38
AUT P/S 11, Ms Hösl
Weiherstr. 25
ZN 45128 Essen ZN 87439 Kempten ZN 81679 München ZN 70499 Stuttgart
% (09 21) 2 813 41 AUT P 14, Mr Klein AUT P, Mr Fink AUT P 14, Mr Schäfer AUT P 11, Mr Müller
Fax (09 21) 2 814 44 Kruppstr. 16 Lindauer Str. 112 RichardStraussStr. 76 Weissacherstr. 11
% (02 01) 8 1624 28 % (08 31) 58 182 25 % (0 89) 92 2130 64 % (07 11) 1 3726 44
N 10587 Berlin Fax (02 01) 8 1623 31 Fax (08 31) 58 182 40 Fax (0 89) 92 2143 99 Fax (07 11) 1 3729 46
AUT P 1, Mr Liebner
Salzufer 68
ZN 60329 Frankfurt ZN 24109 Kiel ZN 48153 Münster ZN 54292 Trier
% (0 30) 39 9323 97 AUT P 25, Mr W. Müller AUT 1, Ms Drews AUT S 13, Mr Schlieckmann AUT VG 14 P, Mr Baldauf
Fax (0 30) 39 9323 02 Rödelheimer Landstr. 13 Wittland 24 Siemensstr. 55 Löbstr. 15
% (0 69) 7 9734 18 % (04 31) 58 603 26 % (02 51) 76 054 25 % (06 51) 20 0923
N 33605 Bielefeld Fax (0 69) 7 9734 42 Fax (04 31) 58 602 48 Fax (02 51) 76 053 36 Fax (06 51) 20 0924
AUT P 12, Ms Schlüpmann
Schweriner Str. 1
ZN 79104 Freiburg ZN 56068 Koblenz ZN 90439 Nürnberg ZN 89079 Ulm
% (05 21) 2 915 21 AUT P, Mr Thoma AUT P 11, Mr Ricke AUT P 11, Mr Glas AUT ZR, Mr Birk
Fax (05 21) 2 915 90 Habsburgerstr. 132 Frankenstr. 21 VonderTannStr. 30 NikolausOttoStr. 4

% (07 61) 27 122 38 % (02 61) 1 322 44 % (09 11) 6 5435 87 % (07 31) 94 503 28
N 38126 Braunschweig Fax (07 61) 27 124 46 Fax (02 61) 1 322 55 Fax (09 11) 6 5473 84 Fax (07 31) 94 503 34
AUT P 11, Mr Pelka
Ackerstr. 20 ZN 20099 Hamburg ZN 50823 Köln ZN 49090 Osnabrück ZN 97084 Würzburg
AUT 1, Mr Rohde AUT P 14, Mr Prescher AUT S 13, Mr Pöhler
% (05 31) 27 123 05
Lindenplatz 2 FranzGeuer Str. 10 Eversburger Str. 32
AUT PIS 13, Mr Vogt
AndreasGrieser Str. 30
Fax (05 31) 27 124 16
% (0 40) 28 8930 03 % (02 21) 5 7627 62 % (05 41) 12 132 73 % (09 31) 61 014 59
N 28195 Bremen Fax (0 40) 28 8932 09 Fax (02 21) 5 7627 95 Fax (05 41) 12 133 50 Fax (09 31) 61 015 42
AUT P 12, Ms Ulbrich
Contrescarpe 72 ZN 30519 Laatzen (Hannover) ZN 78416 Konstanz ZN 93053 Regensburg ZN 42103 Wuppertal
AUT P 10, Ms Hoffmann AUT P, Ms Wiest AUT P/S 12, Mr Rewitzer siehe ZN 45128 Essen
% (04 21) 3 6424 27
Hildesheimer Str. 7 FritzArnoldStr. 16 Hornstr. 10 AUT P 14, Mr Klein
Fax (04 21) 3 6428 42 Kruppstr. 16
% (05 11) 8 7723 19 % (075 31) 9882 02 % (09 41) 40 071 97
Fax (05 11) 8 7727 39 Fax (075 31) 9881 40 Fax (09 41) 40 072 36
N 09114 Chemnitz % (02 01) 8 1624 28
AUT P 11, Ms Aurich Fax (02 01) 8 1623 31
Bornaer Str. 205
% (03 71) 4 7535 10
Fax (03 71) 4 7535 25

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J-2 EWA 4NEB 710 6084-02
 Siemens Worldwide

SIMATIC Partners in Europe (excluding the Federal Republic of Germany)

Belgium Ireland Austria Russia 41092 Sevilla
Siemens S.A., AUT 1,
1060 Bruessel Dublin 11 6901 Bregenz 113043 Moskau Mr de la Fuente
Siemens S.A., VP4, Mr Gmuer Siemens Ltd., Power & Automa Siemens AG, AUT, Mr Madlener Siemens AG, Mr Engelhard/ ISLA DE LA CARTUJA
Chaussee de Chaleroi 116 tion Division, Mr Mulligan JosefHuterStraße 6, Mr Michailow, Ul. Dubininskaja 98 Paseo de la Acacias, s/n
% 00 32 (2) 5 36 25 33 811 Slaney Road Postfach 347 % 0 07 (0 95) 2 36 75 00 (Edificio Siemens)
Fax 00 32 (2) 5 36 23 87 Dublin Industrial Estate % 00 43 (55 74) 41 92 72 Fax 0 07 (0 95) 2 36 62 00 % 00 34 (5) 4 46 30 00
% 0 03 53 (1) 8 30 28 55 Fax 00 43 (55 74) 41 92 88 Fax 00 34 (5) 4 46 30 46
Fax 0 03 53 (1) 8 30 31 51 Sweden
Bulgaria 28760 Tres Cantos (Madrid)
8054 Graz 40020 Göteborg Siemens S.A., AUT 1,
1113 Sofia Iceland Siemens AG, AUT, Mr Jammernegg Siemens AB, ASP, Mr Ohlsson Mr Olaguibel, Ronda de Europa, 5
Siemens AG, Ms Kirova
121 Reykjavik Strassganger Straße 315 Östergardsgatan 24 % 00 34 (1) 8 03 12 00
Blvd. Dragan Zankov Nr. 36 Postfach 39 Box 1 41 53 Fax 00 34 (1) 8 03 22 71
% 0 03 59 (2) 70 85 21 Smith & Norland H/F,
Mr Kjartansson, % 00 43 (3 16) 2 80 42 80 % 00 46 (31) 7 76 86 53
Fax 0 03 59 (2) 68 50 51 Fax 00 43 (3 16) 2 80 42 85 Fax 00 46 (31) 7 76 86 76
Noatuni 4, P.O.B. 519 46021 Valencia
Denmark % 0 03 54 (1) 62 83 00 Siemens S.A., AUT 1, Mr Albors
Fax 0 03 54 (1) 62 83 40 6040 Innsbruck/NeuRum 55111 Jönköping Avda. Aragon, 30 (Ed. Europa)
2750 Ballerup Italy Siemens AG, AUT, Mr Mayr Siemens AB, ASP, Mr Jonsson % 00 34 (6) 3 69 94 00
Siemens A/S, IP, Mr Hansen Siemensstraße 24, Postf. 9 04 Klubbhusgatan 15, Box 10 07 Fax 00 34 (6) 3 62 61 19
Borupvang 3 40127 Bologna % 00 43 % 00 46 (36) 15 29 00
% 00 45 (44) 77 42 90 Siemens S.p.A., AUT R10A, (5 12) 23 12 60 Fax 00 46 (36) 16 51 91
Fax 00 45 (44 )77 40 16 Mr Tosatti Fax 00 43 (5 12) 23 15 30 36204 Vigo
Via Casciarolo, 8 Siemens S.A., AUT 1, Mr Garrido
Finland % 00 39 (51) 6 38 45 09 9020 Klagenfurt 20123 Malmö Pizarro, 29
Fax 00 39 (51) 24 32 13 Siemens AG, AUT, Mr Weber Siemens AB, ASP, Mr Jämtgren % 00 34 (86) 41 60 33
02601 Espoo Werner von Siemens Park 1 Grimsbygatan 24, Box 326 Fax 00 34 (86) 41 84 64
Siemens Osakeyhtioe,
OEM/AUT 1, Mr Saarelainen
% 00 43 % 00 46 (40) 17 46 14
25128 Brescia (4 63) 3 88 32 43 Fax 00 46 (40) 17 46 17
Majurinkatu, P.O.B. 60 Siemens S.p.A., AUT R10A, Fax 00 43 (4 63) 3 88 34 49 50012 Zaragoza
% 0 03 58 (0) 51 05 36 70 Mr Gaspari, Via della Volta, 92 Siemens S.A., AUT 1, Mr Aliaga
Fax 0 03 58 (0) 51 05 36 56 % 00 39 (30) 3 53 05 26 4020 Linz 85122 Sundsvall Avda. Alcalde Gomez Laguna, 9
Fax 00 39 (30) 34 66 20 Siemens AG, AUT, Mr Schmidt Siemens AB, ASP, Mr Sjöberg % 00 34 (76) 35 61 50
France WolfgangPauliStraße 2 Lagergatan 14, Box 766 Fax 00 34 (76) 56 68 86
69641 CaluireetCuire/Lyon
Postfach 563 % 00 46 (60) 18 56 00
Siemens S.A., AUT 1, Leitstelle 20124 Milano % 00 43 Fax 00 46 (60) 61 93 44
911, Chemin des Petites Brosses, Siemens S.p.A., AUT R10A, (7 32) 3 33 02 95
Mr Berti, Via Lazzaroni, 3 Fax 00 43 (7 32) 3 33 04 93 Czech Republic
BP 39 % 00 39 (2) 66 76 28 36 19487 Upplands Väsby/Stockholm
% 00 33/ 78 98 60 08 Fax 00 39 (2) 66 76 28 20 5020 Salzburg Siemens AB, ASPA1, Mr Persson 60200 Brno
Fax 00 33/ 78 98 60 18 Siemens AG, AUT, Mr Mariacher Jun. Johanneslandsvägen1214 Siemens AG, Kancelar Brno,
Innsbrucker Bundesstraße 35 % 00 46 (8) 7 28 14 64 Mr Tucek, Vinarská 6
59812 Lesquin, Cedex/Lille 35129 Padova Postfach 3 Fax 00 46 (8) 7 28 18 00 % 00 42 (5) 43 21 17 49
Siemens S.A., AUT 1, Leitstelle
78, Rue de Gustave Delroy
Siemens S.p.A., AUT R10A, %
Mr Millevoi, Viale dell'Industria, 19 62) 4 48 83 35
00 43 (6 Fax 00 42 (5) 43 21 19 86
BP 239 % 00 39 (49) 8 29 13 11 Fax 00 43 (6 62) 4 48 83 09
Switzerland
% 00 33/ 20 95 71 91 Fax 00 39 (49) 8 07 00 09 1020Renens/Lausanne 14000 Praha 4
Fax 00 33/ 20 95 71 86 1211 Wien SiemensAlbis SA, Systemes Siemens AG, Zastoupeni v CR,
Siemens AG, AUT 1, Mr Strasser, d'automation, VHRL, Ms Thevenaz Mr Skop, Na strzi 40
00142 Roma Siemensstraße 8892, 5, Av. des Baumettes % 00 42 (2) 61 21 50 33 6
33694 Merignac/Bordeaux Siemens S.p.A., AUT R10A, Postfach 83 Fax 00 42 (2) 61 21 51 46
Case postale 1 53
Siemens S.A., AUT 1, Mr Vessio, Via Laurentina, 455
% 00 39 (6) 5 00 951 % 00 43 % 00 41 (21) 6 31 83 09
Leitstelle, Parc Cadera Sud (1) 25 01 37 88 Fax 00 41 (21) 6 31 84 48
36, Avenue Ariane, BP 351 Fax 00 39 (6) 5 00 95 20 Fax 00 43 (1) 25 01 39 40
80040 FindlikiIstanbul
% 00 33/ 56 13 32 66 Poland
SIMKO A.S., AUT ASI 1, Ms Yargic
Fax 00 33/ 56 55 99 59 10127 Torino 40931 Katowice 8047 Zürich Meclisi Mebusan Cad. 125
Siemens S.p.A., AUT R10A, Siemens Sp. z.o.o., Niederlassung SiemensAlbis AG, VHR 3, % 00 90 (1) 25 10 90 01 706
Mr Montoli, Via Pio VII, 127 Katowice, Mr Krzak Mr Engel, Freilagerstraße 2840 Fax 00 90 (1) 25 10 90 07 09
44300 Nantes % 00 39 (11) 6 17 31 Ul. Kosciuszki 30 % 00 41 (1) 4 95 58 82
Siemens S.A., AUT 1, Fax 00 39 (11) 61 61 35 % 00 48 (3) 157 32 66 Fax 00 41 (1) 4 95 31 85
Leitstelle, Zac du Perray Fax 00 48 (3) 157 30 75
9, Rue du Petit Chatelier Croatia Turkey
% 00 33/ 40 18 68 30 41000 Zagreb Slovakian Republic
Fax 00 33/ 40 93 04 83 60815 Poznan 06680AnkaraKavaklidere
Siemens d.o.o., Mr Culjak Siemens Sp. z.o.o., Niederlassung 81261 Bratislava SIMKOANKARA, Mr Ensert,
93527 Saint Denis, Cedex 2/Paris Trg Drazena Petrovica 3 ("Cibona") Poznan, Mr Weiss Siemens AG, Mr Sykorcin, Atatürk Bulvari No. 169/6
Siemens S.A., AUT 1, Mr Granger % 0 03 85 (41) 33 88 95 Ul. Gajowa 6 Tovarenska 11 % 00 90 (312) 4 18 22 05
39/47, Bd Ornano Fax 0 03 85 (41) 32 66 95 % 00 48 (61) 47 08 86 % 00 42 (7) 31 21 74
% 00 33 (1) 49 22 33 18 Fax 00 48 (61) 47 08 89 Fax 00 42 (7) 31 63 32
80040 FindikliIstanbul
Fax 00 33 (1) 49 22 32 05 Luxembourg SIMKO TIC. ve SAN. A. S.,
Slovenia AUT 1, Ms Yargic
1017 LuxemburgHamm 03821 Warszawa
67016 Strasbourg, Cedex Siemens S.A., AUT, Mr Nockels 61000 Ljubljana Meclisi Mebusan Cad. No 125
Siemens S.A., AUT 1, Leistelle Siemens Sp. z.o.o., Mr Cieslak % 00 90 (212) 2 51 17 06
20, Rue des Peupliers Ul. zupnicza 11, Siemens Slovenija, Mr Lavric
2, Rue du RhinNapoleon B.P. 1701 % 00 48 (2) 6 70 91 47 Dunajska C47 Fax 00 90 (212) 2 52 39 16
BP 48
% 00 33/ 88 45 98 22 % 0 03 52/ 4 38 434 21 Fax 00 48 (2) 6 70 91 49 % 0 03 86 (61) 1 32 60 68
Fax 0 03 52/ 4 38 434 15 Fax 0 03 86 (61) 1 32 42 81
Fax 00 33/ 88 60 08 40
Netherlands 53332 Wroclaw Spain Ukraine
Siemens Sp. z.o.o., Niederlassung
31106 Toulouse 2595 AL Den Haag Wroclaw, Mr Wojniak 48011 Bilbao 252054 Kiew 54
Siemens S.A., AUT 1, Mr Huguet Siemens Nederland N.V., IPS/APS, Ul. Powstanców Slaskich 95 Siemens S.A., AUT 1, Mr Tapia SiemensVertretung, AUT,
ZAC de Basso Cambo Mr Penris, Prinses Beatrixlaan 26 % 00 48 (71) 60 59 97 Maximo Aguirre, 18 Mr Liebschner,
Avenue du Mirail, BP 1304 % 00 31 (70) 3 33 32 74 Fax 00 48 (71) 60 55 88 % 00 34 (4) 4 27 64 33 Ul. Worowskowo 27
% 00 33/ 62 11 20 15 Fax 00 31 (70) 3 33 34 96 Fax 00 34 (4) 4 27 82 39 % 0 07 (044) 2 16 02 22
Fax 00 33/ 61 43 02 20 Portugal Fax 0 07 (044) 2 16 94 92
Norway 2700 Amadora 08940 Cornella de Llobregat/
Greece Siemens S.A., Dep. Energia e Barcelona
5033 Fyllingsdalen Industria, Mr Eng. C. Pelicano Siemens S.A., AUT 1, Mr Ortiz
15110 Amaroussio/Athen Siemens A/S Bergen, Estrada Nacional 117 ao Hungary
Siemens A.E., HB 3 AUT, Mr Troan, Bratsbergveien 5 km 2,6 Alfragide, Apartado 60300 Joan Fernandez Vallhonrat, 1
Mr Antoniou; Paradissou & Postboks 36 60 % 0 03 51 (1) 4 17 85 03 % 00 34 (3) 4 74 22 12 1036 Budapest
Fax 00 34 (3) 4 74 42 34 Siemens GmbH, AUT 1, Mr Turi
Artemidos, P.O.B. 6 10 11 % 00 47 (55) 17 67 41 Fax 0 03 51 (1) 4 17 80 71 Lajos utca 103
% 00 30 (1) 68 645 15 Fax 00 47 (55) 16 44 70 % 00 36 (1) 2 69 74 55
Fax 00 30 (1) 68 645 56 Fax 00 36 (1) 2 69 74 54
33206 Gijon
4450 MatosinhosPorto Siemens S.A., AUT 1, Mr Huchet
54110 Thessaloniki 0518 Oslo 5 Siemens S.A., Dep. Energia e Corrida, 1
Siemens A.E., VB 3 AUT, Siemens A/S, AUT Produkter, Industria, Mr Eng. A. Amaral, % 00 34 (85) 35 08 00
Mr Passalidis Mr Eggen, Ostre Aker vei 90 Estrada Nacional 107, Fax 00 34 (85) 34 93 10
Georgikis Scholis 89, P.O.B. 10290 Postboks 10, Veitvet No. 3570 Freixieiro, Apartado 5145
% 00 30 (31) 47 92 12 % 00 47 (22) 63 34 09 % 0 03 51 (2) 9 99 21 11
Fax 00 30 (31) 47 92 65 Fax 00 47 (22) 63 33 90 Fax 0 03 51 (2) 9 99 20 01 15005 La Coruna
Siemens S.A., AUT 1, Mr Pereira
Great Britain Rumania Linares Rivas, 1214
7004 Trondheim % 00 34 (81) 12 07 51
Manchester M20 2UR Siemens A/S Trondheim, 76640 Bucuresti Fax 00 34 (81) 12 03 60
Siemens PLC, Control Systems, Mr Thorsen, Spelaugen 22 Siemens, Birou de consultatii
Mr Hardern % 00 47 (73) 95 96 69 tehnice, Mr Fritsch
Sir William Siemens House, Fax 00 47 (73) 95 95 04 Str. Zarii No. 12, sector 5 30008 Murcia
Princess Road % 00 40 (1) 2 23 47 95 Siemens S.A., AUT 1, Mr Martinez
% 00 44 (61) 4 46 52 33 Fax 00 40 (1) 2 23 45 69 Marques de los Velez, 13
Fax 00 44 (61) 4 46 52 32 % 00 34 (68) 23 36 62
Fax 00 34 (68) 23 52 36

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Siemens Worldwide

SIMATIC Partners Outside of Europe

Afrika America Canada Mukilteo, WA 98275
SIA Inc., MidwWest Region,
Ägypten Argentina Mississauga, ON L5N 7AG Mr Earl Haas, 8412 54th Avenue West
Siemens Electric Ltd., Dept. SL 20, % +1 (7 14) 9 79 66 00
Mr Fred Leon, 2185 Derry Road Fax +1 (7 14) 5 57 90 61
Zamalik/EGYCairo 8000 Bahia Blanca, West
ELETECH, AUT, Mr W. Y. Graiss Prov. de Buenos Aires % +1 (905) 7 92 81 95 82
6 Zarkaria Rizk Street, Siemens S.A., Mr S.Duran, Fax +1 (905) 58 19 58 12
P.O.B. 90 Rudriguez 159 Plymouth, MN 55442
% +20 (2) 3 42 03 71 % +54 (91) 5561 41 SIA Inc., MidWest Region,
Fax +20 (2) 3 42 03 76 Fax +54 (91) 5561 71 Point Claire, QUE H9R4R6 Mr Greg Jaster,
Siemens Electric Ltd., Mr D. Goulet 13235 45th Avenue No.
7300 Trans Canada Highway % +1 (7 08) 6 40 15 95
Algeria
(1650) San Martin, % +1 (514) 4 26 60 99 Fax +1 (7 08) 6 40 80 26
Prov. de Buenos Aires Fax +1 (514) 4 26 61 44
Siemens S.A., PEIAUT,
16035 Hydra/Alger Mr Rudriguez Juis/Mr Roland Herron,
Siemens, Bureau d'Alger, Division Gral, Roca 1865, Ruta 8, km 18 C.C. Burnaby, B. C. V5J 5J1 Venezuela
Energie, Mr Bennour, % +54 (1) 7 38 71 92/7 15 Siemens Electic Ltd., Mr A. Mazurek
44, rue Abri Areski , B.P. 112 % +54 (1) 7 38 71 85 Marine Way Business Park
% +213 (2) 60 40 88 Fax 254 (1) 7 38 71 71 8875 Northbrook Court
1071 Caracas
Siemens S.A., AUTASI,
Fax +213 (2) 60 65 98 % +1 (604) 4 35 08 80 Mr Jesus Cavada
Fax +1 (604) 4 35 10 23 Avda. Don Diego Cisneros
5000 Cordoba, Prov. de Cordoba Urbanizacion Los Ruices,
Ivory Coast Siemens S.A., Mr S. Garcia, Ap. 3616, Caracas 1010 A
Campillo 70 % +58 (2) 2 39 07 33
Columbia
Abidjan 15/R. C. I. % +54 (51) 739940/994 Fax +58 (2) 2 03 82 00
Siemens AG, SEMEN, Mr. Hellal, Fax +54 (51) 7297 14
16 B.P. 1062 Baranquilla
% +2 25 (37) 46 57 Siemens S.A., EA, Mr C. Perez,
Carrera 58 No. 70940
Fax +2 25 (27) 10 21 5539 Las Heras, Prov. de Mendoza
Siemens S.A., Mr S. Suarez, % +57 (958) 56 11 48 Asia
Acceso Norte 379 Fax +57 (958) 56 11 48
% +54 (61) 3000 22/0 37 China
Fax +54 (61) 3000 22/0 37
Libya Bogota 6
Siemens S.A., Division Energia, 510064 Guangzhou
Tripoli/Libya S.P.L.A.J. 2000 Rosario, Prov. de Santa Fe Mr M. Jaramillo Siemens Ltd. China, Guangzhou
Siemens AG, Branch Libya, Siemens S.A., Mr R. Stiza, Carrera 65, No. 1183 Office, Mr Peter Chen,
Mr Wahab, ZatELImad Ricchieri 750 Apartado 80150 Room 11341157 GARDEN Hotel
Building Tower No. 5, Floor No. 9 % +54 (1) 41 3703 21/0 % +57 (1) 2 94 22 66 Garden Tower,
P.O.B. 91 531 Fax +54 (1) 41 3707 87 Fax +57 (1) 2 94 24 98 368 Huanshi Dong Lu
% +218 (21) 4 15 34 % +86 (20) 3 85 46 88
Fax +218 (21) 4 79 40 Fax +86 (20) 3 34 74 54
Cali
Bolivia Siemens S.A., Barranquilla,
Mr Guido Hernandez
Morocco La Paz Carrera 40, No. 1305 100015 Beijing
Sociedad Comercial e Industrial % +57 (92) 664 44 00 Siemens Ltd. China, Beijing Office,
Mr Wolfgang Söllner
Casablanca 05 Hansa Ltda., E & A, Mr Beckmann Fax +57 (92)665 30 56
SETEL S.A., AUT, Mr El Bachiri, Calle Mercado esq. Yanacocha 7, Wangjing Zhonghuan Nan Lu
Immeuble Siemens, C. P. 10 800 Chaoyang District
km 1, Route de Rabat, % +591 (2) 35 44 45 Cali P.O. Box 8543
Ain Sebaa Fax +591 (2) 37 03 97 Siemens S.A. Cali Mr C. A. Naranjo % +86 (10) 4 36 18 88
% +212 (2) 35 10 25 Carrera 48 A, 15 Sur 92 Fax +86 (10) 4 36 32 13
Fax +212 (2) 34 01 51 % +57 (94) 2 6630 66
Fax +57 (94) 2 6825 57
Brazil

Namibia 05110900 Sao Paulo, SP, Pinituba 200090 Shanghai

MAXITEC S.A., AUTPA, Mr F. Rocco, Mexico Siemens Ltd. China, Shanghai
Avenida Mutinga, 3650 Office, Mr William Cui,
Windhoek 9000
Siemens (Pty) Ltd., Mr Jürgen Hoff % +55 (11) 8 36 29 99 02300 Mexico, D.F. 450, Lin Quing Lu
% +86 (21) 5 39 54 10
9 Albert Wessels Street Fax +55 (11) 8 36 29 50 Siemens S.A. de C.V., EIAUT,
Mr Gregorio Sanchez Fax +86 (21) 5 39 54 21
Industries North, P.O.B. 23125
% +2 64 (61) 6 13 58/59 DelegacionAzcapotzalco
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Fax +5 02 (2) 34 36 70
J-4 EWA 4NEB 710 6084-02
 Siemens Worldwide

SIMATIC Partners Outside of Europe

Taiwan
New Delhi 110 002
Siemens Ltd., DEL/AUTMAP, Taipei 106
Mr R. Narayanan Siemens Ltd., AUT 1, Mr Gulden
4A, Ring Road, I.P. Estate, 6th Fl., Cathy Life Insurance Bldg.
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Indonesia Thailand

Jakarta 12870 Bangkok 10110

Dian Graha Elektrika, Jakarta, Power Berli Jucker Co. Ltd., Mr Narong
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Iran
Hanoi
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Adelaide
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Sydney, N.S.W. 2064

Philippines Siemens Ltd. Sidney, Industrial
Automation, Mr Stephen Coop,
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Singapore 1334
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Seoul
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726 Yeoksamdong, Kangnamku,
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Fax +82 (2) 5 27 77 19

S7-300 Programmable Controller Hardware and Installation

EWA 4NEB 710 6084-02 J-5
Siemens Worldwide

S7-300 Programmable Controller Hardware and Installation

J-6 EWA 4NEB 710 6084-02
List of Abbreviations K
Abbrevia- Description
tions
CP Communication processor
CPU Central processing unit
DB Data block
FB Function block
FC Function
FM Function module
FO Fiber–optic cable
GD Global data communication
IM Interface module
IP Intelligent I/O
LAD Ladder logic (programming language representation in STEP 7)
M Chassis ground
MPI Multipoint Interface
OB Organization block
OP Operator panel
PG Programming device
PII Process–image input table
PIQ Process–image output table
PS Power supply
SFB System function block
SFC System function
SM Signal module
STL Statement List (programming language representation in STEP 7)

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List of Abbreviations

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K-2 EWA 4NEB 710 6084-02
Glossary

Accumulator
The accumulators are registers in the ³ CPU and are used as intermediate
memory for loading, transfer, comparison, calculation and conversion operations.

Address
An address is the identifier for a specific operand or operand area (e.g. input I
12.1, memory word MW 25, data block DB 3).

Analog module
Analog modules convert process values (e.g. temperature) into digital values, so
that they can be processed by the central processing unit, or convert digital values
into analog manipulated variables.

Automation system
An automation system is a ³ programmable controller in the context of
SIMATIC S7.

Backplane bus
The backplane bus is a serial data bus over which the modules communicate and
over which the necessary power is supplied to the modules. The connection
between the modules is established by bus connectors.

Backup battery
The backup battery ensures that the³ user program in the ³ CPU is stored in the
event of a power failure and that defined data areas and bit memories, timers and
counters are retentive.

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EWA 4NEB 710 6084-02 Glossary-1
Glossary

Backup memory
The backup memory provides a backup of memory areas for the
³ CPU without a backup battery. A configurable number of timers, counters,
memories and data bytes (retentive timers, counters, memories and data bytes) is
backed up.

Bit memory
Bit memories are part of the³ system memory of the CPU for storing interim
results. They can be accessed in units of a bit, byte, word or doubleword.

Bus
A bus is a communication medium connecting several nodes. Data transmission
can be serial or parallel across electrical conductors or fiber-optic cables.

Bus segment
A bus segment is a self-contained section of a serial bus system. Bus segments
are interconnected using repeaters.

Chassis ground
Chassis ground is the totality of all the interconnected inactive parts of a piece of
equipment on which a hazardous touch voltage cannot build up even in the event
of a fault.

Clock memories
Memories that can be used for clocking purposes in the user program (1 memory
byte).

Note
Note in the case of S7-300 CPUs that the clock memory byte is not exceeded in
the user program.

Code block
A code block in SIMATIC S7 is a block which contains a section of the STEP 7
user program (in contrast to a ³ data block which only contains data).

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 Glossary

Communication processor
Communication processors are modules for point-to-point and bus links.

Compress
The programming device online function “Compress” is used to align all valid
blocks contiguously in the RAM of the CPU at the start of the user memory. This
eliminates all gaps which arose when blocks were deleted or modified.

Configuration
Assignment of modules to racks/slots and (e.g. for signal modules) addresses.

Consistent data
Data whose contents are related and which should not be separated are known as
consistent data.
For example, the values of analog modules must always be handled consistently,
that is the value of an analog module must not be corrupted by reading it out at two
different times.

Counter
Counters are part of the ³ system memory of the CPU. The content of the
“counter cells” can by modified by STEP 7 instructions (e.g. count up/down).

CP
³ Communication processor

CPU
Central processing unit of the S7 programmable controller with open and
closed-loop control systems, memory, operating system and interface for
programming device.

Cycle time
The scan time is the time taken by the ³ CPU to scan the ³ user program once.

Data block
Data blocks (DB) are data areas in the user program which contain user data.
Global data blocks can be accessed by all code blocks while instance data blocks
are assigned to a specific FB call.

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Glossary

Data, static
Static data is data which can only be used within a function block. The data is
saved in an instance data block belonging to the function block. The data stored in
the instance data block is retained until the next function block call.

Data, temporary
Temporary data is local data of a block which is stored in the L stack during
execution of a block and which is no longer available after execution.

Delay interrupt
³ Interrupt, time-delay

Device master file

All slave-specific characteristics are stored in a device master file (GSD file). The
format of the device master file is defined in the EN 50170,
Volume 2, PROFIBUS standard.

Diagnostic buffer
The diagnostic buffer is a buffered memory area in the CPU in which diagnostic
events are stored in the order of their occurrence.

Diagnostic interrupt
Diagnostics-capable modules use diagnostic interrupts to report system errors
which they have detected to the ³ CPU.

Diagnostics
³ System diagnostics

DP master
A ³ master which behaves in accordance with EN 50170, Part 3 is known as a DP
master.

DP slave
A ³ slave which is operated in the PROFIBUS bus system using the
PROFIBUS-DP protocol and which behaves in accordance with EN 50170, Part 3
is known as a DP slave.

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Glossary-4 EWA 4NEB 710 6084-02
 Glossary

Equipotential bonding
Electrical connection (equipotential bonding conductor) which gives the bodies of
electrical equipment and external conducting bodies the same or approximately the
same potential, in order to prevent disturbing or dangerous voltages from being
generated between these bodies.

Error display
The error display is one of the possible responses of the operating system to a ³
runtime error. The other possible responses are: ³ error response in the user
program, STOP status of the CPU.

Error handling via OB

If the operating system detects a specific error (e.g. an access error with STEP
7), it calls the organization block (error OB) which is provided for this event and
which specifies the subsequent behavior of the CPU.

Error response
Response to a ³ runtime error. The operating system can respond in the following
ways: conversion of the programmable controller to the STOP mode, call of an
organization block in which the user can program a response or display of the
error.

External power supply

Power supply for the signal and function modules and the process peripherals
connected to them.

FB
³ Function block

FC
³ Function

Flash EPROM
FEPROMs are the same as electrically erasable EEPROMS in that they can retain
data in the event of a power failure, but they can be erased much more quickly
(FEPROM = Flash Erasable Programmable Read Only Memory). They are used
on ³ memory cards.

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EWA 4NEB 710 6084-02 Glossary-5
Glossary

Force
The “Force” function overwrites a variable (e.g. memory marker, output) with a
value defined by the S7 user. At the same time the variable is assigned write
protection so that this value cannot be modified from any point (including from the
STEP 7 user program). The value is retained after the programming device is
disconnected. The write protection is not canceled until the “Unforce” function is
called and the variable is written again with the value defined by the user program.
During commissioning, for example, the “Force” function allows certain outputs to
be set to the “ON” state for any length of time even if the logic operations of the
user program are not fulfilled (e.g. because inputs are not wired).

Function
A function (FC) in accordance with IEC 1131-3 is a ³ code block without ³ static
data. A function allows parameters to be passed in the user program. Functions
are therefore suitable for programming complex functions, e.g. calculations, which
are repeated frequently.

Function block
A function block (FB) in accordance with IEC 1131-3 is a ³ code block with
³ static data. An FB allows parameters to be passed in the user program.
Function blocks are therefore suitable for programming complex functions, e.g.
closed-loop controls, mode selections, which are repeated frequently.

Functional grounding
Grounding which has the sole purpose of safeguarding the intended function of the
electrical equipment. Functional grounding short-circuits interference voltage which
would otherwise have an impermissible impact on the equipment.

GD circle
A GD circle encompasses a number of CPUs which exchange data by means of
global data communication and which are used as follows:
S One CPU sends a GD packet to the other CPUs.
S One CPU sends and receives a GD packet from another CPU.
A GD circle is identified by a GD circle number.

GD element
A GD element is generated by assigning the ³ global data to be shared and is
identified by the global data identifier in the global data table.

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 Glossary

GD packet
A GD packet can consist of one or more ³ GD objects which are transmitted
together in a frame.

Global data
Global data is data which can be addressed from any ³ code block (FC, FB, OB).
In detail, this refers to memories M, inputs I, outputs Q, timers, counters and data
blocks DB. Absolute or symbolic access can be made to global data.

Global data communication

Global data communication is a procedure used to transfer ³ global data between
CPUs (without CFBs).

Ground
The conducting earth whose electrical potential can be set equal to zero at any
point.
In the vicinity of grounding electrodes, the earth can have a potential different to
zero. The term “reference ground” is frequently used to describe these
circumstances.

Ground (to)
To ground means to connect an electrically conducting component to the grounding
electrode (one or more conducting components which have a very good contact
with the earth) across a grounding system.

Instance data block

A data block, which is generated automatically, is assigned to each function block
call in the STEP 7 user program. The values of the input, output and in/out
parameters are stored in the instance data block, together with the local block
data.

Interface, multipoint
³ MPI

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Glossary

Interrupt
The ³ operating system of the CPU recognizes 10 different priority classes which
control the execution of the user program. These runtime levels include interrupts,
e.g. process interrupts. When an interrupt is triggered, the operating system
automatically calls an assigned organization block in which the user can program
the desired response (for example in an FB).

Interrupt, delay
The time-delay interrupt belongs to one of the priority levels for program execution
in the SIMATIC S7 system. The interrupt is generated after expiry of a time delay
started in the user program. A corresponding organization block is then executed.

Interrupt, diagnostic
³ Diagnostic interrupt

Interrupt, process
³ Process interrupt

Interrupt, time-of-day
The time-of-day interrupt belongs to one of the runtime levels for program
execution on the SIMATIC S7 system. The interrupt is generated on a certain date
(or daily) at a certain time (e.g. 9:50 or every hour, every minute). A corresponding
organization block is then executed.

Interrupt, watchdog
A watchdog interrupt is generated periodically by the CPU in configurable time
intervals. A corresponding ³ organization block is then executed.

Isolated
On isolated I/O modules, the reference potentials of the control and load circuits
are galvanically isolated, for example by optocoupler, relay contact or transformer.
Input/output circuits can be connected to a common potential.

Load memory
The load memory is part of the central processing unit. It contains objects
generated by the programming device. It is implemented either as a plug-in
memory card or a permanently integrated memory.

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 Glossary

Local data
³ Data, temporary

Master
When they are in possession of the ³ token, masters can send data to other
nodes and request data from other nodes (= active node).

Memory card
Memory cards are memory media in smart card format for CPUs and CPs. They
are implemented as ³ RAM or ³ FEPROM.

Module parameters
Module parameters are values which can be used to control the response of the
module. A distinction is made between static and dynamic module parameters.

MPI
The multipoint interface (MPI) is the programming device interface of SIMATIC S7.
It enables the simultaneous operation of several stations (programming devices,
text displays, operator panels) on one or more central processing units. Each
station is identified by a unique address (MPI address).

MPI address
³ MPI

Nesting depth
One block can be called from another by means of a block call. Nesting depth is
the number of ³ code blocks called at the same time.

Non-isolated
On non-isolated input/output modules, there is an electrical connection between
the reference potentials of the control and load circuits.

OB
³Organization block

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Glossary

OB priority
The ³ operating system of the CPU distinguishes between various priority
classes, such as cyclic program scanning, process interrupt-driven program
scanning, etc. Each priority class is assigned ³ organization blocks (OB) in which
the S7 user can program a response. The OBs have different standard priorities
which determine the order in which they are executed or interrupted in the event
that they are activated simultaneously.

Organization block
Organization blocks (OBs) represent the interface between the operating system of
the CPU and the user program. The processing sequence of the user program is
defined in the organization blocks.

Operating mode
The SIMATIC S7 programmable controllers have the following operating modes:
STOP, ³START-UP, RUN.

Operating system of the CPU

The operating system of the CPU organizes all functions and processes of the
CPU which are not associated with a special control task.

Parameter
1. Variable of a STEP 7 code block
2. Variable for setting the behavior of a module (one or more per module). Each
module is delivered with a suitable default setting, which can be changed by
configuring the parameters in STEP 7.
Parameters can be ³ static parameters or ³ dynamic parameters

Parameters, dynamic
Unlike static parameters, dynamic parameters of modules can be changed during
operation by calling an SFC in the user program, for example limit values of an
analog signal input module.

Parameters, static
Unlike dynamic parameters, static parameters of modules cannot be changed by
the user program, but only by changing the configuration in STEP 7, for example
the input delay on a digital signal input module.

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 Glossary

PG
³ Programming device

Priority class
The operating system of an S7-CPU provides up to 26 priority classes (or “runtime
levels”) to which various organization blocks are assigned. The priority classes
determine which OBs interrupt other OBs. If a priority class includes several OBs,
they do not interrupt each other, but are executed sequentially.

PROFIBUS-DP
Digital, analog and intelligent modules of the programmable controller as well as a
wide range of field devices to EN 50170, part 3, such as drivers or valve terminals,
are installed in a distributed configuration in the direct vicinity of the process -
across distances of up to 23 km (14.375 miles).
The modules and field devices are connected to the programmable controller via
the PROFIBUS-DP fieldbus and addressed in the same way as centralized I/Os.

PLC
³ Programmable controller

Programmable controller
Programmable controllers (PLCs) are electronic controllers whose function is
saved as a program in the control unit. The configuration and wiring of the unit are
therefore independent of the function of the control system. The programmable
controller has the structure of a computer; it consists of a ³ CPU (central
processing unit) with memory, input/output groups and an internal bus system. The
I/Os and the programming language are oriented to control engineering needs.

Process image
The process image is part of the ³ system memory of the CPU. The signal states
of the input modules are written into the process-image input table at the start of
the cyclic program. At the end of the cyclic program, the signal states in the
process-image output table are transferred to the output modules.

Process interrupt
A process interrupt is triggered by interrupt-triggering modules on the occurrence
of a specific event in the process. The process interrupt is reported to the CPU.
The assigned ³ organization block is then processed in accordance with the
priority of this interrupt.

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Glossary

Programming device
Programming devices are essentially personal computers which are compact,
portable and suitable for industrial applications. They are equipped with special
hardware and software for SIMATIC programmable controllers.

RAM
A RAM (random access memory) is a semiconductor read/write memory.
The following can be made retentive:
S Bit memories
S S7 timers (not for CPU 312 IFM)
S S7 counters
S Data areas (only with memory card or integral EPROM)

Reference ground
³ Ground

Reference potential
Potential with reference to which the voltages of participating circuits are observed
and/or measured.

Restart
When a central processing unit is started up (e.g. by switching the mode selector
from STOP to RUN or by switching the power on), organization block OB 100
(complete restart) is executed before cyclic program execution commences (OB
1). On a complete restart, the process-image input table is read in and the STEP 7
user program is executed starting with the first command in OB 1.

Retentivity
A memory area is retentive if its contents are retained even after a power failure
and a change from STOP to RUN. The non-retentive area of memory markers,
timers and counters is reset following a power failure and a transition from the
STOP mode to the RUN mode.

Runtime error
Error which occurs during execution of the user program on the programmable
controller (and not in the process).

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 Glossary

Segment
³ Bus segment

Set breakpoint

SFB
³ System function block

SFC
³ System function

Scan rate
The scan rate determines the frequency with which ³ GD packets are transmitted
and received on the basis of the CPU cycle.

Signal module
Signal modules (SM) represent the interface between the process and the
programmable controller. Input and output modules can be digital (input/output
module, digital) or analog (input/output module, analog).

Slave
A slave can only exchange data with a ³ master when so requested by the
master.

Start-up
RESTART mode is activated on a transition from STOP mode to RUN mode.
Can be triggered by the ³ mode selector or after power on or an operator action
on the programming device. In the case of the S7-300 a ³ restart is carried out.

STEP 7
Programming language for developing user programs for SIMATIC S7 PLCs.

Substitute value
Substitute values are configurable values which output modules transmit to the
process when the CPU switches to STOP mode.

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Glossary

System diagnostics
System diagnostics is the term used to describe the detection, evaluation and
signaling of errors which occur within the programmable controller. Examples of
such errors are program errors or module failures. System errors can be displayed
with LED indicators or in STEP 7.

System function
A system function (SFC) is a
³ function integrated in the operating system of the CPU that can be called, as
required, in the STEP 7 user program.

System function block

A system function block (SFB) is a ³ function block which is integrated in the
operating system of the CPU and which can be called in the STEP 7 user program
as required.

System memory
The system memory is integrated on the central processing unit and implemented
as a RAM memory. The system memory includes the operand areas (for example
timers, counters, bit memories, etc.) as well as the data areas (for example
communication buffers) required internally by the ³ operating system.

System state list

The system status list contains data describing the current status of an S7-300.
You can use it to gain an overview of the following at any time:
S The S7-300 configuration
S The current parameterization of the CPU and the parameterizable signal
modules
S The current statuses and sequences in the CPU and the parameterizable signal
modules.

Terminating resistor
A terminating resistor is a resistor used to terminate a data communication line in
order to prevent reflection.

Time-of-day interrupt
³ Interrupt, time-of-day

S7-300 Programmable Controller Hardware and Installation

Glossary-14 EWA 4NEB 710 6084-02
 Glossary

Timer
³ Times

Times (timer cells)

Times are part of the ³ system memory of the CPU. The contents of the “timer
cells” are updated automatically by the operating system asynchronously to the
user program. STEP 7 instructions are used to define the exact function of the
timer cells (for example on-delay) and initiate their execution (e.g. start).

Token
Access right on bus

Transmission rate
Rate of data transfer (bps)

Ungrounded
Having no galvanic connection to ground

User memory
The user memory contains the ³ code and ³ data blocks of the user program.
The user memory can be integrated in the CPU or can be provided on plug-in
memory cards or memory modules. The user program is always executed in the ³
working memory of the CPU, however.

User program
The SIMATIC system distinguishes between the ³ operating system of the CPU
and user programs. The latter are created with the programming software ³ STEP
7 in the available programming languages (ladder logic and statement list) and
saved in code blocks. Data are stored in data blocks.

Varistor
Voltage-independent resistor

Version
The product version differentiates between products which have the same order
number. The product version is increased with each upwardly compatible function
extension, production-related modification (use of new components) or bug-fix.

S7-300 Programmable Controller Hardware and Installation

EWA 4NEB 710 6084-02 Glossary-15
Glossary

Watchdog interrupt
³ Interrupt, watchdog

Working memory
The working memory is a random-access memory in the ³ CPU which the
processor accesses during program execution.
In the event of an input access error, a substitute value can be written to the
accumulator instead of the input value which could not be read (SFC 44).

S7-300 Programmable Controller Hardware and Installation

Glossary-16 EWA 4NEB 710 6084-02
Index
A Bus connector, 5-15
connecting to the module, 5-18
Accessories, G-1
disconnecting, 5-19
Accumulator, Glossary-1
purpose, 5-17
backup, 8-5
setting the terminating resistor, 5-18
changing, 7-2
Bus runtimes, PROFIBUS-DP subnet, 10-9
inserting, 6-4
Bus segment, Glossary-2
Address, Glossary-1
See also Segment
Address allocation, user-defined, 3-4
BUSF, 9-4, 9-16
Address area, CPU 31x-2, 9-2
Addresses
analog module, 3-6
digital module, 3-5 C
integrated inputs and outputs, 3-8 Cable length, maximum, 5-13
Addressing, 3-1 Cable lengths, in the subnet, 5-12
default, 3-2 Cable/wiring routing
slot-based, 3-2 EMC, 4-17–4-19
Ambient temperature, permissible, 2-2 inside buildings, 4-13
Analog module, Glossary-1 outside buildings, 4-17–4-19
addresses, 3-6 Cables, shielded, connecting, 4-39
Approvals, A-1 Calculation, response time, 10-3
Area of application, A-2 Calculation example, interrupt response time,
Arrangement, of modules, 2-5 10-16
CE, symbol, A-1
Changing
B modules, 7-5
the accumulator, 7-2
Backplane bus, Glossary-1
the backup battery, 7-2
Backup, 8-5
Characteristic impedance. See Terminating
Backup battery, Glossary-1
resistor
backup, 8-5
Chassis ground, Glossary-2
changing, 7-2
Clearance measurements, 2-3
disposal, 7-3
Clock, CPU, 8-9
inserting, 6-4
Code block, Glossary-2
Backup, memory, Glossary-2
Cold start, 6-12
Basic circuit diagram, CPU 312 IFM, 8-27
with mode selector, 6-12
BATF, 8-15
with mode selector, 6-14
Battery, Glossary-1
Commissioning, 6-1
Bit memory, Glossary-2
CPU 31x-2 as a DP master, 6-17
Bus, Glossary-2
CPU 31x-2 as DP slave, 6-18
backplane, Glossary-1
PROFIBUS-DP, 6-16
Bus cable
software prerequisites, 6-1
connection to the RS 485 Repeater, 5-21
length of spur lines, 5-13
PROFIBUS, 5-16

S7-300 Programmable Controller Hardware and Installation

EWA 4NEB 710 6084-02 Index-1
Index

Communication CPU
CPU, 8-11 clock, 8-9
CPU 318-2, 8-57 communication, 8-11
global data, 8-11 control elements, 8-2
PG/OP-CPU, 8-11 differences between the versions, 11-4
Communication SFCs for configured S7 dimensioned drawing, E-1
connections, 8-11 display elements, 8-2
Communication SFCs for non-configured S7 fault displays, 8-3
connections, 8-11 mode selector, 8-4
Communication via MPI, cycle load, 10-2 operating system, Glossary-10
Components resetting, 6-11
for MPI subnet, 5-6 runtime meter, 8-9
for PROFIBUS-DP subnet, 5-6 status displays, 8-3
for the MPI subnet, 5-15 system state list, D-1
for the PROFIBUS-DP subnet, 5-15 testing functions, 8-13
of an S7-300, 1-3 wiring, 4-32
Compression, Glossary-3 CPU 312 IFM, 8-18
Configuration, Glossary-3 basic circuit diagram, 8-27
arrangement of modules, 2-5 connecting the power supply, 8-27
grounded reference potential, 4-9 grounded configuration, 8-26
in the TN-S system, 4-7 integrated functions, 8-18
lightning protection, 4-20 short-circuit characteristics, 8-27
mechanical, 2-1, 2-2 technical specifications, 8-22
overvoltage protection, 4-20 terminal connections, 8-26
ungrounded reference potential, 4-9 CPU 313, 8-28
with isolated modules, 4-11 technical specifications, 8-28
with non-isolated modules, 4-13 CPU 314, 8-30
with process I/Os, 4-5 technical specifications, 8-30
Configuration frame, 9-32 CPU 314 IFM, 8-32
Connecting basic circuit diagrams, 8-45
a programming device, 6-5 integrated functions, 8-32
bus connector, 5-18 technical specifications, 8-36
Connecting cables, for interface modules, 2-7 wiring schematic, 8-44
Consistent data, Glossary-3 CPU 315, 8-48
CONT_C, CPU 314 IFM, 8-32 technical specifications, 8-48
CONT_S, CPU 314 IFM, 8-32 CPU 315-2 DP, 8-50
Contents of the manual, iii See also CPU 31x-2
Control elements, CPU, 8-2 commissioning as a DP master, 6-17
Counter, Glossary-3 commissioning as a DP slave, 6-18
CPU 312 IFM, 8-18 DP master, 9-3
CPU 314 IFM, 8-32 technical specifications, 8-50
Counter A/B, CPU 314 IFM, 8-32

S7-300 Programmable Controller Hardware and Installation

Index-2 EWA 4NEB 710 6084-02
 Index

CPU 316-2 DP, 8-53 Diagnosis

See also CPU 31x-2 LED display, 8-15
commissioning as a DP master , 6-17 module, CPU 315-2 DP as DP slave, 9-25
commissioning as a DP slave, 6-18 station, CPU 31x-2 as slave, 9-26
technical specifications, 8-53 with STEP 7, 8-15
CPU 318-2, 8-56 Diagnostic addresses, CPU 31x-2, 9-8, 9-19
See also CPU 31x-2 Diagnostic buffer, Glossary-4
commissioning as a DP master, 6-17 Diagnostic interrupt, Glossary-4
commissioning as a DP slave, 6-18 CPU 31x-2 as DP slave, 9-27
communication, 8-57 Diagnostic interrupt response time, of the
differences to other CPU 300s, 11-2 CPUs, 10-15
technical specifications, 8-57 Diagnostics
CPU 31x-2 CPU 31x-2 as DP slave, 9-15
bus interruption, 9-9, 9-20, 9-37 direct communication, 9-37
diagnostic addresses for PROFIBUS, 9-8, system, Glossary-14
9-19 Differences, 318-2 to other CPUs, 11-2
direct communication, 9-36 Digital module, addresses, 3-5
DP address areas, 9-2 Dimensioned drawing, CPU, E-1
DP master Direct communication
diagnosis with LEDs, 9-4 CPU 31x-2, 9-36
diagnostics with STEP 7, 9-5 diagnostics, 9-37
DP slave, 9-10 Display elements, CPU, 8-2
diagnosis with LEDs, 9-16 Disposal, v
diagnosis with STEP 7, 9-16 backup battery, 7-3
diagnostics, 9-15 Documentation package, iii
intermediate memory, 9-11 DP master, Glossary-4
status changes, 9-9, 9-20, 9-37 CPU 31x-2, 9-3
CSA, A-2 diagnosis with LEDs, 9-4
Custumer Support, vii diagnostics with STEP 7, 9-5
Cycle control, processing time, 10-6 DP slave, Glossary-4
Cycle extension, through interrupts, 10-10 CPU 31x-2, 9-10
Cycle load, communication via MPI, 10-2 diagnosis with LEDs, 9-16
Cycle time, 10-2, Glossary-3 diagnosis with STEP 7, 9-16
calculation example, 10-10 DP slave diagnosis, structure, 9-21
extending, 10-3

E
D Electrical installation, configuring, 4-2
Data Electrical interference, protection against, 4-4
consistent, Glossary-3 EMC, cable/wiring routing, 4-17
statistic, Glossary-4 Emergency stop, 4-2
temporary, Glossary-4 Equipotential bonding, 4-22, Glossary-5
Data block, Glossary-3 Error display, Glossary-5
Default addressing, 3-2 Error response, Glossary-5
Delay, of inputs / outputs, 10-8 ESD guideline, F-1
Delay interrupt, Glossary-8 Execution time, user program, 10-2
reproducibility, 10-17
Device. See Node
Device master file, Glossary-4

S7-300 Programmable Controller Hardware and Installation

EWA 4NEB 710 6084-02 Index-3
Index

F IEC counters, SFBs, list of, C-8

IEC function, C-1
Fault displays, CPU, 8-3
IEC functions, FCs, list of the, C-8
Fixing bracket, for shield terminals, 4-39
IEC timers, SFBs, list of, C-8
FM, approval, A-2
Inputs, delay time, 10-8
Force, Glossary-6
Inputs/outputs
Forcing, 8-13
integrated, CPU 312 IFM, 8-18
Frequency meter
integrated, CPU 314 IFM, 8-32
CPU 312 IFM, 8-18
Installation, 2-9
CPU 314 IFM, 8-32
configuring, 2-2
Front connector
electrical, configuring, 4-2
wiring, 4-35
horizontal, 2-2
wiring position, 4-36
of the modules, 2-13
Front connector coding key
vertical, 2-2
removing from the front connector, 7-8
Installation dimensions, of the modules, 2-4
removing from the module, 7-7
Installing
Front connector encoding, 4-38
RS 485 repeater, 5-20
Function, FC, Glossary-6
the rail, 2-9
Function block, FB, Glossary-6
Instance data block, Glossary-7
Functional grounding, Glossary-6
Insulation monitoring, 4-10
Fuses, replacing, 7-9
Integrated functions, CPU 314 IFM, 8-32
Integrated inputs and outputs, addresses, 3-8
Integrated inputs/outputs
G of the CPU 312 IFM, 8-18
GD circle, Glossary-6 of the CPU 314 IFM, 8-32
receive conditions, 8-12 wiring, 4-35
GD circuit Interface, CPU, 8-7
scan rate, 8-12 Interface module, connecting cables, 2-7
send conditions, 8-12 Interface modules, 2-6
GD element, Glossary-6 Intermediate memory
GD packet, Glossary-7 CPU 31x-2, 9-11
Global data, Glossary-7 for data transfer, 9-11
send cycles, 8-12 Internet, up-to-date information, vii
Global data communication, 8-11 Interrupt, Glossary-8
Ground, Glossary-7 delay, Glossary-8
Ground (to), Glossary-7 diagnostic, Glossary-4
Grounded configuration, CPU 312 IFM, 8-26 process-, Glossary-11
Grounding concept, 4-6 time-of-day, Glossary-8
GSD file, Glossary-4 watchdog, Glossary-8
Guideline, EGB, F-1 Interrupt response time, 10-14
Guidelines, for operating an S7-300, 4-2 calculation example, 10-16
Interrupts
CPU 315-2 DP as DP slave, 9-28
H cycle extension, 10-10
Isolated, Glossary-8
Highest MPI address, 5-2
Highest PROFIBUS address, 5-2
K
I Key, inserting, 2-15
Key switch. See Mode selector
IEC 1131, A-1

S7-300 Programmable Controller Hardware and Installation

Index-4 EWA 4NEB 710 6084-02
 Index

L Modules
installation, 2-13
Labeling strip, 4-38
isolated, 4-11
Laying rules, PROFIBUS bus cable, 5-17
open, 2-1
Lightning protection, 4-20
replacing, 7-5
high-voltage protection, 4-23
MPI, Glossary-9
low-voltage protection, 4-27
MPI address
Lightning protection zones, 4-21
highest, 5-2
Lightning strike, effects, 4-21
recommendation, 5-4
Load circuit, grounding, 4-6
MPI addresses, rules, 5-3
Load memory, Glossary-8
MPI interface, 8-7
Load power supplies, features, 4-6
MPI subnet
Load power supply, from the PS 307, 4-8
cable lengths, 5-12
Local data, Glossary-9
components, 5-6, 5-15
configuration example, 5-9, 5-11
configuration rules, 5-5
M segment, 5-12
Mains voltage, set to the power supply, 4-34 MRES mode, 8-4
Maintenance. See Replacing
Manufacturer ID, CPU 31x-2 as DP slave, 9-24
Master PROFIBUS address, 9-24 N
Memory
Nesting depth, Glossary-9
backup, Glossary-2
Network components, 5-15
load, Glossary-8
Networking, 5-1
system, Glossary-14
Node, 5-2
user, Glossary-15
Non-isolated, Glossary-9
working, Glossary-16
Memory card, 8-6, Glossary-9
changing, 6-3–6-20
inserting, 6-3–6-20 O
purpose, 8-6 OB, B-1, Glossary-10
Memory reset, 6-11 OB 40
MPI parameters, 6-16 start information for inputs/outputs, 8-33
with mode selector, 6-12 start information for integrated
Mode selector, 8-4 inputs/outputs, 8-19
cold start, 6-12 OB priority, Glossary-10
cold start with, 6-14 Open modules, 2-1
resetting the memory with, 6-12 Operating an S7-300
Module guidelines, 4-2
accessories, G-1 rules, 4-2
arrangement, 2-5 Operating mode, Glossary-10
installation dimensions, 2-4 Operating system
non-isolated, 4-13 of the CPU, Glossary-10
removing, 7-6 processing time, 10-6
Module diagnosis, CPU 31x-2 as DP slave, Organization block, B-1, Glossary-10
9-25 Outputs, delay time, 10-8
Module parameter, Glossary-9 Overvoltage, 4-21
Module start address, 3-2 Overvoltage protection, 4-17, 4-20

S7-300 Programmable Controller Hardware and Installation

EWA 4NEB 710 6084-02 Index-5
Index

P Protective conductor connection, on rail, 2-12

Protective measures, for the whole plant, 4-5
Parameter, Glossary-10
PULSEGEN, CPU 314 IFM, 8-32
Parameter assignment frame, 9-30
Parameters, modules, Glossary-9
PG/OP-CPU communication, 8-11
PNO, certificate, A-3 R
Positioning, CPU 314 IFM, 8-32 Rail
Power connector, 4-32 installing, 2-9
Power Consumption, of an S7-300, rules, 4-4 length, 2-4
Power loss, of an S7-300, rules, 4-4 protective conductor connection, 2-12
Power supply, setting the mains voltage, 4-34 Receive conditions, GD circuit, 8-12
Power supply module, wiring, 4-32 Recycling, v
Priority, OB, Glossary-10 Reference literature, H-1
Priority class, Glossary-11 Reference potential
Process image, Glossary-11 grounded, 4-9
Process image update, processing time, 10-6 ungrounded, 4-9
Process interrupt, Glossary-11 Release. See Version
CPU 312 IFM, 8-18 Removing, module, 7-6
CPU 314 IFM, 8-32 Repeater. See RS 485-Repeater
CPU 31x-2 as DP slave, 9-27 Replacement parts, G-1
Process interrupt handling, 10-15 Replacing
Process interrupt response time fuses, 7-9
of the CPUs, 10-14 modules, 7-5
of the signal modules, 10-15 Reproducibility, delay/watchdog interrupts,
Processing time 10-17
cycle control, 10-6 Reset, with mode selector, 8-4
operating system, 10-6 Response time, 10-3
process image update, 10-6 calculation, 10-3
user program, 10-7 calculation example, 10-10
PROFIBUS address, highest, 5-2 calculation of, 10-6
PROFIBUS addresses interrupt, 10-14
recommendation, 5-4 longest, 10-5
rules, 5-3 shortest, 10-4
PROFIBUS bus cable, 5-15, 5-16 Restart, Glossary-12
laying rules, 5-17 Retentivity, Glossary-12
PROFIBUS-DP, Glossary-11 Routing, 8-11
commissioning, 6-16 RS 485 repeater, 5-15, 5-19
PROFIBUS-DP interface, 8-7 connecting the bus cable, 5-21
PROFIBUS-DP subnet RS 485-Repeater, installation, 5-20
bus runtimes, 10-9 Rules
cable lengths, 5-12 for operating an S7-300, 4-2
components, 5-6, 5-15 for the configuration of a subnet, 5-5
configuration example, 5-10, 5-11 for wiring, 4-30
configuration rules, 5-5 RUN mode, 8-4
Programming device Runtime error, Glossary-12
connecting, 6-5 Runtime meter, CPU, 8-9
to an ungrounded configuration, 6-9
via spur line to subnet, 6-8
Protection against electrical interference, 4-4

S7-300 Programmable Controller Hardware and Installation

Index-6 EWA 4NEB 710 6084-02
 Index

S Surge protection, components, 4-26, 4-27

Switching on, first time, 6-10
S7 timers, updating, 10-7
System diagnosis, Glossary-14
S7-300, 1-2
System function, SFC, Glossary-14
accessories, G-1
System function block, SFB, Glossary-14
components, 1-3
System functions, C-1
grounding concept, 4-6
System memory, Glossary-14
replacement parts, G-1
System state list, D-1
switching on for the first time, 6-10
Scan rate, Glossary-13
GD circuit, 8-12
Scope, of this manual, iv T
Segment, 5-5 Terminating resistor, 5-6, Glossary-14
MPI subnet, 5-12 example, 5-8
Send conditions, GD circuit, 8-12 setting on the bus connector, 5-18
Send cycles, for global data, 8-12 Testing functions, 8-13
SF, 8-15 Time-of-day interrupt, Glossary-8
SFB, C-1 Times (timer cells), Glossary-15
SFBs, list of the, C-2 Tips and tricks, 12-1
SFC, C-1
SFCs, list of the, C-2
Shield contact element, 4-39 U
Shield terminal, 4-39
UL, A-2
Short-circuit characteristics, CPU 312 IFM,
Ungrounded, Glossary-15
8-27
Ungrounded configuration, connecting a
Signal module, Glossary-13
programming device, 6-9
SIMATIC S7, reference literature, H-1
Updating, of the S7 timers, 10-7
SINEC L2-DP. See PROFIBUS-DP
User memory, Glossary-15
Slot number, 3-2
User program, Glossary-15
Slot numbers, assigning, 2-15
processing time, 10-7
Spur lines, length, 5-13
User program execution time, 10-2
SSL. See System state list
User-defined address allocation, 3-4
Standards, A-1
Start information for inputs/outputs, OB 40,
8-33
Start information for integrated inputs/outputs, V
OB 40, 8-19 Version, Glossary-15
Start-up, Glossary-13
CPU 31x-2 DP as a DP slave, 6-19
CPU 31x-2 DP as DP master, 6-17 W
Station diagnosis, CPU 31x-2 as DP slave,
Watchdog interrupt, Glossary-8
9-26
reproducibility, 10-17
Station status 1 to 3, 9-22
Wiring, 4-30
Status displays, CPU, 8-3
integrated inputs/outputs, 4-35
STOP, LED, 8-15
the CPU, 4-32
STOP mode, 8-4
the front connector, 4-35
Strain relief, 4-37
the power supply module, 4-32
Subnet, 5-1
Wiring position, of the front connector, 4-36
Substitute value, Glossary-13
Wiring rules, 4-30
Supply, grounded, 4-5
Working memory, Glossary-16

S7-300 Programmable Controller Hardware and Installation

EWA 4NEB 710 6084-02 Index-7
Index

S7-300 Programmable Controller Hardware and Installation

Index-8 EWA 4NEB 710 6084-02
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_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _
_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _
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S7-300 Programmable Controller Hardware and Installation

2 EWA 4NEB 710 6084-02