0% found this document useful (0 votes)
4 views9 pages

Shaper Design CMOS

The document discusses the design of CMOS shapers for high dynamic range in front-end electronics for capacitive sensors. It introduces the concept of delayed dissipative feedback (DDF) to enhance dynamic range while minimizing capacitance and noise. The analysis compares classical configurations and highlights the advantages of using passive components in feedback for improved performance.

Uploaded by

4ok0g1ug9
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
0% found this document useful (0 votes)
4 views9 pages

Shaper Design CMOS

The document discusses the design of CMOS shapers for high dynamic range in front-end electronics for capacitive sensors. It introduces the concept of delayed dissipative feedback (DDF) to enhance dynamic range while minimizing capacitance and noise. The analysis compares classical configurations and highlights the advantages of using passive components in feedback for improved performance.

Uploaded by

4ok0g1ug9
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 9

2382 IEEE TRANSACTIONS ON NUCLEAR SCIENCE, VOL. 58, NO.

5, OCTOBER 2011

Shaper Design in CMOS for High Dynamic Range


Gianluigi De Geronimo and Shaorui Li

Abstract—We start with an analysis of the configurations com-


monly adopted to implement linear shapers. We show that, once
the ENC from the charge amplifier is defined, the dynamic range
of the system is set by the voltage swing and the value of the ca-
pacitance realizing the poles. The configuration used to realize the
poles has also an impact, and those configurations based on passive
components in feedback are expected to offer a higher dynamic
range than the ones that use both active and passive components,
like scaling mirrors. Finally, we introduce the concept of delayed
dissipative feedback (DDF), which consists of delaying the resis-
tive feedbacks from the furthest available nodes along the shaping Fig. 1. First order schematic of a charge amplifier followed by a shaper.
chain. We will show that, in order to implement semi-Gaussian
shapers, a small capacitor in positive feedback is required. The
DDF technique can overcome some of the limitations of the more semi-Gaussian shape is about 12.5% higher than the one for the
classical configurations. For example, in a third order shaper a
factor of two higher dynamic range can be obtained or, at equal
optimum shape (i.e. infinite cusp) [2], [3].
dynamic range, about 25% of the capacitance is needed (i.e. about In Section II we analyze the classical configurations based
30% of the area in practical cases). on voltage feedback with passive components. In Section III
Index Terms—CMOS, high dynamic range, low-noise, shaper.
we briefly discuss some alternative configurations which make
use of additional active devices in feedback to provide current
scaling. Finally, in Section IV we introduce the concept of de-
I. INTRODUCTION layed dissipative feedback (DDF), which consists of delaying
the resistive feedbacks from the furthest available nodes along

F RONT-END electronics for capacitive sensors typically


includes a preamplifier followed by a filter. The preampli-
fier provides low-noise amplification of the signals induced in
the shaping chain. We will show that, in order to implement
semi-Gaussian shapers, a small capacitor in positive feedback
is required. The DDF technique can overcome some of the lim-
the sensor electrodes. The filter, by properly limiting the signal itations of the more classical configurations. For example, in a
bandwidth, maximizes the signal-to-noise (S/N) ratio. Addition- third order shaper a factor of two higher dynamic range can be
ally the filter limits the duration of the output signal associated obtained or, at equal dynamic range, about 25% of the capaci-
with the measured event and, for those sensors where the in- tance is needed (i.e. about 30% of the area in practical cases).
duced signal is relatively slow, it maximizes the signal ampli-
tude (i.e. it minimizes the ballistic deficit) [1]. II. NOISE AND DYNAMIC RANGE IN
Filters can be either time-variant or time-invariant. In elec- CLASSICAL CONFIGURATIONS
tronics for radiation sensors, filters are frequently referred to as
“shapers” since, in a time-domain view, they “shape” the re- Charge amplifiers, along with providing low-noise ampli-
sponse associated to the event. Filters can also be synthesized fication, offer a low input impedance (virtual ground) which
digitally, even though in most cases this is impractical due to stabilizes the potential of the sensor electrode and reduces the
constraints from power and real-estate budgets. inter-electrode cross-talk. The charge amplifier is schematized
This contribution focuses on the design of low-noise in Fig. 1, where we assume an ideal voltage amplifier with
analog shapers, but some basic blocks can be used as part of infinite gain and bandwidth (a finite gain and bandwidth would
time-variant filters. The most frequently adopted shape is the have negligible consequence on our analysis—if the dc loop
semi-Gaussian, available in different orders (i.e. number of gain is high and the rise time is a small fraction of the peaking
poles). Semi-Gaussian shapers are relatively easy to implement time).
and can offer a signal-to-noise ratio within a few percent The current induced in the sensing electrode is amplified
from the usually impractical optimal shapes. For example, with current gain (or charge gain) equal to the ratio of the
assuming white series and white parallel noise contributions, feedback impedance and the coupling impedance . This
the minimum Equivalent Noise Charge (ENC) for a high order ratio must be a real number (i.e. the gain ), in order to avoid
undesired tails in the output current injected in the next stage.
The output current is injected, with opposite polarity, into
the next stage, which offers another virtual ground and repre-
Manuscript received April 14, 2011; revised July 18, 2011; accepted July 19,
2011. Date of publication August 30, 2011; date of current version October 12, sents the input stage of the shaper. The current (or charge) is
2011. then filtered and converted into a voltage with transfer func-
The authors are with the Instrumentation Division, Brookhaven National Lab- tion . It is followed by further processing such as discrimina-
oratory, Upton, NY 11973 USA (e-mail: degeronimo@bnl.gov).
Color versions of one or more of the figures in this paper are available online
tion, peak- or time- detection, and/or counting. It is worth noting
at http://ieeexplore.ieee.org. that the charge amplifier can be implemented using two or more
Digital Object Identifier 10.1109/TNS.2011.2162963 charge-amplification stages with gains and overall

0018-9499/$26.00 © 2011 IEEE


DE GERONIMO AND LI: SHAPER DESIGN IN CMOS FOR HIGH DYNAMIC RANGE 2383

TABLE I
COEFFICIENTS FOR UNIPOLAR SHAPERS WITH REAL (R) AND
COMPLEX-CONJUGATE (C) POLES, DIFFERENT ORDERS

is not the case for the charge amplifier configuration in Fig. 2.


From (1) it can be observed that the contribution decreases as
increases. Since the peaking time is proportional to the time
Fig. 2. Schematic of a charge amplifier assuming a capacitive feedback for the constant, , we can write:
charge amplifier and a single-pole transimpedance amplifier as input stage of
the shaper.
(2)

charge gain given by the product of those. This is usually where depends on the type of shaping. Table I summarizes the
done when large values of are required, such as for sensors values of and for semi-Gaussian shapers with real poles
generating very small signals. (even and odd) and complex conjugate poles (odd only) where
For simplicity we assume for an infinite resistive compo- the first stage gives the real pole. In Table I are also reported
nent and a finite capacitive component . This is justified con- (the ENC coefficient for white series noise) and the two coeffi-
sidering that designers tend to keep the resistive component as cients (which takes into account the noise contribution of the
high as possible in order to minimize the parallel noise contri- next stages) and RDR (the relative dynamic range), both dis-
bution at the front-end. The coupling impedance will be capaci- cussed later in this section.
tive according to . We also assume, initially, that the It can now be observed that, for a given shaper, the contri-
input stage of the shaper is realized using a transimpedance am- bution only depends on the values of and . The
plifier with feedback impedance , thus pro- values of and also define the maximum charge that
viding the first pole of the shaper with time constant . the stage can process without saturation. If is the max-
Finally, we assume that the shaper amplifiers are characterized imum voltage swing at the output of the stage, it follows:
by infinite gain and are noiseless. The latter is justified by the
fact that, in most practical cases, the noise contribution from
(3)
the amplifiers can be made negligible by increasing the size and
power of the active devices (this is not always easy to achieve,
and then the noise from the amplifier must be taken into ac- We now express the dynamic range DR of the front-end as the
count). The configuration resulting from these assumptions is ratio between the maximum charge and the total ENC,
shown in Fig. 2, where the output waveform in response to which includes the from the charge amplifier and the
a charge Q is also shown, with peak amplitude . from the first stage of the shaper:
Starting from these assumptions and from the configuration
in Fig. 2, we can calculate the contribution to the Equivalent (4)
Noise Charge (ENC) of the first stage of the shaper. The noise
contribution comes from the dissipative component of the
shaper [4]. The parallel noise spectral density of is given by A design that aims at offering the highest possible resolution
4 and it can be reported as an equivalent parallel noise (lowest possible ENC) tends to keep negligible with re-
generator at the input of the charge amplifier by scaling it with spect to . Assuming about 10% (in power) it follows:
the square of the charge gain . It must be kept in mind that this
is done for calculation purposes and the actual noise source is
further down in the channel, not to be confused with the physical
sources of parallel noise at the input. It follows the contribution (5)
to the ENC of , given by: It is important to observe that depends inherently on
the input capacitance and on the peaking time . Here we
assume that the charge amplifier has been already optimized for
(1) given and , and that the design of the shaper (with the
10% requirement on the contribution) follows from that. Equa-
where is the ENC coefficient for white parallel noise [2], [3], tion (5) shows that the dynamic range increases with
[5] and is the peaking time (from 1% to peak) of the shaped and with the square root of . For a given shaper and ca-
signal. It is worth noting that an analysis based on a front-end pacitor value the dynamic is maximized if ,
voltage amplifier without feedback (see for example Fig. 6.11 in where is the maximum voltage allowed by the technology,
[5]) would give dependent on the input capacitance, which which means that the shaper amplifier must implement a rail-to-
2384 IEEE TRANSACTIONS ON NUCLEAR SCIENCE, VOL. 58, NO. 5, OCTOBER 2011

Fig. 4. Schematic of a charge amplifier followed by a shaper with real coinci-


dent poles.

that the maximum charge of interest may differ from the max-
imum charge that can be processed by the front-end). In
Fig. 3. Example of DR and ENC vs. charge gain Ac. The four cases of , other words, decreasing the value of increases the maximum
2, 11, and 31 are pointed out. charge beyond the one of interest, while still increases the value
of ENC. In low-noise design, the increase in ENC is still ac-
ceptable if contained within 10% from , which means
rail output stage. Further increase can only be achieved by in- . For the value of is reduced about 50%
creasing the value of , which also means increasing (as (factor 1.91) with respect to .
in (3)) and the area (and power) of the first stage of the shaper. It is worth emphasizing one more time that, in this analysis,
For example, a CMOS 130 nm technology with 1.2 V supply the is assumed defined and optimized for noise (i.e. the
and typical MIM capacitance of 2 , assuming a CU-3 charge amplifier is designed for given and ) and that the
shaper with available area , the dy- design of the shaper follows from that. From (6) it can also be
namic range is limited, according to (5), to . observed that such defined DR does not depend on the peaking
For a given , higher values of dynamic range can only be time . However, once the system is designed with a given op-
obtained at the expense of the ENC, and the maximum would timized and a given , an adjustment of the peaking time
be achieved when dominates over . Equation (5) (obtained scaling the value of the resistors) would in most cases
can be written in the more general form: change and then would modify and the DR (while the
noise contribution from the shaper would not change).
So far we have assumed negligible the noise contribution
from subsequent stages, which provide the additional poles
of the shaper. We first consider the case of real coincident
(6) poles. These configurations are frequently referred to as
“ shapers” since they can be implemented using
one CR filter followed by filters of RC type, and they
where is the ratio between the squares of the total ENC
are assumed to be connected at the voltage output of the charge
and the from the first stage of the shaper: the higher the
amplifier. The resulting transfer function provides one zero in
first stage contribution, the lower the value of .
the origin, which compensates for the pole in the origin from
Fig. 3 shows an example of compromise between ENC
the feedback capacitor of the charge amplifier, and n poles
and dynamic range assuming the previous technology case
with time constant RC. The order of the shaper is equal to n
and . The four cases of , 2, 11,
(zeroes cancelled, n poles in total). The lowest possible order
and 31 (corresponding to , 1, 10,
without divergence of noise is (the well known and
and 30 respectively) are shown, and it can be observed how
widely adopted CR-RC shaper). The equations in the frequency
the dynamic range can be increased at the expense of the
(Laplace) and time domains are as follows:
ENC. Values of lower than 1.1 (ENC dominated by )
would not benefit much the DR but would further limit the
resolution by increasing the total ENC. The extreme case is for
(i.e. no charge amplification) where and (7)
. On the other hand, values of higher than 11 where n is the order and p are the real poles, coincident.
(ENC dominated by ) would not benefit much the ENC Fig. 4 shows a frequently adopted configuration for
but would further limit the DR. shapers. Each additional pole is obtained
From (6) it is observed that a reduction in area at equal DR adding one stage with components , , and , where
can be obtained by decreasing while keeping the ratio is the dc voltage gain. Assuming that the first stage operates
constant (the charge gain would decrease according to (3)). rail-to-rail, as required to minimize its and the following noise
However, the ENC will increase according to the square root of contributions, the performance of the shaper is maximized when
. also the subsequent stages operate rail-to-rail, which is obtained
For practical cases, where and the maximum charge with , , , , and
are given, a decrease in corresponds to a decrease in useful so on. We can estimate the noise contribution of the two dis-
dynamic range according to the square root of (note sipative components of the second stage, i.e. and .
DE GERONIMO AND LI: SHAPER DESIGN IN CMOS FOR HIGH DYNAMIC RANGE 2385

When reported as equivalent parallel generators at the input of


the first pole, the noise spectral densities are respectively given
by:

Fig. 5. Schematic of a charge amplifier followed by a shaper with complex


conjugate poles.

(8)
where n is the order, is the real pole (n odd only), and
and they can be combined into a single noise generator: are the real and imaginary parts of the complex-conjugate poles,
obtained as roots of the equation
(9) , while in the time domain are:

where we set for coincident poles. Such contri-


bution can be reported as an equivalent parallel noise generator
at the input of the charge amplifier by scaling it with the square
of the charge gain . After a few steps it follows the contribu-
tion to the ENC of the second stage, given by:

(13)
where the coefficients (magnitude and argument )
(10)
are given by:
where is the ENC coefficient for white parallel noise and
depends on the order of the shaper with for the second
order, 0.83 for the third order, 0.78 for the fourth order, and so
on. From (10) it can be observed that the noise contribution from
the second stage of the shaper, relative to the first, decreases
as the order increases and as the ratio increases, and in
principle can be made negligible for , i.e. at expenses
of area and power.
As the order increases, the noise contribution from the next
(14)
stages must be added. Eventually, the total contribution from the
shaper can be written as: Fig. 5 shows a frequently adopted configuration for these
shapers: if n is the order (odd in these cases), the real pole is
(11) given by the first stage and the complex conjugate poles are
given by the additional stages. Each additional stage
has transfer function:
where we assume rail-to-rail operation, is the average ca-
pacitance per pole, and for the second order, 1.13 for
the third order, 1.24 for the fourth order, 1.3 for the fifth order,
and so on. It is worth emphasizing that the contribution of each
additional stage can be made negligible by increasing its capac- (15)
itance relative to , which at equal gain (rail-to-rail operation)
corresponds to a reduction in the value of the resistors. where the values of (real pole), and , normal-
Next we consider the case of complex conjugate poles. These ized to the peaking time , can be obtained from Table II. The
configurations, introduced by Ohkawa [6], have a number of value of is about 20% of the value of , and we can thus
advantages [7], among which a faster return to zero at equal assume an average capacitance per pole .
peaking time with respect to the real poles of the same order. Evaluating the noise contribution of the dissipative compo-
The equations in the frequency (Laplace) domain are: nents of these stages is cumbersome. Eventually, the total con-
tribution from the shaper can be written again as in (11), where
we assume again rail-to-rail operation, is the average capac-
itance per pole, and for all orders. In these configura-
tions most of the noise contributions come from the series resis-
(12) tors . Once again it is worth emphasizing that, apart from the
first stage (real pole), the contributions can be made negligible
by increasing the value of the average capacitance per pole .
2386 IEEE TRANSACTIONS ON NUCLEAR SCIENCE, VOL. 58, NO. 5, OCTOBER 2011

TABLE II
DESIGN COEFFICIENTS FOR UNIPOLAR SHAPERS WITH
COMPLEX-CONJUGATE POLES, DIFFERENT ORDERS

Table I summarizes the value of for various orders. Also


included in Table I is the relative dynamic range RDR, i.e. the
DR normalized to the one for the RU-2 case, assuming the same
values for and (e.g. which is the practical case
where ), and assuming all shapers using
the same value of and . From Table I it may appear
that low order shapes offer a higher DR. A thorough compara-
tive analysis, though, should include the impact of the shape on
. For example, under constraint of finite pulse width (e.g.
rate constraint) and dominant white series noise, higher order
shapes offer a lower due to the higher symmetry (i.e.
longer peaking time at equal width). Higher order shapers can Fig. 6. Alternative configurations for the realization of low-noise single-pole
also offer some advantage in terms of pile-up reduction and bal- stages.
listic deficit [7].
We conclude this section by applying these results to the (5)
and (6) for the dynamic range, obtaining: low-noise single pole stages. The review would like to provide
insights on performance and noise analysis, without aiming at
being exhaustive. Some valuable information can also be found
in [8], [9].
The alternative configurations are shown in Fig. 6. They make
use of CMOS current mirrors to scale down the current in the
(16)
resistor R, thus reducing its noise contribution. In fact, if
is the scaling factor, the dissipative current feedback
For a given total capacitance , where n is through can be approximated as , where
the order of the shaper, the DR in (16) has a maximum around: . is the equivalent resistance which sets, with C, the
time constant of the filter, given by . The parallel noise
contribution from R, reported at the input of the stage, scales
(17) down with , being given by 4 , i.e. 4 .
It results that, at equal C and time constant, the noise contribu-
which, for all of low order shapers and the high order shapers tion from R is a factor lower than the one from in the
with complex conjugate poles, is about while for high corresponding configuration of Fig. 2.
order shapers with real coincident poles is somewhat lower. The On the other hand, design constraints for linearity and dy-
rest of the capacitance can be distributed in equal amount among namic range suggest that the dominant noise contribution comes
the additional poles, but it should be observed that slightly better from the channel noise of the last transistor of the feedback
results can be obtained assigning larger capacitance values to the chain, .
last stages. Since the maximum is relatively shallow, the value We start analyzing the configuration in Fig. 6(a). This config-
of DR obtained for is still a good approximation. uration can also make use of a cascode stage , as shown in
In the previously reported example with , the detail in Fig. 6(a), frequently used in complementary config-
, it follows and 2,800 for urations [10], [11]. In order to guarantee a linear response, the
CU-3 and RU-2 respectively. With the described configurations relationship must be satisfied, where is the
and assuming comparable area and power and given , the transconductance of (or the one of the cascode MOSFET,
shapers with real poles offer a dynamic range about 70% higher if applicable). This relationship imposes a limit to the minimum
than the ones with complex conjugate poles. current flowing through R. Assuming that operates in
moderate inversion (as required to mirrors to guarantee a large
enough voltage swing), its can be approximated as
III. ALTERNATIVE CONFIGURATIONS , where n is the sub-threshold factor ( typical)
In this Section we review some configurations which can be and is the thermal voltage ( 25 mV at 300 K). It
found, in part, in the literature and that could provide an al- follows the requirement on the voltage drop across R, given by
ternative solution to the voltage feedback circuit for realizing . Since operates in moderate inversion, its
DE GERONIMO AND LI: SHAPER DESIGN IN CMOS FOR HIGH DYNAMIC RANGE 2387

white noise spectral density is given by . By con-


sidering the mirror ratio and by imposing the relationship for
linear response it follows:

(18)

which shows that, at equal C and time constant (i.e. when


) the noise spectral density from would dominate, and
Fig. 7. Delayed dissipative feedback (DDF) applied to a second order shaper.
it would be larger than the one from in Fig. 2, given by 4
. The low-frequency noise component from should
also be added, but this contribution can be reduced, to some
extent, by increasing the gate area of (i.e. by increasing voltage drops. The same reference, interestingly, moves in the
both L and W of ). Finally, the non-stationary noise con- direction of delaying the feedback, which can offer improve-
tribution [12] should be considered, associated to the increase ments in noise. In the next section we introduce the concept of
in the drain current of in presence of a signal. In the time delayed dissipative feedback (DDF), applied to voltage-based
domain this contribution, integrated in C, can be approximated configuration.
as where is the signal current and is the peaking
time (a measure of the integration time). On the other hand, the IV. A LOWER-NOISE CONFIGURATION: THE DELAYED
signal integrated in C is given by , where Q is the input DISSIPATIVE FEEDBACK (DDF)
charge and is the charge amplifier gain. By considering that In this section we discuss configurations that perform beyond
it follows for the signal-to-noise ratio due to the the DR limits imposed by (16). The approach consists of de-
non-stationary contribution: laying wherever possible the feedback of the resistive (dissi-
pative) components. An example of this concept, applied to a
(19) second order filter, is shown in Fig. 7.
In this configuration the resistive (dissipative) feedback to
the input of the shaper is provided through from the output
where N is the number of signal electrons at the input of the , which is delayed by the time constant and amplified,
charge amplifier. In most practical cases this contributions has rather than from .1 Note that must be positive in order
negligible impact on the total S/N due to , as it can for the feedback through to be negative. The input stage of
be observed assuming a minimum signal (ENC in the amplifier is not a virtual ground, but does not need to
number of electrons). be rail-to-tail. The transfer function can be alternatively
Attempts to improve the linearity by controlling the gate implemented using an active filter, with minor impact on the
voltage of the cascode can be considered, as shown in noise performance.
Fig. 6(b) and in [13]. However, the noise contribution from the The transfer function can be easily calculated as:
controlling stages must be taken into account; also, maintaining
the voltage drop across R below the thermal voltage might
be a challenge. (20)
Most of the previous arguments also apply to the configura-
tion in Fig. 6(c) [14], where the is now the MOSFET used
as source follower. It can be verified that two real and coincident poles with time
With regards to the configuration in Fig. 6(d), ideally the constant are obtained if and .
voltage drop across can be kept small but, in practical cases, Assuming that the first stage operates rail-to-rail, the perfor-
it is difficult to reduce it to values much lower than the thermal mance of the shaper is maximized when also the next stage op-
voltage , and (18) would still apply. erates rail-to-rail, which is obtained for
A further challenge towards the various configurations in Fig. (i.e. the ratio between the peaking time and is a factor
6 is to obtain a high linearity in the mirror stages over a wide 2.718 lower than the case in Fig. 3). It also follows the value
dynamic range of currents. On the positive side, these configu- of . We can now calculate the noise contribution of
rations, at equal capacitance, use resistors of lower value thus the two dissipative components, and . Concerning , the
reducing the relative area, even though the additional area for result in (2) still applies, where (from Table I). The
the current mirrors should now be accounted for. contribution from can be either calculated or simulated. The
These observations suggest that the linear configurations that total contribution from the shaper can be written as in (11) with
make use of active devices in the signal path (e.g. current mir- and the dynamic range as in (16) with a maximum,
rors) cannot offer a dynamic range wider than the ones based on again, for . When compared with the same order con-
passive components only. It should be observed that OTA-based figuration in Fig. 4, the noise power of this configuration at equal
CMOS stages would enter this category as well [15]. The use total capacitance is less than a half ( factor) and the dy-
of BiCMOS technologies would greatly alleviate the limita- namic range is about 50% higher ( factor).
tion in linearity, as shown in [16], but some of the limitations 1This specific configuration, limited to , has been first envisioned
previously discussed still apply, including the loss due to the by F. S. Goulding [17] and then widely adopted.
2388 IEEE TRANSACTIONS ON NUCLEAR SCIENCE, VOL. 58, NO. 5, OCTOBER 2011

Fig. 8. Delayed dissipative feedback (DDF) applied to a third order shaper. Fig. 9. Delayed dissipative feedback (DDF) applied to a fifth order shaper.

TABLE III
The configuration in Fig. 7 can also be used to realize a second COEFFICIENTS FOR DDF SHAPERS
order shaper with two complex conjugate poles. This is ob-
tained for and where
the values of and can be obtained from Table II. For this
configuration the values of and are 0.4 and 1.38 respec-
tively. The noise power at equal capacitance and the dynamic
range are comparable to the ones for the previous case of real
poles, with the advantage of a slightly faster return to baseline
at equal peaking time.
The delayed dissipative feedback can be used for higher order
configurations as well. Fig. 8 show an example of a third order
realization, which has transfer function:
The values and should be chosen in
(21) order to have all stages operating at rail-to-rail output, which
also corresponds to the minimum noise at equal gain. The con-
dition must be satisfied, where
where , , , and offers the minimum noise. The consequent value of to
(here ). It is important to observe that be used in (11) is 4.32. When compared to the same order con-
without the small capacitance in positive feedback it would figuration in Fig. 5, the noise power at equal total capacitance is
not be possible to obtain a semi-Gaussian shaper, either with a factor 0.26 lower and the dynamic range is about 95% higher.
real coincident or with complex conjugate poles. In the case of Finally, Fig. 9 show an example of a fifth order realization.
real coincident poles with time constant , it follows: Also this configuration can be used for real or complex conju-
gate poles. The transfer function can be written as:

(22)
which, once solved, yields:

(23) (25)
The values and should be chosen in
order to have all stages operating at equal output voltage range where , , , ,
(i.e. rail-to-rail), which also corresponds to the minimum noise , and (here ).
at equal gain. Finally, the condition must be satisfied, Table III summarizes the coefficients and performance
where offers the minimum noise. The achievable using the delayed dissipative feedback (DDF). The
consequent value of to be used in (11) is 3.6. When compared is relative to the RU-2 case in Table I.
to the same order configuration in Fig. 4, the noise power at A comparison between Table I and Table III shows that
equal total capacitance is a factor 0.58 lower and the dynamic the DDF is particularly beneficial with the low and medium
range is about 31% higher. medium order shapers. This is also highlighted observing the
The configuration in Fig. 8 can also be used to realize a third ratio in Table III. A very promising configu-
order shaper with complex conjugate poles, by imposing: ration seems to be where a factor of two higher
dynamic range can be achieved with respect to the classical
configuration. With high order cases the impact is small or
negligible due to the noise contribution from the additional
poles (see increase in coefficient ). However, the use of larger
values for reduces in all cases the value of the current re-
quired to generate the dc voltage drops, thus reducing its noise
(24) contribution. It is worth emphasizing, again, that a thorough
DE GERONIMO AND LI: SHAPER DESIGN IN CMOS FOR HIGH DYNAMIC RANGE 2389

Fig. 10. Examples of realizations using the approach in Fig. 5 (a) and the DDF
in Fig. 8 at equal dynamic range (b) and at equal total capacitance (c).

comparative analysis should include the impact of the shape on


[7]. Fig. 11. Simulated pulse response (a) and integrated output noise spectral den-
As a design example, let’s consider the case of a CdZnTe sity (a) for the circuits in Fig. 10.
based Gamma-ray detection system which must operate in the
10 keV to 3 MeV range with an electronic resolution better than
1 keV FWHM (e.g. electrons rms). In a first phase in the first case and in the second case. The cor-
we design and optimize the charge amplifier in order to meet responding area in the selected technology for linear resistors,
the required resolution. In doing so we assume a third order a characterized by , is in minimum size about
semi-Gaussian shaper with complex conjugate poles and select 70 and 270 respectively. Once we include the rela-
a peaking time of 500 ns. tively small area for amplifiers and routings, the first case re-
The design of the shaper starts from the requirements on the quires at least 18,000 (e.g. about ) while
dynamic range and resolution. We would like to keep negligible the second 5,000 (e.g. ), with a saving in
the noise contribution from the shaper, hence selecting area of about 72%. Additionally, the value of charge gain
in (16). It follows from (16), Table I, and a CMOS 130 nm tech- is 107 in the first case and 28 in the second case, and the
nology (1.2 V and MIM capacitance 2 ) current needed to generate the dc voltage drops is more than 10
times lower.
In Fig. 10 the realization of the first (a) and second (b) case
are shown, along with a third case where we use again the DDF,
(26)
but with a total capacitance equal to the one of the first case.
where C is the average capacitance per pole, and we considered In Fig. 11 the simulations of the pulse response to 1 fC (a) and
room temperature and a linear operation up to about 100 mV the integral of the output noise power spectral density (b) for
from the rails (i.e. 1 V maximum swing). all three cases are shown. It can be observed that, compared to
If we design the shaper using the configuration in Fig. 5, the first case (a), the second (b) has comparable noise with a
where and , we get for the total shaper capac- capacitance about four times lower (a saving in area of about
itance , which corresponds to a minimum area 70%) while the third case (c) has about half of the rms noise at
of about 16,750 (e.g. ). If we design comparable total capacitance. In this simulation the noise con-
using the configuration in Fig. 8, where and tributions from the amplifiers are not included for the previously
, we get for the total shaper capacitance , given reasons. To a first order, the noise contribution from the
which corresponds to a minimum area of about 4,365 (e.g. first amplifier of the shaper depends only on the value of thus
). The required total resistance is being comparable in all three cases.
2390 IEEE TRANSACTIONS ON NUCLEAR SCIENCE, VOL. 58, NO. 5, OCTOBER 2011

V. CONCLUSIONS [3] E. Gatti and P. F. Manfredi, “Processing the signals from solid state de-
tectors in elementary particle physics,” La Rivista del Nuovo Cimento,
Our analysis on the design of low-noise linear shapers sug- vol. 9, pp. 1–147, 1986.
[4] A. F. Arbel, “The second stage noise contribution of a nuclear pulse
gests that, once the ENC from the charge amplifier is defined, amplifier,” IEEE Trans. Nucl. Sci., vol. NS-15, no. 5, pp. 2–5, Oct.
the dynamic range of the system is set by the voltage swing and 1968.
the value of the capacitance realizing the poles of the shaper, in- [5] V. Radeka, “Signal processing for particle detectors,” H. Schopper, Ed.
dependent of the peaking time. The configuration used to realize , Landolt-Bornstein ser. New Series I/21B1, in press.
[6] A. Ohkawa, M. Yoshizawa, and K. Husimi, “Direct synthesis of the
the pole(s) has also relevant impact. Those configurations based Gaussian filter for nuclear pulse amplifiers,” Nucl. Instrum. Methods,
on passive components in feedback offer a better dynamic range vol. 138, pp. 85–92, 1979.
than the ones based on both active and passive components, as [7] G. De Geronimo, A. Dragone, J. Grosholz, P. O’Connor, and E.
Vernon, “ASIC with multiple energy discrimination for high rate
for scaling mirrors. The delayed dissipative feedback (DDF) can photon counting applications,” IEEE Trans. Nucl. Sci., vol. 54, no. 2,
overcome some of the limitations of the more classical config- pp. 303–312, Apr. 2007.
urations. The DDF consists of delaying the resistive feedbacks [8] R. Schaumann and M. E. van Valkenburg, Design of Analog Filters.
from the furthest available nodes along the shaping chain. In New York: Oxford Univ. Press, 2001.
[9] T. Deliyannis, Y. Sun, and J. K. Fidler, Continuous-Time Active Filter
order to implement semi-Gaussian shapers, a small capacitor in Design. Boca Raton, FL: CRC Press, 1999.
positive feedback is required. As an example, for a third order [10] R. L. Chase, A. Hrisoho, and J. P. Richer, “8-channel CMOS pream-
shaper a factor of two higher dynamic range can be obtained plifier and shaper with adjustable peaking time and automatic pole-
zero cancellation,” Nucl. Instrum. Methods Phys. Res. A, vol. 409, pp.
with the DDF or, at equal dynamic range, about 25% of the ca- 328–331, 1998.
pacitance is required by the DDF (i.e. about 30% of the area in [11] C. Fiorini and M. Porro, “Integrated RC cell for time-invariant shaping
practical cases). amplifiers,” IEEE Trans. Nucl. Sci., vol. 51, no. 5, pp. 1953–1960, Oct.
2004.
[12] G. De Geronimo and P. O’Connor, “A CMOS detector leakage current
self adaptable continuous reset system: Theoretical analysis,” Nucl. In-
ACKNOWLEDGMENT strum. Methods Phys. Res. A, vol. 421, pp. 322–333, 1999.
[13] I. I. Jung, J. H. Lee, C. S. Lee, and Y. W. Choi, “Design of high-
The authors are very grateful to Veljko Radeka and linear CMOS circuit using a constant transconductance method for
Pier Francesco Manfredi for stimulating discussions, and gamma-ray spectroscopy system,” Nucl. Instrum. Methods Phys. Res.
A, vol. 629, pp. 277–281, 2001.
to Venetios Polychronakos for his encouragement and support. [14] G. Bertuccio, P. Gallina, and M. Sampietro, “‘R-Lens filter’: An
The authors are also grateful to the reviewers, editor, and senior current-mode low-pass filter,” IEEE Electron. Lett., vol. 35,
editor for the valuable feedback. no. 15, pp. 1209–1210, 1999.
[15] T. Noulis, C. Deradonis, S. Siskos, and G. Sarrabayrouse, Nucl. In-
strum. Methods Phys. Res. A, vol. 583, pp. 469–478, 2007.
[16] S. Buzzetti and C. Guazzoni, “A novel compact topology for high-res-
REFERENCES olution CMOS/BiCMOS spectroscopy amplifiers,” IEEE Trans. Nucl.
Sci., vol. 52, no. 5, pp. 1611–1616, Oct. 2005.
[1] G. F. Knoll, Radiation Detection and Measurement, 3rd ed. New [17] F. S. Goulding, D. A. Landis, and N. Madden, “GAMMAS-
York: Wiley, 2000. PHERE—Elimination of ballistic deficit by using a quasi-trapezoidal
[2] V. Radeka, “Low noise techniques in detectors,” Ann. Rev. Nucl. Part. pulse shaper,” IEEE Trans. Nucl. Sci., vol. 41, no. 4, pp. 1140–1143,
Sci., vol. 38, pp. 217–277, 1988. Aug. 1994.

You might also like