CMOS Fabrication Process - Easy Explanation
1. Start with P-type Substrate
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| P-type Silicon |
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2. Grow a Thin Oxide Layer
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| SiO2 Layer |
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| P-type Silicon |
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3. Deposit Photoresist
=== Photoresist ===
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| SiO2 Layer |
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| P-type Silicon |
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4. Photolithography (Masking and Etching)
[Removed Areas Here]
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| SiO2 Layer |
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| P-type Silicon |
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5. N-Well Formation
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| SiO2 |
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| N-Well |
| (inside P-type) |
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6. Gate Oxide Formation
[SiO2 for gate area]
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| N-Well + P-Sub |
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CMOS Fabrication Process - Easy Explanation
7. Polysilicon Gate Deposition
=== Polysilicon Gate ===
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| Gate Oxide Layer |
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| N-Well | P-Substrate |
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8. Source and Drain Diffusion
S G D S G D
p+ Poly p+ n+ Poly n+
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| N-Well | P-Substrate |
----------------------------
9. Metallization
Metal Lines (Interconnects)
===========================
S G D S G D
p+ Poly p+ n+ Poly n+
----------------------------
| N-Well | P-Substrate |
----------------------------
10. Final View (Cross-section)
Top Metal Contact
|| ||
===||======||=== <- Poly Gate
|| ||
p+ n+ <- Source/Drain
| |
[N-Well] [P-Substrate]