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Co HW 2-1

The homework assignment for the ECE Computer Organization course at National Yang Ming Chiao Tung University involves translating two pieces of C code into RISC-V assembly code and simulating them using the Ripes simulator. Students must complete specific tasks including writing assembly code, taking screenshots of execution, and reporting performance metrics for different processor settings. The assignment is due on November 1, 2023, and requires submission of a PDF and assembly source code to Canvas.

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12 views2 pages

Co HW 2-1

The homework assignment for the ECE Computer Organization course at National Yang Ming Chiao Tung University involves translating two pieces of C code into RISC-V assembly code and simulating them using the Ripes simulator. Students must complete specific tasks including writing assembly code, taking screenshots of execution, and reporting performance metrics for different processor settings. The assignment is due on November 1, 2023, and requires submission of a PDF and assembly source code to Canvas.

Uploaded by

林冠廷
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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National Yang Ming Chiao Tung University

ECE: Computer Organization (Fall 2023)

Homework 2
Due: Nov 01, 2023, 11:59PM

In this homework, you will translate two pieces of C code into RISC-V assembly code and simulate
them with the Ripes simulator (v.2.2.4). The original C code (*.c) and assembly code skeletons (*.s)
are available in separate files. Please submit (1) a PDF file that contains screenshots and execution
information; (2) your assembly source code to Canvas.

PART A
1. (25 points) Write the RISC-V assembly code for the following C code. Take a screenshot of
your completed assembly code. Skeleton is provided (hw2 1 skeleton.s).
Assume that the register x10 holds the base address of array A. The length of array A is stored
in the register x11. Registers x5, x6, and x7 hold the values of i, j, and temp, respectively.
2. (15 points) Simulate your code with Ripes simulator using the 32-bit single-cycle processor
setting. After execution, take a screenshot of the “.data” memory section.
(Note: Go to “Memory” tab on the left, choose display type “signed”, section “.data” ).
3. (10 points) Simulate your code with the following three different 32-bit processor settings, and
report clock cycles, instructions retired, CPI, IPC, and clock rate on each processor.
(a) single-cycle processor;
(b) 5-stage processor (with both forwarding unit and hazard detection unit);
(c) 6-stage dual-issue processor.
(Note: After execution, go to the “Processor” tab, and you can find the execution info at the
bottom right corner.

1 for ( i = 0; i < LENGTH ; i ++) {


2 for ( j = i + 1; j < LENGTH ; j ++) {
3 if ( A [ i ] > A [ j ]) {
4 temp = A [ i ];
5 A [ i ] = A [ j ];
6 A [ j ] = temp ;
7 }
8 }
9 }
PART B
(50 points) Repeat all the steps in PART A for the following C code.
Assume that the register x8 holds the base address of array s which stores the results of the three
procedure calls. Registers x10 and x11 are used to hold function arguments, and x10 is also used
for the function result. In the provided skeleton code (hw2 2 skeleton.s), line 7 - 10 provide an
example of the first call of the procedure mysum and storing the function result in memory. You need
to complete the code with the rest two procedure calls and the procedure.

1 int mySum ( int x , int y )


2 {
3 if ( x > y ) {
4 int temp = x ;
5 x = y;
6 y = temp ;
7 }
8 int i ;
9 int s = 0;
10 for ( i = x ; i <= y ; i ++) {
11 s = s + i;
12 }
13 return s ;
14 }
15
16 int main ()
17 {
18 int s [3];
19 int a = 4;
20 int b = 8;
21 s [0] = mySum (a , b ) ;
22 a = 8;
23 s [1] = mySum (a , b ) ;
24 b = 4;
25 s [2] = mySum (a , b ) ;
26 return 0;
27 }

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