AMD Versal RF Series
Product Selection Guide
Versal HBM Series
Product Selection Guide
AMD Versal RF Series – Resources & Packages All parameters listed are maximum values. Verify all data in this document with the device data sheets or product guides.
VR1602 VR1652 VR1902 VR1952
# of ADCs 16 4 16 8
14-bit RF-ADC
Max Rate (GSPS) 8 32 8 32
# of DACs 16 8 16 16
14-bit RF-DAC
Max Rate (GSPS) 16 16 16 16
RF
LDPC Decoder 4 4 – –
1 GSPS Channelizer 224 224 320 320
FFT/iFFT 28 28 40 40
Polyphase Arbitrary Resampler – – 8 8
AI Engine (AIE) Tiles 126 126 120 120
AI Engine
AIE Data Memory (Mb) 32 32 30 30
System Logic Cells 1,205,400 1,205,400 2,473,800 2,473,800
LUTs 551,040 551,040 1,130,880 1,130,880
Programmable Logic DSP Engines 2,256 2,256 3,976 3,976
NoC Master / NoC Slave Ports 16 16 36 36
Distributed RAM (Mb) 17 17 35 35
Total Block RAM (Mb) 39 39 80 80
UltraRAM (Mb) 100 100 74 74
Memory Total PL Memory (Mb) 156 156 189 189
DDR Memory Controllers (DDRMC5e) 4 4 4 4
DDR Bus Width 160 160 160 160
Application Processing Unit Dual-core Arm® Cortex®-A72, 48 KB/32 KB L1 Cache w/ parity & ECC; 1 MB L2 Cache w/ ECC
Real-Time Processing Unit Dual-core Arm Cortex-R5F, 32 KB/32 KB L1 Cache, and 256 KB TCM w/ECC
Processing System
Memory 256 KB On-Chip Memory w/ECC
Connectivity Ethernet (x2); UART (x2); CAN-FD (x2); USB 2.0 (x1); SPI (x2); I2C (x2)
GTYP Transceivers 12 12 – –
Serial Transceivers GTM Transceivers (56G (112G)) 8 (4) 8 (4) – –
GTM2 Transceivers (56G (112G)) – – 20 (10) 20 (10)
PCI Express® 1 x Gen5x4 1 x Gen5x4 1 x Gen5x4 1 x Gen5x4
Integrated Protocol IP 100G Multirate Ethernet MAC 2 2 2 2
600G Ethernet MAC – – 3 3
Platform Platform Mgmt Controller Boot, Security, Safety, Monitoring, and High-Speed Debug
Ordering Extended Temp1 -1MSE, -1LSE, -2MSE, -2MLE, -2LSE, -2LLE
Information Industrial Temp1 -1MSI, -1MLI, -1LSI, -1LLI, -2MSI, -2MLI, -2LLI, -2HSI
Notes:
1. In extended and industrial temperature grades, some ordering combinations can operate for a limited time with a junction temperature of 110°C. Timing parameters adhere to the same speed file at 110°C as they do below 110°C, regardless of operating
voltage. Operation at 110°C Tj is limited to 3% of the device lifetime and can occur sequentially or at regular intervals as long as the total time does not exceed 3% of device lifetime. XMP508 (v1.1)
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AMD Versal RF Series – Packaging
VR1602 VR1652 VR1902 VR1952
X5IO DDR Only, X5IO DDR+PL, X5IO PL Only X5IO DDR Only, X5IO DDR+PL, X5IO PL Only
Package HDIO, MIO HDIO, MIO
Package Ball Pitch (mm)
Dimensions (mm) GTYP, GTM (112G) GTM2 (112G)
RF-ADC (8G), RF-ADC (32G), RF-DAC (16G) RF-ADC (8G), RF-ADC (32G), RF-DAC (16G)
144, 208, 0 144, 208, 0
22, 78 22, 78
VSVG1596 37.5 x 37.5 0.92
4, 4 (2) 4, 4 (2)
12, 0, 8 0, 4, 8
144, 304, 0 144, 304, 0 136, 248, 64 136, 248, 64
22, 78 22, 78 22, 78 22, 78
VSVA2488 47.5 x 47.5 0.92
12, 8 (4) 12, 8 (4) 20 (10) 20 (10)
16, 0, 16 0, 4, 8 16, 0, 16 0, 8, 16
All parameters listed are maximum values. Verify all data in this document with the device data sheets or product guides.
XMP508 (v1.1)
3 | © Copyright 2024–2025 Advanced Micro Devices
AMD Versal RF Series – Figures of Merit
VR1602 VR1652 VR1902 VR1952
AI Engine Peak Perf – INT8 TOPS 42 42 40 40
AI Engine Peak Perf – INT8x16 TOPS 21 21 20 20
AI Engine Peak Perf – INT16 TOPS 10 10 10 10
AI Engine
AI Engine Peak Perf – CINT16 Complex TOPS 3 3 2 2
AI Engine Peak Perf – FP32 TFLOPS 3 3 2 2
AI Engine Peak SRAM Bandwidth Tb/s 168 168 160 160
DSP Engine Peak Perf – INT8 TOPS 15.6 15.6 27.4 27.4
DSP Engine Peak Perf – INT24 TOPS 5.2 5.2 9.1 9.1
Programmable Logic
DSP Engine Peak Perf – CINT18 Complex TOPS 2.2 2.2 3.9 3.9
DSP Engine Peak Perf – FP32 TFLOPs 3.6 3.6 6.4 6.4
Arm® Cortex-A72 Performance DMIPs 18,942 18,942 18,942 18,942
Processing System
Arm Cortex-R5F Performance DMIPs 2,672 2,672 2,672 2,672
Total Bandwidth - Block RAM Tb/s 160 160 326 326
Memory Total Bandwidth - UltraRAM Tb/s 38 38 28 28
Total SRAM Bandwidth Tb/s 198 198 354 354
Transceiver Bandwidth Tb/s 1.98 1.98 5.42 5.42
I/O
Sensor I/O Bandwidth Gb/s 1,512 1,512 1,836 1,836
DDR5 Memory Bandwidth GB/s 133.4 133.4 111.2 111.2
Platform LPDDR5 Memory Bandwidth GB/s 153.6 153.6 128.0 128.0
NoC Cross-sectional Bandwidth Tb/s 1.1 1.1 1.7 1.7
All parameters listed are maximum values. Verify all data in this document with the device data sheets or product guides.
XMP508 (v1.1)
4 | © Copyright 2024–2025 Advanced Micro Devices
AMD Versal Device Ordering Information
Device Name Device Attributes Package Definition
XC 2 V E 3558 -1 M S E S B V A1440
Device Grade Generation(1) Architecture Series Name Device Number Speed Grade Voltage Static Screen Temp Grade Ball Pitch Lid RoHS6 Code (3) Footprint
XC: Commercial 2: Gen 2 Versal E: AI Edge Digits 1-3: -1: Slowest L: Low S: Standard E: 0 to 110°C(2) V: 0.92 mm, S: Lidless, V: Pb-free Ball
XA: Automotive C: AI Core Value Identifier -2: Mid M: Mid L: Low Static I: –40 to 110°C(2) w/LSC w/Stiffener Ring Q: Eutectic Ball
XQ: Defense M: Prime Digit 4: # of -3: Highest H: High Q: –40 to +125°C N: 0.92 mm, F: Lidded R: Ruggedized,
P: Premium Primary Cores M: –55 to +125°C no LSC B: Lidless, Eutectic Ball
H: HBM S: 0.8 mm no Stiffener Ring
R: RF L: 1.0 mm H: Lidded
Overhang
I: Lidless,
w/Stiffener Ring &
Overhang
Note:
1. This character is only present in Versal AI Edge Series Gen 2, Prime Series Gen 2, or Premium Series Gen 2 devices.
2. Operation at 110°C Tj is limited to 3% of the device lifetime and can occur sequentially or at regular intervals as long as the total time does not exceed 3% of device lifetime—except -1E and -3E (standard 0–100°C).
3. All packages have Pb-free bumps.
XMP508 (v1.1)
5 | © Copyright 2024–2025 Advanced Micro Devices
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