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Lica 2

This document is an examination paper for III B. Tech I Semester Supplementary Examinations in Linear Integrated Circuits & Applications. It consists of two parts, with Part-A being compulsory and Part-B requiring the answer of three questions. The paper covers various topics including op-amps, differentiators, filters, and ADCs, with a total of 70 marks available.

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34 views1 page

Lica 2

This document is an examination paper for III B. Tech I Semester Supplementary Examinations in Linear Integrated Circuits & Applications. It consists of two parts, with Part-A being compulsory and Part-B requiring the answer of three questions. The paper covers various topics including op-amps, differentiators, filters, and ADCs, with a total of 70 marks available.

Uploaded by

shaikraheema77
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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Code No: RT31042 R13 SET - 1

III B. Tech I Semester Supplementary Examinations, Dec/Jan-2022-23


LINEAR INTEGRATED CIRCUITS & APPLICATIONS
(Electronics and Communication Engineering)
Time: 3 hours Max. Marks: 70
Note: 1. Question Paper consists of two parts (Part-A and Part-B)
2. Answering the question in Part-A is compulsory
3. Answer any THREE Questions from Part-B
*****
PART –A (22 Marks)
1. a) List the advantages of integrator circuit.
[3M]
b) Draw the Op-amp block diagram and its equivalent circuit.
[4M]
c) Draw the circuit diagram of a differentiator using op-amp.
[4M]
d) What is Sample-and-Hold amplifier?
[4M]
e) Write the applications of PLL.
[4M]
f) Which is the fastest ADC and why?
[3M]
PART –B (48 Marks)
2. a) Differentiate between SSI, MSI, LSI and VLSI. [8M]
b) Explain planar technology for device fabrication. [8M]
3. a) With a neat sketch explain the frequency response of a 741 op-amp. [8M]
b) Derive the slew rate equation for an op-amp. [8M]
4. a) With a neat diagram explain about the voltage to current converter in details. [8M]
b) Describe the working of practical differentiator circuit. Derive the expression [8M]
for output voltage.
5. a) With a neat diagram, explain the band reject filter. Derive the expression for [8M]
output voltage.
b) Design a first order high pass filter with a cutoff frequency of 1.5 kHz, and a [8M]
pass band gain of 3.
6. a) Explain the working of PLL. Explain in detail FSK demodulator using PLL. [8M]
b) How 555 timer acts as mono stable multi vibrator? Explain with a neat circuit [8M]
diagram.
7. a) With a neat diagram explain about the counter type D/A converter in detail. [8M]
b) Consider a 10 bit D/A converter having a reference voltage of 10 V. What is [8M]
the binary digital input needed to get 4.5 V output? What outputs are obtained
from the converter for the inputs of (i) binary 0010110101 and (ii) decimal
520?
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