COMPUTER ORGANIZATION AND DESIGN

5th
Edition
The Hardware/Software Interface

Chapter 2
Instructions: Language
of the Computer

Fall 2020
Soontae Kim
School of Computing
KAIST
MIPS R-format Instructions
op rs rt rd shamt funct
6 bits 5 bits 5 bits 5 bits 5 bits 6 bits

◼ Instruction fields
◼ op: operation code (opcode)
◼ rs: first source register number
◼ rt: second source register number
◼ rd: destination register number
◼ shamt: shift amount (00000 for now)
◼ funct: function code (extends opcode)

Chapter 2 — Instructions: Language of the Computer — 2

MIPS I-format Instructions
op rs rt constant or address
6 bits 5 bits 5 bits 16 bits

◼ Immediate arithmetic and load/store instructions

◼ rt: destination or source register number
◼ Constant: –215 to +215 – 1
◼ Address: offset added to base address in rs
◼ Design Principle 4: Good design demands good
compromises
◼ Different formats complicate instruction decoding, but
allow 32-bit instructions uniformly
◼ Keep formats as similar as possible

Chapter 2 — Instructions: Language of the Computer — 3

MIPS instructions and encoding

FIGURE 2.6 MIPS architecture revealed through Section 2.5. The two MIPS instruction formats so far are R
and I. The first 16 bits are the same: both contain an op field, giving the base operation; an rs field, giving one of
the sources; and the rt field, which specifies the other source operand, except for load word, where it specifies
the destination register. R-format divides the last 16 bits into an rd field, specifying the destination register; the
shamt field, which Section 2.6 explains; and the funct field, which specifies the specific operation of R-format
instructions. I-format combines the last 16 bits into a single address field.

Chapter 2 — Instructions: Language of the Computer — 4

Stored Program Computers
The BIG Picture ◼ Instructions represented in
binary, just like data
◼ Instructions and data stored
in memory
◼ Programs can operate on
programs
◼ e.g., compilers, linkers, …
◼ Binary compatibility allows
compiled programs to work
on different computers
◼ Standardized ISAs

Chapter 2 — Instructions: Language of the Computer — 5

 §2.6 Logical Operations
Logical Operations
◼ Instructions for bitwise manipulation
Operation C Java MIPS
Shift left << << sll
Shift right >> >>> srl
Bitwise AND & & and, andi
Bitwise OR | | or, ori
Bitwise NOT ~ ~ nor

◼ Useful for extracting and inserting

groups of bits in a word
Chapter 2 — Instructions: Language of the Computer — 6
Shift Operations
op rs rt rd shamt funct
6 bits 5 bits 5 bits 5 bits 5 bits 6 bits

◼ shamt: how many positions to shift

◼ Shift left logical
◼ Shift left and fill with 0 bits
◼ sll by i bits multiplies by 2i
◼ Shift right logical
◼ Shift right and fill with 0 bits
◼ srl by i bits divides by 2i (unsigned only)

Chapter 2 — Instructions: Language of the Computer — 7

AND Operations
◼ Useful to mask bits in a word
◼ Select some bits, clear others to 0
and $t0, $t1, $t2

$t2 0000 0000 0000 0000 0000 1101 1100 0000

$t1 0000 0000 0000 0000 0011 1100 0000 0000

$t0 0000 0000 0000 0000 0000 1100 0000 0000

Chapter 2 — Instructions: Language of the Computer — 8

OR Operations
◼ Useful to include bits in a word
◼ Set some bits to 1, leave others unchanged
or $t0, $t1, $t2

$t2 0000 0000 0000 0000 0000 1101 1100 0000

$t1 0000 0000 0000 0000 0011 1100 0000 0000

$t0 0000 0000 0000 0000 0011 1101 1100 0000

Chapter 2 — Instructions: Language of the Computer — 9

NOT Operations
◼ Useful to invert bits in a word
◼ Change 0 to 1, and 1 to 0
◼ MIPS has NOR 3-operand instruction
◼ a NOR b == NOT ( a OR b )
nor $t0, $t1, $zero Register 0: always
read as zero

$t1 0000 0000 0000 0000 0011 1100 0000 0000

$t0 1111 1111 1111 1111 1100 0011 1111 1111

Chapter 2 — Instructions: Language of the Computer — 10

 §2.7 Instructions for Making Decisions
Conditional Operations
◼ Branch to a labeled instruction if a
condition is true
◼ Otherwise, continue sequentially
◼ beq rs, rt, L1
◼ if (rs == rt) branch to instruction labeled L1;
◼ bne rs, rt, L1
◼ if (rs != rt) branch to instruction labeled L1;
◼ j L1
◼ unconditional jump to instruction labeled L1

Chapter 2 — Instructions: Language of the Computer — 11

Compiling If Statements
◼ C code:
if (i==j) f = g+h;
else f = g-h;
◼ f, g, … in $s0, $s1, …
◼ Compiled MIPS code:
bne $s3, $s4, Else
add $s0, $s1, $s2
j Exit
Else: sub $s0, $s1, $s2
Exit: …
Assembler calculates addresses

Chapter 2 — Instructions: Language of the Computer — 12

Compiling Loop Statements
◼ C code:
while (save[i] == k) i += 1;
◼ i in $s3, k in $s5, address of save in $s6
◼ Compiled MIPS code:
Loop: sll $t1, $s3, 2
add $t1, $t1, $s6
lw $t0, 0($t1)
bne $t0, $s5, Exit
addi $s3, $s3, 1
j Loop
Exit: …

Chapter 2 — Instructions: Language of the Computer — 13

Basic Blocks
◼ A basic block is a sequence of instructions
with
◼ No embedded branches (except at end)
◼ No branch targets (except at beginning)

◼ A compiler identifies basic

blocks for optimization
◼ An advanced processor
can accelerate execution
of basic blocks

Chapter 2 — Instructions: Language of the Computer — 14

More Conditional Operations
◼ Set result to 1 if a condition is true
◼ Otherwise, set to 0
◼ slt rd, rs, rt
◼ if (rs < rt) rd = 1; else rd = 0;
◼ slti rt, rs, constant
◼ if (rs < constant) rt = 1; else rt = 0;
◼ Use in combination with beq, bne
slt $t0, $s1, $s2 # if ($s1 < $s2)
bne $t0, $zero, L # branch to L

Chapter 2 — Instructions: Language of the Computer — 15

Branch Instruction Design
◼ Why not blt, bge, etc?
◼ Hardware for <, ≥, … slower than =, ≠
◼ Combining with branch involves more work
per instruction, requiring a slower clock
◼ All instructions penalized!
◼ beq and bne are the common case
◼ This is a good design compromise

Chapter 2 — Instructions: Language of the Computer — 16

Signed vs. Unsigned
◼ Signed comparison: slt, slti
◼ Unsigned comparison: sltu, sltui
◼ Example
◼ $s0 = 1111 1111 1111 1111 1111 1111 1111 1111
◼ $s1 = 0000 0000 0000 0000 0000 0000 0000 0001
◼ slt $t0, $s0, $s1 # signed
◼ –1 < +1  $t0 = 1
◼ sltu $t0, $s0, $s1 # unsigned
◼ +4,294,967,295 > +1  $t0 = 0

Chapter 2 — Instructions: Language of the Computer — 17

 §2.8 Supporting Procedures in Computer Hardware
Procedure Calling
◼ Steps required
1. Place parameters in registers
2. Transfer control to procedure
3. Acquire storage for procedure
4. Perform procedure’s operations
5. Place result in register for caller
6. Return to place of call

Chapter 2 — Instructions: Language of the Computer — 18

Register Usage
◼ $a0 – $a3: arguments (reg’s 4 – 7)
◼ $v0, $v1: result values (reg’s 2 and 3)
◼ $t0 – $t9: temporaries
◼ Can be overwritten by callee
◼ $s0 – $s7: saved
◼ Must be saved/restored by callee
◼ $gp: global pointer for static data (reg 28)
◼ $sp: stack pointer (reg 29)
◼ $fp: frame pointer (reg 30)
◼ $ra: return address (reg 31)

Chapter 2 — Instructions: Language of the Computer — 19

Procedure Call Instructions
◼ Procedure call: jump and link
jal ProcedureLabel
◼ Address of following instruction put in $ra

◼ Jumps to target address

◼ Procedure return: jump register

jr $ra
◼ Copies $ra to program counter

◼ Can also be used for computed jumps

◼ e.g., for case/switch statements

Chapter 2 — Instructions: Language of the Computer — 20

Leaf Procedure Example
◼ C code:
int leaf_example (int g, h, i, j)
{ int f;
f = (g + h) - (i + j);
return f;
}
◼ Arguments g, …, j in $a0, …, $a3

◼ f in $s0 (hence, need to save $s0 on stack)

◼ Result in $v0

Chapter 2 — Instructions: Language of the Computer — 21

Leaf Procedure Example
◼ MIPS code:
leaf_example:
addi $sp, $sp, -4
Save $s0 on stack
sw $s0, 0($sp)
add $t0, $a0, $a1
add $t1, $a2, $a3 Procedure body
sub $s0, $t0, $t1
add $v0, $s0, $zero Result
lw $s0, 0($sp) Restore $s0
addi $sp, $sp, 4
jr $ra Return

Chapter 2 — Instructions: Language of the Computer — 22

 FIGURE 2.10 The values of the stack pointer and the stack (a) before, (b) during, and (c) after the procedure
call. The stack pointer always points to the “top” of the stack, or the last word in the stack in this drawing.

Since $t0 and $t1 are temporary registers, we can drop two stores and two loads.

Chapter 2 — Instructions: Language of the Computer — 23