S Parameter Design
S Parameter Design
S-Parameter Design
Introduction
The need for new high-frequency, solid-state circuit design techniques has been
recognized both by microwave engineers and circuit designers. These engineers
are being asked to design solid state circuits that will operate at higher and
higher frequencies.
The Keysight Microwave Division’s lab staff has developed a high frequency circuit
design seminar to assist their counterparts in R&D labs throughout the world. This
seminar has been presented in a number of locations in the United States and Europe.
From the experience gained in presenting this original seminar, we have developed
a four-part video tape, S-Parameter Design Seminar. While the technology of high
frequency circuit design is ever changing, the concepts upon which this technology
has been built are relatively invariant.
b. S-parameters
a. Scattering-Transfer or T-parameters
d. Stability considerations
In this portion, the characteristics of microwave transistors and the network analyzer
instrumention system used to measure these characteristics are explained.
The theory of Constant Gain and Constant Noise Figure Circles is developed in
this portion of the seminar. This theory is then applied in the design of three actual
ampliier circuits.
The style of this application note is somewhat informal since it is a verbatim transcript of
these video tape programs.
Much of the material contained in the seminar, and in this application note, has been
developed in greater detail in standard electrical engineering textbooks, or in other
Keysight application notes.
The value of this application note rests in its bringing together the high frequency circuit
design concepts used today in R&D labs throughout the world. We are conident that
this application note and the video taped S-Parameter Design Seminar will assist you as
you continue to develop new high frequency circuit designs.
These concepts are most useful at those frequencies where distributed, rather than
lumped, parameters must be considered. We will discuss: (1) scattering or S-parameters,
(2) voltage and power gain relationships, (3) stability criteria for two-port networks in
terms of these S-parameters; and we will review (4) the Smith Chart.
Network Characterization
S-parameters are basically a means for characterizing n-port networks. By reviewing
some traditional network analysis methods we’ll understand why an additional method of
network characterization is necessary at higher frequencies.
Figure 1
Figure 2
To see how parameter sets of this type can be determined through measurement, let’s
focus on the H-parameters. H11 is determined by setting V2 equal to zero—applying
a short circuit to the output port of the network. H11 is then the ratio of V1 to I1—the
input impedance of the resulting network. H12 is determined by measuring the ratio
of V1 to V2—the reverse voltage gain-with the input port open circuited (figure 3). The
important thing to note here is that both open and short circuits are essential for making
these measurements.
Figure 3
1. Equipment is not readily available to measure total voltage and total current at the
ports of the network.
2. Short and open circuits are difficult to achieve over a broad band of frequencies.
3. Active devices, such as transistors and tunnel diodes, very often will not be short or
open circuit stable.
Some method of characterization is necessary to overcome these problems. The
logical variables to use at these frequencies are traveling waves rather than total
voltages and currents.
Figure 4
Voltage, current, and power can be considered to be in the form of waves traveling in
both directions along this transmission line. A portion of the waves incident on the load
will be reflected. It then becomes incident on the source, and in turn re-reflects from the
source (if ZS ≠ Zo), resulting in a standing wave on the line.
Figure 5
Although the general techniques developed in this seminar may be applied for any
characteristic impedance, we will be using lossless 50-ohm transmission lines.
We’ve seen that the incident and reflected voltages on a transmission line result in a
standing voltage wave on the line.
The value of this total voltage at a given point along the length of the transmission line
is the sum of the incident and reflected waves at that point (figure 6a).
Figure 6
The total current on the line is the difference between the incident and reflected
voltage waves divided by the characteristic impedance of the line (figure 6b).
Another very useful relationship is the reflection coefficient, Γ. This is a measure of the
quality of the impedance match between the load and the characteristic impedance of
the line. The reflection coefficient is a complex quantity having a magnitude, rho, and an
angle, theta (figure 7a). The better the match between the load and the characteristic
impedance of the line, the smaller the reflected voltage wave and the smaller the
reflection coefficient.
Figure 7
Figure 8
S-Parameters
Having briefly reviewed the properties of transmission lines, let’s insert a two-port
network into the line (figure 9). We now have additional traveling waves that are
interrelated. Looking at Er2, we see that it is made up of that portion of Ei2 reflected from
the output port of the network as well as that portion of Ei1 that is transmitted through the
network. Each of the other waves are similarly made up of a combination of two waves.
Figure 9
It should be possible to relate these four traveling waves by some parameter set. While
the derivation of this parameter set will be made for two-port networks, it is applicable
for n-ports as well. Let’s start with the H-parameter set (figure 10).
Figure 10
By substituting the expressions for total voltage and total current (figure 11) on a
transmission line into this parameter set, we can rearrange these equations such that
the incident traveling voltage waves are the independent variables; and the reflected
traveling voltage waves are the dependent variables (figure 12).
Figure 12
The functions f11, f21 and f12, f22 represent a new set of network parameters relating
traveling voltage waves rather than total voltages and total currents. In this case these
functions are expressed in terms of H-parameters. They could have been derived from
any other parameter set.
It is appropriate that we call this new parameter set “scattering parameters,” since they
relate those waves scattered or reflected from the network to those waves incident upon
the network. These scattering parameters will commonly be referred to as S-parameters.
Let’s go one step further. If we divide both sides of these equations by Zo, the
characteristic impedance of the transmission line, the relationship will not change. It will,
however, give us a change in variables (figure 13). Let’s now define the new variables:
Figure 13
Looking at the new set of equations in a little more detail, we see that the S-parameters
relate these four waves in this fashion (figure 14):
Figure 14
S-Parameter Measurement
We saw how the H-parameters are measured. Let’s now see how we go about
measuring the S-parameters. For S11, we terminate the output port of the network and
measure the ratio b1 to a1 (figure 15). Terminating the output port in an impedance equal
to the characteristic impedance of the transmission line is equivalent to setting a2 = 0,
because a traveling wave incident on this load will be totally absorbed. S11 is the input
reflection coefficient of the network. Under the same conditions, we can measure S21,
the forward transmission through the network. This is the ratio of b2 to a1 (figure 16).
This could either be the gain of an amplifier or the attenuation of a passive network.
Figure 15
Figure 16
By terminating the input side of the network, we set a1 = 0. S22, the output reflection
coefficient, and S12, the reverse transmission coefficient, can then be measured (figure 17).
Figure 17
To see why, let’s look once again at the network enmeshed in the transmission
line (figure 18). If the load impedance is equal to the characteristic impedance of the line,
any wave traveling toward the load would be totally absorbed by the load. It would not
reflect back to the network. This sets a2 = 0. This condition is completely independent
from the network’s output impedance.
Figure 18
Multiple-Port Networks
So far we have just discussed two-port networks. These concepts can be expanded
to multiple-port networks. To characterize a three-port network, for example, nine
parameters would be required (figure 19). S11, the input reflection coefficient at port one,
is measured by terminating the second and third ports with an impedance equal to the
characteristic impedance of the line at these ports. This again ensures that a2 = a3 = 0.
We could go through the remaining S-parameters and measure them in a similar way,
once the other two ports are properly terminated.
Figure 19
Figure 20
Let’s quickly review what we’ve done up to this point. We started off with a familiar
network parameter set relating total voltages and total currents at the ports of the
network. We then reviewed some transmission line concepts. Applying these concepts,
we derived a new set of parameters for a two-port network relating the incident and
reflected traveling waves at the network ports.
Figure 21
A lossless network does not dissipate any power. The power incident on the network
must be equal to the power reflected, or Σ|an|2 = Σ|bn|2 (figure 22). In the case of a two-
port, |a1|2 + |a2|2 = |b1|2 + |b2|2. This implies that the S-matrix is unitary as defined here.
Where: I is the identity matrix and S* is the complex conjugate of the transpose of S. This
is generally referred to as the hermetian conjugate of S. Typically, we will be using lossless
networks when we want to place matching networks between amplifier stages.
For a lossy network, the net power reflected is less than the net incident power (figure
23). The difference is the power dissipated in the network. This implies that the statement
I – S* S is positive definite, or the eigen-values for this matrix are in the left half plane so
that the impulse response of the network is made up of decaying exponentials.
Figure 23
Embedding the device in the transmission line structure, we can then measure the
S-parameters at these two planes (figure 24). We’ve added a length of line, φ 1, to port
one of the device and another length, φ2, to port two.
Figure 24
Figure 25
Figure 26
Figure 27
Using a shunt admittance, we see the incident and reflected waves at the two ports
(figure 27). We first normalize the admittance and terminate the network in the
normalized characteristic admittance of the system (figure 28a). This sets a2 = 0. S11,
the input reflection coefficient of the terminated network, is then: (figure 28b).
To calculate S21, let’s recall that the total voltage at the input of a shunt element,
a 1 + b1, is equal to the total voltage at the output, a2 + b2 (figure 28c). Because the
network is symmetrical and reciprocal, S22 = S11 and S12 = S21. We have then determined
the four S-parameters for a shunt element.
This chart is essentially a mapping between two planes—the Z (or impedance) plane
and the Γ (or reflection coefficient) plane. We’re all familiar with the impedance plane—a
rectangular coordinate plane having a real and an imaginary axis. Any impedance can
be plotted in this plane. For this discussion, we’ll normalize the impedance plane to the
characteristic impedance (figure 29).
Figure 29
We now let z be purely imaginary (i.e., z = jx where x is allowed to vary from minus
infinity to plus infinity). Since Γ = (jx – 1)/(jx + 1), |Γ| = 1 and its phase angle varies from
0 to 360°. This traces out a circle in the Γ plane (figure 29). For positive reactance, jx
positive, the impedance maps into the upper half circle. For negative reactance, the
impedance maps into the lower half circle. The upper region is inductive and the lower
region is capacitive.
Now let’s look at some other impedance values. A constant resistance line, going
through the point z = 1 on the real axis, maps into a circle in the Γ plane. The upper
semicircle represents an impedance of 1 + jx, which is inductive; the lower semicircle,
an impedance of 1 – jx or capacitive (figure 30).
Figure 30
The constant reactance line, r + j1, also maps into the Γ plane as a circle. As we
approach the imaginary axis in the impedance plane, Γ approaches the unit radius
circle. As we cross the imaginary axis, the constant reactance circle in the Γ plane goes
outside the unit radius circle.
If we now go back and look at z real, we see at z = –1, Γ = ∞. When z is real and less
than one, we move out toward the unit radius circle in the Γ plane. When the real part of
z goes negative, Γ continues along this circle of infinite radius. The entire region outside
the unit radius circle represents impedances with negative real parts. We will use this
fact later when working with transistors and other active devices, which often have
negative real impedances.
In the impedance plane, constant resistance and constant reactance lines intersect.
They also cross in the Γ plane. There is a one-to-one correspondence between points in
the impedance plane and points in the Γ plane.
Figure 31
Figure 32
Figure 33
2. Impedances with negative real parts: Let’s now take a look at impedances with
negative real parts. Here again is a conventional Smith Chart defined by the boundary of
the unit radius circle. If we have an impedance that is inductive with a negative real part,
it would map into the Γ plane outside the chart (figure 34). One way to bring this point
back onto the chart would be to plot the reciprocal of Γ, rather than Γ itself. This would
be inconvenient because the phase angle would not be preserved. What was a map of
an inductive impedance appears to be capacitive.
Figure 34
There are also compressed Smith Charts available that include the unit radius chart plus
a great deal of the negative impedance region. This chart has a radius that corresponds
to a reflection coefficient whose magnitude is 3.16 (figure 35).
Figure 35
In the rest of this seminar, we will see how easily we can convert measured reflection
coefficient data to impedance information by slipping a Smith Chart overlay over the
Keysight network analyzer polar display.
3. Frequency response of networks: One final point needs to be covered in this brief
review of the Smith Chart, and that is the frequency response for a given network.
Let’s look at a network having an impedance, z = 0.4 + jx (figure 36). As we increase
the frequency of the input signal, the impedance plot for the network moves clockwise
along a constant resistance circle whose value is 0.4. This generally clockwise
movement with increasing frequency is typical of impedance plots on the Smith Chart
for passive networks. This is essentially Foster’s Reactance Theorem.
If we now look at another circuit having a real part of 0.2 and an imaginary part that is capacitive,
the impedance plot again moves in a clockwise direction with an increase in frequency.
Another circuit that is often encountered is the tank circuit. Here again, the Smith Chart
is useful for plotting the frequency response (figure 37). For this circuit at zero frequency,
the inductor is a short circuit. We start our plot at the point, z = 0. As the frequency
increases, the inductive reactance predominates. We move in a clockwise direction. At
resonance, the impedance is purely real, having the value of the resistor. If the resistor
had a higher value, the crossover point at resonance would be farther to the right on
the Smith Chart. As the frequency continues to increase, the response moves clockwise
into the capacitive region of the Smith Chart until we reach infinite frequency, where
the impedance is again zero.
Figure 37
There are other techniques for measuring the Q of cavities and YIG spheres using the
Smith Chart. One of these techniques uses the fact that with a tank circuit, the real
part of the circuit equals the reactive part at the half-power points. Let’s draw two arcs
connecting these points on the Smith Chart (figure 38). The centers for these arcs are at
±j1. The radius of the arcs is 2.
Figure 38
We then increase the frequency and record its value where the response lies on the
upper arc. Continuing to increase the frequency, we record the resonant frequency
and the frequency where the response lies on the lower arc. The formula for the Q of
the circuit is simply fo, the resonant frequency, divided by the difference in frequency
between the upper and lower half-power points. Q = fo/Δf.
In the next part of this S-Parameter Design Seminar, we will continue our discussion of
network analysis using S-parameters and flow graph techniques.
Figure 39
Figure 40
While we defined the T-parameters in a particular way, we could have defined them
such that the output waves are the dependent variables and the input waves are the
independent variables. This alternate definition can result in some problems when
designing with active unilateral devices (figure 41).
Figure 41
Using the alternate definition for the transfer parameters, the denominator in each of
these terms is S12 rather than S21 as we saw earlier.
Working with amplifiers, we often assume the device to be unilateral, or S12 = 0. This
would cause this alternate T-parameter set to go to infinity.
We use this new set of transfer parameters when we want to cascade networks—two
stages of an amplifier, or an amplifier with a matching network for example (figure 42a).
From measured S-parameter data, we can define the T-parameters for the two
networks. Since the output waves of the first network are identical to the input waves
of the second network, we can now simply multiply the two T-parameter matrices and
arrive at a set of equations for the overall network (figure 42b).
Figure 42
Since matrix multiplication is, in general, not commutative, these T-parameter matrices
must be multiplied in the proper order. When cascading networks, we’ll have to multiply
the matrices in the same order as the networks are connected. Using the alternate
definition for T-parameters previously described, this matrix multiplication must be done
in reverse order.
This transfer parameter set becomes very useful when using computer-aided design
techniques where matrix multiplication is an easy task.
A. Rules
We’ll follow certain rules when we build up a network flow graph.
3. Branches enter dependent variable nodes, and emanate from the independent
variable nodes.
4. In our S-parameter equations, the reflected waves b1 and b2 are the dependent
variables and the incident waves a1 and a2 are the independent variables.
Let’s now apply these rules to the two S-parameter equations (figure 43a). The first
equation has three nodes: bl, a1, and a2. b1 is a dependent node and is connected to
a1 through the branch S11 and to node a2 through the branch S12. The second equation
is constructed similarly. We can now overlay these to have a complete flow graph for a
two port network (figure 43b).
Figure 43
This technique will be all the more useful as we cascade networks or add feedback paths.
Figure 44
For a load, the flow graph is simply Γ L, the complex reflection coefficient of the
load (figure 45).
Figure 45
Figure 46
To demonstrate the utility of flow graphs, let’s embed a two port network between a
source and a load. Combining the examples we have seen, we can now draw a flow
graph for the system (figure 47).
Figure 47
We can now apply the rule known as Mason’s rule (or as it is often called, the
non-touching loop rule) to solve for the value of any node in this network. Before
applying the rule, however, we must first define several additional terms.
A first order loop is defined as the product of the branches encountered in a journey
starting from a node and moving in the direction of the arrows back to that original
node. To illustrate this, let’s start at node a1. One first order loop is S11Γ S. Another first
order loop is S21Γ LS12Γ S. If we now start at node a2, we find a third first order loop, S22Γ L.
Any of the other loops we encounter is one of these three first order loops.
A second order loop is defined as the product of any two non-touching first order
loops. Of the three first order loops just found, only S11Γ S and S22Γ L do not touch in any
way. The product of these two loops establishes the second order loop for this network.
More complicated networks, involving feedback paths for example, might have several
second order loops.
Let’s now suppose that we are interested in the value of bl. In this example, bS is the
only independent variable because its value will determine the value of each of the other
variables in the network. B1, therefore, will be a function of bS. To determine b1, we
first have to identify the paths leading from bS to b1. Following the arrows, we see two
paths—(1) S11 and (2) S2lΓ LSl2.
The next step is to find the non-touching loops with respect to the paths just found. Here,
the path S11 and the first order loop, S22Γ L have no nodes or branches in common. With
this condition met, we can call S22Γ L a non-touching loop with respect to the path S11.
The other path, S21Γ LS12, touches all of the network’s first order loops, hence there are
no non-touching loops with respect to this path. Again, in more complex networks, there
would be higher order non-touching loops.
Let’s now look at the non-touching loop rule itself (figure 48). This equation appears to
be rather ominous at first glance, but once we go through it term by term, it will be less
awesome. This rule determines the ratio of two variables, a dependent to an independent
variable. (In our example, we are interested in the ratio b1 to bS.)
Figure 48
Pl, P2, etc., are the various paths connecting these variables.
This term, ΣL(l)(1), is the sum of all first order loops that do not touch the first path between
the variables.
This term, ΣL(2)(1), is the sum of all second order loops that do not touch that path, and
so on down the line.
Now, this term, ΣL(1)(2), is the sum of all first order loops that do not touch the second path.
The denominator in this expression is a function of the network geometry. It is simply one
minus the sum of all first order loops, plus the sum of all second order loops, minus the
third order loops, and so on.
Figure 49
The second path, S21Γ LS12, is simply multiplied by one because there are no non-
touching loops with respect to this path.
The denominator is one minus the sum of first order loops plus the second order loop.
This concludes our example. With a little experience drawing flow graphs of complex
networks, you can see how this technique will facilitate your network analysis. In fact,
using the flow graph technique, we can now derive several expressions for power and
gain that are of interest to the circuit designer.
First of all, we need to know the power delivered to a load. Remember that the square
of the magnitudes of the incident and reflected waves has the dimension of power. The
power delivered to a load is then the difference between the incident power and the
reflected power, P del = |a|2 –|b|2.
The power available from a source is that power delivered to a conjugately matched
load. This implies that the reflection coefficient of the load is the conjugate of the source
reflection coefficient, Γ S* = Γ L.
Figure 50
Figure 51
We can also develop voltage and power gain equations that will be useful in our amplifier
designs using these flow graph techniques. For a two-port network, the voltage gain is
equal to the total voltage at the output divided by the total voltage at the input,
If we divide the numerator and denominator by bs, we can relate each of the dependent
variables of the system to the one independent variable (figure 52a). Now we have four
expressions or four ratios that we can determine from the non-touching loop rule.
Figure 52
Let’s trace through a couple of these expressions to firm up our understanding of the
process (figure 52b). A2 is connected to bS through the path S21Γ L. All first order loops
touch this path, so this path is simply multiplied by one. b2 is connected to bS through
the path S21. All first order loops also touch this path. a1 is connected to bS directly, and
there is one non-touching loop, S22Γ L. We have already determined the ratio of b1 to bS,
so we can simply write down the numerator of that expression. We have now derived
the voltage gain of the two-port network.
The last expression we wish to develop is that for transducer power gain. This will
be very important in the amplifier design examples contained in the final section of this
seminar. Transducer power gain is defined as the power delivered to a load divided by
the power available from a source.
What remains is to solve the ratio b2 to bS (figure 53a). The only path connecting bS and
b2 is S21. There are no non touching loops with respect to this path. The denominator is
the same as in the previous example: one minus the first order loops plus the second
order loop. Taking the magnitude of this ratio, squaring, and substituting the result yields
the expression for transducer power gain of a two port network (figure 53b).
Figure 53
Later, when designing amplifiers, we will see that we can simplify this expression by
assuming that the amplifier is a unilateral device, or S12 = 0. In general, however, this
assumption cannot be made, and we will be forced to deal with this expression.
One of the things you might want to do is to optimize or maximize the transducer gain of
the network. Since the S-parameters at one frequency are constants depending on the
device selected and the bias conditions, we have to turn our attention to the source and
load reflection coefficients.
Stability Considerations
To maximize the transducer gain, we must conjugately match the input and the output.
Before we do this, we will have to look at what might happen to the network in terms
of stability—will the amplifier oscillate with certain values of impedance used in the
matching process?
There are two traditional expressions used when speaking of stability: conditional and
unconditional stability.
A network is conditionally stable if the real part of Zin and Zout is greater than zero for some
positive real source and load impedances at a specific frequency.
A network is unconditionally stable if the real part of Zin and Zout is greater than zero for all
positive real source and load impedances at a specific frequency.
It is important to note that these two conditions apply only at one specific frequency. The
conditions we will now discuss will have to be investigated at many frequencies to ensure
broadband stability. Going back to our Smith Chart discussion, we recall that positive real
source and load impedances imply: |Γ S|and |Γ L| ≤1.
Figure 54
Figure 55
A precaution must be mentioned here. The K factor must not be considered alone. If we
were operating under matched conditions in order to achieve maximum gain, we would
have to consider the following: (1) What effect would temperature changes or drifting
S-parameters of the transistor have on the stability of the amplifier? (2) We would also
have to be concerned with the effect on stability as we substitute transistors into the
circuit. (3) Would these changing conditions affect the conjugate match or the stability of
the amplifier? Therefore, we really need to consider these other conditions in addition to
the K factor.
Looking at the input and output reflection coefficient equations, we see a similarity of
form (figure 56). The only difference is that S11 replaces S22, and Γ L replaces Γ S.
Figure 56
If we set this equation, |Γ in|, equal to one, a boundary would be established. On one side
of the boundary, we would expect |Γ in| <1. On the other side, we would expect |Γ in| >1.
Let’s first find the boundary by solving this expression (figure57). We insert the real and
imaginary values for the S-parameters and solve for Γ L.
Figure 57
Figure 58
The center of the circle will have this form (figure 58b). Having measured the
S-parameters of a two-port device at one frequency, we can calculate these quantities.
If we now plot these values on a Smith Chart, we can determine the locus of all values
of Γ L that make |Γ in| = 1.
This circle then represents the boundary (figure 59). The area either inside or outside the
circle will represent a stable operating condition.
Figure 59
To determine which area represents this stable operating condition, let’s make
ZL = 50 ohms, or Γ L = 0. This represents the point at the center of the Smith Chart.
Under these conditions, |Γ in| = |S11|.
Let’s now assume that S11 has been measured and its magnitude is less than one.
Γ in’s magnitude is also less than one. This means that this point, Γ L = 0, represents a
stable operating condition. This region (figure 60) then represents the stable operating
condition for the entire network.
If we select another value of Γ L that falls inside the stability circle, we would have an
input reflection coefficient that would be greater than one, and the network would be
potentially unstable.
If we only deal with passive loads, that is, loads having a reflection coefficient less than
or equal to one, then we only have to stay away from those Γ L’s that are in this region
(figure 61) to ensure stable operation for the amplifier we are designing. Chances are,
we should also stay away from impedances in the border region, since the other factors
like changing temperature, the aging of the transistors, or the replacement of transistors
might cause the center or radius of the stability circle to shift. The impedance of the
load could then fall in the expanded unstable region, and we would again be in trouble.
Figure 61
If, on the other hand, |S11| >1, with ZL = 50 Ω, then this area would be the stable region
and this region the unstable area (figure 62).
From a graphical point of view, we want to be sure that the stability circle falls
completely outside the Smith Chart, and we want to make sure that the inside of the
stability circle represents the unstable region (figure 63). The area outside the stability
circle, including the Smith Chart, would then represent the stable operating region.
Figure 63
To satisfy this requirement, we must ensure that the magnitude of the vector, CL, the
distance from the center of the Smith Chart to the center of the stability circle, minus the
radius of the stability circle, rL, is greater than one. This means that the closest point on
the stability circle would be outside the unit radius circle or Smith Chart.
S-parameters are typically measured at some particular frequency. The stability circles
are drawn for that frequency. We can be sure that the amplifier will be stable at that
frequency, but will it oscillate at some other frequency either inside or outside the
frequency range of the amplifier?
Figure 64
Figure 65
Looking at the |S12| |S21| product, we see that it increases below fβ, flattens out, then
decreases at higher frequencies.
Figure 66
S-Parameters
A. Their Importance
Microwave transistor technology is continually pushing maximum operating frequencies
ever upward. As a result, manufacturers of transistors are specifying their transistors in
terms of S-parameters. This affects two groups of design engineers. Transistor circuit
designers must now switch their thinking from the well-known H-, Y-, and Z-parameters
in their circuit designs to the S or scattering parameters. Microwave engineers, because
transistor technology is moving into their frequency domain, must now become
conversant with transistor terminology and begin to think of applying transistors to the
circuits they work with.
B. Review of S-Parameters
The function of network analysis is to completely characterize or describe a network so
we’ll know how it will behave when stimulated by some signal. For a two-port device,
such as a transistor, we can completely describe or characterize it by establishing a set
of equations that relate the voltages and currents at the two ports (figure 67).
Figure 67
These parameters are obtained under either open or short circuit conditions.
It is imperative that some new method for characterizing these devices at high
frequencies is used.
Figure 68
If we embed our two-port device into a transmission line, and terminate the transmission
line in its characteristic impedance, we can think of the stimulus signal as a traveling
wave incident on the device, and the response signal as a wave reflecting from the
device or being transmitted through the device (figure 68). We can then establish
this new set of equations relating these incident and “scattered” waves (figure 69a):
E1r and E2r are the voltages reflected from the 1st and 2nd ports, E1i and E2i are the
voltages incident upon the 1st and 2nd ports. By dividing through by Zo, where Zo is
the characteristic impedance of the transmission line, we can alter these equations to
a more recognizable form (figure 69b). Where, for example, |b1|2 = Power reflected from
the 1st port and|a1|2 = Power incident on the 1st port.
S11 is then equal to b1/a1 with a2 = 0 or no incident wave on port 2. This is accomplished
by terminating the output of the two-port in an impedance equal to Zo.
C. Summary
S11 = input reflection coefficient with the output matched.
To the question “Why are S-parameters important?” you can now give several answers:
2. Parasitic oscillations in active devices are minimized when these devices are
terminated in resistive loads.
1. ft or the frequency at which the short circuit current gain is equal to one;
2. fS or the frequency where |S21| =1 or the power gain of the device, |S21|2, expressed
in dB is zero;
3. fmax or the frequency where the maximum available power gain, Gamax, of the device
is equal to one. Fmax is also referred to as the maximum frequency of oscillation.
Figure 70
Due to the problems involved in obtaining true short circuits at high frequencies, the
short circuit current gain |hfe| cannot be measured directly, but can be derived from
measured S-parameter data. The shape of this gain versus frequency curve is similar to
that of |S21|2 and, for this example, ft is slightly less than fs.
Fmax is determined after conjugately matching the voltage source to the transistor input,
and the transistor output to the characteristic impedance of the line. The resulting
gain is the maximum available power gain as a function of frequency. It is higher than
|S21|2 because of impedance matching at the input and output. With proper impedance
matching techniques, the transistor is usable above fs in actual circuit design.
Figure 71
Figure 72
Figure 73
If you characterize the same chip transistor after packaging, the input reflection
characteristic again starts in the capacitive reactance region at lower frequencies and
then moves into the inductive reactance region at higher frequencies (figure 72). Another
equivalent circuit explaining this characteristic can be drawn (figure 74). Package
inductance and capacitance contribute to the radial shift inward as well as to the
extension of the S11 characteristic into the upper portion of the Smith Chart.
Figure 74
Figure 76
The output reflection coefficient of the packaged transistor is again shifted radially
inward and the angle spanned is extended. From an equivalent circuit standpoint
(figure 77), you can see that we have added the package inductance and changed
the capacitance. This added inductance causes this parameter to shift away from a
constant conductance circle.
Figure 77
Figure 78
In an equivalent circuit, we could add a current source as the element giving gain to the
transistor (figure 79).
Figure 79
Figure 80
If you were to plot |S12| on a Bode Diagram, you would see a gradual buildup at about
6 dB/octave at low frequencies, a leveling off, and then ultimately a decay at the higher
frequencies. Let’s now superimpose a Bode Plot of |S21|. It is constant at frequencies
below fβ and then decays at about 6 dB/octave. Therefore, the product of these two
characteristics would increase up to fβ, around 100 to 200 MHz, and remain relatively
flat until a break point at around the fs of the transistor (figure 81).
Figure 81
Figure 82
Measurement Demonstration
Now that you’ve seen some typical transistor characteristics, let’s actually make several
measurements to see how simply and accurately you can make the measurements that
will provide you with the necessary data for designing your circuits.
The S-parameter characteristics we have seen are those of a Model 35821E Transistor. In
these measurements we will measure the transistor in a K-disc common emitter package.
Vcb = 15 volts
Ic = 15 mA
On the polar display with the Smith Chart overlay inserted, the input impedance can
be read off directly. To ensure that we are in the linear region of the transistor, we
can measure S11 at two input power levels to the transistor. If these readings do not
change, we know that we are driving the transistor at an optimum power level and the
S-parameters are truly the small signal characteristics. If we now vary the collector current
bias level, we note very little difference (figure 90).
Returning the current level to the original value, we now decrease Vcb and note a shift of
the original characteristic. Decreasing Vcb causes the epitaxial layer to be less depleted
so you would expect less capacitive reactance in the input equivalent circuit.
Figure 91
Now you can measure the output reflection coefficient (figure 91). Let’s now reduce
the collector current and note the effect on this characteristic. The radial shift outward
indicates an increase in the real part of the output impedance. This shift is due to the
real part being inversely proportional to the gm of the transistor, while the collector
current is directly proportional to gm (figure 92).
Figure 92
Let’s now turn our attention to the gain of the transistor and depress S21 with the bias
conditions back at their original values. The forward gain of the device, S21, is now
visible. This characteristic is also affected by varying the bias conditions (figure 93).
Figure 93
Let’s look now at the reverse transmission characteristic, S12. This value is much
smaller than the forward gain, so we will have to introduce more test channel gain into
the system to enable us to have a reasonable display. This characteristic is relatively
invariant to bias changes.
One characteristic that often appears on transistor data sheets is the relation of power
gain |S21|2 versus collector current at one frequency. This characteristic curve was
determined at 1 GHz (figure 94).
Figure 94
Summary
This tape has presented an overview of S-parameter theory and has related this theory
to actual transistor characterization.
The remaining tapes in this S-Parameter Design Seminar are devoted to high frequency
circuit design techniques using S-parameters. Constant gain and noise figure circles will
be discussed and then used in designing unilateral narrow and broadband amplifiers.
This amplifier (figure 95), for example, was designed with S-parameter data, and
operates from 100 MHz to 2 GHz with a typical gain of 40 dB and flat to within 3 dB
across the band. A similar amplifier will be designed in the next tape.
Figure 95
The use of these design techniques and measurement equipment will also prove
valuable to you in your device development.
S-Parameter Review
Before introducing these concepts, let’s briefly review S-parameters.
Figure 96
As opposed to the more conventional parameter sets which relate total voltages and
total currents at the network ports, S-parameters relate traveling waves (figure 96).
The incident waves, a1 and a2, are the independent variables, and the reflected waves,
b1 and b2, are the dependent variables. The network is assumed to be embedded in a
transmission line system of known characteristic impedance which shall be designated
Zo. The S-parameters are then measured with Zo terminations on each of the ports
of the network. Under these conditions, S11 and S22, the input and output reflection
coefficients, and S21 and S12, the forward and reverse transmission coefficients, can be
measured (figure 97).
Figure 97
The transducer power gain is defined as the power delivered to the load divided by
the power available from the source. The ratio of b2 to bs can be found by applying the
nontouching loop rule for flow graphs resulting in this expression for transducer power
gain (figure 99).
Figure 98
Figure 99
If we now assume the network to be unilateral, that is, S12 is equal to zero, this term
(S21S12Γ LΓ S) drops out and the resulting expression can be separated into three distinct parts.
This expression will be referred to as the unilateral transducer power gain (figure 100).
Figure 100
The other two terms, however, are not only related to the remaining S-parameters of the
two-port device, S11 and S22, but also to the source and load reflection coefficients. It is
these latter two quantities which we will be able to control in the design of the amplifier.
We will employ lossless impedance transforming networks at the input and output ports
of the network. We can then think of the unilateral transducer power gain as being made
up of three distinct and independent gain terms and the amplifier as three distinct gain
blocks (figure 101).
Figure 101
The Gs term affects the degree of mismatch between the characteristic impedance of
the source and the input reflection coefficient of the two-port device. Even though the
G s block is made up of passive components, it can have a gain contribution greater than
unity. This is true because an intrinsic mismatch loss exists between Zo and S11, and
the impedance transforming elements can be employed to improve this match, thus
decreasing the mismatch loss, and can, therefore, be thought of as providing gain.
The Go term is, as we said before, related to the device and its bias conditions and is
simply equal to |S21|2.
The third term in the expression, GL, serves the same function as the Gs term, but
affects the matching at the output rather than the input.
Let’s look at the Gs term now in a little more detail. We have just seen that for Γ s = S11*,
G s is equal to a maximum. It is also clear that for |Γ s| = 1, Gs has a value of zero. For any
arbitrary value of Gs between these extremes of zero and Gs max, solutions for Γ s lie on
a circle (figure 103).
Figure 103
It is convenient to plot these circles on a Smith Chart. The circles have their centers
located on the vector drawn from the center of the Smith Chart to the point S11* (figure
104).
For points in this region (within the 0 dB circle), the impedance transforming network is
such as to improve the input impedance match and for points in this region (area outside
the 0 dB circle), the device is further mismatched. These circles are called constant
gain circles.
Since the expression for the output gain term, GL, has the same form as that of Gs, a
similar set of constant gain circles can be drawn for this term. These circles can be
located precisely on the Smith Chart by applying these formulas (figure 105):
Figure 105
1. di being the distance from the center of the Smith Chart to the center of the
constant gain circle along the vector S11*
In general, the noise figure for a linear two-port has this form (figure 106a), where r n is
the equivalent input noise resistance of the two-port. Gs and bs represent the real and
imaginary parts of the source admittance, and go and bo represent the real and imaginary
parts of that source admittance which results in the minimum noise figure, Fmin.
Generally, the source reflection coefficient would be varied by means of a slide screw
tuner or stub tuners to obtain a minimum noise figure as read on a noise figure meter.
Fmin can then be read off the meter and the source reflection coefficient can be
determined on a network analyzer.
Figure 106
Figure 106
To determine a family of noise figure circles, let’s first define a noise figure parameter, Ni:
Here, F i is the value of the desired noise figure circle and Γ 0, F min, and r n are as previously
defined. With a value for Ni determined, the center and radius of the circle can be found
by these expressions (figure 108).
Figure 108
From these equations, we see that Ni = 0, where Fi = Fmin; and the center of the Fmin
circle with zero radius is located at Γ 0 on the Smith Chart. The centers of the other noise
figure circles lie along the Γ 0 vector.
This plot then gives the noise figure for a particular device for any arbitrary source
impedance at a particular frequency (figure 109). For example, given a source
impedance of 40 + j 50 ohms, the noise figure would be 5 dB. Likewise, a source of 50
ohms would result in a noise figure of approximately 3.5 dB.
Constant gain circles can now be overlaid on these noise figure circles (figure 110). The
resulting plot clearly indicates the tradeoffs between gain and noise figure that have to
be made in the design of low noise stages. In general, maximum gain and minimum
noise figure cannot be obtained simultaneously. In this example, designing for maximum
gain results in a noise figure of about 6 dB, while designing for minimum noise figure
results in approximately 2 dB less than maximum gain.
Figure 110
It is also important to remember that the contributions of the second stage to the overall
amplifier noise figure can be significant, especially if the first stage gain is low (figure 111).
It is, therefore, not always wise to minimize first stage noise figure if the cost in gain is too
great. Very often there is a better compromise between first stage gain and noise figure
which results in a lower overall amplifier noise figure.
Figure 111
Design Examples
With the concepts of constant gain and constant noise figure circles well in hand, let’s
now embark on some actual design examples.
Shown here is a typical single stage amplifier with the device enmeshed between the
input and output matching networks (figure 112). The device we will be using for the
design examples is a Keysight-21 12 GHz transistor.
Figure 112
To illustrate the various considerations in the design of unilateral amplifier stages, let’s
select three design examples (figure 115). In the first example, we want to design an
amplifier stage at 1 GHz having a gain equal to Gumax, which in this case is 18.3 dB. No
consideration will be given in this design to noise figure. In the second example, we will
aim for minimum noise figure with a gain of 16 dB. The third example will be the design
of an amplifier covering the frequency band from 1 to 2 GHz with a minimum gain of
10 dB and a noise figure less than 4.5 dB.
Figure 115
Figure 116
The output matching network will be used to conjugately match the 50-ohm load impedance
to the output impedance of the transistor. From the measured data for S22 at 1 GHz, we find
that this matching network will provide a gain contribution of 1.3 dB at the output.
Since the gain of the transistor at 1 GHz with 50-ohm source and load termination is 14 dB,
the overall gain of this single stage amplifier will be 18.3 dB. The matching elements used
can be any routine element, including inductors, capacitors, and transmission lines.
In general, to transform one impedance to any other impedance at one frequency requires
two variable elements. A transmission line does, by itself, comprise two variables in that
both its impedance and its length can be varied. In our example, however, we will use only
inductors and capacitors for the matching elements.
The next step in the design process is to plot on a Smith Chart the input and output
constant gain circles. If noise figure was a design consideration, it would be necessary to
plot the noise figure circles as well. In most cases it is not necessary to plot an entire family
of constant gain circles. For this example, only the two circles representing maximum gain
are needed. These circles have zero radius and are located at S11* and S22* (figure 117).
To facilitate the design of the matching networks, let’s first overlay another Smith Chart
on the one we now have. This added Smith Chart is oriented at 180° angle with respect
to the original chart. The original chart can then be used to read impedances and the
overlaid chart to read admittances.
To determine the matching network for the output, we start from our load impedance of
50 ohms at the center of the chart and proceed along a constant resistance circle until we
arrive at the constant conductance circle that intersects the point representing S22.* This
represents a negative reactance of 75 ohms. Hence, the first element is a series capacitor.
We now add an inductive susceptance along the constant conductance circle so that the
impedance looking into the matching network will be equal to S22.*
The same procedure can now be applied at the input, resulting in a shunt capacitor and a
series inductor (figure 118).
Figure 118
Choosing which matching network to use is generally a practical choice. Notice in this
example, the first choice we made provides us with a convenient means of biasing the
transistor without adding additional parasitics to the network other than the bypass
capacitor. Another consideration might be the realizability of the elements. One
configuration might give element values that are more realizable than the other.
Along these same lines, if the element values obtained in this process are too large,
smaller values can generally be obtained by adding more circuit elements, but as you
can see, at the cost of added complexity.
In any case, our design example is essentially complete with the final circuit looking
like this.
So far we have not considered noise figure in this design example. By plotting the noise
figure circles for the device being used, we can readily determine the noise figure of
the final circuit, which in this case is approximately 6 dB (figure 119).
Figure 119
Figure 120
To accomplish the design, we first determine the input matching necessary to achieve
minimum noise figure. Then, using the constant gain circles, G1, the gain contribution
at the input can be determined. Knowing the gain of the device at 1 GHz, the desired
value of G2, the gain contribution of the output matching network can then be found.
The appropriate output matching network can be determined by using the constant gain
circles for the output.
In this example a shunt capacitor and series inductor can be used to achieve the
desired impedance for minimum noise figure. Referring once again to the Smith Chart
and the mapping techniques used previously, we follow the constant conductance circle
from the center of the Smith Chart and then proceed along a constant resistance circle
(figure 121). Sometimes this requires several trials until the exact constant resistance
circle that intersects the minimum noise figure point is found.
Since we now know that the minimum noise figure circle on the Smith Chart represents
a specific source reflection coefficient, we can insert this value of Γ s into the formula for
G 1 to determine the value of the input constant gain circle passing through this point.
In this case, it is the 1.22 dB gain circle. This is 1.8 dB less than the maximum gain
attainable by matching the input.
We can now calculate the output gain circle as follows. The desired gain is 16 dB. The
gain due to the input matching networks is 1.22 dB and the forward gain of the device
with 50-ohm source and load terminations is 14 dB. The gain desired from the matching
network at the output is, therefore, 0.78 dB.
The output matching can again be accomplished by using a series capacitor with a
shunt inductor. Notice that for the output matching there are an infinite number of points
which would result in a gain of 0.78 dB. Essentially, any point on the 0.78 dB circle
would give us the desired amount of gain.
There is, however, a unique feature about the combination of matching elements just
selected. The value of capacitance was chosen such that this point fell on the constant
conductance circle that passes through the maximum gain circle represented by
S22* (figure 122).
If, for example, the frequency were increased slightly, the capacitive reactance and the
inductive susceptance would both decrease, and the resulting impedance would be at
this point.
Similarly, decreasing the frequency would result in this impedance. Both of these points
fall on a constant gain ncircle of larger radius, and hence, lower gain (figure 123).
Figure 123
Figure 124
If we look at the input side, however, we have a far different situation. With an increase
in frequency, both the capacitive susceptance and inductive reactance increase,
resulting in an increase in gain. When the frequency is reduced, these quantities
decrease, resulting in a lower value of gain. The gain contribution at the input is,
therefore, unsymmetric with respect to frequency.
Since the overall gain as a function of frequency is the combination of the G1, G o, and G2
terms, the resulting gain would be reasonably symmetric about the center frequency. (If
another point on the 0.78 dB gain circle at the output were chosen, the final overall gain
characteristic would be asymmetric with frequency.)
The important point is that the selection of the matching elements for the output, in this
case, is not as arbitrary as it first appears. The final selection must be based not only
on the gain at a specific frequency but also on the desired frequency response. The
element values can now be calculated resulting in the circuit shown (figure 125).
Figure 125
In practice, typically 1/2 to 1 dB would be added from these sources to the predicted
theoretical noise figure for a narrow band design. As much as 2 dB could be added in
the case of an octave band design such as in our next example.
In this example, the input and output matching networks will be designed to have a
gain of 10 dB at the band edges only, The gain at 1.5 GHz will then be calculated. The
response will be found to look similar to this curve. If a greater degree of flatness were
necessary, additional matching elements would have to be added. We could then design
for 10 dB gain at three different frequencies, or more if necessary. Three frequencies
would generally be the practical limit to the graphical design approach we have been using.
Figure 126
The schematic again looks similar to that which we had in the previous two
examples (figure 127).
Figure 127
1. Match the input for the best compromise between low and high frequency noise
figure. In this case, it is important to keep the number of matching elements to
a minimum for the reasons cited earlier. It might be possible to get an additional
0.2 dB improvement in noise figure with one additional element, but the extra
element might, in turn, add an additional insertion loss at 0.2 dB or more.
2. The next step is to determine the gain contribution at the input as a result of the
noise figure matching. This then allows us to calculate the desired gain at the output
from the design objective.
3. The output matching elements are then selected, completing the design.
Let’s first plot S11* for 1 and 2 GHz and then plot the points resulting in minimum noise
figure for these frequencies (figure 128)
Figure 128
Figure 129
The constant gain circles, which intersect the points established by the input matching
network, are calculated and found to have the values 0.3 dB at 1 GHz and 1.5 dB at 2 GHz.
The desired gain due to output matching can now be calculated and found to be –4.3 dB
at 1 GHz and +0.5 dB at 2 GHz (figure 130).
Figure 130
1. For the particular transistor measured. We want to emphasize that the methodology followed in
these design examples is more important than the specific numbers
Figure 133
For this case, we find that the output gain circle has a value of –0.25 dB and the input
gain circle, a value of +1 dB. The gain of the device at 1.5 GHz is 10.5 dB. Hence the
overall gain of the amplifier at 1.5 GHz is 11.25 dB.
In summary form, the contribution of the three amplifier gain blocks at the three
frequencies can be seen (figure 134). If the resulting gain characteristic was not
sufficiently flat, we would add an additional matching element at the output and select
values for this added element such that we landed on the original gain circles for 1 and
2 GHz, but on the –1.5 dB rather than –0.25 dB circle at 1.5 GHz. This would give us a
gain for the amplifier of 10 dB at 1, 1.5, and 2 GHz with some ripple in between.
Figure 134
If, however, we were satisfied with the first gain-frequency characteristic, our final
schematic would look like this (figure 135).
Figure 135
Multistage design can be handled by simply shifting the reference impedance to the
appropriate point on the Smith Chart. This is illustrated in the following example.
Let’s now concentrate on the matching network design between two identical stages
(figure 136). For the first stage, as we have seen, there is a gain of 1.3 dB attainable by
matching the output to 50 ohms. Similarly, there is a gain of 3 dB attainable by matching
50 ohms to the input of the second stage. We can then think of a gain of 4.3 dB being
attainable by matching the output impedance of the first stage to the input impedance
of the second stage.
Figure 136
The constant gain circles for the first stage output would then be plotted on the Smith
Chart (figure 137). The maximum gain is now 4.3 dB. The gain circle that intersects the
point represented by the second stage’s S11 has a value of 0 dB.
Figure 137
Figure 138
Summary
The measurement and design techniques demonstrated in this video-tape seminar are
presently being used by engineers in advanced R&D labs throughout the world. When
coupled with design and optimization computer programs, engineers will have at their
disposal the most powerful and rapid design tools available.