SOLUTIONS BEYOND LIMITS

IPC Northwest Design Council

July 26, 2012

1
Notice

Notification of Proprietary Information: This document contains

proprietary information of Viasystems and its receipt or possession

does not convey any rights to reproduce or disclose its contents, or to

manufacture, use, or sell anything it may describe. Reproduction,

dissemination, disclosure, or use, in whole or in part, without specific

written authorization of Viasystems is strictly forbidden. All data

contained within this document are subject to this restriction.

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Overview

Micro BGA Design Guidelines

0.8 mm pitch (when microvias should be considered)

0.5 mm

0.4 mm

0.3 mm

0.25 mm

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Engineering Considerations For Via Structures

Standard through hole technology:

Channel density limited by via density,
geometry and pitch

Microvias:
Channel density enhanced
through smaller geometry
Limited Z axis connectivity
Blind & Buried via’s:
Channel density enhanced
Still geometry limited
Limited Z axis connectivity SMV:
Channel density enhanced
Once you leave through hole designs through smaller geometry
the goal is to find the via combination Unlimited Z axis connectivity
that maximizes routing channel density
at the lowest cost 4
 Density Trends In Array Packages
Assembled Cross-Section View

Increasing I/O Density Chip Scale Packaging Flip Chip Packaging

BGA
1.27 mm
Silicon Die
BGA

PCB 0.20 mm
0.50 mm
PCB XeTel XeTel

1.27 mm BGA package 0.50 mm BGA package 0.20 mm Flip Chip

Localized via density Localized via density Localized via density
62/cm2 (400/in.2) 400/cm2 (2580/in.2) 2500/cm2 (16,129/in.2)

6.45 x Increase 6.25 x Increase

in via density in via density
5
Circuit Density & Mechanical Drilling limitations

Circuit Density vs BGA Pitch (Mechanical Drill)

Decreasing Channel Density Technology Shift Increasing $

1.27 mm 1.0 mm 0.8 mm 0.5 mm

Drill dia. 0.010” (250 µm) 0.010” (250 µm) 0.008” (200 µm)
Pad dia. 0.022” (550 µm) 0.019” (475 µm) 0.018” (450 µm) 0.010” (250 µm)
Line width 0.004” (100 µm) 0.004” (100 µm) 0.0045” (112 µm) N/A
Space 0.004” (100 µm) 0.004” (100 µm) 0.0045” (112 µm)
Escape Only !
Thickness Up to 0.100” Up to 0.100” Up to 0.062”

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447
45 8
Laser Drilling Technology & Microvias

What is considered a Microvia ?

Laser Drilled Blind Via from the outer layer to an inner layer

150 µm (0.006”) diameter laser drill (range 100 µm (0.004”) – 200 µm (0.008”)

Laser drill directly into BGA or SMT footprint (Via-in-Pad)

Eliminate through-hole vias

Increases routing density & enhance electrical characteristics

Maintain 0.5:1 aspect ratio or advanced 0.8:1

Provides fan-out solutions

Laser microvia’s terminate to the underlying pad without penetrating the copper
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Microvia Technology

Microvia Types

Standard – Single Lamination cycle (no Buried Via)

Standard – with buried via

Staggered or stair-step

Off-set Microvias

Stacked MicroVias are required for 0.4 mm pitch and below

Deep Microvias
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 Microvia Generations

Standard Microvias create routing density (eliminate through vias)

Reduce layer count

Enhance electrical characteristics

Standard Microvias limited to layers 1 – 2 & 1 - 3

Stacked Microvias (SMV™) allows increased routing on multiple layers

Provide Solutions for next generation applications

1 mm – 0.8 mm – 0.65 mm - 0.5 mm – 0.4 mm – 0.3 mm & 0.25 mm

SMV provides solid copper plate, eliminating potential solder voiding

Deep Microvias (DpMV™) provide additional dielectric material & small geometry
features, improved Impedance performance & provides RF microvia solutions

Deep Stacked MicroVias (DpSMV™)
Provides additional dielectric while maintaining small geometries on multiple layers
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Microvia Types

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Microvia Types

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Second Generation Microvias

Definition:
0.005” (125 µm) laser drilled MicroVia
(solid copper plate)

Single - SMV™ Technology Stacked MicroVias (SMV™)

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 Stacked MicroVia (SMV®) Technology

Planar Microvia
Electroplated Copper via filling Mechanism

Bottom-up filling behavior is attributed to 0.002”

0.010”
the action of organic additives(must be
controlled to prescribed limits)

Suppressor rapidly forms current inhibiting

film on Cu surface. Film has little 0.004” dia.
geometric dependence due to high
suppressor solution concentration

Accelerated bottom-up fill behavior is due to

Stacked Microvia
a local accumulation of brightener species
at the feature base

As surface area is reduced during

deposition, the concentration of brightener
Layer 1
species increases, resulting in a non-
equilibrium surface concentration. This local Layer 2
concentration of brightener accelerates the Layer 3
plating rate relative to the surface.
Brightener Capture pad
Source:
Carrier 15
Stacked MicroVia (SMV®) Technology

Advantages:

Design flexibility (SMV post or buried SMV) single or stacked

Provides a solid copper plate

Improves Current Carrying Capability & Thermal Management

Provides a Planar surface for BGA (Via-in-Pad)

Increases routing density for Fine Pitch BGAs

(0.65 mm, 0.5 mm, 0.4 mm, 0.3 mm & 0.25 mm)

Allows Design Fan-out on multiple layers using 0.010” (250 µm), 0.008”
(200 µm), and 0.007” (175 µm) pad diameters

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Stacked MicroVia (SMV®) Technology

Design Guidelines:

Standard

0.010” (250 µm) Pad diameter & 0.005” (125 µm) laser drill

Advanced

0.0086” (218 µm) Pad diameter & 0.005” (125 µm) laser drill

Flip Chip Solution

0.007” (175 µm) Pad diameter & 0.004” (100 µm) laser drill

Pad diameters are driven by device pitch, drill diameter driven by dielectric thickness

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 0.5 mm BGA
Design Guidelines
IPC 6012 / 6016
Class 2 & 3

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0.5 mm Pitch Guidelines

0.5 mm Pitch BGAs require the use of Microvia Technology

Mechanical drilled through-hole Technology is not an option

Mechanical Drill violates IPC 6012 fabrication guidelines

Drill-to-copper is not sufficient and excessive break-out can occur

Microvias can be used as Via-in-Pad with a solid copper plate

Microvias can be off-set and staggered

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 Option A - Preferred

0.5 mm BGA (0.0197”) 100 µm (0.004”) trace

50 µm (0.00196”)
300 µm (0.0118”)
sm clr
BGA Pad

125 µm (0.005”) laser drill

Utilize Microvia SMV® Technology 0.1 mm (.0039”)

Solder mask Dam
External
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Option B adds cost & LDI Solder Mask

0.5 mm BGA (0.0197”) 100 µm (0.004”) trace

250 µm (0.010”) 25 µm (0.001”) sm

BGA Pad clr

125 µm (0.005”) laser drill

75 µm (0.003”) trace
83 µm (0.0033”)space

Utilize Microvia SMV® Technology Requires LDI Solder Mask +/- 25 µm (0.001”)
External
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Option C reduces cost due to offset

Dog-Bone or Offset Microvia

100 µm (0.004”) trace

(0.0197”)

224 µm (0.0088) BGA pad 50 µm (.00196”)

sm clr

224 µm (0.0088”) Microvia pad

125 µm (0.005”) laser drill

0.152 mm (0.006” trace)

Utilize Microvia Technology 0.353 mm (0.01389”) space

External 22
0.5 mm BGA

(0.0197”)

250 µm (0.0098”)
laser drill landing

75 µm (0.003”) trace
83 µm (0.0032”) space

Internal
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Microvia Technology - 4 Row 256 I/O

Rout outside row on Layer 1

Inside row “inside” to staggered through-vias

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Microvia Technology - 4 Row 256 I/O

Second Row is now outside row on Layer 2

Rout row 2 & 3

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 0.5 mm BGA Design 6 x 6

Layer 1

100 µm (0.004”) trace

125 µm (0.005”)
Laser Drill

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0.5 mm BGA Design 6 x 6

1 Track Routing
Layer 2
0.003” (75 µm) trace

0.0033” (83 µm) space

0.010” (250 µm) pad

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Lowest cost due to one lamination cycle

Dog-Bone or Offset Microvia

1+6+1
Solder mask
Offset Microvias
Layer 1
Layer 1 - 2
0.0025” Ref.
Layer 8 - 7 Layer 2
0.010” pad 0.010” Ref.
Layer 3
0.005” laser drill 0.008” Ref.
Layer 4
0.010” Ref.
Layer 5
0.008” Ref.
Layer 6
0.010” Ref.
Layer 7
0.0025” Ref.
Layer 8
Solder mask

Finish Thickness = 0.062” +/- 0.007” Layer 1 – 8 through vias

Material = High Temp FR4 0.018” pad & 0.008” drill

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Lowest cost due to one lamination cycle

Via-in-Pad with solid copper Plate

1+6+1
Solder mask
Microvias Via-in-pad
Layer 1 - 2 Layer 1
0.0025” Ref.
Layer 8 - 7 Layer 2
0.010” pad 0.010” Ref.
Layer 3
0.005” laser drill
0.008” Ref.
Layer 4
0.010” Ref.
Layer 5
0.008” Ref.
Layer 6
0.010” Ref.
Layer 7
0.0025” Ref.
Layer 8
Solder mask

Finish Thickness = 0.062” +/- 0.007” Layer 1 – 8 through vias

Material = High Temp FR4 0.018” pad & 0.008” drill

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Adds cost due to Additional Processing

Two Lamination, Drill & Plating cycles

Layer 1 - 2 & 8-7 - Microvias via-in-pad

L1 0.010” pad & 0.005” laser drill

Solder mask
3/8 oz Layer 1
0.0025” Ref. Layer 2
3/8 oz
0.004” Ref.
Layer 3
½ oz 0.006” Ref.
Layer 4
0.004” Ref.
Layer 5
½ oz 0.006” Ref.
Layer 6
0.004” Ref.
3/8 oz Layer 7
0.0025” Ref.
3/8 oz Layer 8

Solder mask

Layer 2 - 7 = Buried Vias Layer 1 - 8 = Through-hole

0.018” pad & 0.008” drill 0.020” pad & 0.010” drill

Finish Thickness = 0.042” +/- 0.005”

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Adds cost due to Additional Processing

Via-in-Pad & Offset Microvias

MicroVias Via-in-Pad Layer 2 - 3 & 7 – 6 = Offset Microvias

1-2 & 8 - 7 0.010” pad & 0.005” laser drill
0.010” pad
0.005” laser drill
Solid Copper Plate
Solder mask
3/8 oz Layer 1
Signal
0.0025” Ref. Layer 2
3/8 oz
Signal
0.003” Ref.
Plane Layer 3
½ oz 0.012” Ref.
Signal/Plane Layer 4
0.012” Ref.
Plane Layer 5
½ oz 0.012” Ref.
Signal Layer 6
0.003” Ref.
3/8 oz Signal Layer 7
0.0025” Ref.
3/8 oz Plane Layer 8

Solder mask

Layer 2 - 7 = Buried Vias Layer 1 - 8 = Through-hole

0.018” pad & 0.008” drill
Finish Thickness = 0.062” +/- 0.007” 0.018” pad & 0.008” drill
Material = High temp FR4
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 Lower Cost for 0.5 mm pitch or greater

Dog-Bone & Offset Microvia

Offset Microvias Solder mask

Layer 1 - 2 & 2 - 3 3/8 oz Layer 1
3-4 0.003” Ref.
3/8 oz Layer 2
0.010” pad
0.003” Ref.
0.005” laser drill 3/8 oz Layer 3
0.003 Ref.
Layer 4
1/2 oz 0.034” Ref. Lam 1 Lam 2 L3
Layer 5
0.003” Ref.
3/8 oz Layer 6
0.003” Ref.
3/8 oz Layer 7
0.003” Ref.
3/8 oz Layer 8
Solder mask

Through-Hole Via
0.018” pad
0.008” drill

Finish Thickness = 0.063” +/- 0.007”

Material = High Temperature FR4 32
 0.4 mm BGA
Design Guidelines
IPC 6012 / 6016
Class 2 & 3

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0.4 mm Pitch Guidelines

0.4 mm Pitch BGAs require the use of Microvia Technology

Mechanical drilled through-hole Technology is not an option

Mechanical Drill violates IPC 6012 fabrication guidelines

Drill-to-copper is not sufficient and excessive break-out can occur

Microvias can be used as Via-in-Pad with a solid copper plate

Microvias (0.4 mm pitch) can not be off-set or staggered

Can “Dog-Bone” to a buried via
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SMV™ Technology Capable of multiple layers

0.4 mm BGA
Design Guidelines:

• Standard SMV®

0.009” (225 µm) external & 0.011” internal (275 µm) Pad diameter &
0.005” (125 µm) laser drill

• Advanced SMV® (cost adder)

0.009” (225 µm) external & 0.0086” internal (218 µm) Pad diameter &
0.005” (125 µm) laser drill

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SMV™ Technology Capable of multiple layers

0.4 mm BGA
0.0157”
0.004” (100 µm) trace
0.004 (100 µm) space

0.009” (225 µm) SMV™ pad

0.005” (125 µm) laser drill

0.00185 (47µm) to 0.002”

(50 µm) sm clr

External Layer 1 0.0027” to 0.003” Solder Dam

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SMV™ Technology Capable of multiple layers

0.0157”
0.4 mm BGA

0.004” (100 µm) trace

0.004 (100 µm) space

0.011” (225 µm) SMV™ pad

0.005” (125 µm) laser drill

Internal Layer 2 – second row is outside row

Continue to fan out outside row and use Inverted Pyramid approach
Layer 3 - 4 - 5
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Example of Inverted Pyramid Routing

0.4 mm Pitch Fan out

Inverted Pyramid
Layer 1

Layer 2

Layer 3

Layer 4

Layer 5

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12 X 11 0.4 mm pitch

Rout outside row on Layer 1

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12 X 11 0.4 mm pitch

Rout outside row on Layer 2

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12 X 11 0.4 mm pitch

Rout outside row on Layer 3

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12 X 11 0.4 mm pitch

Rout outside row on Layer 4

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12 X 11 0.4 mm pitch

Rout outside row on Layer 5

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12 X 11 0.4 mm pitch

Rout outside row on Layer 6

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 0.4 mm BGA
Design Guidelines
Advanced Technology
Adds Cost
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SMV™ Technology Capable of multiple layers

0.4 mm BGA
0.0157”
0.004” (100 µm) trace
0.004 (100 µm) space

0.009” (225 µm) SMV™ pad

0.005” (125 µm) laser drill

0.00185 (47µm) to 0.002”

(50 µm) sm clr

External Layer 1 0.0027” to

0.003” Solder Dam 46
SMV™ Technology Capable of multiple layers

Advanced 0.4 mm BGA LDI

0.0157”
0.004” (100 µm) trace
0.004 (100 µm) space

0.0086” (218 µm) SMV™ pad

0.005” (125 µm) laser drill

0.00236” (60 µm) trace

0.00236 (60 µm) space

Adds $$$$$$$
Recommend fan out on each layer using Inverted Pyramid approach 47
Six Layer SMV® Construction 0.4 mm pitch

Stacked MicroVias
Layer 1 - 2 & 2 - 3
0.009” external
0.011” pad internal
0.005” laser drill Two plating, drilling, & Lamination Cycles,
Solid Copper Plate
Solder mask
3/8 oz L1-2 L1-3 L1-6 Layer 1
Lam 2
0.0025” Ref.
3/8 oz Layer 2
0.0025 Ref. Lam 1
1 oz
Layer 3
0.038” Ref.
1 oz Layer 4
0.0025” Ref.
3/8 oz Layer 5
0.0025” Ref.
3/8 oz Layer 6
Solder mask

Through-Hole Via
0.018” pad
3/8 oz copper plates up to 0.0016” – 0.0024” 0.008” drill

Finish Thickness = 0.062” +/- 0.007”

Material = High Temperature FR4 48
 Ten Layer “Full Stack” SMV®

Stacked MicroVias
Layer 1 - 2
Layer 2 – 3
0.4 mm Pitch
Layer 3 – 4 Solder mask
Layer 8 - 7 3/8 oz Layer 1
Layer 7 – 6 0.0025” Ref.
3/8 oz Layer 2 L4
Layer 6 - 5
0.0011” pad 3/8 oz 0.0025” Ref.
Layer 3 L3
0.005” laser drill 0.0025” Ref.
3/8 oz Layer 4 L2
Solid Cu Plate
0.0025” Ref. L1
Layer 5
½ oz
0.006” Ref.
Layer 6
3/8 oz 0.0025” Ref.
Layer 7
Buried Via 3/8 oz 0.0025” Ref.
Layer 4 - 5 Layer 8
3/8 oz 0.0025” Ref.
0.012” pad Layer 9
0.006” mech drill 3/8 oz 0.0025” Ref.
Solid cu plate Layer 10
or laser drill Solder mask
Solid cu plate

Finish Thickness = 0.045” +/- 0.005”

Material = High Temperature FR4
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 Stacked MicroVia (SMV®)

Stacked MicroVias
Layer 1 - 2 0.4 mm BGA Advanced Construction
Layer 2 - 3
Layer 3 – 4 Solder mask
Layer 4 – 5 Layer 1 Mixed
3/8 oz
Layer 5 – 6 0.0028” Ref.
0.011” pad internal 3/8 oz Layer 2 Mixed
0.0028” Ref.
0.005” laser drill 3/8 oz Layer 3 Pln
Solid copper plate 0.0028” Ref.
3/8 oz Layer 4 Sig
0.0028” Ref.
3/8 oz Layer 5 Sig
0.0028” Ref.
Layer 6 Pln
½ oz 0.005” Ref.
Layer 7 Pln
Stacked MicroVias 0.0028” Ref.
3/8 oz Layer 8 Sig
Layer 13 – 12 0.0028” Ref.
Layer 12 – 11 3/8 oz Layer 9 Sig
Layer 11 – 10 0.0028” Ref.
3/8 oz Layer 10 Pln
Layer 10 – 9 0.0028” Ref.
3/8 oz Layer 11 Mixed
Layer 9 - 8 0.0028” Ref.
0.011” pad internal 3/8 oz Layer 12 Mixed
0.005” laser drill Solder mask
Solid copper plate Layer 5- 8 = through holes
0.016” pad Layer 1- 12 = through holes
0.006” drill 0.018” pad
0.008” drill
Finish Thickness = 0.054” +/- 0.005” 50
“Full Stack” SMV® Example

10 Layer SMV™ Technology

Full Build
0.005” (125 µm) Laser drill
0.0025” (64 µm) dielectric
0.006” (150 µm) dielectric
0.006” (150 µm) Mech drill

0.005” (125 µm) Laser drill

0.0025” (64 µm) dielectric

Solid Copper Plate

Core & Microvias = Solid Copper Plate

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 Fourteen Layer with off-set Buried Via

Microvias Solder mask

Layer 1 - 2 3/8 oz Layer 1
Layer 2 - 3 3/8 oz 0.0025” Ref.
Layer 2
Layer 3 – 4
3/8 oz 0.0025” Ref.
Layer 4 - 5 Layer 3
0.010” pad 3/8 oz 0.0025” Ref.
Layer 4
0.005” laser drill 0.0025” Ref.
Solid copper plate Layer 5
½ oz 0.006” Ref.
Layer 6
0.005” Ref.
Layer 7
½ oz
0.006” Ref.
Layer 8
Microvias 0.005” Ref.
Layer 14 – 13 Layer 9
½ oz 0.006” Ref.
Layer 13 – 12 Layer 10
Layer 12 – 11 3/8 oz 0.0025” Ref.
Layer 11 – 10 Layer 11
3/8 oz 0.0025” Ref.
0.010” pad Layer 12
0.005” laser drill 3/8 oz 0.0025” Ref.
Layer 13
Solid copper plate 0.0025” Ref.
3/8 oz Layer 14
Solder mask
Layer 4 - 11 = buried vias
0.016” pad & 0.006” drill Layer 1- 14 = through vias
0.018” pad & 0.008” drill
Finish Thickness = 0.062” +/- 0.007”
Material = High Temperature FR4 52
Stacked MicroVia (SMV®)

0.3 mm BGA
Design Guidelines
IPC 6011 / 6012
Class 2
53
Stacked MicroVia (SMV®)

0.3 mm Flip Chip

0.0118”

0.003” trace or
0.004” trace

0.0088” SMV™ pad

0.003” space

0.005” laser drill

External Layer 1 54
Stacked MicroVia (SMV®)

0.3 mm Flip Chip

0.0118”

0.003” trace or
0.004” trace

0.0088” SMV™ pad

0.003” space

0.005” laser drill

Internal Layer 2 55
Stacked MicroVia (SMV®)

0.3 mm Flip Chip

0.0118”

0.003” trace or
0.004” trace

0.0088” SMV™ pad

Internal Layer 3
56
 0.25 mm BGA
Design Guidelines
IPC 60112/ 6016
Class 2
57
Stacked MicroVia (SMV®)

0.25 mm Flip Chip

0.00984”

0.003” trace or
0.004” trace

0.007” SMV™ pad

0.00284” space

0.004” laser drill

External Layer 1
58
Stacked MicroVia (SMV®)

0.25 mm Flip Chip

0.00984”

0.003” trace or
0.004” trace

0.007” SMV™ pad

0.00284” space

0.004” laser drill

Internal Layer 2
59
Stacked MicroVia (SMV®)

0.25 mm Flip Chip

0.00984”

0.003” trace or
0.004” trace

0.007” SMV™ pad

Internal Layer 3 60
Stacked MicroVia (SMV®)

0.25 mm Pitch
Solder mask
Microvias
Layer 1 - 2 3/8 oz Layer 1
Layer 2 - 3 0.0025” Ref.
Layer 3 - 4 3/8 oz Layer 2
0.0068” pad 0.0025” Ref.
3/8 oz Layer 3
0.004” laser drill 0.0027” Ref.
Layer 4
½ oz 0.004” Ref.
Layer 5
0.004” Ref.
Layer 6
½ oz 0.004” Ref.
Layer 7
0.0025” Ref.
3/8 oz Layer 8
0.0027” Ref.
3/8 oz Layer 9
0.0025” Ref.
3/8 oz Layer 10
Solder mask

Through-Hole
Layer 1 - 10
0.018” pad
0.008” mech drill
Finish Thickness = 0.044 +/- 0.005
Material = High Temperature FR4 61
Stacked MicroVia (SMV®)

0.25 mm Pitch
Stacked MicroVias
0.0068” pad
0.004” laser drill
Solid Cu Plate Solder mask
3/8 oz Layer 1
0.0025” Ref.
3/8 oz Layer 2
0.0025” Ref.
3/8 oz Layer 3
0.006” Ref.
3/8 oz Layer 4
0.0025” Ref.
3/8 oz Layer 5
0.0025” Ref.
3/8 oz Layer 6
Solder mask

3/8 oz copper plates up to 0.0016” - .0018” Buried Via

Layer 3 - 4
0.010” pad
0.006” laser drill
Solid copper plate

Finish Thickness = 0.030” +/- 0.004”)

Material = High Temperature FR4 62
Routing Techniques for Fine Pitch BGAs

0.5 mm Pitch – Offset Microvias

External = Dog-Bone Microvias & Staggered Microvias Internal

Stacked MicroVias (SMV®)

0.4 mm Pitch – Stacked MicroVias (SMV®)

Using Inverted Pyramid Technique

0.3 mm pitch - Stacked MicroVias (SMV®)

using Inverted Pyramid Technique

0.25 mm pitch - Stacked MicroVias (SMV®)

Inverted Pyramid Technique

63
Overview

Microvia Sub-lamination
Interface Techniques

64
Microvia: Sub-Lamination Interface

Basic design rules for Microvia build-up layers:

Build-up dielectric layers must be balanced on either side of the sub-lamination

Build-up dielectric layers are generally 0.0025” (64µm) to 0.003” (75µm) thick

The recommended total number of lamination cycles that any one part of the
structure should experience is 3 and 4 – 5 for advanced structures

Microvia’s stacked on buried mechanical vias should be avoided due to wrap

plating requirements and excessive stress on thicker substrates

Solid copper mechanically drilled via’s can be used on thin sub-lamination

cores in place of wrap plating
65
Internal Layer “Dog Bone” to a Buried Via - Guidelines

Not a Common Electrical Net

Buried Via Offset Technology for 0.4 mm Pitch

0.005” (125 µm)

0.011” (275 µm) SMV™ pad
0.005” (125 µm) laser drill

0.018” (450 µm) Buried Via pad

0.008” (200 µm) Mech drill

Internal Layer “Dog Bone” to Buried Via

66
Internal Layer “Dog Bone” to a Buried Via - Guidelines

A Common Electrical Net

Offset Technology for 0.4 mm Pitch

Tangent or Advanced = 0.001” overlap

0.011” (275 µm) SMV™ pad
0.005” (125 µm) laser drill

0.018” (450 µm) Buried Via pad

0.011” (275 µm) Trace width 0.008” (200 µm) Mech drill

Internal Layer “Dog Bone” to Buried Via

67
Microvia Sub-Lamination Interface: Stacked On Sub-Via

• This approach requires via fill and wrap plating Stacked MicroVia
• CTE issues can be a problem on thick boards Through via

Via-In-Pad
Layer +2
Prepreg
Layer +1
Prepreg
Layer 1
Prepreg
Layer 2
Sub-Lamination

Laminate Core
Layer 3
Prepreg
Layer 4 2+8+2
Laminate Core
Layer 5
Prepreg
Layer 6
Laminate Core
Layer 7
Prepreg
Layer 8
Prepreg
Layer +1
Prepreg
Layer +2

Not Recommended on all designs: Contact engineering

68
Microvia Sub-Lamination Interface: Offset Via

0.5 mm Pitch or > Staircase microvia

Offset via Through via

Layer +2
Prepreg
Layer +1
Prepreg
Layer 1
Prepreg
Layer 2
Sub-Lamination

Laminate Core
Layer 3
Prepreg
Layer 4 2+8+2
Laminate Core
Layer 5
Prepreg
Layer 6
Laminate Core
Layer 7
Prepreg
Layer 8
Prepreg
Layer +1
Prepreg
Layer +2

Preferred Construction 69
Microvia Sub-Lamination Interface: Offset Via Stacked

0.4 mm Pitch or < Stacked MicroVia

Offset via Through via

Layer +2
Prepreg
Layer +1
Prepreg
Layer 1
Prepreg
Layer 2
Sub-Lamination

Laminate Core
Layer 3
Prepreg
Layer 4
Laminate Core
Layer 5
Prepreg
Layer 6
Laminate Core
Layer 7
Prepreg
Layer 8
Prepreg
Layer +1
Prepreg
Layer +2

Preferred Construction 70
Microvia Sub-Lamination Interface: Sub-Lam Microvia

Stacked Microvia Stacked MicroVia using a microvia

in the sub-lamination
Offset via Through via

Layer +2
Prepreg
Layer +1
Prepreg
Layer 1
Prepreg
Layer 2
Sub-Lamination

Laminate Core
Layer 3
Prepreg
Layer 4
Laminate Core
Layer 5
Prepreg
Layer 6
Laminate Core
Layer 7
Prepreg
Layer 8
Prepreg
Layer +1
Prepreg
Layer +2
2 + 8 + 2 or 12 Layer Construction

Preferred Construction with additional low cost Microvia to layer 4 71

 PCB Design Guidelines

Summary

The key to a successful Design is the right combination of Via structures & paths,

trace width & space, drill diameter, pad diameter, anti-pad, and aspect ratio. This will

maximize routing density, improve electrical characteristics and allows the PCB to be

fabricated with high yields for the lowest cost in a timely manner.

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SOLUTIONS BEYOND LIMITS

Viasystems North America

Thank You!

www.viasystems.com

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