Lab 2: Universal Gates

Objectives

 We will observe the basic concept of Universal Gates - NAND & NOR.
 We will learn how to implement the basic logic gates using universal gates
 We will familiarize ourselves with implement Boolean functions using universal gates.
 We will understand gate level minimization.

Apparatus

 Trainer Board
 IC 7400 Quadruple 2-input NAND gates
 IC 7402 Quadruple 2-input NOR gates

Theory
*Logic Gates

A logic gate is a series of transistors connected together to give one or more outputs, each output being
based on the input or combination of inputs supplied to it. Two discrete voltage levels showing the
binary values 0 (logical LOW) and 1 (logical HIGH) in digital logic gates.

*NAND Gate

A NAND gate operates as an AND gate followed by a NOT gate. It acts in the manner of the logical
operation “AND” followed by negation. The output is 0(FALSE) if both inputs are 1(TRUE). Otherwise, the
output is 1(TRUE). Symbol-

IC#7400
*NOR Gate

A NOR gate is a combinational OR gate followed by an inverter. Its output is 1 (TRUE) if both input is
0(FALSE). Otherwise, the output is 0(FALSE). Symbol-

IC#7402

*Integrated Circuit(IC)

An integrated circuit(IC) is a small semiconductor-based electronic device consisting of fabricated

transistors, resistors and capacitors. Integrated circuits are the building blocks of most electronic devices
and equipment.

*7400 Series Integrated Circuit

In our experiment we use 7400 series integrated circuits. The IC 7400 is a 14-pin chip and it includes four
2-input NAND gates. Every gate utilize 2-input pins and 1-output pin, by the remaining 2-pins being
power and ground. The chip was made with different packages like surface mount and through-hole
which includes ceramic (or) plastic dual-in-line and flat pack.

Circuit Diagram and Experimental Data

Circuit Diagram

Figure C1: NAND gate equivalent circuits

 Experimental Data

IC#7486 IC#74266

XNOR gate
XOR gate
Figure F1: Implementation of XOR and XNOR using NAND gates

NOT (IC#7404) AND (IC#7408) OR (IC#7432)

XOR (IC#7486) XNOR (IC#74266)

Figure F2: Implementation of NOT, AND, OR, XOR and XNOR using NOR gates
 A B C I = AC
1 I = BC’
2 F=I+I1 2

0 0 0 0 0 0
0 0 1 0 0 0
0 1 0 0 1 1
0 1 1 0 0 0
1 0 0 0 0 0
1 0 1 1 0 1
1 1 0 0 1 1
1 1 1 1 0 1
Table F1: Truth table of combinational circuit in Figure B2

Simulation

Part 1

- Replace each of the gates with its NAND gate equivalent.

NAND gate (IC#7400)

Part 2
 Naima Homaira Khan_2012959042

NAND gate (IC#7400)

Figure F3: Universal (NAND) gate implementation of the circuit of Figure D2

Part-02
Tania Akter Lima_2011566042
NAND gate (IC#7400)
 Part-02
Shekh Shahnewaz Bin Ferdous_2031096642
NAND gate (IC#7400)

Experiment Procedure

1. At first, we need to take IC 7400 Quadruple 2-input NAND gates and IC

7402 Quadruple 2-input NOR gates, place on the breadboard and ensure
that each of the IC is in a separate node at the breadboard.
2. We have to label the pin numbers of circuits in Figure F1 and F2.
3. Now, we will construct and test the implementations of XOR and XNOR
gates using NAND gates only in Figure F1 and, again construct and test the
implementation of NOT, AND, OR, XOR and XNOR gates using NOR gates
only in Figure F2.
4. Then we will convert the circuit in Figure D2 to a NAND gate equivalent
circuit and labeling the pin numbers in the final circuit design.
5. Lastly, we will validate the operation of the universal gate circuit from the
truth table.
6.
Questions and Answers

1. Draw the IC diagram for the circuit in Figure F3 – Step 2.

Solution:

In this experiment the IC diagram we used for the circuit in Figure F3 – step 2 is
NAND gate. The drawing of IC diagram is given below-

Fig: IC Diagram of NAND gate.

Discussion

We have learned about NAND and NOR gates which are universal, and how to
implement the basic logic gates and Boolean functions using universal gates. We
saw the implementation of NOT, AND, and OR gates in the experiment using only
NAND gates. Firstly, we did construct and test the performances of XOR and
XNOR gates using NAND gates only in Figure F1 and, again, built and test the
implementation of NOT, AND, OR, XOR, and XNOR gates using NOR gates only in
Figure F2. Secondly, we did convert the circuit in Figure D2 to a NAND gate
equivalent circuit and labeled the PINs in the final circuit design.

(Naima Homaira Khan_201295942)