TDA7564

MULTIFUNCTION QUAD POWER AMPLIFIER

WITH BUILT-IN DIAGNOSTICS FEATURES

■ DMOS POWER OUTPUT MULTIPOWER BCD TECHNOLOGY

■ NON-SWITCHING HI-EFFICIENCY
■ HIGH OUTPUT POWER CAPABILITY 4x28W/4Ω MOSFET OUTPUT POWER STAGE
@ 14.4V, 1KHZ, 10% THD, 4x40W EIAJ
■ MAX. OUTPUT POWER 4x72W/2Ω
■ FULL I2C BUS DRIVING:
– ST-BY
– INDEPENDENT FRONT/REAR SOFT PLAY/ FLEXIWATT25
MUTE ORDERING NUMBER: TDA7564
– SELECTABLE GAIN 26dB - 12dB (FOR
LOW NOISE LINE OUTPUT FUNCTION) tions. Thanks to the DMOS output stage the
– HIGH EFFICIENCY ENABLE/DISABLE TDA7564 has a very low distortion allowing a clear
– I2C BUS DIGITAL DIAGNOSTICS powerful sound. Among the features, its superior
■ FULL FAULT PROTECTION efficiency performance coming from the internal
■ DC OFFSET DETECTION exclusive structure, makes it the most suitable de-
■ FOUR INDEPENDENT SHORT CIRCUIT vice to simplify the thermal management in high
PROTECTION power sets.The dissipated output power under av-
erage listening condition is in fact reduced up to
■ CLIPPING DETECTOR (2% - 10%)
50% when compared to the level provided by con-
PROTECTION
ventional class AB solutions.This device is
DESCRIPTION equipped with a full diagnostics array that commu-
The TDA7564 is a new BCD technology QUAD nicates the status of each speaker through the I 2C
BRIDGE type of car radio amplifier in Flexiwatt25 bus.The possibility to control the configuration and
package specially intended for car radio applica- behaviour of the device by means of the I2C bus
makes TDA7564 a very flexible machine.

BLOCK DIAGRAM
CLK DATA VCC1 VCC2

CD_OUT
I2CBUS CLIP
THERMAL REFERENCE
PROTECTION MUTE1 MUTE2 DETECTOR
& DUMP

IN RF OUT RF+

12/26dB OUT RF-

SHORT CIRCUIT
PROTECTION &
DIAGNOSTIC
IN RR OUT RR+

12/26dB OUT RR-

SHORT CIRCUIT
PROTECTION &
DIAGNOSTIC
IN LF OUT LF+

12/26dB OUT LF-

SHORT CIRCUIT
PROTECTION &
DIAGNOSTIC
IN LR OUT LR+

12/26dB OUT LR-

SHORT CIRCUIT
PROTECTION &
DIAGNOSTIC

SVR AC_GND TAB S_GND RF RR LF LR

D00AU1211
PW_GND

September 2003 1/20

TDA7564

ABSOLUTE MAXIMUM RATINGS

Symbol Parameter Value Unit
Vop Operating Supply Voltage 18 V
VS DC Supply Voltage 28 V
Vpeak Peak Supply Voltage (for t = 50ms) 50 V
VCK CK pin Voltage 6 V
VDATA Data Pin Voltage 6 V
IO Output Peak Current (not repetitive t = 100ms) 8 A
IO Output Peak Current (repetitive f > 10Hz) 6 A
Ptot Power Dissipation Tcase = 70°C 85 W
Tstg, Tj Storage and Junction Temperature -55 to 150 °C

THERMAL DATA
Symbol Parameter Value Unit
Rth j-case Thermal Resistance Junction to case Max. 1 °C/W

PIN CONNECTION (Top view)

25 DATA
24 PW_GND RR
23 OUT RR-
22 CK
OUT RR+
20 VCC2
19 OUT RF-
18 PW_GND RF
17 OUT RF+
16 AC GND
15 IN RF
14 IN RR
13 S GND
12 IN LR
11 IN LF
10 SVR
9 OUT LF+
8 PW_GND LF
7 OUT LF-
6 VCC1
OUT LR+
4 CD-OUT
3 OUT LR-
2 PW_GND LR
1 TAB
D99AU1037

2/20
 TDA7564

Figure 1. Application Circuit

C8 C7
0.1µF 3300µF
Vcc1 Vcc2
6 20 +
17
DATA 25 18 OUT RF
I2C BUS 19
-
CLK 22 +
21
C1 0.22µF
24 OUT RR
IN RF 15
23
-
C2 0.22µF +
9
IN RR 14
8 OUT LF
C3 0.22µF 7
-
IN LF 11 +
5
C4 0.22µF 2 OUT LR
IN LR 12 3
-
S-GND TAB
13 1
16 10 4

47K
C5 C6 V
1µF 10µF
D00AU1212
CD OUT

3/20
TDA7564

ELECTRICAL CHARACTERISTICS
(Refer to the test circuit, VS = 14.4V; RL = 4Ω; f = 1KHz; Tamb = 25°C; unless otherwise specified.)
Symbol Parameter Test Condition Min. Typ. Max. Unit
POWER AMPLIFIER
VS Supply Voltage Range 8 18 V
Id Total Quiescent Drain Current 170 300 mA
PO Output Power EIAJ (VS = 13.7V) 35 40 W
THD = 10% 25 28 W
THD = 1% 22 W
RL = 2Ω; EIAJ (VS = 13.7V) 55 62 W
RL = 2Ω; THD 10% 40 46 W
RL = 2Ω; THD 1% 35 W
RL = 2Ω; MAX POWER 72 W
THD Total Harmonic Distortion PO = 1W to 10W; STD MODE 0.02 0.1 %
HE MODE; PO = 1.5W 0.015 0.1 %
HE MODE; PO = 8W 0.15 0.5 %
GV = 12dB; STD Mode 0.02 0.05 %
VO = 0.1 to 5VRMS
CT Cross Talk f = 1KHz to 10KHz, Rg = 600Ω 50 60 dB
RIN Input Impedance 60 100 130 KΩ
GV1 Voltage Gain 1 25 26 27 dB
∆GV1 Voltage Gain Match 1 -1 1 dB
GV2 Voltage Gain 2 11 12 13 dB
∆GV2 Voltage Gain Match 2 -1 1 dB
EIN1 Output Noise Voltage 1 Rg = 600Ω, 20Hz to 22kHz 35 100 µV
EIN2 Output Noise Voltage 2 Rg = 600Ω; GV = 12dB 12 30 µV
20Hz to 22kHz
SVR Supply Voltage Rejection f = 100Hz to 10kHz; Vr = 1Vpk; 50 60 dB
Rg = 600Ω
BW Power Bandwidth 100 KHz
ASB Stand-by Attenuation 90 110 dB
ISB Stand-by Current Consumption 25 100 µA
AM Mute Attenuation 80 100 dB
VOS Offset Voltage Mute & Play -100 0 100 mV
TON Turn ON Delay D2/D1 (IB1) 0 to 1 20 40 ms
TOFF Turn OFF Delay D2/D1 (IB1) 1 to 0 20 40 ms
VAM Min. Supply Mute Threshold 7 7.5 8 V
CDLK Clip Det High Leakage Current CD off 0 15 µA
CDSAT Clip Det Sat. Voltage CD on; ICD = 1mA 150 300 mV
CDTHD Clip Det THD level D0 (IB1) = 0 1 2 3 %
D0 (IB1) = 1 5 10 15 %
TURN ON DIAGNOSTICS 1 (Power Amplifier Mode)
Pgnd Short to GND det. (below this Power Amplifier in st-by 1.2 V
limit, the Output is considered in
Short Circuit to GND)
Pvs Short to Vs det. (above this limit, Vs -1.2 V
the Output is considered in Short
Circuit to Vs)

4/20
 TDA7564

ELECTRICAL CHARACTERISTICS (continued)

(Refer to the test circuit, VS = 14.4V; RL = 4Ω; f = 1KHz; Tamb = 25°C; unless otherwise specified.)
Symbol Parameter Test Condition Min. Typ. Max. Unit
Pnop Normal operation thresholds. Power Amplifier in st-by 1.8 Vs -1.8 V
(Within these limits, the Output is
considered without faults).
Lsc Shorted Load det. 0.5 Ω
Lop Open Load det. 85 Ω
Lnop Normal Load det. 1.75 45 Ω
TURN ON DIAGNOSTICS 2 (Line Driver Mode)
Pgnd Short to GND det. (below this Power Amplifier in st-by 1.2 V
limit, the Output is considered in
Short Circuit to GND)
Pvs Short to Vs det. (above this limit, Vs -1.2 V
the Output is considered in Short
Circuit to VS)
Pnop Normal operation thresholds. 1.8 Vs -1.8 V
(Within these limits, the Output is
considered without faults).
Lsc Shorted Load det. 2 Ω
Lop Open Load det. 330 Ω
Lnop Normal Load det. 7 180 Ω
PERMANENT DIAGNOSTICS 2 (Power Amplifier Mode or Line Driver Mode)
Pgnd Short to GND det. (below this Power Amplifier in Mute or Play, 1.2 V
limit, the Output is considered in one or more short circuits
Short Circuit to GND) protection activated
Pvs Short to Vs det. (above this limit, Vs -1.2 V
the Output is considered in Short
Circuit to VS)
Pnop Normal operation thresholds. 1.8 Vs -1.8 V
(Within these limits, the Output is
considered without faults).
LSC Shorted Load Det. Pow. Amp. mode 0.5 Ω
Line Driver mode 2 Ω
VO Offset Detection Power Amplifier in play, ±1.5 ±2 ±2.5 V
AC Input signals = 0
INL Normal load current detection VO < (VS - 5)pk 500 mA
IOL Open load current detection VO < (VS - 5)pk 250 mA
2
I C BUS INTERFACE
fSCL Clock Frequency 400 KHz
VIL Input Low Voltage 1.5 V
VIH Input High Voltage 2.3 V

5/20
TDA7564

Figure 2. Quiescent Current vs. Supply Voltage Figure 5. Distortion vs. Output Power (4Ω, STD)
Id (mA) THD (%)
250 10
230

210 Vin = 0
NO LOADS STANDARD MODE
Vs = 14.4 V
190 1 RL = 4 Ohm
170

150 f = 10 KHz
130 0.1
110
f = 1 KHz
90

70 0.01
8 10 12 14 16 18 0.1 1 10
Vs (V) Po (W)

Figure 3. Output Power vs. Supply Voltage (4Ω) Figure 6. Distortion vs. Output Power (4Ω, HI-EFF)
Po (W) THD (%)
70 10
65 Po-max
HI-EFF MODE
60
RL = 4 Ohm Vs = 14.4 V
55 1 RL = 4 Ohm
f = 1 KHz
50
THD = 10 %
45
f = 10 KHz
40
0.1
35
30
f = 1 KHz
25
THD = 1 % 0.01
20
15
10
5 0.001
8 9 10 11 12 13 14 15 16 17 18 0.1 1 10
Vs (V) Po (W)

Figure 4. Output Power vs. Supply Voltage (2Ω) Figure 7. Distortion vs. Output Power (2Ω, STD)
Po (W) THD (%)
100 10

90
Po-max STANDARD MODE
RL = 2 Ohm Vs = 14.4 V
80 f = 1 KHz RL = 2 Ohm
70 1
f = 10 KHz
60 THD = 10 %
50

40 0.1
f = 1 KHz
30 THD = 1 %

20

10 0.01
8 9 10 11 12 13 14 15 16 0.1 1 10
Vs (V) Po (W)

6/20
 TDA7564

Figure 8. Distortion vs. Frequency (4Ω) Figure 11. Supply Voltage Rejection vs. Freq.
THD (%) SVR (dB)
10 90

80
STANDARD MODE
Vs = 14.4 V 70
1
RL = 4 Ohm
Po = 4 W 60

50
0.1
40 STD & HE MODE
Rg = 600 Ohm
Vripple = 1 Vpk
30

0.01 20
10 100 1000 10000 10 100 1000 10000
f (Hz) f (Hz)

Figure 9. Distortion vs. Frequency (2Ω) Figure 12. Power Dissipation & Efficiency vs.
Output Power (4Ω, STD, SINE)
THD (%)
10 Ptot (W) n (%)
90 90
n
80 80
STANDARD MODE
Vs = 14.4 V
STANDARD MODE 70 70
RL = 4 x 4 Ohm
1 Vs = 14.4 V f = 1 KHz SINE
RL = 2 Ohm 60 60
Po = 8 W
50 50

40 40
0.1 Ptot
30 30

20 20

10 10
10 100 1000 10000
0 0
f (Hz)
0 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30
Po (W)

Figure 10. Crosstalk vs. Frequency Figure 13. Power Dissipation & Efficiency vs.
Output Power (4W, HI-EFF, SINE)
CROSSTALK (dB) Ptot (W) n (%)
90 90 90

80 80 80
HI-EFF MODE
n
Vs = 14.4 V
70 70
70 RL = 4 x 4 Ohm
f = 1 KHz SINE
60 60
60
STANDARD MODE 50 50
RL = 4 Ohm Ptot
50 Po = 4 W 40 40
Rg = 600 Ohm
40 30 30

20 20
30
10 10
20
10 100 1000 10000 0 0
f (Hz) 0.1 1 10
Po (W)

7/20
TDA7564

Figure 14. Power Dissipation vs. Average Figure 15. Power Dissipation vs. Average
Ouput Power (Audio Program Ouput Power (Audio Program
Simulation, 4Ω) Simulation, 2Ω)
Ptot (W) Ptot (W)
45 90

40 80
Vs = 14 V STD MODE Vs = 14 V
35 RL = 4 x 4 Ohm 70 RL = 4 x 2 Ohm
GAUSSIAN NOISE GAUSSIAN NOISE STD MODE
30 60
CLIP
25 START 50
HI-EFF MODE CLIP HI-EFF MODE
20 40 START

15 30

10 20

5 10

0 0
0 1 2 3 4 5 0 1 2 3 4 5 6 7 8 9
Po (W) Po (W)

DIAGNOSTICS FUNCTIONAL DESCRIPTION:

a) TURN-ON DIAGNOSTIC
It is activated at the turn-on (stand-by out) under I2Cbus request. Detectable output faults are:
– SHORT TO GND
– SHORT TO Vs
– SHORT ACROSS THE SPEAKER
– OPEN SPEAKER
To verify if any of the above misconnections are in place, a subsonic (inaudible) current pulse (fig. 16) is inter-
nally generated, sent through the speaker(s) and sunk back.The Turn On diagnostic status is internally stored
until a successive diagnostic pulse is requested (after a I2C reading).
If the "stand-by out" and "diag. enable" commands are both given through a single programming step, the pulse
takes place first (power stage still in stand-by mode, low, outputs= high impedance).
Afterwards, when the Amplifier is biased, the PERMANENT diagnostic takes place. The previous Turn On state
is kept until a short appears at the outputs.

Figure 16. Turn - On diagnostic: working principle

Vs~5V I (mA)

Isource Isource

Isink
CH+
CH-

Isink
~100mS t (ms)
Measure time

8/20
 TDA7564

Fig. 17 and 18 show SVR and OUTPUT waveforms at the turn-on (stand-by out) with and without TURN-ON
DIAGNOSTIC.

Figure 17. SVR and Output behaviour (CASE 1: without turn-on diagnostic)

Vsvr
Out
Permanent diagnostic
acquisition time (100mS Typ)

Diagnostic Enable t
Bias (power amp turn-on)
(Permanent) FAULT
event Read Data

I2CB DATA
Permanent Diagnostics data (output)
permitted time

Figure 18. SVR and Output pin behaviour (CASE 2: with turn-on diagnostic)

Vsvr
Out Turn-on diagnostic
acquisition time (100mS Typ) Permanent diagnostic
acquisition time (100mS Typ)

t
Diagnostic Enable Turn-on Diagnostics data (output)
Diagnostic Enable
FAULT
(Turn-on) permitted time
(Permanent) event

Bias (power amp turn-on) Read Data Permanent Diagnostics data (output)
permitted time permitted time

I2CB DATA

9/20
TDA7564

The information related to the outputs status is read and memorized at the end of the current pulse top. The
acquisition time is 100 ms (typ.). No audible noise is generated in the process. As for SHORT TO GND / Vs the
fault-detection thresholds remain unchanged from 26 dB to 12 dB gain setting. They are as follows:

S.C. to GND x Normal Operation x S.C. to Vs

0V 1.2V 1.8V VS-1.8V VS-1.2V VS

D01AU1253

Concerning SHORT ACROSS THE SPEAKER / OPEN SPEAKER, the threshold varies from 26 dB to 12 dB
gain setting, since different loads are expected (either normal speaker's impedance or high impedance). The
values in case of 26 dB gain are as follows:

S.C. across Load x Normal Operation x Open Load

0V 0.5Ω 1.75Ω 45Ω 85Ω Infinite

D01AU1327

If the Line-Driver mode (Gv= 12 dB and Line Driver Mode diagnostic = 1) is selected, the same thresholds will
change as follows:

S.C. across Load x Normal Operation x Open Load

0Ω 2Ω 7Ω 180Ω 330Ω infinite

D02AU1340

b) PERMANENT DIAGNOSTICS.
Detectable conventional faults are:
– SHORT TO GND
– SHORT TO Vs
– SHORT ACROSS THE SPEAKER
The following additional features are provided:
– OUTPUT OFFSET DETECTION
The TDA7564 has 2 operating statuses:
1 RESTART mode. The diagnostic is not enabled. Each audio channel operates independently from each
other. If any of the a.m. faults occurs, only the channel(s) interested is shut down. A check of the output
status is made every 1 ms (fig. 19). Restart takes place when the overload is removed.
2 DIAGNOSTIC mode. It is enabled via I2C bus and self activates if an output overload (such to cause
the intervention of the short-circuit protection) occurs to the speakers outputs. Once activated, the di-
agnostics procedure develops as follows (fig. 20):
– To avoid momentary re-circulation spikes from giving erroneous diagnostics, a check of the output sta-
tus is made after 1ms: if normal situation (no overloads) is detected, the diagnostic is not performed and
the channel returns back active.
– Instead, if an overload is detected during the check after 1 ms, then a diagnostic cycle having a duration
of about 100 ms is started.

10/20
 TDA7564

– After a diagnostic cycle, the audio channel interested by the fault is switched to RESTART mode. The
relevant data are stored inside the device and can be read by the microprocessor. When one cycle has
terminated, the next one is activated by an I2C reading. This is to ensure continuous diagnostics
throughout the car-radio operating time.
– To check the status of the device a sampling system is needed. The timing is chosen at microprocessor
level (over half a second is recommended).

Figure 19. Restart timing without Diagnostic Enable (Permanent) - Each 1mS time, a sampling of
the fault is done

Out
1-2mS 1mS 1mS 1mS 1mS

t
Overcurrent and short
circuit protection intervention Short circuit removed
(i.e. short circuit to GND)

Figure 20. Restart timing with Diagnostic Enable (Permanent)

1-2mS 100/200mS 1mS 1mS

t
Overcurrent and short
circuit protection intervention Short circuit removed
(i.e. short circuit to GND)

OUTPUT DC OFFSET DETECTION

Any DC output offset exceeding ±2V are signalled out. This inconvenient might occur as a consequence of ini-
tially defective or aged and worn-out input capacitors feeding a DC component to the inputs, so putting the
speakers at risk of overheating.
This diagnostic has to be performed with low-level output AC signal (or Vin = 0).
The test is run with selectable time duration by microprocessor (from a "start" to a "stop" command):
– START = Last reading operation or setting IB1 - D5 - (OFFSET enable) to 1
– STOP = Actual reading operation
Excess offset is signalled out if persistent throughout the assigned testing time. This feature is disabled if any
overloads leading to activation of the short-circuit protection occurs in the process.

AC DIAGNOSTIC.
It is targeted at detecting accidental disconnection of tweeters in 2-way speaker and, more in general, presence
of capacitively (AC) coupled loads.
This diagnostic is based on the notion that the overall speaker's impedance (woofer + parallel tweeter) will tend
to increase towards high frequencies if the tweeter gets disconnected, because the remaining speaker (woofer)
would be out of its operating range (high impedance). The diagnostic decision is made according to peak output

11/20
TDA7564

current thresholds, as follows:

Iout > 500mApk = NORMAL STATUS
Iout < 250mApk = OPEN TWEETER
To correctly implement this feature, it is necessary to briefly provide a signal tone (with the amplifier in "play")
whose frequency and magnitude are such to determine an output current higher than 500mApk in normal con-
ditions and lower than 250mApk should the parallel tweeter be missing. The test has to last for a minimum num-
ber of 3 sine cycles starting from the activation of the AC diagnostic function IB2<D2>) up to the I2C reading of
the results (measuring period). To confirm presence of tweeter, it is necessary to find at least 3 current pulses
over 500mA over all the measuring period, else an "open tweeter" message will be issued.
The frequency / magnitude setting of the test tone depends on the impedance characteristics of each specific
speaker being used, with or without the tweeter connected (to be calculated case by case). High-frequency
tones (> 10 KHz) or even ultrasonic signals are recommended for their negligible acoustic impact and also to
maximize the impedance module's ratio between with tweeter-on and tweeter-off.
Fig. 21 shows the Load Impedance as a function of the peak output voltage and the relevant diagnostic fields.
This feature is disabled if any overloads leading to activation of the short-circuit protection occurs in the process.

Figure 21. Current detection: Load impedance magnitude |Z| vs. output peak voltage of the sinus

Load |z| (Ohm)

50
Iout (peak) <250mA
Low current detection area
30
(Open load) Iout (peak) >500mA

20 D5 = 1 of the DBx byres

10

High current detection area

5
(Normal load)
D5 = 0 of the DBx bytes
3

1
1 2 3 4 5 6 7 8
Vout (Peak)

MULTIPLE FAULTS
When more misconnections are simultaneously in place at the audio outputs, it is guaranteed that at least one
of them is initially read out. The others are notified after successive cycles of I2C reading and faults removal,
provided that the diagnostic is enabled. This is true for both kinds of diagnostic (Turn on and Permanent).
The table below shows all the couples of double-fault possible. It should be taken into account that a short circuit
with the 4 ohm speaker unconnected is considered as double fault.

Double fault table for Turn On Diagnostic

S. GND (so) S. GND (sk) S. Vs S. Across L. Open L.
S. GND (so) S. GND S. GND S. Vs + S. GND S. GND S. GND
S. GND (sk) / S. GND S. Vs S. GND Open L. (*)
S. Vs / / S. Vs S. Vs S. Vs
S. Across L. / / / S. Across L. N.A.
Open L. / / / / Open L. (*)

12/20
 TDA7564

S. GND (so) / S. GND (sk) in the above table make a distinction according to which of the 2 outputs is shorted
to ground (test-current source side= so, test-current sink side = sk). More precisely, in Channels LF and RR, so
= CH+, sk = CH-; in Channels LR and RF, so = CH-, sk = CH+ .
In Permanent Diagnostic the table is the same, with only a difference concerning Open Load(*) , which is not
among the recognisable faults. Should an Open Load be present during the device's normal working, it would
be detected at a subsequent Turn on Diagnostic cycle (i.e. at the successive Car Radio Turn on).

FAULTS AVAILABILITY
All the results coming from I2C bus, by read operations, are the consequence of measurements inside a defined
period of time. If the fault is stable throughout the whole period, it will be sent out. This is true for DC diagnostic
(Turn on and Permanent), for Offset Detector, for AC Diagnostic (the low current sensor needs to be stable to
confirm the Open tweeter).
To guarantee always resident functions, every kind of diagnostic cycles (Turn on, Permanent, Offset, AC) will
be reactivate after any I2C reading operation. So, when the micro reads the I2C, a new cycle will be able to start,
but the read data will come from the previous diag. cycle (i.e. The device is in Turn On state, with a short to Gnd,
then the short is removed and micro reads I2C. The short to Gnd is still present in bytes, because it is the result
of the previous cycle. If another I2C reading operation occurs, the bytes do not show the short). In general to
observe a change in Diagnostic bytes, two I2C reading operations are necessary.

I2C PROGRAMMING/READING SEQUENCES

A correct turn on/off sequence respectful of the diagnostic timings and producing no audible noises could be as
follows (after battery connection):
TURN-ON: (STAND-BY OUT + DIAG ENABLE) --- 500 ms (min) --- MUTING OUT
TURN-OFF: MUTING IN --- 20 ms --- (DIAG DISABLE + STAND-BY IN)
Car Radio Installation: DIAG ENABLE (write) --- 200 ms --- I2C read (repeat until All faults disappear).
AC TEST: FEED H.F. TONE -- AC DIAG ENABLE (write) --- WAIT > 3 CYCLES --- I2C read
(repeat I2C reading until tweeter-off message disappears).
OFFSET TEST: Device in Play (no signal) -- OFFSET ENABLE - 30ms - I2C reading
(repeat I2C reading until high-offset message disappears).

13/20
TDA7564

I2C BUS INTERFACE

Data transmission from microprocessor to the TDA7564 and viceversa takes place through the 2 wires I2C BUS inter-
face, consisting of the two lines SDA and SCL (pull-up resistors to positive supply voltage must be connected).
Data Validity
As shown by fig. 22, the data on the SDA line must be stable during the high period of the clock. The HIGH and
LOW state of the data line can only change when the clock signal on the SCL line is LOW.
Start and Stop Conditions
As shown by fig. 23 a start condition is a HIGH to LOW transition of the SDA line while SCL is HIGH. The stop
condition is a LOW to HIGH transition of the SDA line while SCL is HIGH.
Byte Format
Every byte transferred to the SDA line must contain 8 bits. Each byte must be followed by an acknowledge bit.
The MSB is transferred first.
Acknowledge
The transmitter* puts a resistive HIGH level on the SDA line during the acknowledge clock pulse (see fig. 24).
The receiver** the acknowledges has to pull-down (LOW) the SDA line during the acknowledge clock pulse, so
that the SDAline is stable LOW during this clock pulse.
* Transmitter
= master (µP) when it writes an address to the TDA7564
= slave (TDA7564) when the µP reads a data byte from TDA7564
** Receiver
= slave (TDA7564) when the µP writes an address to the TDA7564
= master (µP) when it reads a data byte from TDA7564

Figure 22. Data Validity on the I2CBUS

SDA

SCL

DATA LINE CHANGE

STABLE, DATA DATA
VALID ALLOWED D99AU1031

Figure 23. Timing Diagram on the I2CBUS

SCL

I2CBUS

SDA

D99AU1032
START STOP

Figure 24. Acknowledge on the I2CBUS

SCL 1 2 3 7 8 9

SDA
MSB
ACKNOWLEDGMENT
START D99AU1033 FROM RECEIVER

14/20
 TDA7564

SOFTWARE SPECIFICATIONS
All the functions of the TDA7564 are activated by I2C interface.
The bit 0 of the "ADDRESS BYTE" defines if the next bytes are write instruction (from µP to TDA7564) or read
instruction (from TDA7564 to µP).
Chip Address:

D7 D0
1 1 0 1 1 0 0 X D8 Hex
X = 0 Write to device
X = 1 Read from device
If R/W = 0, the µP sends 2 "Instruction Bytes": IB1 and IB2.
IB1
D7 X
Diagnostic enable (D6 = 1)
D6
Diagnostic defeat (D6 = 0)
Offset Detection enable (D5 = 1)
D5
Offset Detection defeat (D5 = 0)
Front Channel
D4 Gain = 26dB (D4 = 0)
Gain = 12dB (D4 = 1)
Rear Channel
D3 Gain = 26dB (D3 = 0)
Gain = 12dB (D3 = 1)
Mute front channels (D2 = 0)
D2
Unmute front channels (D2 = 1)
Mute rear channels (D1 = 0)
D1
Unmute rear channels (D1 = 1)
Clip detector 2% (D0 = 0)
D0
Clip detector 10% (D0 = 1)

IB2
D7 X

D6 used for testing

D5 used for testing

Stand-by on - Amplifier not working - (D4 = 0)

D4
Stand-by off - Amplifier working - (D4 = 1)

Power amplifier mode diagnostic (D3 = 0)

D3
Line driver mode diagnostic (D3 = 1)

Current detection diagnostic enabled (D2 = 1)

D2
Current detection diagnostic defeat (D2 = 0)

Right Channels
D1 Power amplifier working in standard mode (D1 = 0)
Power amplifier working in high efficiency mode (D1 = 1)

Left Channels
D0 Power amplifier working in standard mode (D0 = 0)
Power amplifier working in high efficiency mode (D0 = 1)

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TDA7564

If R/W = 1, the TDA7564 sends 4 "Diagnostics Bytes" to µP: DB1, DB2, DB3 and DB4.
DB1
D7 Thermal warning active (D7 = 1)
Diag. cycle not activated or not terminated (D6 = 0)
D6
Diag. cycle terminated (D6 = 1)
Channel LF
current detection
D5
Output peak current < 250mA - Open load (D5 = 1)
Output peak current > 500mA - Open load (D5 = 0)
Channel LF
D4 Turn-on diagnostic (D4 = 0)
Permanent diagnostic (D4 = 1)
Channel LF
D3 Normal load (D3 = 0)
Short load (D3 = 1)
Channel LF
Turn-on diag.: No open load (D2 = 0)
D2 Open load detection (D2 = 1)
Offset diag.: No output offset (D2 = 0)
Output offset detection (D2 = 1)
Channel LF
D1 No short to Vcc (D1 = 0)
Short to Vcc (D1 = 1)
Channel LF
D0 No short to GND (D1 = 0)
Short to GND (D1 = 1)

DB2
Offset detection not activated (D7 = 0)
D7
Offset detection activated (D7 = 1)
Current sensor not activated (D6 = 0)
D6
Current sensor activated (D6 = 1)
Channel LR
current detection
D5
Output peak current < 250mA - Open load (D5 = 1)
Output peak current > 500mA - Open load (D5 = 0)
Channel LR
D4 Turn-on diagnostic (D4 = 0)
Permanent diagnostic (D4 = 1)
Channel LR
D3 Normal load (D3 = 0)
Short load (D3 = 1)
Channel LR
Turn-on diag.: No open load (D2 = 0)
D2 Open load detection (D2 = 1)
Permanent diag.: No output offset (D2 = 0)
Output offset detection (D2 = 1)
Channel LR
D1 No short to Vcc (D1 = 0)
Short to Vcc (D1 = 1)
Channel LR
D0 No short to GND (D1 = 0)
Short to GND (D1 = 1)

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 TDA7564

DB3
D7 Stand-by status (= IB1 - D4)

D6 Diagnostic status (= IB1 - D6)

Channel RF
current detection
D5
Output peak current < 250mA - Open load (D5 = 1)
Output peak current > 500mA - Open load (D5 = 0)

Channel RF
D4 Turn-on diagnostic (D4 = 0)
Permanent diagnostic (D4 = 1)

Channel RF
D3 Normal load (D3 = 0)
Short load (D3 = 1)

Channel RF
Turn-on diag.: No open load (D2 = 0)
D2 Open load detection (D2 = 1)
Permanent diag.: No output offset (D2 = 0)
Output offset detection (D2 = 1)

Channel RF
D1 No short to Vcc (D1 = 0)
Short to Vcc (D1 = 1)

Channel RF
D0 No short to GND (D1 = 0)
Short to GND (D1 = 1)

DB4
D7 X
D6 X
Channel RR
current detection
D5
Output peak current < 250mA - Open load (D5 = 1)
Output peak current > 500mA - Open load (D5 = 0)
Channel RR
D4 Turn-on diagnostic (D4 = 0)
Permanent diagnostic (D4 = 1)
Channel RR
D3 Normal load (D3 = 0)
Short load (D3 = 1)
Channel RR
Turn-on diag.: No open load (D2 = 0)
D2 Open load detection (D2 = 1)
Permanent diag.: No output offset (D2 = 0)
Output offset detection (D2 = 1)
Channel RR
D1 No short to Vcc (D1 = 0)
Short to Vcc (D1 = 1)
Channel RR
D0 No short to GND (D1 = 0)
Short to GND (D1 = 1)

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TDA7564

Examples of bytes sequence

1 - Turn-On diagnostic - Write operation
Start Address byte with D0 = 0 ACK IB1 with D6 = 1 ACK IB2 ACK STOP

2 - Turn-On diagnostic - Read operation

Start Address byte with D0 = 1 ACK DB1 ACK DB2 ACK DB3 ACK DB4 ACK STOP
The delay from 1 to 2 can be selected by software, starting from T.B.D. ms

3a - Turn-On of the power amplifier with 26dB gain, mute on, diagnostic defeat, High eff. mode both channels..
Start Address byte with D0 = 0 ACK IB1 ACK IB2 ACK STOP
X000000X XXX1X011

3b - Turn-Off of the power amplifier

Start Address byte with D0 = 0 ACK IB1 ACK IB2 ACK STOP
X0XXXXXX XXX0XXXX

4 - Offset detection procedure enable

Start Address byte with D0 = 0 ACK IB1 ACK IB2 ACK STOP
XX1XX11X XXX1X0XX

5 - Offset detection procedure stop and reading operation (the results are valid only for the offset detection bits
(D2 of the bytes DB1, DB2, DB3, DB4).
Start Address byte with D0 = 1 ACK DB1 ACK DB2 ACK DB3 ACK DB4 ACK STOP

■ The purpose of this test is to check if a D.C. offset (2V typ.) is present on the outputs, produced by input
capacitor with anomalous leakage current or humidity between pins.
■ The delay from 4 to 5 can be selected by software, starting from T.B.D. ms

6 - Current detection procedure start (the AC inputs must be with a proper signal that depends on the type of
load)
Start Address byte with D0 = 0 ACK IB1 ACK IB2 ACK STOP
XX01111X XXX1X1XX

7 - Current detection reading operation (the results valid only for the current sensor detection bits - D5 of the
bytes DB1, DB2, DB3, DB4).
Start Address byte with D0 = 1 ACK DB1 ACK DB2 ACK DB3 ACK DB4 ACK STOP

■ During the test, a sinus wave with a proper amplitude and frequency (depending on the loudspeaker
under test) must be present. The minimum number of periods that are needed to detect a normal load
is 5.
■ The delay from 6 to 7 can be selected by software, starting from T.B.D. ms.

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 TDA7564

mm inch
DIM.
MIN. TYP. MAX. MIN. TYP. MAX.
A 4.45 4.50 4.65 0.175 0.177 0.183 OUTLINE AND
B 1.80 1.90 2.00 0.070 0.074 0.079 MECHANICAL DATA
C 1.40 0.055
D 0.75 0.90 1.05 0.029 0.035 0.041
E 0.37 0.39 0.42 0.014 0.015 0.016
F (1) 0.57 0.022
G 0.80 1.00 1.20 0.031 0.040 0.047
G1 23.75 24.00 24.25 0.935 0.945 0.955
H (2) 28.90 29.23 29.30 1.139 1.150 1.153
H1 17.00 0.669
H2 12.80 0.503
H3 0.80 0.031
L (2) 22.07 22.47 22.87 0.869 0.884 0.904
L1 18.57 18.97 19.37 0.731 0.747 0.762
L2 (2) 15.50 15.70 15.90 0.610 0.618 0.626
L3 7.70 7.85 7.95 0.303 0.309 0.313
L4 5 0.197
L5 3.5 0.138
M 3.70 4.00 4.30 0.145 0.157 0.169
M1 3.60 4.00 4.40 0.142 0.157 0.173
N 2.20 0.086
O 2 0.079
R 1.70 0.067
R1 0.5 0.02
R2 0.3 0.12
R3 1.25 0.049
R4 0.50 0.019
V
V1
5˚ (T p.)
3˚ (Typ.)
Flexiwatt25 (vertical)
V2 20˚ (Typ.)
V3 45˚ (Typ.)
(1): dam-bar protusion not included
(2): molding protusion included

B
V
H
H1
V3
H2 A
H3
O

R3

R4
L4

V1
R2
N
L2

R
L L1
V1
L3

V2

R2 D
R1

L5 R1 R1
Pin 1
E
G G1 F
FLEX25ME
M M1

7034862

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TDA7564

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of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted
by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject
to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not
authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.

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