64 IEEE TRANSACTIONS ON ENERGY CONVERSION, VOL. 38, NO.

1, MARCH 2023

Dual, Three-Level, Quasi-Z-Source, Indirect Matrix

Converter for Motors With Open-Ended Windings
Mingzhu Guo, Yushan Liu , Senior Member, IEEE, Baoming Ge , Member, IEEE, Xiao Li , Member, IEEE,
Aníbal T. de Almeida , Fellow, IEEE, and Fernando J. T. E. Ferreira , Senior Member, IEEE

Abstract—In this paper, a novel variable-voltage, variable- (2L-VSI) or DC/AC converter, where the utilization of a set of
frequency, dual, three-level, quasi-Z-source, indirect matrix con- large capacitors in the DC bus is inevitable, entailing thermal
verter topology is proposed, including a detailed description of a and reliability concerns. The matrix converter (MC) is a di-
modulation method and a control strategy for three-phase motors
with open-ended windings. The proposed power drive system (PDS) rect AC/AC converter, without DC-link capacitors, thus having
supports bidirectional power flow and has a combined control of a relatively compact design and requiring less maintenance,
DC-link voltage and output AC voltage frequency. Experimentally when compared with the AC/DC/AC converter [1]. Different
validation was performed on a 4-kW PDS. For a given supply applications of matrix converters driving induction motor and
voltage amplitude and the same power switch voltage rating in the permanent-magnet synchronous motor (PMSM) were discussed
DC/AC converter, the proposed PDS can double the voltage output
gain, thus being an interesting solution for high-power applications in [1]–[7]. Direct torque control of matrix converters fed PMSM
with motors designed for higher voltages. The proposed PDS topol- or induction motor were developed in [8]–[10]. And kinds
ogy, modulation method and motor control strategy can reduce of modulation and control methods of matrix converters were
the common-mode component, low-order harmonic content, peak illustrated in [11]–[14].
values and dv/dt of the motor phase voltage, ultimately leading to The direct matrix converter (DMC) has no DC link, gener-
lower winding insulation voltage stress at low-speed, low-voltage
operation, lower harmonic losses in the motor, and ride-through ating the desired output voltages by modulating the input AC
capability over voltage sags in the mains, which are important voltages. The two-level indirect matrix converter (2L-IMC) has a
advantages. capacitor-less DC link between the AC/DC rectifier (input stage)
Index Terms—Quasi-Z-source network, indirect matrix and the DC/AC inverter (output stage). This two-stage solution
converter, three-level voltage modulation, AC/AC converter, provides a benefit of zero-current commutation capability [4].
open-ended windings, three-phase induction motor, motor speed However, there are some shortcomings associated with the
control, common-mode voltage, phase voltage harmonic content, MCs, namely: (i) they are buck-type converters, offering a
voltage gain, buck-boost operation, ride-through capability. voltage gain lower than 0.866; (ii) the converter performance
is easily impacted by both input and output sides, because
I. INTRODUCTION there are no capacitors between both sides acting as an energy
HE AC/DC/AC converter topology is the most used in buffer. To overcome these issues, modified modulation strategies
T industrial variable-speed drives (VSDs), integrating a rec-
tifier, a DC bus/link, and a two-level voltage-source inverter
and auxiliary add-on circuits have been proposed in [15]–[29],
standing out the integration of a quasi-Z-source (QZS) net-
work at the input AC side of a 2L-IMC (2L-QZS-IMC), as a
Manuscript received 21 September 2021; revised 4 March 2022 and 29 April promising solution to: (i) significantly increase the voltage gain
2022; accepted 6 June 2022. Date of publication 30 June 2022; date of current limit above 0.866; (ii) filter and boost the voltage, allowing for
version 21 February 2023. This work was supported in part by the National Nat-
ural Science Foundation of China under Grants 51477008 and 52107175, in part converter management against interference between input and
by Beijing Natural Science Foundation under Grant 3152021, in part by the Fun- output sides; (iii) maintain full-silicon converter topology.
damental Research Funds for the Central Universities under Grant KG16135701, The vector control is a well-known and widely used method
and in part by the Beijing Nova Program under Grant Z211100002121080. Paper
no. TEC-01027-2021. (Corresponding author: Yushan Liu.) to control three-phase squirrel-cage induction motors (SCIMs)
Mingzhu Guo is with the Institute of Science and Technology, China Three and can be easily implemented in IMC-based VSDs, but it is
Gorges Corporation, Beijing 100038, China, and also with the School of Elec- inherently limited regarding the maximum output-input funda-
trical Engineering, Beijing Jiaotong University, Beijing 100044, China (e-mail:
mingzhu21guo@163.com). mental voltage ratio. Thus, the additional voltage boost capabil-
Yushan Liu and Xiao Li are with the School of Automation Science and ity in the DC side of QZS-IMC-based VSDs can significantly
Electrical Engineering, Beihang University, Beijing 100083, China (e-mail: enhance the power drive system (PDS) performance, especially
yushan_liu@yeah.net; xiaoli12tamu@163.com).
Baoming Ge is with the Department of Electrical and Computer Engi- in high-speed operation, where a higher voltage is required to
neering, Texas A&M University, College Station, TX 77843 USA (e-mail: avoid field weakening, which leads to an undesirable torque drop
baomge@gmail.com). and, in the case of SCIMs, to a slip increase (entailing higher
Aníbal T. de Almeida and Fernando J. T. E. Ferreira are with the Department
of Electrical and Computer Engineering, University of Coimbra, 3030-290 rotor losses).
Coimbra, Portugal (e-mail: adealmeida@isr.uc.pt; fernando.ferreira@ieee.org). There are three main methods to achieve this purpose, namely:
Color versions of one or more figures in this article are available at (i) open-loop control method, which is simple to be implemented
https://doi.org/10.1109/TEC.2022.3187419.
Digital Object Identifier 10.1109/TEC.2022.3187419 but it is unable to adjust the DC-link voltage during voltage sags

0885-8969 © 2022 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission.
See https://www.ieee.org/publications/rights/index.html for more information.

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GUO et al.: DUAL, THREE-LEVEL, QUASI-Z-SOURCE, INDIRECT MATRIX CONVERTER FOR MOTORS WITH OPEN-ENDED WINDINGS 65

in the AC grid; (ii) closed-loop control method, which can ensure

a constant DC-link voltage during voltage sags in the AC grid,
regardless the motor speed, but it can cause additional converter
switching losses, motor losses, and QZS network losses; (iii)
motor-speed-based DC-link voltage control method, meaning
that, at low speed, the DC-link voltage and the converter losses
are maintained low, and, at high speed, the DC-link voltage is
boosted, and in parallel, eventual voltage sags in the AC grid are
also compensated in terms of DC-link voltage.
The latter method overcomes the disadvantages of the two
former methods and allows maintaining the inverter amplitude
modulation index close to unity to maximize the fundamental
component amplitude and reduce the harmonic content of the
voltage output, dynamically adjusting the DC-link voltage by
means of changing the rectifier amplitude modulation index and
shoot-through duty cycle.
The published literature focuses on 2L-QZS-IMC topology
and modulation strategy, with an output voltage limited to volt-
age rating of the power switches/transistors used in the IMC
inverters. For example, in [29], an algorithm based on an open-
loop control was successfully implemented in a QZS-2L-IMC
to adjust DC-link voltage by changing the rectifier modulation Fig. 1. Proposed PDS integrating the D-QZS-3L-IMC and an OEW-SCIM.
index and shoot-through duty cycle, but its modulation index
and shoot-through duty cycle were gotten through a complicated
open-loop adjustment. Section V to compare the proposed solution with conventional
How to increase the QZS-IMC output voltage for a given systems. The main conclusions are drawn in Section VI.
power supply voltage and using power switches with the same
voltage rating is still an open research topic. II. PROPOSED POWER DRIVE SYSTEM
In this paper, key contributions include:
1) Novel dual three-level QZS-IMC (D-3L-QZS-IMC) A. Topology
topology is proposed, which is able to double the volt- In Fig. 1, the topology of the proposed three-phase PDS
age output gain in relation to the 2L-QZS-IMC topology is shown, consisting of a D-3L-QZS-IMC-based VSD and an
presented in [29]. OEW-SCIM.
2) An advanced modulation strategy (quite different from The D-3L-QZS-IMC integrates two three-phase 2L-QZS-
that in [4] to control a 2L-IMC) is developed for the IMC modules. Their inputs are connected to the three-phase
D-3L-QZS-IMC to maximize the output voltage and re- power supply and outputs are connected to the six terminal
duce common-mode voltage (CMV), with more switching leads of the motor open-ended windings (A1 , B1 , C1 , C2 ,
states (two IMCs and shoot-through states) than that used B2 , A2 ) forming three H-bridges that provide 3-level voltage
in the conventional IMC proposed in [4] (one IMC and no to motor phase winding. Therefore, the D-3L-QZS-IMC pro-
shoot-through states). vides a higher voltage gain and a lower voltage stress on the
3) Novel PDS combining the novel D-3L-QZS-IMC and an power switches, as well as a low voltage THD and a low
open-ended winding SCIM (OEW-SCIM) is proposed, dv/dt. Furthermore, the D-3L-QZS-IMC can provide a variable-
and a closed-loop control method is proposed to achieve voltage, variable-frequency (VVVF) output to control motor.
variable voltage and variable frequency through the rec- The variable-frequency capability relies on the inverter stage,
tifiers and inverters, respectively. The voltage amplitude but the variable-voltage capability can be implemented by either
automatically varies by adjusting DC-link voltage rather rectifier and/or inverter stage. Note that, conventional VSDs
than adjusting the modulation index of inverters, which that integrates a three-phase diode rectifier, a DC bus, and a
may lead to low converter loss, while meeting motor three-phase voltage-source inverter (VSI) provides VVVF out-
control goal. put under constant DC-bus voltage.
4) The proposed solution is validated experimentally at a In this paper, a closed-loop control method to vary the out-
4-kW test bench. put DC voltages in both rectifiers and the output AC voltage
The paper is organized as follows. The proposed PDS is frequency in both inverters with unity modulation index, is
presented in Section II, where respective topology, operation and proposed. This control method reduces the low-order harmonic
modulation principles are detailed. In Section III, a control strat- content of the output AC voltage, the converter loss. The reduc-
egy is proposed. Experimental results verifying the proposed tion of dv/dt attenuates the voltage reflection in the power cables
topology, modulation method, and control strategy are presented connecting the inverters to the motor, lowering the voltage peaks
and discussed in Section IV. Further discussion is shown in at the motor winding terminals.

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66 IEEE TRANSACTIONS ON ENERGY CONVERSION, VOL. 38, NO. 1, MARCH 2023

TABLE I
DC-LINK VOLTAGE AND RECTIFIER SWITCHING STATES

Fig. 2. Output voltage vectors of the proposed PDS: (left) Module 1 (V 1 );

(middle) Module 2 (V  1 ); (right) Motor winding phase terminals (V ).

Each three-phase QZS-IMC module has:

r One QZS network with 2 magnetically coupled inductor
pairs per phase (La1 , La2 ; Lb1 , Lb2 ; Lc1 , Lc2 ), 2 capacitors
per phase (Ca1 , Ca2 ; Cb1 , Cb2 ; Cc1 , Cc2 ), and 3 bidirec-
tional power switches (Sa , Sb , Sc );
r One rectifier with 6 bidirectional power switches (Sap , Sbp ,
Scp , San , Sbn , Scn );
r One inverter with 6 unidirectional power switches (SAp , TABLE II
OUTPUT PHASE VOLTAGE AND INVERTER SWITCHING STATES
SBp , SCp , SAn , SBn , SCn ).

B. Operating Principle
As shown in Fig. 1, the power supply is interfaced with
an OEW-SCIM through the proposed D-3L-QZS-IMC. Each
QZS-IMC module has shoot-through state (STS) and non-shoot-
through state (NSTS). When the QZS network switches Sa , Sb ,
and Sc are ON, the rectifier stage works in the NSTS. When the
Sa , Sb , and Sc are OFF, the upper switches of the rectifier stage
(Sap , Sbp , Scp ) are ON, which is called as the STS.
The voltage boost ratio, B, of each QZS network is:
1 1 Ts O’, respectively, are given by:
B= = = (1)
1 − 2D 1 − 2 Ts
T0 T s − 2T0 1
U 01 = (U + U B1 + U C1 ) (3)
where D denotes the STS duty cycle, TS is the switching cycle, 3 A1
T0 is the STS time duration. 1
U 02 = (U A2 + U B2 + U C2 ) (4)
The voltage gain of each QZS-IMC module is given by [27]: 3
Uom,m Vector duty cycles of rectifier and inverter stages are calcu-
G= = Hmo mi B cos ϕqz (2) lated and coordinated by the following relationships:
Uin ⎧
where Uom,m is the module output phase voltage, Uin is the input ⎪
⎪ dα = mi sin (60◦ − θi )
⎨
phase voltage, H = 0.866, mi and mo are the modulation indexes dβ = mi sinθi
(5)
of the rectifier and inverter stages, respectively, and cosϕqz is ⎪
⎪ d 0r = 1 − dα − dβ − dst
⎩
the rectifier power factor. dst = D = const.
Fig. 2 shows the output voltage vectors of the proposed PDS. ⎧
⎨ dμ = mo sin (60◦ − θo )
Since the output voltage phasors (with reference to points O and dv = mo sinθo (6)
O´) of both QZS-IMC modules, V1 and V  1 , are shifted by 180° ⎩
d0i = 1 − dμ − dv
to maximize the output voltage of D-3L-QZS-IMC and the motor ⎧
winding phase voltage is V = V 1 − V  1 , then |V | = 2|V 1 | = ⎪
⎪ dαμ = dα dμ
⎪
⎪
2|V  1 |. Thus, the winding phase voltage is doubled in relation ⎪
⎪ dβμ = dβ dμ
⎨
to the output voltage of each module. The latter is limited by the dαv = dα dv
(7)
voltage rating of the power switches. ⎪ dβv = dβ dv
⎪
⎪
⎪
⎪ dα0i = dα d0i
⎪
⎩
C. Modulation Method dβ0i = dβ d0i
The rectifier has active and zero vector states, as presented in where θi is the input current vector angle of the rectifier, θo is
Table I (“1” denotes ON state; “0” denotes OFF state). For the the output voltage vector angle of the inverter, dα , dβ , dst , d0r
STS, voltage is boosted to high level. are the duty cycles of current vectors in one switching cycle, and
In Table II, the eight states of inverters 1 and 2 are shown, dμ , dv , d0i denote the duty cycles of output voltage active and
where zero voltages, with respect to the voltage at points O and zero vectors.

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GUO et al.: DUAL, THREE-LEVEL, QUASI-Z-SOURCE, INDIRECT MATRIX CONVERTER FOR MOTORS WITH OPEN-ENDED WINDINGS 67

Fig. 3. Assignment of vectors and duty cycles of D-3L-QZS-IMC.

Fig. 3 shows vectors and duty cycles of the D-3L-QZS-IMC.

The motor CMV produced between the motor winding phase
terminals is given by:

U CMV = U 01 − U 02 (8)

In Fig. 4, the resultant CMV is shown, considering the rules

defined in Fig. 3 and Table II. It can be observed that the pro-
posed modulation strategy effectively reduces the CMV between
phase winding terminals, UCMV , when compared to the CMV
between the phase winding terminals and the negative pole of
both DC links, U01 or U02 . The CMV does not contribute to
the production of torque but will generate common-mode phase
current and, consequently, additional winding losses. Thus, its
Fig. 4. CMV produced by D-3L-QZS-IMC: (a) Graphical representation
reduction is an important advantage. The zero-vector duty cycles of zero voltage (U01 and U02 ) and CMV (UCMV ); (b) Experimental CMV
of rectifier stage are symmetrically distributed. The inverter (UCMV ).
stage has six switching actions, but the rectifier stage has only
five.
The phase-to-ground CMVs, UA1G and UA2G , have the same III. MOTOR CONTROL STRATEGY
wave shape of U01 and U02 , but the reference is the ground/earth A. General Description
(rather than points O and O’), as represented in Fig. 4(right axes),
and can be determined by: In this section, a control strategy to provide VVVF output in
the proposed PDS is described. As shown in Fig. 5, the motor
 speed closed-loop control block uses a PI regulator to generate
U A1G = U 01 + U OG = U 01 − 12 Udc1
(9) the desired torque Te∗ when enforcing rotational speed N tracking
U A2G = U 02 + U O G = U 02 − 12 Udc2 reference N∗ [17], [18], [21]. The q-axis current reference, Isq
∗
,
rotor flux linkage, ψr , and motor slip angular speed, ωs , are
Therefore, it is not expected any reduction of the phase-to- determined in the blocks denoted by “Formula A”, “Formula B”,
ground CMV and dv/dt in relation to 2L-VSIs and, consequently, and “Formula C”, respectively corresponding to the following
no benefit is expected in terms of reduction of common-mode equations:
high-frequency bearing activity and phase-to-ground insulation
voltage stress. ∗ 2 ∗
Isq = T Lr p−1 L−1 −1
m ψr (10)
The peak value of the CMV produced by the 2L-IMC with 3 e
the space vector modulation (SVM) method proposed in [4] is ψr = Isd Lm (1 + Tr p)−1 (11)
1/3 times the amplitude of the sinusoidal input phase voltage,
through near state PWM method and a π/6 shift of sectors of ωs = Lm Isq Tr−1 ψ−1
r (12)
the inverter stage. As shown in Figs. 3 and 4, the proposed
modulation strategy for the D-3L-QZS-IMC is quite different where p is the number of pole pairs, Lm is the magnetizing
from the one proposed in [4], achieving a phase CMV peak inductance, Lr is the rotor inductance, Tr is the time constant of
value at one-third of DC-link voltage. rotor, and Isd is the d-axis current component.
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68 IEEE TRANSACTIONS ON ENERGY CONVERSION, VOL. 38, NO. 1, MARCH 2023

Fig. 5. Control scheme diagram of the proposed PDS.

The current loops use two PI regulators to control actual d-

axis and q-axis current components (tracking their references
I∗ sq and I∗ sd ), generating the d-axis and q-axis components of
stator voltage (Ud and Uq ), respectively. They are used to get
the voltage angle θo and the amplitude Uom of stator voltage.
The voltage angle, including rotor speed information, controls
the variable-frequency inverter. The amplitude Uom is used to
control the DC-link voltage by adjusting the STS duty cycle.
In addition, a phase-locked loop (PLL) is employed to get
phase angular θin of rectifier input voltage. The unity power
factor (cosϕqz = 1) is achieved by modulating the rectifier
through the modulation index mi and angle θin .

B. Control Variables
The expected voltage gain of each QZS-IMC module can be
obtained by

1 Uom
G= (13)
2 Uin
Fig. 6. Gain curves of D-3L-QZS-IMC when operating with the proposed
where Uom is the output phase voltage of D-3L-QZS-IMC. control method: (a) gain as a function of mi for each module; (b) gain as a
Each QZS-IMC module has the following control variables function of motor speed for the D-3L-QZS-IMC.
for two different operation modes:
 From (1), (2) and (13), considering cosϕqz = 1, the voltage
Mode 1, G ≤ H : D = 0, mi = G/H, mo = 1 gain is given by:
(14)
Mode 2, G > H : mi = 1 − D, mo = 1 mi
G=H (15)
2mi − 1
In Mode 1, the QZS network works as a filter without boosting
function. In Mode 2, the QZS network boosts voltage and works Fig. 6(a) shows the voltage gain curve versus mi for
as a filter, therefore the boost factor B in (2) has to be larger than each module. When G ≤ H, the module follows the line-A.
1, B is minimized, and the product mi mo is maximized. When G > H, the gain will track the line-B.
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GUO et al.: DUAL, THREE-LEVEL, QUASI-Z-SOURCE, INDIRECT MATRIX CONVERTER FOR MOTORS WITH OPEN-ENDED WINDINGS 69

Fig. 6(b) shows the gain versus motor speed of the D-3L-QZS-
IMC. When the gain is lower than 2H, the converter is in Mode
1. When the gain is greater than 2H, the converter is in Mode 2.
Therefore, for the speed less than 981 r/min, the D-3L-QZS-IMC
Fig. 7. Capacitor C1 voltage control system.
works in Mode 1 and QZS network is a filter; for the speed higher
than 981 r/min, the D-3L-QZS-IMC works in Mode 2 and QZS
network has two functions of voltage boosting and filtering.

C. Boost Controller Design

For G > H, a voltage boost control can be designed to
guarantee the output voltage Uom of the converter. The average
DC-link voltage is given by:
3
Ūdc = mi Uqz cos ϕqz (16)
2
where Uqz is the amplitude of QZS network output phase volt-
age.
The output voltage of each inverter meets the following rela-
tionship:
Fig. 8. Bode plot of GC1d (s).
1
Uo1 = Uo2 = √ mo Ūdc (17)
3
The small signal model is derived as
Therefore, the capacitor C1 voltage has an amplitude of ⎡ ⎤ ⎡ ⎤ ⎡ ⎤⎡ ⎤
L 0 0 îL −(RC + RL ) D − 1 D îL
2 1 ⎣ 0 C1 0 ⎦ p ⎣ ûC1 ⎦ = ⎣ 1 − 2D 0 0 ⎦⎣ ûC1 ⎦
UC1 = √ Uo1 = √ Uom (18) 0 ⎡0 C2 1 − 2D
3 3 ûC2

⎤⎡ ⎤ 0
0 ûC2
1 RC (1 − D) uC1 + uC2 − RC i û
which shows that Uom can be controlled by UC1 . +⎣0 D − 1 i − 2iL ⎦ ⎣ î ⎦

From Fig. 1, the average state-space model of each QZS-IMC 0 D−1 i − 2iL d
module is: (20)
⎡ ⎤ ⎡ ⎤ The transfer function of capacitor C1 voltage is written as
L 0 0 iL
⎣ 0 C1 0 ⎦ p ⎣ uC1 ⎦ ûC1 (s) = GC1ui (s)ûi (s) + GC1ii (s)× î (s) + GC1d (s)× d(s)
ˆ
0 0 C2 uC2 (21)
⎡ ⎤⎡ ⎤ where (unumbered Eq. shown at the bottom of this page).
−(RC + RL ) D − 1 D iL
The UC1 can then be controlled through the closed-loop
= ⎣ 1 − 2D 0 0 ⎦ ⎣ uC1 ⎦
control system shown in Fig. 7.
1 − 2D 0 0 uC2
The PI regulator/control equation is:
⎡ ⎤  
1 RC (1 − D) 1
u ∗
+ ⎣0 D − 1 ⎦  (19) d = kp + ki (UC1 − UC1 ) (22)
i s
0 D−1
Fig. 8 shows the Bode plot of GC1d (s). GC1d (s) has a cutoff
with angular frequency of 1.01 × 103 rad/s. When designing cross-
1 − 2D over angular frequency of GPI (s) and GC1d (s)GPI (s) to 1.01 ×
i = ii 103 rad/s, parameters of the PI regulator are kp = 3.51 × 10−5
1−D
and ki = 0.0353. Fig. 9 shows the Bode diagrams of GPI (s) and
where RL and RC are the Equivalent Series Resistance (ESR) of GC1d (s)GPI (s). The closed-loop system for UC1 control has the
inductor and capacitor. Bode plot shown in Fig. 10.

sC2 (1 − 2D)
GC1ui (s) =
s3 C 2 C1 L + s2 (R C + RL )C2 C1 + s((1 − D)(1 − 2D)C2 − DC1 (1 − 2D))
s(1 − 2D)(1 − D)C2 RC + s(D − 1)C2 (sL + RC + RL )
GC1ii (s) =
s3 C2 C1 L + s2 (RC + RL )C2 C1 + s((1 − D)(1 − 2D)C2 − DC1 (1 − 2D))
s(1 − 2D)C2 (uC1 + uC2 − RC i ) + sC2 (sL + RC + RL )(i − 2iL )
GC1d (s) = .
s3 C 2 C1 L + s (RC + RL )C2 C1 + s((1 − D)(1 − 2D)C2 − DC1 (1 − 2D))
2

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70 IEEE TRANSACTIONS ON ENERGY CONVERSION, VOL. 38, NO. 1, MARCH 2023

TABLE III
PARAMETERS OF THE EXPERIMENTAL PDS SETUP

Note: Motor inductances and resistances are referred to stator.

Fig. 9. Bode plots of GPI (s) and GC1d (s)GPI (s).

Fig. 10. Bode plots of UC1 closed-loop control system.

Comparing Figs. 8 and 9, it can be seen that after the com-

pensation, a –20 dB/dec magnitude characteristic and a –90
degree phase shift appear in low angular frequency range of
GC1d (s)GPI (s), showing the enhanced tracking accuracy and
response speed; and a 52.3 degree phase margin and 57.4
dB magnitude margin at the cross-over and cut-off frequency
demonstrate the improved stability and dynamics. Correspond-
ingly, the closed-loop system shows stable magnitude and phase Fig. 11. Experimental PDS input voltages and currents at 1430 r/min and 26
Nm: (a) 1000-ms time window with the transient instant of 15% voltage drop;
characteristics, as shown in Fig. 10. (b) 100-ms time window after 15% voltage drop.

IV. EXPERIMENTAL VERIFICATION Test Case II:The proposed system operates at 143 r/min while
An experimental test was performed to verify the proposed starting from zero speed. Fig. 14 shows the motor torque, motor
PDS topology, modulation method, and motor control strategy. phase current, and rotor speed.
The key parameters of the tested setup are shown in Table III. Test Case III: The rotor speed reference was changed from
Three experimental tests were carried out: 1430 r/min to 800 r/min. Figs. 13 shows the resultant motor
Test Case I: At the beginning of the test, a 15% power torque and motor phase current. Fig. 16 shows the phase-to-
supply voltage drop was applied, and the motor torque and speed phase voltage and phase voltage of D-3L-QZS-IMC.
reference were kept at 26 Nm and 1430 r/min, respectively. Its As shown in Figs. 11 and 12, the power supply voltage sag
experimental results are shown in Figs. 11, 12 and 15. causes an increase in the input current to maintain the same
Fig. 11 shows the input voltage and current of the PDS. Fig. 12 output power, while the motor torque and stator currents were
shows the motor torque, phase current, and phase voltage. Fig. 15 kept unchanged. In other words, the test results show that the
shows the phase-to-phase voltage and phase voltage of D-3L- proposed system can automatically boost the voltage to avoid
QZS-IMC. effect of the voltage drop on motor operation.

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GUO et al.: DUAL, THREE-LEVEL, QUASI-Z-SOURCE, INDIRECT MATRIX CONVERTER FOR MOTORS WITH OPEN-ENDED WINDINGS 71

Fig. 12. Experimental motor torque and stator phase currents at 1430 r/min
during the 15% power supply voltage drop: (a) 1000-ms time window; (b) 100-
ms time window.

From Fig. 13, it can be observed that immediately after

dropping the speed reference, the implemented motor speed
control scheme forced the torque to become negative (braking
mode) to reduce the speed from 1430 r/min to 800 r/min. Then,
after reaching the steady state with the new reference speed, the
torque recovered to 26 Nm. During the braking mode, the power
flow was injected into the grid, which validates the regenerative
capability of the PDS. Also, the speed change causes the change
of phase current frequency, but the motor torque is maintained
constant before and after speed change. The proposed system
performs the desired motor operation performance. Also, the
THDs of phase current are always quite low at the rotor speed
of 1430 r/min and 800 r/min, as shown in Fig. 13(d) and (e).
From Fig. 14, a smooth speed regulation is achieved when the
rotor starts from zero speed and operates at 143 r/min and 13
Nm. For so low rotor speed, the motor back EMF is quite low, so
the D-3L-QZS-IMC operates at Mode 1 and the QZS networks
are filters only.
Figs. 15 and 16 show the motor phase-to-phase and phase
voltages (i.e., the output voltages of the D-3L-QZS-IMC), where
UA1-B1 is the phase-to-phase voltage of Module 1 and UA1-A2
is the voltage applied to phase A of the motor winding. UA1-B1
and UA1-A2 are pulse voltages. Fig. 15(d) shows the fundamental Fig. 13. Experimental motor torque and stator phase currents before, during,
components of UA1-B1 , UA2-B2 , and UA1-B1 –UA2-B2 after filters and after the speed drop from 1430 r/min to 800 r/min: (a) 1000-ms time window
are employed, where UA1-B1 –UA2-B2 represents the phase-to- with the transient instant; (b) 100-ms time window after speed drop; (c) rotor
speed; (d) THD of phase current at the speed of 1430 r/min; (e) THD of phase
phase voltage of D-3L-QZS-IMC. current at the speed of 800 r/min.
As shown in Fig. 15(a), it can be observed that the amplitudes
of dual QZS-IMC output voltages UA1-B1 and UA1-A2 increase

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72 IEEE TRANSACTIONS ON ENERGY CONVERSION, VOL. 38, NO. 1, MARCH 2023

Fig. 14. Experimental rotor speed, motor torque, and stator phase currents of
the proposed system operating at 143 r/min while starting from zero speed. (a)
motor torque and stator phase currents; (b) rotor speed.

when the power supply voltage drops. In this case, the shoot-
through duty cycle D increases to compensate the power supply
voltage drop through voltage boost closed-loop control.
In the other hand, after motor speed decreases to 800 r/min, the
power supply voltage is sufficient to run the motor, and voltage
boosting is no longer needed. Therefore, the shoot-through duty
cycle D is set to zero and the amplitudes of UA1-B1 and UA1-A2
decrease, as can be seen in Fig. 16(a).
The experimental results show that the proposed system can
automatically adjust the output voltage of D-3L-QZS-IMC to
meet motor operation demand by the proposed closed-loop con-
trol. In particular, the voltage boost function works to increase
output voltage when the power supply voltage drops, but it is
disabled when motor operates at low speed, lowering the output
voltage. The voltage variation is provided by the rectifier stage
and the frequency variation shown in Fig. 16(a), which is fulfilled
by the inverter stage.
The multilevel voltage waveform is shown in the steady-state
motor phase voltage UA1-A2 shown in Figs. 15(b), (c) and 16(b),
(c), which lowers the low-order harmonic content of motor
phase current. These experimental results validate the proposed Fig. 15. Experimental motor phase-to-phase and phase voltages during the
modulation method and the PDS operation. 15% supply voltage drop: (a) 500-ms time window with the transient instant;
(b) 100-ms time window before the transient instant; (c) 100-ms time window
Fig. 15(d) shows the output phase-to-phase voltages compar- after the transient instant; (d) output phase-to-phase voltages comparison of the
ison of the 2-L-QZS-IMC and D-3L-QZS-IMC (after filter). A 2-L-QZS-IMC and D-3L-QZS-IMC (after filter).
doubled output voltage from D-3L-QZS-IMC verifies the output
voltage capability of the new topology. It can be seen that, when can support a low motor speed if the conventional two-level
power switches with the same voltage rating, the conventional converter is employed in motor drive, but the new converter
two-level converter outputs a low phase-to-phase voltage that outputs a doubled voltage that can support a higher motor speed.

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GUO et al.: DUAL, THREE-LEVEL, QUASI-Z-SOURCE, INDIRECT MATRIX CONVERTER FOR MOTORS WITH OPEN-ENDED WINDINGS 73

TABLE IV
COMPARISON OF AMOUNT AND RATING OF PASSIVE ELEMENTS

voltage amplitude automatically varies by adjusting the DC-link

voltage rather than adjusting only the amplitude modulation
index in the inverters, which leads to lower converter losses
by minimizing shoot-through duty cycle and lowering DC link
voltage while meeting motor control goal without redundancy.
The proposed PDS reduces common-mode component, low-
order harmonic content, and dv/dt of the motor phase voltage,
ultimately leading to lower winding insulation voltage stress
at low-speed, low-voltage operation, lower harmonic losses in
the motor, and ride-through capability over voltage sags in the
mains, which are important advantages in the range of industrial
applications.
Regarding the bulkiness of passive elements (inductors and
capacitors), in Table IV, a comparison of the amount and rating
of the utilized passive elements for the conventional MC-based
PDS, 2L-QZS-IMC-based PDS, and the proposed D-3L-QZS-
IMC-based PDS, is presented. A detailed design of the passive
components could refer to that of 2L-QZS-IMC [23].
It can be seen that the proposed system has more passive
components, but for the inductors, capacitors, and switches with
the same rated voltage, the same rated current, and the same
supply voltage amplitude, the proposed PDS can provide much
higher output voltage and output power than the conventional
DMC and 2L-QZS-IMC do. If the conventional one and pro-
posed system deliver the same output voltage and power, the
Fig. 16. Experimental motor phase-to-phase and phase voltages before, dur- proposed system will need switches and capacitors with 50%
ing, and after the motor speed drop from 1430 r/min to 800 r/min: (a) 500-ms voltage rating, and inductors with 50% current rating compared
time window with the transient instant; (b) 100-ms time window before transient
instant; (c) 100-ms time window after transient instant.
with those of conventional systems.

VI. CONCLUSION
V. DISCUSSION
In this paper, a novel PDS topology, integrating a dual, three-
When compared to a conventional matrix-converter-based level QZS-IMC (D-3L-QZS-IMC) and a SCIM with open-ended
PDS and to a two-level QZS-IMC-based PDS, the proposed PDS windings (OEW-SCIM), was proposed and its operation was
features a voltage gain of 2B and two times greater, respectively. experimentally validated. Experimental tests were conducted
For a given supply voltage amplitude, considering power with a 4-kW PDS, including the responset o a 15% voltage sag
switches with the same voltage rating, by doubling the output in the supply voltage and to a drop in the speed reference, with
voltage gain, the proposed PDS is an interesting solution for excellent results.
high-power applications with motors designed for higher volt- The D-3L-QZS-IMC has a capacitor-less DC link, avoiding
ages, which are inherently more efficient. the cost and reliability issues associated with large capacitors
The closed-loop control method in the proposed system pro- required byconventional VSIs.
vides an improved VVVF output through the combined variation The resulting 3-level modulation of motor phase voltage
of voltage at the rectifiers DC output (i.e., the DC-link voltage) reduces the respective harmonic content, peak values and dv/dt,
and variation of frequency at the inverters AC output. The ultimately leading to lower motor harmonic losses and less

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74 IEEE TRANSACTIONS ON ENERGY CONVERSION, VOL. 38, NO. 1, MARCH 2023

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