BANGLADESH UNIVERSITY OF ENGINEERING AND TECHNOLOGY
Experiment no: 04 Student No: 2106009
Course Number: EEE 202 (Software)
Name of the Experiment:
A) DC Characteristics Study and Biasing of Metal Oxide Semiconductor
Field Effect Transistor(MOSFET) with its Application as Inverter
B) Biasing with Current Mirror and Frequency Response of a MOS
Amplifier
Date of Performance: 29.01.24 Name: Fariha Anjum Oshin
Date of Submission: 09.02.24 Department: EEE
Section: A-1
Partners Student No:
2106010
Part 1: Transfer Curves
1. Transfer Curve for nMOS:
Threshold voltage of nMOS: 2.9078V.
2. Transfer Curve for pMOS:
Threshold voltage of pMOS: 3.7011V.
3. Transfer Curve for CMOS:
Part 2: ID – VDS at Different VGS
1. For nMOS:
Pinch-off voltages for the first, second and third graph respectfully are: 1.0279V, 2V, 3.0168V.
2. For pMOS:
Pinch-off voltages for the first and second graphs respectfully are: -348.315m, -1.5281V.
Part 3: Current Mirror
1. For nMOS:
2. For pMOS:
3. Determining the Value of the Biasing Resistor:
The value of the biasing resistor is 6.3911kΩ.
4. Value of VDS3, VDS2, VGD2:
VDS3 = -3.681V
VDS2 = -9.356V
VGD2 = 5.675V
5. Current Mirror:
So, VGS = 3.3115V for ID = 1mA.
Using VGS = 3.3115V, the schematic diagram becomes:
The gain:
From the plot, the maximum gain is 43.683m.
Normalizing the gain in the decibel graph,
The cutoff frequencies are 8.016MHz and 63.425MHz.
Part 4: CS and CD Amplifier using nMOS
1. CS Amplifier:
Biasing the circuit:
The value of R4 at VDS=10V is 3.76M.
Using R4=3.76M,
Plot of the Gain:
The maximum gain is 103.727.
Normalizing the gain in the decibel graph,
The cutoff frequencies are 20.351kHz and 93.898kHz.
The midband frequency: √(20.351k × 93.898k) = 43.714 kHz
The Bandwidth = (93.898 - 20.351)kHz = 73.547 kHz.
2. CD Amplifier:
Biasing the circuit:
Plot of the gain:
The value of R1 at VDS=10V is 1.4937MΩ.
Using R1 = 1.4937MΩ,
The maximum gain is 1.0046.
Normalizing the gain in the decibel graph,
The cutoff frequencies are 127.488 Hz and 3.023MHz.
The midband frequency: √(127.488 × 3.023M) = 19.63 kHz
The Bandwidth = (3.023M - 127.488) Hz = 3.0228 MHz
Part 5: Designing AND Gate using CMOS
Schematic Diagram:
Output:
Discussion:
In part 1, we calculated the threshold voltages of nMOS and pMOS from the DC characteristics of n and
p MOSFETs. The threshold voltage was calculated from that point where the drain voltage changed from
its first constant voltage. We also observed the transfer characteristics of CMOS.
In part 2, we observed the ID – VDS relationship at different VGS for nMOS and pMOS and determined the
pinch-off voltages from the graphs.
In the third part, we mirrored the current of one circuit to another, biasing them for ID = 1mA. We also
made an amplifier with the circuit and observed the gain and cutoff frequencies.
In the fourth part, we made a Common Source and a Common Drain Amplifier using nMOS and
observed the gain, cutoff frequencies, midband frequency and bandwidth.
Finally, we made an AND logic gate using nMOS and pMOS and observed their outputs for the given
inputs.
In summary, the experiment allowed us to observe the characteristics of MOSFETs and their applications
as switches.