Switch Mode Regulator

Building Blocks
Switch Mode Converter
IIN IOUT
+ +
Input Power Processing
VIN VOUT Load
Voltage Circuitry
– –
Switch Drive Signals Voltage, Current

Error Amplifier/
Modulator Compensator Reference
Voltage

Comm
Protection, Status Monitoring,
Bus/
Communication
Signals

2
Switch Mode Converter
IIN IOUT
+ +
Input Power Processing
VIN VOUT Load
Voltage Circuitry
– –
Switch Drive Signals Voltage, Current

Error Amplifier/
Modulator Compensator Reference
Voltage

Comm
Protection, Status Monitoring,
Bus/
Communication
Signals

3
Switch Mode Converter
• Overcurrent, Overvoltage,
Overtemperature, Etc. IOUT
• Status Reporting
+ +
• OK/Not OK Signal Power Processing
VOUT Load
• Voltage, Current,Temperature Circuitry
Power, etc. – –
• Command Input
• e.g. Remote On/Off Voltage, Current
• Configuration
• e.g. Startup Sequencing Error Amplifier/
Modulator Compensator Reference
Voltage

Comm
Protection, Status Monitoring,
Bus/
Communication
Signals

4
Switch Mode Converter
IIN IOUT
+ +
• Compares Output To Power Processing
VIN reference Circuitry VOUT Load
• Generates An Error S–ignal –
• Processes Error Signal To Create Voltage, Current
Control Signal
Error Amplifier/
• Shapes Frequency Response to Compensator Reference
Achieve Stable Control Loop And Voltage
Desired Dynamic Response
Comm
Protection, Status Monitoring,
Bus/
Communication
Signals

5
Switch Mode Converter
IIN
Converts The Control Signal
+ From The
Input Power Converter
VIN
Voltage Circuitry Error Amplifier /Compensator
– To Driving– Signals For The
Power Switching Devices
Switch Drive Signals Voltage, Current

Error Amplifier/
Modulator Compensator Reference
Voltage

Comm
Protection, Status Monitoring,
Bus/
Communication
Signals

6
Switch Mode Converter
IIN Collectively CommonIOUTly Known As
+ The Co+ntroller
Input Power Converter
VIN Circuitry OUT
Voltage
– –
Switch Drive Signals Voltage, Current

Error Amplifier/
Modulator Compensator Reference
Voltage

Comm
Protection, Status Monitoring,
Bus/
Communication
Signals

7
Transfer Functions
And Bode Plots
Transfer Function

System
x(t) h(t) y(t)

Find output y(t) by convolution


y (t ) = h (t ) x (t ) =  h ( ) x (t − )d
−

9
Transfer Function

System
x(t) h(t) y(t)

Find output y(t) by convolution


y (t ) = h (t ) x (t ) =  h ( ) x (t − )d
−

10
Transfer Function
Use LaPlace transform to convert to frequency domain

System
X (s) H(s) Y (s)

H(s)
Y (s) = H (s)  X (s)
Is The Describes The
Y (s) Frequency Response
H (s) =
“Transfer
Function” X (s) Of The System:
Gain
Phase
11
Transfer Function
If There Is Some
Use LaPlace transform to convert to frequency domain
Frequency sZ
Which Makes System
Y(sZ )=0 H(s) Y(s)
Then
H(sz) = 0
Z
And Y (s) = H (s)  X (s)
Sz is a “Zero”
of the Y0(s)
Of The H (s) =
Transfer X (s)
Function
12
Transfer Function
Use LaPlace transform to convert to frequency domain
If There Is Some
System Frequency sP
which makes
X(s) H(s) X(sP) = 0
Then
H(sP) → 
Y (s) = H (s)  X (s) And
sP Is A “Pole”
Y (s) Of The
H (s) =
X (s)
Transfer
0 Function

13
Simple Pole Transfer Function HP(s)
1
Z F = RF ||
s C
1
RF 
= s C  s C
1 s C
RF +
s C
RF
=
1+ s  RF  C
ZF
H P (s ) = −
ZS
ZS = RS

14
Simple Pole Transfer Function
Standard Form
1 With DC Gain Term
H P (s) = −
ZF H P (s ) = G0 
s And Frequency
ZS 1+
P Dependent Term
RF
G0 = −
RF RS DC Gain
1+ s  R  C
H P (s ) = − F
P = 2   f P =
1
RS RF  C
RF 1
=−  fP =
1
Pole
RS 1+ s  RF  C 2    RF  C
Frequency

15
Simple Pole Transfer Function: Magnitude
1
H P ( j  ) = H P ( j  ) H P* ( j  ) H P ( j  ) = G0 
2

 
2

= H P ( j  ) H P (− j  ) 1+  

 P
   
 1   1  = G0 
1
=  G0     G0  
 j    − j    f 
2

1+ 1+ 1+  

 P   P 
  fP 
1 1
= G02  
j  j 
1+ 1− Consider The Case When f = f P
P P
1 1 1
= G02  H P ( j P ) = G0  = G0 
 
2
 f 
2
1+12
1+   1+  P 
 P   fP 
1 2
= G0  = G0  = −3dB
2 2
16
 Simple Pole Transfer Function: Phase
 Im (H P ( j  ))
H P ( j  ) = tan −1

 Re(H P ( j  )) 
 

   j      j  
1− 1−
   P     P 
Im (HP ( j  )) = Im  G0  Re(HP ( j  )) = Re G0 
1 1 1 1
 = Im G0     = Re G0   
 j    j  j    j    j  j  
1+ 1+ 1− 1+ 1+ 1−
 P   P P   P   P P 
       
 j    j  
 1−   1− 
 
= Im  G0  P 
2 
= Re  G0  P 
2 
       

1+    
1+   
   P      P  
−
 1
= G0 
P  
2
= G0  1+  
   P 
2

1+  
 P 

17
Simple Pole Transfer Function: Phase
 Im (H ( j  ))
H ( j  ) = tan −1 Consider The Case When f = f P
 Re(H ( j  )) 
 
    f 
 − H ( j  P ) = tan −1  − P 
P   fP 
 G0  
    = tan−1 (−1)
2

1+ 

−1   P   
= tan  =− = −45
G  1  4
 0 2 
   
1+   
  P  
 
 
−1    −1  f 
= tan  −  = tan  − 
  P   fP 

18
Simple Pole Bode Plot
fP =1kHz
60

55

50
Magnitude (dB)

45

40

35

30

25

20
0
Phase (deg)

-45

-90
1 2 3 4 5
10 10 10 10 10
Frequency (Hz)

19
Simple Pole Bode Plot
fP =1kHz ‐20 dB/Decade
60

55

50
Magnitude (dB)

45

40
G0
35

30
Down By 3 dB
25

20
0

0° Phase Shift: ‐90 °

Phase (deg)

-45

Phase Shift: ‐45 °

-90
1 2 3 4 5
10 10 10 10 10
Frequency (Hz)

20
Simple Op‐Amp Pole
RF
ZFEEDBACK (s)
C HOP− AMP (s) = −
ZSOURCE (s)
RS
VIN
VOUT
VREF

As Frequency 
Capacitor Impedance 
ZFEEDBACK  Gain 

21
Simple Zero Transfer Function HZ(s)
1
Z S = RS ||
s C
1
RS 
= s C  s C
1 s C
RS +
s C
Rs
ZF =
H Z (s ) = − 1+ s  Rs  C
ZS
Z F = RF

22
Simple Zero Transfer Function
Z
H Z (s ) = −  s 
F
H Z (s) = G0  1+ 
ZS   Z 
RF
=− R
G0 = − F
Rs RS
1+ s  Rs  C
1
Z = 2   fZ =
 (1+ s  RS  C )
RF RS  C
=−
RS
1
fz =
2   RS  C

23
Simple Zero Transfer Function: Magnitude
2
H Z ( j  ) = H Z ( j  ) H  
2 *
Z ( j  ) H Z ( j  ) = G0  1+  

 Z
= H Z ( j  ) H Z (− j  )
 f 
2
 j    − j   = G0  1+  
= G0  1+  
 0 1+
G 
 Z   Z   fZ 
   2 
= G  1 + 
2
 
0
  Z  
 
Consider The Case When f = f Z

 f 
2

H Z ( j Z ) = G0  1+  Z 
 fZ 
= G  1+12
0

= G0  2  +3dB

24
Simple Zero Transfer Function: Phase
 Im(H ( j  ))  G   
H ( j  ) = tan −1
  0  
 Re(H ( j  ))  H ( j  ) = tan 
−1

 
Z

 G0 
  j     
Im (H ( j   ))= Im  G0  1+   
   Z    −1  f 
 = tan −1   = tan  f 
= G0   Z   Z
Z
  j    Consider The Case When f = fZ
Re (H ( j   ))= Re  G0   1+ 
   Z 
 f 
= G0 H ( j  Z ) = tan −1  Z  = tan−1 (1)
 fZ 

= = 45
4

25
Simple Zero Bode Plot
fZ = 1kHz
40

35

30
Magnitude (dB)

25

20

15

10

0
90
Phase (deg)

45

0
1 2 3 4 5
10 10 10 10 10
Frequency (Hz)

26
Simple Zero Bode Plot
fZ = 1kHz
+20 dB/Decade
40

35

30
Magnitude (dB)

25

20
Up By 3 dB
15

10
G0
5

0
90

Phase Shift: +45 °

Phase (deg)

45
Phase Shift: +90 °
0°
0
1 2 3 4 5
10 10 10 10 10
Frequency (Hz)

27
Simple Zero

As Frequency 
Capacitor Impedance 
ZSOURCE  Gain 

28
Example: Simple Transfer Function

vout (s)
H (s) =
vin (s)
in out

 R2 + 1 

 s C 
vOUT (s) =  vIN (s)

R1+  R2 +
1
 s C 
1
s Z =
v (s) 1+ s  R2 C
1+
Z R2  C
H (s) = out = H (s) =
vin (s) 1+ s  (R1+ R2) C 1+
s
P
1
P =
(R1+ R2)C

29
Simple Transfer Function Bode Plot
FPOLE
‐20 dB/Decade

‐20 + (+20) = 0 dB/Decade

 ‐45° ‐90° + 90° = 0 °

‐90°

FZERO
30
What If System Has
Pole And Zero At Same Frequency?

They Cancel
Each Other!

31
Compensator
Type I Compensator
VOUT
C
R1

VEA
VREF

R2
Simple Integrator
No Phase Boost

33
Type I Compensator
VOUT
C
R1

VEA
VREF

R2
Under Closed Loop Control.
The Steady State Value Of VEA
Will Be Whatever Value Is Needed To Drive
VOUT Such That The Op‐Amp Differential Input
Voltage (V+ ‐ V‐) Is Essentially Zero

34
Type I Compensator
VOUT
C
R1

VEA
VREF

True For All R2

Under Closed Loop Control.
Compensators
The Steady State Value Of V EA
That Include
Will Be Whatever Value Is Needed To Drive
An Integrator
VOUT Such That The Op‐Amp Differential Input
Voltage (V+ ‐ V‐) Is Essentially Zero

35
 Type I Compensator: DC
VEA = AOL  (V+ −V− ) Op‐Amp Output Voltage At DC
1 Is The Differential Input Voltage (V+ ‐ V‐)
V− = V+ − VEA Times The DC Open Loop Gain (AOL)
AOL
V+ = VREF
1
V− = VREF − V EA
AOL
1 Typical Op‐Amp Open Loop Gain Is 40 dB (10,000)
AOL  10 
4
VEA  50V
AOL And Assuming Error Amp Output At 5V
V− = VREF − 50V  VREF

36
 Type I Compensator: DC
I (R1 ) = I (R2 ) + I (V− )  I (R2 )
VOUT −V− VOUT −VREF = V− VREF
= =
R1 R1 R2 R2
VOUT −VREF VREF
=
R1 R2
VOUT VREF VREF R1 + R2
= + = VREF
R1 R2 R1 R1  R2
This Relationship Is True For All
R1 + R2 Compensators With An Integrator
VOUT = V REF
R2

37
Type I Compensator Transfer Function H1(s)
VOUT
C ZF 1
R1 H1 (s ) = − H1 (s ) = −
ZS s
VEA 1 P
VREF
= − s C =−
P
R2 R s
ZF
H1 (s ) =− =− 1 P = 2    fP =
1
ZS s  R C R C
1 fP = 1
ZF = 2   R  C
s C
ZS = R

38
Type I Compensator Transfer Function
P  Im (H ( j  ))
H1 ( j  ) = − H1 ( j  ) = tan
−1

 Re(H ( j  )) 
j   

= Re(H ( j  )) + Im(H ( j  ))  − P
2 2

 
= tan−1    = tan (−)
−1
  
2

= 02 +  − P   0 
    

= P =
2   f P =−  = −90
 2   f 2
f
= P
f

Gain = 1 (0 dB) Constant ‐90°

When f = fP Phase Shift Independent
Of Frequency
39
Type I Compensator Bode Plot
fP =10Hz Crossover
50 (Gain = 1)
40
At 10 Hz
30
Magnitude (dB)

20

10

-10

-20

-30
-89

-89.5
Phase (deg)

-90

-90.5 Constant
-91
‐90° Phase
Shift
-1 0 1 2
10 10 10 10
Frequency (Hz)

40
Type I Compensator Bode Plot
fP =10Hz
50

40

30
Magnitude (dB)

20

10

-10

-20

-30
-89

-89.5
Note 20 dB
Phase (deg)

-90 Gain At 1 Hz
-90.5

-91
-1 0 1 2
10 10 10 10
Frequency (Hz)

41
Type I Compensator Bode Plot
fP =1kHz Crossover
50 (Gain = 1)
40
At 1 kHz
30
Magnitude (dB)

20

10

-10

-20

-30
-89
-89.2
-89.4
Higher fP
-89.6 Means More Gain At
Phase (deg)

-89.8
-90 Low Frequencies
-90.2
-90.4 40 dB @ 1 Hz
-90.6
-90.8
-91
1 2 3 4
10 10 10 10
Frequency (Hz)

650
Type II Compensator

Integrator, Zero, Pole

Up To 90° Phase Boost

652
Type II Compensator Transfer Function H2(s)
1  1  1 1+ s  R1  C1
ZF = ||  R1 + = ||
s  C2  s  C1  s  C2 s  C1
1 1+ s  R1  C1

s  C2 s  C1 s  C1 s  C2
=  
1 1+ s  R1  C1 s  C1 s  C2
+
s  C2 s  C1
ZF 1+ s  R1  C1
H 2 (s ) = − =
ZS s  C1 + s  C2  (1+ s  R1  C1 )

ZS = R2

44
Type II Compensator Transfer Function H2(s)
ZF
H 2 (s ) =−
ZS
1 1+ s  R1  C1

s  (C1 + C2 ) 1+ s  R  C1  C2
C1 + C2
1
=−
R2 Zero
1 1+ s  R1  C1
=− 
s  R2  (C1 + C2 ) 1+ s  R  C1  C2
1
C1 + C2
Integrator Pole
Second Pole

45
Type II Compensator Transfer Function H2(s)
1
P 0 = 2   fP 0 =
R2  (C1 + C2 )
s 1
1+ f P0 =
1 Z 2   R2  (C1 + C2 )
H 2 (s ) = −
s s
1+ 1
P 0 P1 Z = 2   fZ =
R1  C1
s 1
1+
 Z fZ =
= − P0 2   R1  C1
s 1+ s
P1 1
P1 = 2   f P1 =
C C
R1  1 2
C1 + C2
1
f P1 =
C1  C2
2   R1 
C1 + C2
656
Type II Compensator Bode Plot
fP 0 =100Hz fZ =100Hz fP1 = 10kHz
60

50

40

30
Magnitude (dB)

20

10

-10

-20

-30
-40
0
Phase (deg)

-45

-90
0 1 2 3 4 5 6
10 10 10 10 10 10 10
Frequency (Hz)
47
Type II Compensator Bode Plot
fP 0 =100Hz fZ = 100Hz fP1 = 10kHz
60

50

40

30 Low Frequency Gain Set By FP0

Magnitude (dB)

20

10

-10

-20

-30
-40
0
Phase (deg)

-45

-90
0 1 2 3 4 5 6
10 10 10 10 10 10 10
Frequency (Hz)
48
Type II Compensator Bode Plot
fP 0 =100Hz fZ = 100Hz fP1 = 10kHz
60

50

40

30 Maximum Phase
Magnitude (dB)

20

10 Boost = 78.6°
0

-10
At 1 kHz
-20

-30 Phase Boost

-40
0
= 45° At FZ
Phase (deg)

-45

-90
0 1 2 3 4 5 6
10 10 10 10 10 10 10
Frequency (Hz)
49
Type III Compensator
VOUT

R3 C3
R1
R2 C2
C1

VEA
VREF

R4
Integrator, Zero, Zero , Pole, Pole
Up To 180° Phase Boost

52
 Type III Compensator Transfer Function H3(s)
VOUT

1  1  1  1+ s  R3 C3 
R3 C3
Z F (s ) = ||  R3 + = ||  
R1 s C2  s C3  s C2  s C3 
R2 C2 1 1+ s  R3 C3

C1 s C2 s C3 s C2 s C3
=  
1 1+ s  R3 C3 s C2 s C3
+
s C2 s C3
VEA
VREF 1+ s  R3 C3
=
s C3 + s C2  (1+ s  R3 C3 )
R4
1+ s  R3 C3
Z F (s ) Z F (s) = 
1
H 3 (s ) = − s C3 + C2  (1+ s  R3 C3 )
Z S (s )

54
 Type III Compensator Transfer Function H3(s)
VOUT
 1  1+ s  R1  C1
R3 C3 Z S (s ) = R2 ||  R1 +  = R ||
 s  C1
2
R1  s C 1 
R2 C2
 1+ s  R1 C1 
C1 R2   
 s  C1  1+ s  R1  C1
= = R2 
 1+ s  R1  C1  1+ s  R1  C1 + s  R2 C1
VEA R2 +  
VREF  s  C 1 
R4 1+ s  R1  C1
= R2 
H3 (s ) = −
Z F (s ) 1+ s  (R1 + R2 ) C1
ZS (s )

55
 Type III Compensator Transfer Function H3(s)
VOUT
Z F (s )
H 3 (s ) =−
R3 C3
Z S (s )
R1
1 1+ s  R3 C3
R2 C2 
C1 s  (C2 + C3 ) 1+ s  R  C2 C3
3
C2 + C3
=−
1+ s  R1 C1
R2 
VEA 1+ s  (R1 + R2 )C1
VREF
1 1+ s  R3 C3 1+ s  (R1 + R2 )C1
H 3 (s ) =−  
s  R2  (C2 + C3 ) 1+ s  R1 C1 1+ s  R  C2 C3
R4

C2 + C3
3

56
 Type III Compensator Transfer Function H3(s)
      Z 2 =
1
 1+    1+  (R1 + R2 )C1
H (s) = − P0 
 Z1   Z2 
1
3
       fZ 2 =
2   (R1 + R2 )C1
 1+     1+  
 P1   P2  1
P1 =
1 R1 C1
P0 =
R2  (C2 + C3 ) f P1 =
1
1 2   R1 C1
f P0 =
2   R2  (C2 + C3 ) P 2 =
1
C C
1 R3  2 3
Z1 = C2 + C3
R3 C3
1
1 fP 2 =
f Z1 = C 2C 3
2   R3 C3 2    R3 
C2 + C3

57
Type III Bode Plot
fP 0 =1000Hz fZ1 =100Hz fZ 2 = 1000Hz fP1 = 10kHz fP 2 =100kHz
70

60

50
Magnitude (dB)

40

30

20

10

-10
90

45
Phase (deg)

-45

-90
0 1 2 3 4 5 6 7
10 10 10 10 10 10 10 10
Frequency (Hz)
58
Type III Bode Plot
fP 0 =1000Hz fZ1 = 100Hz fZ 2 = 1000Hz fP1 = 10kHz fP 2 =100kHz
70

60

50
Magnitude (dB)

40

30

20

10

-10
Integrator
90
Pole Sets Low
45 Frequency
Gain
Phase (deg)

-45

-90
0 1 2 3 4 5 6 7
10 10 10 10 10 10 10 10
Frequency (Hz)
59
Type III Bode Plot
fP0 =1000Hz fZ1 = 100Hz fZ 2 = 1000Hz fP1 = 10kHz fP 2 =100kHz
70

60

50
At fZ1,
Slope Of
Magnitude (dB)

40

30
Gain Flattens
20

10

-10
90

45 At fZ1,
Phase Boost
Phase (deg)

About 45°
-45

-90
0 1 2 3 4 5 6 7
10 10 10 10 10 10 10 10
Frequency (Hz)
60
Type III Bode Plot
fP 0 =1000Hz fZ1 = 100Hz fZ 2 = 1000Hz fP1 = 10kHz fP 2 =100kHz
70

60

50
At fZ2,
Slope Of
Magnitude (dB)

40

30 Gain Turns Up
20

10

-10
90

45
At fZ2,
Phase (deg)

0 Phase Boost
About 123°
-45

-90
0 1 2 3 4 5 6 7
10 10 10 10 10 10 10 10
Frequency (Hz)
61
Type III Bode Plot
fP0 =1000Hz fZ1 = 100Hz fZ 2 = 1000Hz fP1 = 10kHz fP 2 =100kHz
70

60

50
Magnitude (dB)

40

30

20

10

-10
Maximum
90
Phase Boost
45 About 130°
Phase (deg)

-45

-90
0 1 2 3 4 5 6 7
10 10 10 10 10 10 10 10
Frequency (Hz)
62
Type III Bode Plot
fP0 =1000Hz fZ1 = 100Hz fZ 2 = 1000Hz fP1 = 10kHz fP 2 =100kHz
70

60

50 At fP1
Slope Of Gain
Magnitude (dB)

40

30
Flattens
20

10

-10
90
At fP1,
45 Phase Boost
Back To 123°
Phase (deg)

-45

-90
0 1 2 3 4 5 6 7
10 10 10 10 10 10 10 10
Frequency (Hz)
63
Type III Bode Plot
fP 0 =1000Hz fZ1 = 100Hz fZ 2 = 1000Hz fP1 = 10kHz fP 2 =100kHz
70

60

50 At fP2,
Slope Of
Magnitude (dB)

40

30
Gain Turns Down
20

10

-10
90
At Higher
Frequencies,
At fP2,
45
No Phase Boost
Phase (deg)

0 Phase Boost
-45
Back To About 45°
-90
0 1 2 3 4 5 6 7
10 10 10 10 10 10 10 10
Frequency (Hz)
64
Basic Feedback Loop
Review
Basic Feedback Review
Plant P

In Response To Input X X P Y

Output Can Be Anything:

Voltage, Current, Produces Output Y
Temperature, Flow Rate,
Speed, RPM, Position…
Basic Feedback Review

So How Do We Set
Input X To Get The
X P Y
Desired Output Y?

What We Want Is To Have Y

Be Some Desired Value
Basic Feedback Review

Use Feedback To Get Desired Output Y

In Response To Command U

+ E X
U + C P Y

–
Basic Feedback Review
Subtract Actual Output Y From Command U
To Generate Difference (Error) Signal E
E=U‐Y

+ E X
U + C P Y

–
Basic Feedback Review
Process Error Signal E In
Controller/Compensator C
To Generate Plant Input Signal X

+ E X
U + C P Y

–
Basic Feedback Review
For This Discussion Let An
Increase In X Cause An Increase In Y
(And Vice Versa)

+ E X
U + C P Y

–
Basic Feedback Review
To Start The Description Of How The Feedback Works
Suppose Y Is Greater Than The Desired Value

+ E X
U + C P Y

–
Basic Feedback Review
Then The Error, E, Is
Negative
E=U‐Y

+ E X
U + C P Y

– Y>U
Basic Feedback Review
Negative Error
Causes The Output
E=U–Y<0 Of The Controller To
Decrease

+ E X
U + C P Y

– Y>U
Basic Feedback Review
Negative Error
Causes The Output Decreasing X
Of The Controller To Causes Y To
E=U–Y<0
Decrease Decrease

+ E X
U + C P Y

– Y>U
Basic Feedback Review
Step By Step Starting With Output Too High

+ E X
U + C P Y

–
Basic Feedback Review
Step By Step Starting With Output Too Low

+ E X
U + C P Y

–
Basic Feedback: The Math
Y = P X Y = P C  E
X =CE = P  C  (U − Y )
E =U −Y
= P  C U − P  C Y
Y + P  C Y = P  C U
P C
Y= U
1+ P C

+ E X
U + C P Y

–
Basic Feedback: The Math

Small Signal
P (s) C (s)
Y (s) = U (s )
1 + P (s)  C (s )
Y (s) P (s)  C (s)
HCLOSED _ LOOP (s ) = =
U (s ) 1 + P (s)  C (s)

+ E X
U + C P Y

–
Basic Feedback: The Math

+ E X
U + C P
This Is The “Closed Loop Gain” Y

–
Basic Feedback: Open Loop Gain
If Denominator Is Zero
HCLOSED _ LOOP (s) = Y (s) = P (s)  C (s)
Then The Loop Is Unstable
U (s ) 1+ P (s )  C (s)
P(s) ∙ C(s) = ‐1
HOPEN _ LOOP (s) = T (s) = C (s)  P (s)
When Designing The Feedback
HCLOSED _ LOOP (s ) = Y (s) = T (s) Loop We Will Focus On The
U (s ) 1 + T (s ) Open Loop Gain

+ E X
U + C P Y

–
Buck Converter
Buck 1.8 V
12 V Load
Converter

VOUT = D VIN
D = 0.15
= 0.15 12 V
= 1.8V
What Happens If:
Input Voltage Changes?
Load Changes?
Output
Voltage
Changes
91
Buck Converter With Feedback
VIN
VERROR =VREF − K VOUT
Error VEA D VOUT
Power
VREF Amp/ PWM
+ – Compensator
Stage

K VOUT K
Voltage
Divider

92
Buck Converter With Feedback

VIN
VERROR =VREF − K VOUT
Error VEA D VOUT
Power
VREF Amp/ PWM
+ – Compensator
Stage

K
Voltage
Divider
Output Voltage Too High 
Error Voltage Is Negative 
Duty Cycle Is Decreased 
224
Output Voltage Is Reduced
Buck Converter With Feedback

VIN
VERROR =VREF − K VOUT
Error VEA D VOUT
Power
VREF Amp/ PWM
+ – Compensator
Stage

K
Voltage
Divider
Output Voltage Too Low 
Error Voltage Is Positive 
Duty Cycle Is Increased 
Output Voltage Is Increased 225
Feedback Concerns

Tracking

Disturbance
Rejection

Stability

95
Feedback Concerns

Tracking

Disturbance
How Close Is The
Output
To The
Stability
Commanded Value?

96
Feedback Concerns

Tracking

Disturbance
Rejection

If The Input Voltage Changes,

Or The Load Changes,Stability
Or There Is Noise, How Well Does
The Output Return To The Proper Value?
97
Feedback Concerns

Output Does Not “Run Away”

“Bounded Input, Bounded Output”

Stability

98
Loop Gain

VIN
VERROR =VREF − K VOUT

VEA D VOUT
VREF HEA(s) GPWM(s) GVD(s)
+ –
K

K(s)

Each Block Of The Control Loop

Has Its Own Transfer Function 99
Loop Gain

VIN
VERROR =VREF − K VOUT

VEA D VOUT
VREF HEA(s) GPWM(s) GVD(s)
+ –
K

K(s)

What Happens To A Signal As It Goes

Around The Control Loop?
100
Loop Gain T(s)

VIN
VERROR =VREF − K VOUT

VEA D VOUT
VREF HEA(s) GPWM(s) GVD(s)
+ –
K

Open Loop Gain

T (s) = K (s) H EA (s) GPWM (s) GVD (s)
101
How To Get Good Tracking?

VCMD System VOUT

Good Tracking Means

VOUT = VCMD

That Is, We Get The Output We Want

Based On The Input Command
102
Op‐Amp Buffer/Follower vout (s) = A(s)(v+ (s) − v− (s))
v− (s) = vout (s)
v+ (s) = vcmd (s)
—
vout (s) = A(s)(vcmd (s) − vout (s))
= A(s ) vcmd (s ) − A(s ) vout (s )
VCMD + VOUT vout (s) + A(s )vout (s) = A(s) vcmd (s)

A0 = A0∙(V+ – V–)
vout (s) = A(s)  v (s)
cmd
Let The
1+ A(s)
Op-amp Gain
A(s) >>1 Be Very Large

vout (s)  A(s)  vcmd (s)

1 + A(s)
A(s)
  vcmd (s)
With Very Large Op-amp Gain A(s)
vout (s)  vcmd (s)
The Output Tracks The
Command Voltage 103
Op‐Amp Buffer/Follower Example

What Is —
This Voltage,
VIN = V+ – V–? VOUT
VCMD + VOUT =1V
A0
A0 = 40dB =100

104
 Op‐Amp Buffer/Follower Example

What Is —
This Voltage,
VIN = V+ – V–? VOUT
V
1V = A0 VIN VCMD + VOUT =1V
= 100 VIN
A0
 1  VCMD = V OUT +V IN
= 100   V  = 40dB =100
 100  = 1V +10 mV
VIN = 10 mV = 1.01V  VOUT
105
Op‐Amp Buffer/Follower Example

What Is —
This Voltage,
VIN = V+ – V–? VOUT
VCMD + VOUT =1V
A0 A0 = 80dB =10,000

106
 Op‐Amp Buffer/Follower Example

What Is —
This Voltage,
VIN = V+ – V–? VOUT
1V = A0 VIN VCMD + VOUT =1V
= 10, 000 VIN
A0 A0 = 80dB =10,000
 1 
= 10, 000   V
 10, 000 
VIN = 100 V
107
 Op‐Amp Buffer/Follower Example

VCMD = VOUT +VIN

What Is = 1V +100 V
—
This Voltage, = 1.0001V  VOUT
VIN = V+ – V–? VOUT
1V = A0 VIN VCMD + VOUT =1V
= 10, 000 VIN
A0
 1
= 10, 000  

V A0 = 80dB =10,000
 10, 000 
VIN = 100 V
108
Op‐Amp Buffer/Follower

The —Larger The Gain,

The
IN
More Closely OUT
The Output Equals
VOUT = A0 VIN
TheInput
0
−

109
How To Get Good Tracking?

VIN
VERROR =VREF − K VOUT

VEA VOUT
VREF HEA(s) GVD(s)
+ Gain G
–
K

K(s)

110
How To Get Good Tracking?

VIN
VERROR =VREF − K VOUT

VEA VOUT
VREF
+
HEA(s) Gain G GVD(s)
–
K

K(s)

The Larger Gain G,

The More Closely The Output
Follows The Reference Input 111
How To Get Good Tracking?

VIN
VERROR =VREF − K VOUT

VEA VOUT
VREF
+
HEA(s) Gain G GVD(s)
–
K

K(s)

VOUT (s) = GVD (s)GPWM (s) H EA (s )(VREF − K (s )VOUT (s ))

112
Loop Gain And Tracking
VIN
VERROR =VREF − K VOUT

VEA D VOUT
VREF HEA(s) GPWM(s) GVD(s)
+ –
K

K(s)

113
Loop Gain And Tracking
VOUT (s) = GVD (s) D (s) = GVD (s)GPWM (s) VEA (s)
VEA (s) = H EA (s)(VREF − K (s)VOUT (s ))
VOUT (s ) = GVD (s) GPWM (s) HEA (s)(VREF − K (s)VOUT (s ))
= GVD (s )GPWM (s ) HEA (s )VREF
−K (s )GVD (s) GPWM (s ) HEA (s )VOUT (s )
VOUT (s) + K (s)GVD (s)GPWM (s) HEA (s)VOUT (s) = GVD (s )GPWM (s ) HEA (s )VREF

GVD (s )GPWM (s ) HEA (s )

VOUT (s ) = VREF
1+ K (s )GVD (s) GPWM (s ) H EA (s )
1 K (s ) GVD (s) GPWM (s) HEA (s)
=  VREF
K (s) 1+ K (s )GVD (s) GPWM (s ) H EA (s )
1 T (s )
VOUT (s ) =  VREF
K (s) 1+ T (s)

114
 Loop Gain And Tracking
1 T (s)
VOUT (s) =  VREF
K (s) 1+ T (s) Let The Loop Gain
T (s) >>1 Be Large
1 T (s)
VOUT (s)   VREF
K (s) 1 + T (s)
1 T (s)
  VREF
K (s) T (s)
Feedback Divider
VOUT (s)  1 VREF
K (s) Usually Constant
K (s) = K (Just Resistors)

VOUT (s) 
1
V REF With Large Loop Gain
K
Output Voltage Tracks
The Reference Voltage/Input
115
Loop Gain T(s)

T (s) →  VOUT
1
|T(s)| → VREF
K High
Loop
Gain
Means
Small
Error

Frequency
116
Assuring Steady State Tracking

VIN
VERROR =VREF − K VOUT
VEA
D Power VOUT
VREF Integrator PWM
+ –
Stage

K
Any Steady State (DC) Error,
No Matter How Small,
Is Integrated Over Time
To Make An Error Amp Output
That Corrects The Duty Cycle To
Drive The Error To Zero 245
Analog Integrator

1 t vin ( ) −VREF
vOUT (t ) = VREF − vC (t ) vOUT (t ) = VREF −  d
C 0 R
1 t
= VREF −   iC ( )d −
1 t
  vERROR ( )d
C 0 = VREF
R C 0

118
Analog Integrator

As
s→0
Gain → 
DC Error → 0

1
vOUT (s) Z (s) 
= − s C = −
1 1 1
=− F =− =− P P =
vIN (s) ZS (s) R s  R C s s R C
P
119
Crossover Frequency, FC

|T(s)| Frequency At Which The Loop Gain

Becomes Less Than 1 (0 dB)

Generally Speaking,
The Higher The Crossover Frequency,
0 dB The Faster The Transient Response
Frequency
120
Response Time Vs. Bandwidth
Step Response
10

8
1000 Hz
7

500 Hz
6
Amplitude

5
200 Hz
4

3 100 Hz
2

0
0 0.05 0.1 0.15
Time (seconds)

121
Loop Phase
|T(s)| There Is Also A T(s)
Phase Shift That Varies With
Frequency To Signals Going Around
The Loop

Generally Speaking,
The Phase At The
Crossover Frequency
Indicates Stability Margin
Frequency
122
Stability

Controller Plant
R Gain: 1.6 Gain: 1.5 Y
+ Phase: ‐120°
– Phase: ‐60°

123
Stability
To Be Stable,
At Frequency When
Loop Gain = 1
Total Phase Shift Must be
R
+
less than -360° Y
– Phase: ‐60° Phase: ‐120°

124
Stability
Note: Inverting Error Amplifier
Phase Shift Equals –180°

Controller Plant
R Gain: 1.6 Y
+ So Phase Shift
– Phase: ‐60° Phase: ‐120°
In The Rest Of The Loop
Must Be Less Than –180°

125
Step Response vs. Phase Margin
Step Response
1.4

1.2

0.8
Phase Margin
Amplitude

20°
0.6

45°
0.4
70°
0.2
90°

0
0 0.05 0.1 0.15
Time (seconds)

126
Stability vs. Phase Margin
Step Response
1.4

1.2

Preferred Maximum Phase Shift:

1
–135° For Fast Response
0.8
(45° Phase Margin),
Amplitude

0.6 –110° For No Overshoot

20°

0.4
(70o Phase Margin)
0.2
90°

0
0 0.05 0.1 0.15
Time (seconds)

127
 Buck Converter
With Feedback Control
Buck Converter With Feedback

VIN
VERROR =VREF − K VOUT
Error VEA D VOUT
Buck
VREF Amp/ PWM
+ – Compensator
Converter

K
Voltage
Divider

129
Loop Gain T(s)
VIN
So That = VREF − K VOUT
VERRORT(s)
Gives Desired We D VOUT
Performance HEA(s)
EA
Design
GPWM (s) Power
GVD (s) Stage
– H (s) Design Sets
And Stability EA
GVD(s)
K(s)

Loop Gain
T (s) = K  H EA (s) GPWM GVD (s)
130
Compensator Design

• Solve For HEA(s)

VIN
T (s) = K  H EA (s) GPWM GVD (s) VERROR =VREF − K VOUT
Error VEA D VOUT
Buck
VREF Amp/ PWM
+ – Compensator
Converter

T (s)
K
H EA (s) = Voltage
K GPWM GVD (s) Divider

Choose T(s)

131
 Loop Gain T(s)
VIN
VERROR = VREF − K VOUT
Error VEA D VOUT
Buck
VREF Amp/ PWM
+ – Compensator
Converter

K
Voltage
Divider

260
Ideal T(s): Simple Integrator?
|T(s)| T(s)

T (s) = C 0°
s

‐90°

0 dB

FC
Frequency
133
Ideal T(s): Simple Integrator?
|T(s)| T(s)
C
Phase Shift Of 90° T s ( )= 0°
Is Completely Stable s
But Not The Fastest Response

‐90°

Less Phase Shift At Crossover

Would Be Better FC
Frequency
134
 Better T(s)
|T(s)| T(s)
0°
FC

‐45°
0 dB
‐90°
‐110°
0 1
T (s) =  Phase Margin ‐135°
s 1+ s
= 70 °
HFP FHFP ‐180°

Frequency
135
 Better T(s)
|T(s)| T(s)
Adjust 0 Such That 0°
Loop Gain =1 FC
At Crossover Frequency
T ( j C ) =1 ‐45°
0 dB
‐90°
‐110°
0
T (s) =
2
1  C  ‐135°

s 1+ s Phase Margin 0 = C  1+  
HFP
=70 °  HFP 
‐180°

Frequency
136
Calculating 0
0
• Ideal Loop Transfer Function T (s ) =
s 1+

1
s
HFP

• At Crossover We Want: T ( j C ) = 1

• Using Identity For Square Of 

 
 
  


1 1
T ( j C ) = 0     
2
The Magnitude:  j C 1 + j C
0

  − j  C 1− j C 
 HFP   HFP 
   

137
Calculating 0
   
  1    1 
T ( j C ) = 0     
2 0

 j C 1+ j C   − j C 1− j C 

 HFP   HFP 
   
 
2
1
= 0   =1
 C 
2
  
1+  C 
 HFP 
 C 
2
 0 
2

  = 1+  

 C 
 HFP 
 C 
2
0
= 1+  
C 
 HFP 

 C 
2

0 = C  1+  
 HFP 
138
Better T(s)
FC = 10 kHz
FHFP = 27.475 kHz

0 Phase = ‐110°
T (s) =
1

s 1+ s
HFP

139
Better T(s):
Practical Crossover Frequency

FSW /10 Very Practical

FSW /5 Challenging

FSW /3 Academic Exercise

140
 Small Signal Model
Of The Pulse Width Modulator
GPWM
Small Signal Model Of
Pulse‐Width Modulator

Error
Power
Vref Amp/ PWM Vout
+ – Compensator
Stage

Voltage
Divider

We Need To Calculate The Gain Of

the Modulator: GPWM(s)

142
Pulse Width Modulator

S Q

143
Analog Pulse Width Modulator
Error
Amp
Output

Ramp
Signal

Clock

PWM
Signal
144
 Trailing Edge PWM
Error
Amp
Output

Ramp
Signal

Clock

PWM
Signal
145
 Leading Edge And Double Edge PWM

Double
Edge
Modulation

Leading
Edge
Modulation

146
Small Signal Model Of
Pulse‐Width Modulator
VRAMP_MAX 2 V  100% Duty Cycle

VERROR_AMP 1.25 V  25% Duty Cycle

VRAMP_MIN 1 V  0% Duty Cycle

1.25V −1V
D= = 0.25
2V −1V

147
Small Signal Model Of
Pulse‐Width Modulator
vERROR _ AMP −VRAMP _ MIN
VRAMP_MAX d (vERROR_ AMP )= (DMAX − DMIN )
VRAMP _ MAX −VRAMP _ MIN

GPWM =
(
d d (vERROR _ AMP ) )
VERROR_AMP d (vERROR _ AMP )
 v −V 
VRAMP_MIN =
d
( DMAX − DMIN ) ERROR _ AMP RAMP _ MIN
d (vERROR _ AMP ) VRAMP _ MAX −VRAMP _ MIN 
DMAX − DMIN
=
VRAMP _ MAX −VRAMP _ MIN

1
GPWM =
DMAX = 1 DMIN = 0 VRAMP
148
Control‐To‐Output
Transfer Function
GVD
Buck Converter GVD
VIN
VERROR = VREF − K VOUT

VEA D VOUT
VREF HEA(s) GPWM(s) GVD(s)
+ –
K

K(s)

• Derivation Of Control‐To‐Output
Transfer Functions Generally Not Trivial
Buck Converter
vSW (t ) = VIN  d (t )
Q1 L
Gate1
VIN
ESR
Q2 R VOUT
Gate2 C

d̂ << D
d (t ) = D + d̂ (t ) = D + d̂ sin ( t )
 <<SW
151
Buck Converter

Q1 L
Gate1
VIN

Q v SW (t ) = DVIN +VIN  d  sin ( t

R) VOUT
Gate2

152
Buck Converter
v̂OUT (t )

VIN  d̂ sin ( t ) Q1 L
Gate1
VIN
ESR
Q2 R VOUT
Gate2 C

153
Buck Converter
v̂OUT (t )

VIN  d̂ sin ( t ) Q1 L
Gate1
VIN
ESR
Q2 v̂OUT (s) = HLC (s)VIN  d̂(s) VOUT
Gate2

v̂OUT (s)
GVD (s) = = VIN  H LC (s)
d̂ (s)

154
L‐C Filter Transfer Function
1 
L RLOAD ||  RC +
s C 
RL
vout (s) =   v (s )
 1  in
s  L + RL + RLOAD ||  RC +
RC  s C 
vin RLOAD vout
C
RC <<RLOAD RL <<R LOAD

ESR Zero
1+ s  RC C
H LC (s) 
L
1+  s + L C  s2
RLOAD

LC Double Pole
155
L‐C Filter Transfer Function
1 
L RLOAD ||  RC +
s C 
RL
vout (s) =   v (s )
 1  in
s  L + RL + RLOAD ||  RC +
RC  s C 
vin RLOAD vout
C
RC <<RLOAD RL ,<<RLOAD

s
1+
Z 1+ s  RC C
H LC (s )  H LC (s) 
2 L
 L  s   s  1+  s + L C  s2
1+ P   +  RLOAD
RLOAD  P 
  P
s
1+ Z = 1
Q=
R LOAD Z
P  L = RC C
1+ 1   s  +  s 
2

1
Q  P   P  P2 =
L C 156
Buck Converter GVD(s)
1+ s  RC C
GVD (s) = VIN  HLC (s)  VIN 
L
1+  s + L C  s 2
RLOAD
s
1+
Z _ ESR
= VIN 
  s 
2
1+ 1   s + 
Q  LC   LC 

1 1 RLOAD
Z _ ESR = LC
2
= Q=
RC C L C LC  L

157
Buck Converter GVD(s)
‐40 dB/Decade
Q FLC
‐20 dB/Decade

Low Freq Gain

21.6 dB
= 20∙log(VIN/V)
= 20∙log(12)

FESR
158
Buck Converter GVD(s)
Low Freq Phase
0°
FLC

‐90°

‐135°

‐180°
FESR
159
Buck Converter GVD(s)
R=1 R=5 R = 25

160
Buck Converter GVD(s)
R=1 R=5 R = 25
Higher Load Resistance 
Higher Q 
Larger Peak

Higher Load Resistance 

Higher Q 
Faster, Deeper Phase Shift

161
Solving For The
Compensator
Compensator Poles And Zeros
GVD LC
XX

ESR
O

163
Compensator Poles And Zeros
Integrator
HEA LC Double Zero
Pole
At s = 0 XX To Cancel
X LC Poles Single Pole
To Cancel
OO
X ESR Zero
HF Pole
ESR
X For Desired
O Phase Margin

• Integrator Pole
• Two Zeros
• Two Poles

164
Compensator Poles And Zeros
Integrator
T Pole
LC Double Zero
To Cancel
X At s = 0 XX
LC Poles Single Pole
To Cancel
OO
X ESR Zero
HF Pole
ESR
X For Desired
O Phase Margin

We Have Our
Ideal Loop
Transfer Function!
165
Solving For The Compensator
0
T (s) = K (s) H EA (s)GPWM (s)GVD (s) T (s) =
1

s 1+ s
HFP

 C 
2

0 = C  1+  
H EA (s) = T (s) 
 HFP 
K GPWM GVD (s) HFP =
C
tan (90 − PM )
s
1+
Z _ ESR
GVD (s) = VIN 
1
K =1 GPWM =
1  s   s 
2
VRAMP
1+   + 
Q  LC 
  LC 

166
Solving For The Compensator
0  1
Ideal s 1+ s
Compensator H EA (s) =
HFP
Transfer  s 
 1+ 
Function  
 V IN 
1
Two Zeros Z _ ESR
2 
VRAMP
 1  s   s  
1+    +  
 Q  LC   LC  


2
1+ 1   s  +  s 
P0 Q  LC   LC 
= Two
Integrator Pole s  s   s 
 1+
 Z _ ESR    
1+
  HFP 
Poles
  
2
VRAMP  0 VRAMP
P0 = = C  1+  C 
VIN VIN  HFP 
167
Practical Compensator
Transfer Function
 s   s 
 1+   1+ 
P0  Z1   Z2 
H EA (s) = 
s  s   s 
 1+     1+  
 P1   P2 

How Do We
How Do We
Choose The
Implement
Pole And Zero
This In A Circuit?
Frequencies?
168
Type III Compensator

169
Type III Compensator
VOUT

R3 C3
R1
R2 C2
C1
Note
Reference VREF
VEA No Voltage
Votlage
Divider
R4
Term!

1 1+ s  R3  C3 1+ s  (R1 + R2 ) C1 Note
=−  
s  R2  (C2 + C3 ) 1+ s  R1  C1 1+ s  R  C2  C3 R4 Does NOT
3
C2 + C3 Appear!
170
 Type III Compensator
VOUT
Integrator
Pole R3 C3
R1
1 R2
P 0 = C2
R2  (C2 + C3 ) C1

VEA
Reference VREF
Votlage

vEA (s)
R4

H EA (s) =
vOUT (s)
1 1+ s  R3  C3  1+ s  (R1 + R2 ) C1
=− 
s  R2  (C2 + C3 ) 1+ s  R1  C1 1+ s  R  C2  C3
C2 + C3
3
171
 Type III Compensator
First Zero VOUT

1 C3
Z1 = R3
R3 C3 R1
R2 C2
C1

VEA
Reference VREF
Votlage

vEA (s)
R4

H EA (s) =
vOUT (s)
1 1+ s  R3  C3  1+ s  (R1 + R2 ) C1
=− 
s  R2  (C2 + C3 ) 1+ s  R1  C1 1+ s  R  C2  C3
C2 + C3
3
172
 Type III Compensator
Second Zero VOUT

1
Z 2 = R3 C3

(R1 + R2 )C1 R1
R2 C2
C1

VEA
Reference VREF
Votlage

vEA (s)
R4

H EA (s) =
vOUT (s)
1 1+ s  R3  C3  1+ s  (R1 + R2 ) C1
=− 
s  R2  (C2 + C3 ) 1+ s  R1  C1 1+ s  R  C2  C3
C2 + C3
3
173
 Type III Compensator
Second Pole VOUT

1 R3 C3
P1 = R1
R1 C1 R2 C2
C1

VEA
Reference VREF
Votlage

vEA (s)
R4

H EA (s) =
vOUT (s)
1 1+ s  R3  C3  1+ s  (R1 + R2 ) C1
=− 
s  R2  (C2 + C3 ) 1+ s  R1  C1 1+ s  R  C2  C3
C2 + C3
3
174
 Type III Compensator
Third Pole VOUT

1 C3
P 2 =
R3
C C R1
R3  2 3 R2 C2
C2 + C3 C1

VEA
Reference VREF
Votlage

vEA (s)
R4

H EA (s) =
vOUT (s)
1 1+ s  R3  C3  1+ s  (R1 + R2 ) C1
=− 
s  R2  (C2 + C3 ) 1+ s  R1  C1 1+ s  R  C2  C3
C2 + C3
3
175
Type III Bode Plot
fP 0 =1000Hz fZ1 =100Hz fZ 2 = 1000Hz fP1 = 10kHz fP 2 =100kHz
70

60

50
Magnitude (dB)

40

30

20

10

-10
90

45
Phase (deg)

-45

-90
0 1 2 3 4 5 6 7
10 10 10 10 10 10 10 10
Frequency (Hz)
176
Type III Bode Plot
fP 0 =1000Hz fZ1 =100Hz fZ 2 = 1000Hz fP1 = 10kHz fP 2 =100kHz
70

60

50
Magnitude (dB)

40

30

20

10
Peak Phase
Lead 135°
0

-10
90

45

-90° -90°
Phase (deg)

-45

-90
0 1 2 3 4 5 6 7
10 10 10 10 10 10 10 10
Frequency (Hz)
177
Choosing Compensator
Poles And Zeroes

T (s) = K (s) HEA (s)GPWM (s) GVD (s)

  s   s   s 
  1+     1+     1+ 
0  P0 Z _ ESR 
 Z1   Z2 
 VIN 
1  1
T (s) =  =  2
s 1+ s  s  s   s   VRAMP    
 s s
  
 1
HFP  1+   1+  1+    +
   P1   P2    Q  LC   LC  

To Design The Compensator We Need These Five Frequencies

178
Choosing Compensator
Poles And Zeroes
T (s) = K (s) HEA (s)GPWM (s) GVD (s)

  s   s   s 
 
     
1+ 1+  1+ 
0  Z _ ESR 
 Z1   Z2  
1 1
T (s) =  =  P0   VIN  2 
s 1+ s  s  s   s   VRAMP    
 s s
  1+  
 1
HFP 1+  1+    + 
  P1   P2    Q  LC   LC  

Z 1 = Z 2 = LC P1 = Z _ ESR P 2 = HFP

179
Choosing Compensator
Poles And Zeroes

T (s) = K (s) HEA (s)GPWM (s) GVD (s)

  s   s   s 
  1+     1+     1+ 
0  P0 Z _ ESR 
 Z1   Z2 
 VIN 
1  1
T (s) =  =  2
s 1+ s  s  s   s   VRAMP    
 s s
  
 1
HFP  1+   1+  1+    +
   P1   P2    Q  LC   LC  

DC Gain Term/Integrator Pole Frequency: P 0 = V  0 VRAMP   

2
RAMP = C  1+  C 
VIN VIN  HFP 

180
Calculating Component Values
VOUT

• If VOUT > VREF Choose Current R3 C3

R1
R2 C2

(IBIAS ) Through R2 And R4 C1

• 100 µA – 1 mA Typical Reference

Votlage
VREF
VEA

R4

VREF
R4 =
I BIAS • If VOUT = VREF:
• R4 Not Used
• Choose Convenient
Value For R2 (10 kΩ)

181
Calculating Component Values
VOUT
fZ 2
R1 =  R2 R3 C3
fP1 − fZ 2 R1
R2 C2
C1

1
C1 = Reference VREF
VEA

2   f P1  R1 Votlage
R4

fZ1
C2 =
2   f P2  f P0  R2 1 1
C3 = − C2 R3 =
2   fP 0  R2 2   fZ1 C3
182
 Buck Converter Example
VIN = 12Vdc 1
FC = FSW = 30 kHz
VOUT = 3.3Vdc 10
IOUT = 1 Adc
PM = 70
VREF = 2.5Vdc

FSW = 300 kHz 1

FLC = = 5.472 kHz
LOUT = 18μH 2   LOUT COUT
COUT = 47 μF 1
FESR = = 169.3kHz
RCOUT = 20 mΩ 2   RCOUT COUT

183
 Buck Converter Example
Choose Compensator Zero Frequencies FZ1 = FZ 2 = FLC = 5.472 kHz
And One Pole Frequency FP1 = FESR = 169.3kHz

Calculate Other Pole Frequency To Give PM = 70

Desired Phase Margin At Crossover Phase _ Lag (FC ) = PM − 90 = −20
FC
FP2 = = 82.4 kHz
− tan (Phase _ Lag )

 C 
2
VRAMP
Calculate FP0 FP0 =  FC  1+  
VIN 
 HFP 

 2  30 kHz 
2
1V
= 30 kHz  1+  2  82.4 kHz 
12 V  
= 2661kHz 309
 Calculating Component Values
• VOUT > VREF Choose VOUT

C3
Current (IBIAS) Through R1
R3

R2
R2 And R4 C1
C2

• IBIAS = 100 µA VEA

Reference VREF
Votlage
R4
V 2.5V
R4 = REF = = 25k  24.9 k
IBIAS 100 A

VOUT −VREF 3.3V − 2.5V

R2 =  R4 =  24.9 k = 7.968k  8.06 k
VREF 2.5V

R2 + R4
VOUT = VREF = 3.309V
R4
Calculate Component Values
FZ 2
R1 =  R2 = 269.18  267 
FP1 − FZ 2
FZ1
C2 = = 492.7 pF  510 pF
2   FP2  FP0  R2
1
C1 = = 3.521nF  3.6 nF
2   FP1  R1
1
C3 = = 6.912 nF  6.8 nF
2   FP0  R2
1
R3 = = 4.277 k  4.22 k
2   FZ1 C3
186
Check Actual Compensator
Pole And Zero Frequencies

Desired As Designed

FP0 = 2.661kHz FP0 = 2.701kHz

FZ1 = 5.472 kHz FZ1 = 5.546 kHz
FZ 2 = 5.472 kHz FZ 2 = 5.309 kHz
FP1 = 169.314 kHz FP1 = 165.6 kHz
FP2 = 82.424 kHz FP2 = 79.50 kHz

187
Simulation Schematic

188
Simulation Schematic

189
Example Bode Plot
Power Stage (GVD) Compensator Loop T(s)

Gain (dB)
Phase (Degrees)

Freq (Hz)
190
Example: Bode Plot GVD(s)
Power Stage (GVD) Compensator Loop T(s)

Gain (dB)
Phase (Degrees)

316
Freq (Hz)
Example: Compensator Bode Plot
Power Stage (GVD) Compensator Loop T(s)
Gain (dB)
Phase (Degrees)

Freq (Hz)
317
Example: Closed Loop Bode Plot
Power Stage (GVD) Compensator Loop T(s)
Gain (dB)
Phase (Degrees)

318
Freq (Hz)
Example: Closed Loop Bode Plot
Power Stage (GVD) Compensator Loop T(s)
FC = 31.7 kHz
Gain (dB)

Gain Margin = 13 dB
Phase (Degrees)

Phase Shift = –129°

PM = 51°

Freq (Hz) 319

Where This Went Wrong

We Tried To Cancel
Two Complex Poles

  s   s   s 
  1+     1+     1+ 
0  Z1   Z2 
Z _ ESR 
=  P0    VIN 
1 1
T (s) =   2
s 1+ s  s  s   s   VRAMP    
 s s
  
 1
HFP  1+   1+  1+    +
  P1   P2    Q  LC   LC  

With Two Real ZerosV  VRAMP 0  VIN

DC Gain Term: 0 = P0  IN
= 
VRAMP  VIN  VRAMP

195
Example Bode Plot
Power Stage (GVD) Compensator Loop T(s)
FC = 31.7 kHz
Gain (dB)
Phase (Degrees)

Freq (Hz)
196
K‐Factor Method
• A Popular Cookbook Method For Choosing Compensator Pole
And Zero Locations
• Published By Dean Venable In 1983
• "The K Factor: A New Mathematical Tool for Stability Analysis and
Synthesis”; Proceedings of Powercon 10, March 1983
• Reprints And App Notes Widely Available Through A Web Search
K‐Factor Method

FZ

FP

FMAX _ BOOST = FZ  FP = FC


2
FZ =
FC   Phase _ Boost
FP = FC  K K = tan  + 45
K   4 
323
K‐Factor Method Summary
• Choose Desired FC And Phase Margin (PM)
• Examine GVD(s)
• Determine Phase Lag At FC
• Determine Gain At FC
• Calculate Required Phase Boost At FC
• Phase Boost = PM – Phase (GVD(FC)) ‐ 90°
• Calculate K‐Factor
• Calculate FZ And FP
• Calculate Component Values As Function Of
FZ, FP, And Required Gain
K‐Factor Example
• FC = 30 kHz, PM = 70°
• GVD(FC): Phase = –167°,
Gain = ‐7.7 dB (0.412)
• Phase Boost = 70° – (–167°) – 90° = 147°
• Calculate K‐Factor 
2
  147 
K = tan  + 45 = 47.6
  4 
• Calculate FZ And FP
FC 30 kHz
FZ = = = 4.350 kHz FP = FC  K = 30kHz  47.6 = 206.9kHz
K 47.6
K‐Factor Example
• Component • Desired And Actual
Values Are: Frequencies
R2 = 8.04 kΩ FP0 = 1.527 kHz FP0 = 1.609 kHz
R4 = 24.9 k FZ = 4.35 kHz FZ1 = 4.292 kHz
R1 = 174  FP = 206.9 kHz FZ 2 = 4.495 kHz
C1 = 4.3nF FP1 = 212.7 kHz
C2 = 270 pF FP2 = 195.1kHz
R3 = 3.09 k
C3 = 12 nF

201
K‐Factor Example:
Simulated Compensator

202
K‐Factor Example: Simulation Bode Plot
Power Stage (GVD) Compensator Loop T(s)
Gain (dB)
Phase (Degrees)

Freq (Hz)
203
K‐Factor Example: Simulation Bode Plot
Power Stage (GVD) Compensator Loop T(s)
Gain (dB) FC = 29.2 kHz

Gain Margin = 23 dB
Phase (Degrees)

Phase Shift = ‐112°

PM = 68°
Freq (Hz)
204
K‐Factor Example: Caveats
Power Stage (GVD) Compensator Loop T(s)
Gain (dB)

Gain‐Bandwidth Product
2 MHz
Phase (Degrees)

Large Phase Boost 

Low Frequency Zeroes 
Large Feedback Capacitors 
Slew Rate Limiting
Freq (Hz) 330
Loop Design Considerations
• Loop Characteristics Typically Vary A Lot!
• Variations In GVD With
Input Voltage And Load
• Tolerance Of Components In
Output Filter And Compensator
• Variation In Crossover Frequency Of
One Octave Common
Loop Design Considerations
• Loop Characteristics Typically Vary A Lot!
• Variations In GVD With Input Voltage And Load
• Tolerance Of Components In Output Filter And Compensator
• Variation In FC Of One Octave Common

You MUST Do
You MUST
Some Kind Of
Measure
Worst Case
The Loop
Analysis
Other Compensators
And Modulators
Other Standard Compensators VOUT
C
R1

• How Much Phase Boost Needed?

• Type I: No Phase Boost VREF
VEA

• Integrator Pole Only R2

• Type II: Up To 90° Phase Boost
• Integrator Pole
• One Zero And One Pole
• Type III: Up To 180° Phase Boost
• Integrator Pole
• Two Zeros And Two Poles
 H PID (s ) = K P + K I  + K D  s
1
PID Compensator s
Response IsTuned by Integral Derivative
Adjusting The Gain
Terms KP, KI, KD KP

PID
𝑠
Out
Error Integrator KI

Low
Differentiator KD
Pass

High Frequency Noise Filter

335
PID Compensator
• PID Loved By Academics
• Good Commercial Applications Are Limited
• Good For “One Of” Designs Where Plant Characteristics
Are Not Well Known
• Examples: Motor Drive, Industrial Processes
• Various Tuning Algorithms
• e.g. Ziegler‐Nichols
Variable Frequency Modulators
Constant Duty Cycle, Variable Frequency

Error
VCO
Amp

Constant On Time Constant Off Time

212
Current Mode Control
Overview
Analog PWM Reminder

S Q

214
Peak Current Mode Control

VIN VOUT

DRIVER

Q R
Error Amp/
Latch VREF
Compensator
S

Clock

215
Peak Current Mode Control

VIN
Current VOUT
Sensing
DRIVER

Q R
Error Amp/
Latch VREF
Compensator
S

Clock

216
Peak Current Mode Control
Sawtooth Ramp
VIN Replaced BVy OUT

Current Ramp
DRIVER

Q R
Error Amp/
Latch VREF
Compensator
S

Clock

217
Peak Current Mode Control
Error Amp Output
Commands Peak Inductor Current,
VIN VOUT
Not Duty Cycle
DRIVER

Q R
Error Amp/
Latch VREF
Compensator
S

Clock

218
Peak Current Mode Control
Error Amp
Output

Current
Sense
Signal

Gate
Drive
Signal

219
Feed Forward

VIN VOUT

DRIVER

Input Voltage
Changes
Current ErA
rou
r Atmo
p/matically
Latch Ramp Slope
Q R
V
REF
S Compensator
Proportional To Changes
Input Voltage Clock Duty Cycle!
220
Control Characteristic GVC

Programmable
Current Source Filter Capacitor Load
I = KI∙vc And ESR Resistance

221
Control Characteristic GVC
vO (s) = KI  vC (s ) ZO (s)

vO (s )
GVC (s ) = = K I  ZO (s)
vC (s)

1+ s  RC C
GVC (s) = K I  RO 
1+ s  (RC + RO )C
s Z =
1
1+
Z RC C
GVC (s ) = GO 
s 1 1
1+ P = 
P (RC + RO )C RO C

222
 s s
1+ 1+
Control Characteristic GVC GVC (s) = GO 
Z
s
= K I  RO 
Z
s
1+ 1+
P P
X
GVC(RMAX)

X
GVC(RMIN)

FP(RMAX) FP(RMIN) FZ(ESR)

223
Compensator HEA
X
GVC(RMAX)

X
GVC(RMIN)

HEA X X

O
O

FP(RMAX) FP(RMIN) FZ(ESR)

224
Loop Gain T(s)
T(s)
XX
GVC(RMAX)

X
GVC(RMIN)

HEA X XX
X
O
XO
FP(RMAX) FP(RMIN) FZ(ESR)

225
Loop Gain T(s)
X
GVC(RMAX)

X
GVC(RMIN)

HEA X XX
O
O
X
FP(RMAX) FP(RMIN) FZ(ESR)

226
Loop Gain T
Loop Characteristics
GVC(RMAX)
Depend On Output Load
In This Region

GVC(RMIN)

HEA
Loop Characteristics
Converge Above FP(RMIN)
Crossover Frequency
Always About The Same
FP(RMAX) FP(RMIN) FZ(ESR)

227
Type II Compensator

228
Type II Compensator
ZF
H 2 (s ) = −
ZS
1 1+ s  R1  C1

s  (C1 + C2 ) 1+ s  R  C1  C2
C1 + C2
1
=−
R2 Zero
1 1+ s  R1  C1
=− 
s  R2  (C1 + C2 ) 1+ s  R  C1  C2
1
C1 + C2
Integrator Pole
Second Pole

229
Compensator Frequencies
c
T (s ) = = H EA (s )GVC (s )
s

 s   s 
1+ 1+
c  P ZC   Z 
T (s ) = =     GO  
s  s 1+ s   1+
s 
 PC   P 
   

 s   s 
1+ 1+
c  P ZC   Z 
T (s ) = =      K I  RO  
s  s 1+ s   1+
s 
 PC   P 
   

230
Compensator Frequencies
c
T (s ) = = H EA (s )GVC (s )
s
1

ZC = P 
s   s  RO C
1+ 1+
c  P ZC   Z 
T (s ) = =     GO  
s  s 1+ s   1+
s 
 PC   P  PC = Z
   

 s   s 
1+ 1+
c  P ZC   Z  c
T (s ) = =      K I  RO   P =
s  s 1+ s   1+
s  K I  RO
 PC   P 
   

231
Sub‐Harmonic Oscillation

CLOCK

vCTRL

iL

This Oscillation Happens For

Duty Cycles Greater Than 50%
232
Slope Compensation
Compensating
CLOCK Ramp (aka
Artificial Ramp)
RAMP
SIGNAL Added To
Current Sense
vCTRL Signal

iL
GATE
DRIVE
233
Slope Compensation
Compensating
CLOCK Ramp
Subtracted
RAMP
SIGNAL From
Control Signal
vCTRL

iL
GATE
DRIVE
234
Slope Compensation
Too Much
CLOCK
Slope
Compensation
RAMP
SIGNAL Makes Loop
Act Like
vCTRL Voltage Mode
Control

iL
GATE
DRIVE
235
Why Peak Current Mode Control?

Advantages Disadvantages
• Faster Control Loop • Must Sense The Current
• Feed Forward • Noise Sensitivity
• Simpler Compensator As • “Slope Compensation”
Inductor Essentially Removed • Must Add Additional Ramp
From Loop Signal To Current Sense Signal
• Build In Current Limiting To Avoid Subharmonic
Oscillations

236
Why Peak Current Mode Control?

Advantages Disadvantages
• Faster Control Loop • Must Sense The Current
• Feed Forward • Noise Sensitivity
• Simpler Compensator As • “Slope Compensation”
Inductor Essentially Removed • Must Add Additional Ramp
From Loop Signal To Current Sense Signal
• Build In Current Limiting To Avoid Subharmonic
Oscillations
Are Generally Heavily Outweighed
By These Advantages! These Disadvantages
237
Average Current Mode Control

238
Average Current Mode Control
Sense The
Inductor
(Or Output)
Current

Voltage Error Amp

Creates
Current Reference Signal
239
Average Current Mode Control
Current Error Amplifier
Generates A
Current Command Signal
Based On Average Current

Current Command
Signal Drives
Pulse Width Modulator 240
Average Current Mode Control
PWM Output
Drives The
Switches

241
Why Average Current Mode Control?
Advantages Disadvantages

• Direct Control Of Average Output • More Components

Current
• No Slope Compensation
• Excellent Noise Immunity

242
Applications Of Average Current Mode Control

Current Sense Signal

243