UNIT 1

Semiconductor Diodes
1.1 INTRODUCTION

The aim of Electronic component is to act as switch.

The atom structure is show in fig.

Atom = Nucleus(Protons + Neutrons) + Electrons

The outermost electron in the atom is called as valance electron.

Fig: 1.1 Atom structure

Basically there are three material in nature. They are Conductor, Semiconductor and
Insulator.
Conduction in all this material starts when the electrons in conduction band moves to the
valance band.

For conductor, the conduction and valance band already overlap, so without any
external voltage it starts conducting due to normal room temperature (Noise).
For insulator, the conduction and valance band is separated with larger band gap which
need very high energy to move the electron from conduction band to valance band. This will
fulfill our aim to act as switch but with very high energy is need.

For Semiconductor, the conduction and valance band separated with small band gap
which needs low energy to move the electron from conduction to valance band. In case of
semiconductor this will act as switch with low energy which will fulfill our aim.

 Intrinsic semiconductor(Pure)

 Extrinsic semiconductor(Impure or Doped)

O N-Type semiconductor(Electrons are majority carrier)
O P- Type semiconductor(Holes are majority carrier)
 Fig: 1.2 Conduction and Valance band of Insulator, Semiconductor and Conductor

University Question

1. Explain the characteristics of semiconductors, insulators and metals classification using

energy band diagram. (MAY-2018)

1.2 INTRINSIC SEMICONDUCTOR

It is a pure semiconductor without any impurities. Fig 1.2 shows the energy band
diagram of intrinsic semiconductor. For Ge(Germanium) material electrons take 0.67 eV to
reach conduction band from valance band and for Si(silicon) 1.1 eV. But silicon is cheaper than
germanium. That’s why silicon is used widly.

Fig: 1.3 Intrinsic Semiconductor

To reduce the energy further, should reduce the band gap. This is done by means of
doping.

Doping- Process of adding impurities in intrinsic semiconductor.

1.3 EXTRINSIC SEMICONDUCTOR

All the dopped semiconductors are called as Extrinsic semiconductor.

 If the dopped atom creats excess electron in the atom means then it is called as N- Type
semiconductor. Electrons are majority carriers. Holes are minority carriers. (i.e.,) Pentavelant
impurities are used for doping (Arsenic(As), Antimony(Sb), Phosphorous(P)).

If the dopped atom creats holes in the atom means then it is called as P-Type
semiconductor. Holes are majority carriers. Electrons are minority carriers. (i.e.,) Trivalent
impurities are used for doping (Boron(B), Gallium(Ga), Indium(In)).

Fig: 1.4 (a) N-Type Semiconductor, (b) P-Type Semiconductor

This P-Type and N-Type Jointly form the PN doide.

University Question
2 marks
1. What is meant by extrinsic semiconductor? (MAY-2015)

1.4 PN JUNCTION DIODE

Combination of P and N type semiconductor is called as PN junction diode. It is lightly

doped
diode.
Symbol

Fig: 1.5 Circuit symbol

University Question
2marks
2. Draw the diode equivalent circuit. (NOV/DEC-2014)
3. Draw the equivalent circuit of diode. (MAY-2015)

Construction of PN Junction Diode

 P-Type and N-Type semicondutor combined to form the PN junction diode.

Fig: 1.6 PN Junction Diode

 In P side, each acceptor atom accepts one electron from semiconductor atom and the
acceptor atom become immobile negative ion and semiconductor atom become hole.
The P side has excess holes.

 In N side, each donor atom donate one electron and the donor atom become immobile
positive ion, there is one free electron for each positive immobile ion. The N side has
excess electrons.
Depletion Region

 Electrons move from N side to P side and recombine with holes in the P type material.
Because of this movement and recombination, electrons in N type and holes in P type
material disappear.

Fig: 1.7 Space Charge region (or) Depletion region

 Near the junction there will be an array of negative and positive immobile ions, which will
block the electron hole mobility from one side to another. An equilibrium condition will be
reached.
  This region near the junction, which consist of immobile ions, is called space charge
region or transision region or depletion region(no mobile carriers).
Barrier Potential

 In depletion region there are positive charges in the N side and negative charges in the
P side forms electric dipole layer, giving rise to a potential difference Vo. This potential
difference is called barrier Potential.
 It prevents the movement of mobile carriers across the junction. Vo is 0.3 V for Ge and
0.7 V for Si.

University Question
2 marks
1. Define barrier potential of a diode(NOV- 2017)

Operation of PN Junction Diode(VI Characteristics)

 There are two main operation

 Forward bias

 Reverse bias

 Bias is nothing but applying external voltage.

Forward Bias

Batteries Positive terminal is connected to P type and Negative terminal is connected to

N type

Fig: 1.8 Diode in Forward Bias

 When an external voltage is applied, the holes in the P type material are repelled by the
positive terminal of the battery, and the electrons in the N type material are repelled by
the negative terminal of the battery, Which will reduces the width of the depletion region.
Further increase in external voltage above the barrier potential voltage, then the
depletion region gets broken. Holes cross the junciton and move towards negative
terminal of the battery and electrons moves towards positive terminal of the battery.
 Due to this movement of charges, produces a high forward current, which is show in the
forward VI characteristics.

 When the applied voltage reaches the barrier potential then the junction break down
occurs which increases the flow of electrons. The point at which diode starts conducting
in forward bias is called as knee voltage or cut in voltage or threshold voltage

University Question
2 marks
1. Explain the terms Knee voltage and Breakdown voltage in diode (NOV- 2017)

Reverse Bias

(Batteries Positive terminal is connected to N type and Negative terminal is connected

to P type)

Fig: 1.9 Diode in Reverse Bias

 When an external voltage is applied, the holes in the P type material are attracted by the
negative terminal of the battery, and the electrons in the N type material are attracted by
the positive terminal of the battery, Which will increases the width of the depletion region
and barrier potential. The high barrier potential will not allow charge carriers to move
across the junction. Therefore in reverse bias no current flow through the junction.

 PN junction diode offers very low resistance in forward bias and very high resistance in
reverse bias.

 When the voltage across the diode is increased, the depletion layer is strengthened,
therefore the current through the diode is the reverse saturation current. Further
increase in reverse voltage will suddenly increases the high reverse saturation current
due to the breakdown of the diode. The minimum voltage at which the breakdown occurs
is called breakdown voltage.

University Question
1. What is a PN junction? Explain the formation of potential barrier in a PN junction
diode with a neat diagram.(DEC-2016)
2. a) Explain the basic structure of the pn junction. (NOV -2017)
Diode Current Equation
 The diode current equation relating the voltage V and current I is given by

I  Io e(V / VT )  1
Where I=diode current
Io=diode reverse saturation current at room temperature
V=external voltage applied to the diode
 =a constant, 1 for germanium and 2 for silicon
VT=kT/q=T/11600, volt-equivalent of temperature, i.e., thermal voltage,
Where k= Boltzmann’s constant (1.38066x 10-23 J/K)
q=charge of the electron (1.60219x10-19 C)
T=temperature of the diode junction (K) =(OC+273o)
 At room temperature, (T=300oK), VT=26mV. Substituting this value in the current
equation, we get

I  I o e(40V / )  1

 Therefore, for germanium diode, I  I o e(40V / )  1 , since =1 for germanium for

silicon diode, I  I o e(20V / )  1 , since  =2 for silicon.

 If the value of applied voltage is greater than unity, then the equation of diode current for
germanium,
I  I o (e40V )

and for silicon, I  I o (e20V )

 When the diode is reverse biased, its current equation may be obtained by changing the
sign of the applied voltage V. Thus the diode current with reverse bias is

I  I o eV /VT  1

V /VT
 If V>>VT , then the term e <<1, therefore I  -Io , termed as reverse saturation
current, which is valid as long as the external voltage is below the break down value.

Application

 Diode can be used as switch, because it offers very low resistance (Closed switch)
in forward bias and very high resistance (open switch) in reverse bias.

 Diode can be used as rectifier to convert AC signal into DC signal.

University Questions

1. Draw and explain the operation and characteristics of a PN junction diode. Also derive
its current equation. (11m) (NOV/DEC-2014)
2. Derive the PN diode current equation from the quantitative theory of diode currents.
(NOV -2017

3. Derive the diode current equation. (MAY-2018)

1.6 TEMPERATURE EFFECTS OF PN JUNCTION DIODE

The rise in temperature increases the generation of electron-hole pairs in semiconductors

and increases their conductivity. As a result, the current through the PN junction diode
increases with temperature as given by the diode current equation.

Fig: 1.12 Effect of temperature on the diode characteristics

The small conduction current makes forward bias and reverse bias breakdown earlier in the
PN junction diode.

Temperature α Current

The reverse saturation current Io, doubles with every 10o C increase in temperature.
University Questions
1. Explain the behavior of PN junction diode in forward bias and reverse bias mode.
Discuss the effect of temperature on the volt-ampere characteristic of a diode?(11m)
(MAY-2015)
4. Draw the VI characteristic of PN junction diode. Explain its principle of operation. (7m)
(NOV/DEC-2015)
5. Explain the operation of a PN junction diode under forward and reverse biased condition.
Also explain the characteristic of a PN-junction diode. (11m) (MAY-2016)

1.6 D.C OR STATIC RESISTANCE (RF)

It is defined as the ratio of the voltage to the current, V/I, in the forward bias
characteristics of the PN junction diode. In the forward bias characteristics of the diode as
shown in Fig: 1.13. The d.c. or static resistance (RF) at the operating point can be determined
by using the corresponding levels of voltage V and current I, i.e.
V
RF 
I
Here, the D.C resistance is independent of the shape of the characteristics in the region
surrounding the point of interest. The D.C. resistance levels at the knee and below will be
greater than the resistance levels obtained for the characteristics above the knee. Hence, the
D.C. resistance will be low when the diode current is high. As the static resistance varies widely
with V and I, it is not a useful parameter.

Fig: 1.13 Forward biasing of a diode

University Question
2 marks
1. What is meant by static forward resistance? (MAY-2016)
 1.7 A.C. OR DYNAMIC RESISTANCE (RF)

It is defined as the reciprocal of the slope of the volt-ampere characteristics

Change in Voltage V
RF  
resulting Change in Current I

Fig: 1.14 Dynamic Resistance

1.8 DIODE EQUIVALENT CIRCUIT

Ideal Diode

When the forward resistance is zero and reverse resistance is infinity then it is called as Ideal
diode.

Fig: 1.15 V-I Characteristics of Ideal Diode. Reverse biased Forward biased

But practically it is not possible to get the zero resistance in any device.
Practical Diode
Practically it is impossible to get the resistance zero, some forward resistance (Rf) present in
the circuit. The diode starts conducting after 0.6 V, that is represented by adding the voltage
source in the practical diode model
 Fig: 1.16 Practical diode model Fig: 1.17 V-I characteristics
Piecewise Linear Model of Diode

For analyzing purpose the VI characteristics of diode is approximated only by straight line
i.e., linear relationship.

Fig: 1.18 Piecewise linear model Fig: 1.19 V-I characteristics

1.9 TRANSITION OR SPACE CHARGE CAPACITANCE (CT)

When a diode is reverse biased, the width of the depletion region increases. So, there are
more positive and negative charges present in the depletion region. Due to this, the P region
and N region act like parallel plate capacitor while depletion region acts like dielectric. There
exists a capacitance called transition capacitance or junction capacitance or space charge
capacitance or barrier capacitance or depletion region capacitance.

where ε is the permittivity of the material, A is the cross-sectional area of the junction
and W is the width of the depletion layer over which the ions are uncovered.

This capacitance is is voltage dependent and is given by

1.10 DIFFUSION CAPACITANCE (CD)

In forward biased condition, the width of the depletion region decreases and holes from P-
side get diffused in N- side while electrons from N- side move into the P-side. As the applied
voltage increases, concentration of injected charged particles increases. This rate of change of
the injected charge with applied voltage is defined as a capacitance is called diffusion
capacitance.

The diffusion capacitance can be determined by the expression

Where τ is the mean life time for holes and electrons.

University Question
1. (a) Distinguish between space charge capacitance and diffusion capacitance in all
aspects. (7m) (NOV/DEC-2015)
2. Derive the expression for the transition capacitance and diffusion capacitance of a
diode.(11m) (MAY-2016)

1.11 DIODE SWITCHING TIMES

Diodes are often used in a switching mode. When the applied bias voltage to the PN
diode is suddenly reversed in the opposite direction, the diode response reaches a steady state
after an interval of time, called the recovery time.
The forward recovery time, tfr, is defined as the time required for forward voltage or
current to reach a specified value (time interval between the instant of 10% diode voltage to the
instant this voltage reaches within 10% of its final value) after switching diode from its reverse-to
forward-biased state. Fortunately, the forward recovery time possess no serious problem.
Therefore, only the reverse recovery time, trr, has to be considered in practical applications.
When the PN junction diode is forward biased, the minority electron concentration in the
P-region is approximately linear. If the junction is suddenly reverse biased, at t1, then because
of this stored electronic charge, the reverse current (IR) is initially of the same magnitude as the
forward current (IF). The diode will continue to conduct until the injected or excess minority
carrier density (p-p0) or (n-n0) has dropped to zero. However, as the stored electrons are
removed into the N-region and the contact, the available charge quickly drops to an equilibrium
level and a steady current eventually flows corresponding to the reverse bias voltage as shown
in figure1.6(c).
As shown in fig.1.20 (b), the applied voltage Vi=VF for the time up to t1 is in the direction
to forward-bias the diode. The resistance RL is large so that the drop across RL is large when
compared to the drop across the diode. Then the current is

Then, at time t=t1, the input voltage is suddenly reversed to the value of –VR. Due to the
reasons explained above, the current does not become zero and has the value until the time
t=t2. At t=t2,
 when the excess minority carriers have reached the equilibrium state, the magnitude of
the diode current starts to decrease, as shown in fig.1.20(d)
During the time interval from t1 to t2, the injected minority carriers have remained stored and
hence this time interval is called the storage time (ts).

Fig: 1.20 Switching characteristics of PN junction diode

After the instant t=t2, the diode gradually recovers and ultimately reaches the steady-
state. The time interval between t2 and the instant t3 when the diode has recovered nominally,
is called the transition time, tt. The recovery is said to have completed (i) when even the
minority carriers remote from the junction have diffused to the junction and crossed it, and (ii)
when the junction transition capacitance, CT, across the reverse-biased junction has got
charged through the external resistor RL to the voltage – VR.
 The reverse recovery time (or turn-off time) of a diode, trr, is the interval from the current
reversal at t=t1 until the diode has recovered to a specified extent in terms either of the diode
current or of the diode resistance, i.e. trr=ts+tt.
For commercial switching type diodes the reverse recovery time, trr, ranges from less than
1ns up to as high as 1 µs. This switching time obviously limits the maximum operating frequency
of the device. If the time period of the input signal is such that T=2.trr, then the diode conducts
as much in reverse as in the forward direction. Hence it does not behave as a one way device.
In order to minimize the effect of the reverse current, the time period of the operating frequency
should be a minimum of approximately 10 times trr. For example, if a diode has trr of 2ns, its
maximum operating frequency is

The trr can be reduced by shortening the length of the P-region in a PN junction diode. The
stored charge and, consequently, the switching time can also be reduced by introduction of gold
impurities into the junction diode by diffusion. The gold dopant, sometimes called a life time
killer, increases the recombination rate and removes the stored minority carriers. This technique
is used to produce diodes and other active devices for high speed applications.
University Question
1. (a) Write short note on the following. (11m) (NOV/DEC-2014)
(i)Diode switching time (ii) Transition and diffusion capacitance
2. Write short notes on diode switching characteristics. (11)

1.12 ZENER DIODE

 Zener diode is a heavily doped PN junction diode.

 Depletion layer is very thin (due to heavy doping).

 Junction electric field is strong therefore lower applied reverse voltage is enough to
cause the breakdown. This is called as Zener breakdown.
 Zener breakdown is sharp

Symbol

Fig: 1.21 Circuit symbol

V-I Characteristics

 Forward bias

 Reverse bias
 Bias- applying external voltage

Fig: 1.21 V-I Characteristics of Zener diode

Forward Bias

(Batteries Positive terminal is connected to P type and Negative terminal is connected to

N type)

In forward biased condition Zener diode acts as the ordinary PN junction diode.

 When an external voltage is applied, the holes in the P type material are repelled by the
positive terminal of the battery, and the electrons in the N type material are repelled by
the negative terminal of the battery, which will reduces the width of the depletion region.
Further increase in external voltage above the barrier potential voltage, then the
depletion region gets broken. Holes cross the junction and move towards negative
terminal of the battery and electrons moves towards positive terminal of the battery.

 Due to this movement of charges, produces a high forward current, which is show in the
forward VI characteristics.

Reverse Bias

(Batteries Positive terminal is connected to N type and Negative terminal is connected to

P type)

 At a reverse voltage the electric field in the depletion layer will be strong enough to break
the covalent bonds. This produces extremely large number of electrons and holes and
heavy current flow through the junction causing breakdown. The zener breakdown
voltage depends on the amount of doping.
Application

 In the zener breakdown region voltage across the diode remains constant over a wide
range of current, therefore zener diode can be used as Voltage regulator.
University Questions

1. Discuss the operation and reverse bias characteristics of Zener diode. (5m) (MAY-2015)

2. What is a zener diode? Explain the reverse characteristic of a zener diode?(11m)

(MAY-2015)

3. What is zener diode? Explain how zener diode acts as a voltage regulator.
(4m)(NOV/DEC-2015)

4. How does a zener diode act as a voltage regulator? (MAY-2018)

1.13 BREAKDOWNS IN DIODE

In reverse bias, breakdown of the junction occurs by two mechanisms, they are Zener
Breakdown and Avalanche Breakdown.
Zener Breakdown

Zener breakdown takes place in a heavily doped diode. In a heavily doped diode the
depletion layer will be thin and the electric field in the depletion layer will be high. When a small
reverse bias voltage is applied, a very strong electric field (about 107 V/m) is set up across the
thin depletion layer. This field directly breaks or ruptures the covalent bonds. Now extremely
large number of electrons and holes are produced and the current through the diode increases
rapidly. This mechanism is called Zener Breakdown.

Avalanche Breakdown

Avalanche breakdown takes place in lightly doped diode, whose depletion layer is large
and the electric field across the depletion layer is not so strong to break covalent bond. In the
depletion layer thermally generated minority carriers are accelerated by the electric field. The
minority carriers move with high speed and collide with atoms. Due to the collision covalent
bonds are broken and electron hole pairs are generated. These new carries so produced are
also accelerated by the field and they break more covalent bonds. This forms a cumulative
process is called as avalanche (or flood) multiplication and the current through the diode
increases rapidly. This breakdown is called as avalanche breakdown.

University Question
2 marks
1. How does the avalanche breakdown voltage vary with temperature? (NOV/DEC-2014)
2. Distinguish between avalanche and zener break down. (NOV/DEC-2015)
3. Write the difference between avalanche and zener break down. (MAY-2016)
 UNIT II

BJT and FET

2.1 BIPOLAR JUNCTION TRANSISTOR (BJT)
• Transistor is a two junction, three terminal device.
• Conduction due to both majority and minority charge carriers. (i.e., Bipolar).

Construction

Fig: 2.1 Transistor (a) NPN & (b) PNP

 Transistor is simply a sandwich of one type semiconductor material between two
layers of other type. There are two types of Transistor, they are
o NPN transistor – P type material is sandwich between two layer of N type
material.
o PNP transistor - N type material is sandwich between two layer of P type
material.

Fig: 2.2 Circuit symbol of (a) NPN & (b) PNP Transistor
 Arrowhead should be at the emitter terminal. It indicates the directional of current flow
when emitter base junction is forward biased.

Terminals
Emitter: The main function of this region is to supply majority charge carriers to the
base. Emitter region is more heavily doped when compared with other regions.
Base: The middle section of the transistor is known as base. Base region is very lightly
doped and is very thin as compared to either emitter or collector. It is made very thin to reduce
recombination of charge carriers in the base region.
Collector: The main function of the collector is to collect majority charge carriers
through the base. Collector region is moderately doped. The collector region is made physically
larger than the emitter region. This is due to the fact that collector has to dissipate much greater
power. Due to this difference, collector and emitter are not interchangeable.
Operating Modes
Transistor can be considered as two diodes connected back to back. Consider current
flowing from collector to emitter of an NPN. It is operated in three regions

Fig: 2.3 Graphical representation of different regions with its voltages

• Saturation – The transistor acts like a short circuit. Current freely flows from collector to
emitter. i.e., both collector base and emitter base junction are forward biased
• Cut-off – The transistor acts like an open circuit. No current flows from collector to
emitter. i.e., both collector base and emitter base junction are Reverse biased
• Active - Emitter base junction is Forward biased and collector base junction is Reverse
biased
• Active – Forward Active: The current from collector to emitter is proportional to the
current flowing into the base.
• Active – Reverse Active: Like forward active mode, the current is proportional to the
base current, but it flows in reverse. Current flows from emitter to collector.

2.2 TRANSISTOR BIASING

As shown in fig 2.4, usually the emitter-base junction is forward biased (F.B) and
collector-base junction is reverse biased (R.B). Due to the forward bias on the emitter-base
junction, an emitter current flows through the base into the collector. Though the collector-base
junction is reverse biased, almost the entire emitter current flows through the collector circuit.

Fig: 2.4 Transistor biasing (a) NPN transistor and (b) PNP transistor

2.3 OPERATION OF NPN TRANSISTOR

As shown in fig 2.5, the forward bias applied to the emitter base junction of an NPN
transistor causes a lot of electrons from the emitter region to crossover to the base region. As
the base is lightly doped with P-type impurity, the number of holes in the base region is very
small and hence the number of electrons that combine with holes in the P-type base region is
also very small. Hence a few electrons combine with holes to constitute a base current IB. The
remaining electrons (more than 95%) crossover into the collector region to constitute a collector
current IC. Thus the base and collector current summed up gives the emitter current, i.e.

Fig: 2.5 Current in NPN transistor

In the external circuit of the NPN bipolar junction transistor, the magnitudes of the
emitter current IE, the base current IB and the collector current IC are related by

University Questions
1. Draw the circuit diagram of a common base NPN transistor circuit and explain the input
and output characteristics of common base connection. (11m) (MAY-2015)

2.4 OPERATION OF PNP TRANSISTOR

As shown in fig 2.6, the forward bias applied to the emitter-base junction of a PNP
transistor causes a lot of holes from the emitter region to crossover to the base region as the
base is lightly doped with N-type impurity. The number of electrons in the base region is very
small and hence the number of holes combined with electrons in the N-type base region is also
very small. Hence a few holes combined with electrons to constitute a base current IB. The
remaining holes (more than 95%) crossover into the collector region to constitute a collector
current Ic. Thus the collector and base current when summed up gives the emitter current, i.e.

Fig: 2.6 Current in PNP transistor

In the external circuit of the PNP bipolar junction transistor, the magnitudes of the emitter
current IE, the base current IB and the collector current Ic are related by

This equation gives the fundamental relationship between the currents in a bipolar
transistor circuit. Also, this fundamental equation shows that there are current amplification
factors α and β in common base transistor configuration and common emitter transistor
configuration respectively for the static (D.C) currents, and for small changes in the currents.

2.5 TRANSISTOR CURRENT COMPONENTS

In the fig 2.7 shown the various components which flow across the forward-based emitter
junction and the reverse-biased collector junction. The emitter current IE consists of hole current
IpE (holes crossing from the emitter into base) and electron current I nE (electron crossing from
base into the emitter).The ratio of hole to electron currents, IpE / InE, crossing the emitter junction
is proportional to the ratio of the conductivity of the p material to that of the n material. In the
commercial transistor the doping of the emitter is made much larger than the doping of the
base. This future ensures (in a p-n-p transistor) that the emitter current consists almost entirely
of the holes. Such a situation is desired since the current which results from electrons crossing
the emitter junction from base to emitter does not contribute carriers which can reach the
collector.
Not all the holes crossing the emitter junction JE reach the collector junction Jc because
some of them combine with the electrons in the n – type base. If Ipc is the hole current at Jc,
there must be a bulk recombination current IpE - IpC leaving the base, as indicated in figure.
(actually, electrons enter the base region through the base lead to supply those charges which
have been lost by recombination with the holes injected into the base across JE).

Fig: 2.7 Transistor current components

If the emitter were open-circuited so that IE = 0, then IpC would be zero. Under these
circumstances, the base and collector would act as a reverse-biased diode, and the collector
current Ic would equal the reverse saturation current ICO. If IE ≠ 0, then, from figure, we note that
Ic = Ico - IpC
For a p-n-p transistor, Ico consists of holes moving across Jc from left to right (base to
collector) and electrons crossing Jc in the opposite direction. Since the assumed reference
direction for Ico in figure is from right to left, then for a p-n-p transistor, Ico is negative. For an n-p-
n transistor, Ico is positive.
Emitter Efficiency:- (γ)
The emitter, or injection, efficiency  is defined as
current of injected carriers at emitter junction

Total emitter current
I pE

I pE  InE

Where IpE is the injected hole diffusion current at emitter junction and InE is the injected
electron diffusion current at emitter junction.
Transport Factor:- (β)
The transport factor β is defined as
Injected carrier current at the collector junction

Injected carrier current at the emitter junction

I pC

I pE
Large – signal current Gain:- (α)
We define the ratio of the negative of the collector-current increment to the emitter-
current change from zero (cutoff) to IE as the large-signal currant gain of a common-base
transistor, or
α = - (Ic – Ico)/ IE
since Ic and IE have opposite signs, then α, as defined, is always positive Typical numerical
values of α lie in the range of 0.90 to 0.995.
α = IpC / IE
= (IpC / IpE ). (IpE / IE)
α=βγ

2.6 GENERAL TRNSISTOR EQUATION

In the active region of the transistor, the emitter is forward biased and the collector is
reverse biased. The generalized expression for collector current IC for collector junction voltage
VC and emitter current IE is given by

If VC is negative and | VC | is very large compared with VT, then the above equation
reduces to

If VC, i.e. VCB, is few volts, IC is independent of VC. Hence the collector current Ic is
determined only by the fraction α of the current IE flowing in the emitter.
Relation among IC, IB and ICBO
If VC is negative and | VC | is very large compared with VT, then the above equation
reduces to

since IC and IE are flowing in opposite directions,

2.6.1 RELATION AMONG IC, IB AND ICEO
In this CE configuration of the transistor, the collector current Ic is the sum of the part of
the emitter current IE that reaches the collector, and the collector-emitter leakage current ICEO.
Therefore, the part of IE, which reaches collector is equal to

Hence, the large-signal current gain (β )is defined as,

From the equation, we have

2.6.2 RELATION BETWEEN ICBO AND ICEO

Comparing the IC, we get the relationship between the leakage currents of transistor
common-base (CB) and common-emitter (CE) configurations as

From this equation, it is evident that the collector-emitter leakage current (ICEO) in CE
configuration is (1+ ) times larger than that in CB configuration. As I CBO is temperature-
dependent, ICEO varies by large amount when temperature of the junctions changes.

2.6.3 EXPRESSION FOR EMITTER CURRENT

The magnitude of emitter-current is

substituting IC in the above equation, we get

substituting , we have

2.6.4 DC current gain ( dc or hFE)

The d.c. current gain is defined as the ratio of the collector current Ic to the base current
I B.

As IC is large compared with ICEO, the large signal current gain and the d.c. current gain
(hFE) are approximately equal.
2.7 TYPES OF CONFIGURATION
Depending upon the common terminal between the input and output of the transistor,
three configurations are classified. They are: (i) Common base (CB) configuration, (ii) common
emitter (CE) configuration, and (iii) common collector configuration.

(i) (CB) configuration

This is also called grounded base configuration. In this configuration, emitter is the input
terminal, collector is the output terminal and base is the common terminal.

(ii) (CE) configuration

This is also called grounded emitter configuration. In this configuration, base is the input
terminal, collector is the output terminal and emitter is the common terminal.

(iii) (CC) configuration

This is also called grounded collector configuration. In this configuration, base is the
input terminal, emitter is the output terminal and collector is the common terminal.

Fig: 2.8 Transistor configuration: (a) Common Base, (b) Common Emitter & (c) Common
Collector

2.8 CB CONFIGURATION
The circuit diagram for determining the static characteristics curves of an NPN transistor
in the common base configuration is shown in fig 2.9

Fig: 2.9 Circuit to determine CB static characteristics

Input Characteristics
To determine the input characteristics, the collector-base voltage VCB is kept constant
at zero volt and the emitter current IE is increased from zero in suitable equal steps by
increasing VEB. This is repeated for higher fixed values of VCB. A curve is drawn between
emitter current IE and emitter-base voltage VEB at constant collector-base voltage VCB. The
input characteristics thus obtained are shown in fig

Fig: 2.10 CB Input Characteristics

When VCB is equal to zero and the emitter-base junction is forward biased as shown in
the fig 2.10 characteristics, the junction behaves as a forward biased diode so that emitter
current IE increases rapidly with small increase in emitter-base voltage VEB. When VCB is
increased keeping VEB constant, the width of the base region will decrease. This effect results in
an increase of IE. Therefore, the curves shift towards the left as VCB is increased.

Output Characteristics
To determine the output characteristics, the emitter current IE is kept constant at a
suitable value by adjusting the emitter-base voltage VEB. Then VCB is increased in suitable equal
steps and the collector current IC is

Fig: 2.11 CB Output Characteristics

Noted for each value of IE. This is repeated for different fixed values of IE, Now the
curves of Ic versus VCB are plotted for constant values of IE and the output characteristics thus
obtained is shown in Fig. 2.11
From the characteristics, it is seen that for a constant value of IE, IC is independent of VCB
and the curves are parallel to the axis of VCB. Further, Ic flows even when VCB is equal to zero.
As the emitter-base junction is forward biased, the majority carriers, i.e. electrons, from the
emitter are injected into the base region. Due to the action of the internal potential barrier at the
reverse biased collector-base junction, they flow to the collector region and give rise to Ic even
when VCB is equal to zero.
University Questions
. 1. Explain the characteristics and working of CB with circuit diagram. Compare CE,CB and CC
amplifier interms of input impedance, output impedance , voltage gain and current gain.(DEC-
2016)

2.8.1 EARLY EFFECT OR BASE-WIDTH MODULATION

As the output voltage Vcc increased, the collector base junction is more reverse biased,
therefore the depletion layer width at the collector junction increases, which reduces the
effective width of the base. This dependency of base-width on collector-to-emitter voltage is
known as the Early effect.
This decrease in effective base-width has three consequences:
(i) There is less chance for recombination within the base region. Hence, α increases with
increasing |VCE|.
(ii) The charge gradient is increased within the base, and consequently, the current of minority
carriers injected across the emitter junction increases,
(iii) For extremely large output voltage, the effective base-width may be reduced to zero, causing
voltage breakdown in the transistor. This phenomenon is called the punch through or Reach
through.
For higher values of VCB, due to Early effect, the value of α increases. For example, α
changes, say from 0.98 to 0.935. Hence, there is a very small positive slope in the CB output
characteristics and hence the output resistance is not zero.

University Question
1. What is early effect? (NOV/DEC-2014)

2.8.2 THERMAL RUN AWAY

Flow of collector current produces heat in the collector junction which increases the
reverse saturation current ICO, again the IC increases. This process goes in cumulative way, the
heat at the junction increases and burns the transistor. The process of self-destruction of
transistor is called Thermal
Run Away.

2.9 TRANSISTOR PARAMETERS

The slope of the CB characteristics will give the following four transistor parameters.
Since these parameters have different dimensions, they are commonly known as common base
hybrid parameters or
h-parameters.

(I) Input impedance (hib). It is defined as the ratio of the change in (input) emitter
voltage to the change in (input) emitter current with the (output) collector voltage VCB kept
constant. Therefore,
 (ii) Output admittance (hob): It is defined as the ratio of change in the (output)
collector current to the corresponding change in the (output) collector voltage with the (input)
emitter current IE kept constant. Therefore,

(iii)Forward current gain (hfb): It is defined as a ratio of the change in the (output)
collector current to the corresponding change in the (input) emitter current keeping the (output)
collector voltage VCB constant. Hence,

(iv) Reverse voltage gain (hrb): It is defined as the ratio of the change in the (input)
emitter voltage and the corresponding change in (output) collector voltage with constant (input)
emitter current, IE.

2.10 CE CONFIGURATION
Input characteristics
To determine the input characteristics, the collector to emitter voltage is kept constant at
zero volt and base current is increased from zero in equal steps by increasing VBE in the circuit
shown in Fig. 2.12.

Fig: 2.12 Circuit to determine CE static characteristics

The value of VBE is noted for each setting of IB. This procedure is repeated for higher
fixed values of VCE, and the curves of IB Vs. VBE are drawn. The input characteristics thus
obtained arc shown in Fig. 2.13

When VCE =0, the emitter-base junction is forward biased and the junction behaves as a
forward biased diode. Hence the input characteristic for VCE = 0 is
 Fig: 2.13 CE Input Characteristics

Similar to that of a forward-biased diode. When VCE is increased, the width of the
depletion region at the reverse biased collector-base junction will increase. Hence the effective
width of the base will decrease. This effect causes a decrease in the base current I B. Hence, to
get the same value of IB as that for VCE = 0, VBE should be increased. Therefore, the curve shifts
to the right as VCE increases.

Output characteristics
To determine the output characteristics, the base current IB is kept constant at a suitable
value by adjusting base-emitter voltage, VBE. The magnitude of collector-emitter voltage VCE is
increased in suitable equal steps from zero and the collector current Ic is noted for each setting
VCE.

Fig: 2.14 CE Output Characteristics

For larger values of VCE, due to early effect, a very small change in α is reflected in a very large
change in β. For example, when α=0.98 , β = 49. If α increases to 0.985, then β = 66. Here, a
slight increase in α by about 0.5 results in an increases in by β about 34%.Hence, the output
characteristics of CE configuration show a larger slope when compared with CB Configuration.
The output characteristics have three regions, namely, saturation region, cutoff region
and active region. The region of curves to the left of the line OA is called the saturation region
(hatched), and the line OA is called the saturation line. In this region, both junctions are forward
biased and an increase in the base current does not cause a corresponding large change in Ic.
The ratio of VCE(sat) to IC region is called saturation resistance,
 The region below the curve for IB = 0 is called the cut-off region (hatched). In this region,
both junctions are reverse biased. When the operating point for the transistor enters the cut-off
region, the transistor is OFF. Hence, the collector current becomes almost zero and the
collector voltage almost equals Vcc, the collector supply voltage. The transistor is virtually an
open circuit between collector and emitter
The central region where the curves are uniform in spacing and slope is called the active
region (unhatched). In this region, emitter-base junction is forward biased and the collector-base
junction is reverse biased. If the transistor is to be used as a linear amplifier, it should be
operated in the active region,
If the base current is subsequently driven large and positive, the transistor switches into
the saturation region via the active region, which is traversed at a rate that is dependent on
factors such as gain and frequency response. In this ON condition, large collector current flows
and collector voltage falls to a very low value, called VCEsat, typically around 0.2 V for a silicon
transistor, the transistor is virtually a short circuit in this state.
High speed switching circuits are designed in such a way that transistors are not allowed
to saturate, thus reducing switching times between ON and OFF times.
Transistor parameters

The slope of the CE characteristics will give the following four transistor parameters.
Since these parameters have different dimensions, they are commonly known as common
emitter hybrid parameters or h-parameters,
(i) Input impedance (hie): It is defined as the ratio of the change in (input) base voltage
to the change in (input) base current with the (output) collector voltage VCE kept constant.
Therefore,

(ii) Output admittance (hoe): It is defined as the ratio of change in the (output) collector
current to the corresponding change in the (output) collector voltage with the (input) base
current IB kept constant. Therefore,

(iii) Forward current gain (hfe). It is defined as a ratio of the change in the (output)
collector current to the corresponding change in the (input) base current keeping the (output)
collector voltage VCE constant. Hence,

(iv) Reverse voltage gain (hre): It is defined as the ratio of the change in the (input)
base voltage and the corresponding change in (output) collector voltage with constant (input)
base current, IB. Hence,

University Question
1. Explain the principle of transistor action in CE configuration. Also discuss in detail its
input and output characteristics. (11m) (NOV/DEC-2015)
2. Explain the working of a NPN transistor in detail along with its characteristics in CE
 configuration. (NOV -2017)
3. Write detailed notes on common –emitter configuration with necessary diagrams(MAY-
2017)
4. Explain the input and output characteristics of common emitter configuration with the
help of diagram.
(MAY-2018)

2.11 CC CONFIGURATION
The circuit diagram for determining the static characteristics of an NPN transistor in the
common collector configuration is shown in fig. 2.15.

Fig: 2.15 Circuit to determine CC static characteristics

Input characteristics
To determine the input characteristics, VEC is kept at a suitable fixed value. The base-
collector voltage VBC is increased in equal steps and the corresponding increase in IB is noted.
This is repeated for different fixed values of VEC. Plots of VBC versus IB for different values of
VEC shown in Fig. 2.16 are the input characteristics.

Fig: 2.16 Input Characteristics

Output characteristics
The output characteristics are the same as those of the common emitter configuration.
 2.12 COMPARISON

Property CB CE CC

Input resistance Low (about 100 R) Moderate (about 750 R) High (about 750 KR)
Output resistance High (about 450 KR) Moderate (about 45 KR) Low (about 25 R)
Current gain 1 High High
Voltage gain About 150 About 500 Less than 1
Phase shift between 0 or 360o 180o 0 or 360o
input & output voltages
For high frequency For audio frequency
Applications
circuits circuits For Impedance
Matching
Current amplification
factor=(output current) /
(input current)

RELATIONSHIP BETWEEN α AND β

We know that ΔI E = ΔI C +ΔIB
By definition, ΔI C = α ΔIE
Therefore, ΔI E = αΔ I E + ΔIB
i.e. IB = I E (1−α)
Dividing both sides by IC , we get

Therefore,
β= α β 1 1
1−α and α = 1+ β , or α − β = 1

From this relationship, it is clear that as α approaches unity, β approaches infinity. The
CE configuration is used for almost all transistor applications because of its high current
gain,β

RELATIONSHIP AMONG α, β AND γ:

In the CC transistor amplifier circuit, IB is the input current and IE is the output current.
ΔIE
Current amplification factor for CC configuration is γ = ΔIB , substituting ΔI B = I E − IC ,

IE
γ=
I E − IC
 Dividing the numerator and denominator on RHS by
ΔIE

Therefore

University Questions
a) Explain why CE configuration is popular in amplifier circuits? (6m)
(NOV/DEC-2014)
b) Compare all the three configurations of a BJT in terms of their
circuit parameters. (5m) (NOV/DEC- 2014)

Application of Transistor
 Transistor can be used as voltage and current amplifier.
 Transistor can be used in impedance matching.
 Transistor can be used as switch.
2.14 FIELD EFFECT TRANSISTORS
FET is a device in which the flow of current through the conducting region is controlled
by an electric field. Hence it is called as Field Effect Transistor (FET).
Current conduction is only by majority carrier, therefore it is called as unipolar junction
transistor. Based on construction, it is classified into two types
• Junction Field Effect Transistor (JFET)
• Metal Oxide Semiconductor Field Effect Transistor (MOSFET) or Insulated
Gate FET
(IGFET) or Metal Oxide Silicon Transistor (MOST).
Advantages of FET:
• FET is a unipolar device, the current conduction is by majority carriers only.
Transistor is a bipolar device, the current conduction is by both majority and
minority carriers.
• FET has thermal stability.
• Input impedance is very high
• FET is less noisy
• FET is immune to radiation
• FET can be operated in wide range of frequencies
• Fabrication of FET in IC is simpler and occupy less space.
Disadvantages of FET
• The gain of the FET amplifier is low.
• The gain bandwidth product is relatively small.

2.15 JFET (JUNCTION FIELD EFFECT TRANSISTOR)

JFET has three terminals source, drain and gate.

Source is the terminal through which majority carriers enter into the JFET.
Drain is the terminal through which majority carriers leave the JFET.
Gate is the terminal used to control the flow of majority carriers through
JFET. Depends on the type of material used in the gate region, JFET is
classified into two types
• N Channel JFET
• P Channel JFET

Fig: 2.18 Structure of (a) N channel JFET, (b) P channel JFET

 Fig: 2.19 Symbol of (a) N channel JFET, (b) P channel JFET
• Arrow head indicates the direction of current flow.

2.16 OPERATION OF N CHANNEL JFET

Fig: 2.20 Operation of N channel JFET

The gate junction is reverse biased by the battery VGS. The positive terminal of the
battery VDS is connected to drain D and the negative terminal to source S. Through the
channel, electrons move from the source to the drain. The current due to electrons is drain
current (ID).
For a fixed value of VDS, as the gate source reverse voltage VGS is increased the
depletion layer width at the gate junction increases. The increases in the depletion layer width
decreases the channel width and the area for the electrons movement. In JFET the drain
current ID depends on the gate source reverse voltage VGS.Static Characteristics
 Fig: 2.21 Drain characteristics of N channel JFET
The graph between drain source voltage VDS and drain current ID for a constant gate
source voltage VGS is called static characteristics of JFET, it is also know as drain
characteristics.
For plotting static characteristics, gate source voltage VGS is kept constant, the change in
drain current ID is noted for change in drain source voltage VDS. The variation of ID with VDS for
different constant values of VGS can be obtained and plotted on a graph.
When VGS=0, the entire width of the channel is available for the movement of electrons.
When VDS is zero the drain current ID is also Zero.
Graph shows three regions of operation.
Ohmic region:
As VDS is increases from zero the drain current ID also increases. The N type
semiconductor acts as a resistor. VDS and ID follow ohms law up to the point A. From zero to the
point A the region is called ohmic region. In ohmic region there exist a linear relationship
between VDS and ID.
Non Linear Region:
As VDS is increased, the voltage drop through the semiconductor bar. It is VDS at the
drain and decreases towards source and become zero at the source. The voltage drop in the
semiconductor bar revere biases the junction, the depletion layer width at the junction
increases. The voltage near drain is higher than the voltage at source; therefore the gate
reverse biased less. Because of this the depletion layer width is more near the drain terminal.
Now if the voltage VDS from point A is increased, the drain current ID, increases at reverse
square law rate up to the point B. the region from A to B is called the nonlinear region.
Pinch off Region:
At the point B the channel is almost blocked by the depletion layer. Now the increase in
drain current ID is not possible. The drain current ID reaches saturation and it remain constant up
to point C. the drain source voltage VDS, at which the channel is pinched off (the channel is
almost blocked and current remain constant) is called Pinch off voltage VP. The region over
which the current remain constant is called pinch off or saturation region. In this region a JFET
acts as a constant current device.

Where IDSS = Drain current when VGS=0.

VGS = voltage between gate and source.
VP = pinch off voltage.
Breakdown
After pinch off, if the voltage is increases beyond the point C avalanche breakdown of
the reverse biased gate junction will occur and the current increases abruptly.
When the negative reverse bias voltage at the gate is increases, the resulting VDS-ID
curve is similar to VGS=0 curve but
• The ohmic region is decreased
• Pinch off occurs for lower values of voltage and
• Avalanche breakdown occurs for lower values of VDS.
Transfer characteristics
The graph between gate source VGS and drain current ID for a constant drain source
voltage VDS is called transfer characteristics of JFET.
Drain current equation, is
 Fig: 2.22 Transfer characteristics of N channel JFET

When VGS=0, the drain current ID=IDSS. As VGS is increased, the channel width decreases
and hence the drain current decreases. When VGS=VP the current width become zero and the
drain current ID become zero. The source voltage at which the drain current become zero is
called VGS(off) voltage.

University Question
1. Explain the construction and operation of N-channel JFET. Discuss its characteristics.
(11m)(NOV/DEC-2015)
2. Explain the construction and working of n-channel J-FET.(11m)(MAY-2016)
3. With a neat diagram ,explain the operation of JFET with its characteristics(MAY-2018)

2.17 OPERATION OF P CHANNEL JFET

The gate junction is reverse biased by the battery VGS. The negative terminal of the
battery VDS is connected to drain D and the positive terminal to source S. through the channel,
holes move from the source to drain. The current due to holes is drain current ID.
For a fixed value of VDS, as the gate source reverse voltage VGS is increased the
depletion layer width at the gate junction increases. The increase in the depletion layer width
decreases the channel width and the area for the holes movement. In JFET the drain current I D
depends on the gate source reverse voltage VGS.
 Fig: 2.23 Operation of P channel JFET
Characteristics
Drain and transfer characteristics of P channel JFET is same as N channel JFET except
the reverse in VDS and VGS polarity.

2.18 FET PARAMETERS

 DC drain Resistance
 AC drain Resistance
 Transconductance
 Amplification Factor

DC Drain Resistance (RDS)

This is the static or ohmic resistance of the channel. It is given by

AC Drain Resistance (rD)

AC resistance between drain and source terminals when FET is operating in the Pinch-
off region.

Transconductance or Mutual Conductance (gm)

It is the measure of control of gate voltage over drain current

It is the slope of transfer characteristic.

Amplification Factor (µ)

The relation among ac drain resistance, transconductance and amplification factor is

given by
µ = rd × gm
µ
University Questions
1. Explain the operation and VI characteristics of JFET. (11m) (NOV/DEC-2014)
2.19 METAL OXIDE SEMICONDUCTOR FIELD EFFECT TRANSISTOR (MOSFET
or IGFET) There are two types of MOSFET, they are
• Enhancement MOSFET
• Depletion MOSFET

2.20 ENHANCEMENT MOSFET

In enhancement MOSFET, the drain current is increased by the gate voltage.
Construction
The N channel MOSFET consist of a lightly doped P type substrate. Two heavily doped
N+ regions are formed into the substrate.

Fig: 2.24 N channel Enhancement MOSFET

One N+ region acts as source S and another N+ region acts as drain D. A thin layer of
Silicon dioxide (SiO2) is grown over the surface, and holes are made in the oxide layer to form
metal contacts with source and drain. The region between the N+ source and drain is called
Channel. The gate metal contact G is made on the SiO2 layer, above the channel. The gate
metal and the channel act as the two plates of a parallel plate capacitor and the SiO 2 layer acts
as the dielectric.

OPERATION
The channel is lightly doped P type semiconductor, its resistance is high therefore
electrons cannot move freely from source to drain. When a Positive voltage is applied at the
gate, it induces negative charges in the channel.
These induced negative charge are called inversion layer. Now the channel has
electrons as carriers, therefore the conductivity of the channel increases and electrons flow from
source to drain. Thus the drain current is increased (enhanced) by the gate voltage.

Fig: 2.25 Operation of N channel Enhancement MOSFET

Symbol

Fig: 2.26 Symbol of Enhancement N channel and P channel MOSFET

Drain characteristics
The graph between drain source voltage VDS and drain current ID for a constant gate
source voltage VGS is called the drain characteristics of MOSFET. For plotting drain
characteristics, gate source voltage VGS is kept constant, the change in drain current ID is noted
for change in drain source voltage VDS. The variation of ID with VDS for different constant value of
VGS can be obtained and plotted on a graph.

Fig: 2.27 Drain characteristics

When VGS is zero, the drain current is zero. When VGS is made positive, drain current
increases.

Transfer characteristics
The graph between gate source voltage VGS and drain current ID for a constant drain and
source voltage VDS is called the transfer characteristics of MOSFET.
For a fixed drain source voltage VDS voltage, when VGS is zero or negative, very small
saturation current flow through the MOSFET, called IDSS. When VGS is increased above zero, the
drain current, remain at IDSS for small values of VGS. Above the gate source threshold voltage
VGST the current increases rapidly.
N channel enhancement MOSFET cannot be operated with gate voltage negative
(depletion
mode).
 Fig: 2.28 Transfer characteristics
University Question
1. Explain the construction and working of N-channel enhancement MOSFET and discuss
characteristics.(DEC-2016)

2.21 DEPLETION MOSFET

In depletion MOSFET, the drain current can be increased or decreased by the gate
voltage.
Construction
The N channel depletion MOSFET consist of a lightly doped P type substrate. Two
heavily doped N+ regions are formed into the substrate.

Fig: 2.29 N channel Depletion MOSFET

One N+ region acts as source S and another N+ region acts as drain D. A lightly doped
N type channel is formed between source and drain. A thin layer of silicon dioxide (SiO 2) is
grown over the surface, and holes are made in the oxide layer to form metal contacts with
source and drain. The gate metal contact G is made on the SiO 2 layer, above the N type
channel. The gate metal and the channel act as the two plates of a parallel plate capacitor and
the SiO2 layer act as the dielectric.

Operation
The channel is lightly doped N type semiconductor, therefore electrons can move from
source to
drain.
Enhancement mode
When a positive voltage is applied at the gate, it induces negative charges in the
channel, therefore the conductivity of the channel increases and more electrons flow from
source to drain. Thus the drain current is increases (enhanced) by the positive gate voltage.

Fig: 2.30 N channel depletion MOSFET with Negative Gate Voltage

University Question
1. Explain the construction and operation of E-MOSFET. (11m) (MAY-2015)

Depletion Mode
When the gate voltage is negative, it induces positive charges in the channel. The
induced positive charges reduce the conductivity of the channel (prevent the movement of
electrons from source to drain); therefore the drain current decreases for negative gate voltage.

Symbol

Fig: 2.31 Symbol of Depletion N channel and P channel MOSFET

Drain Characteristics
The graph between drain source voltage VDS and drain current ID for a constant gate
source voltage VGS is called the drain characteristics of MOSFET.
For plotting drain characteristics, gate source voltage VGS is kept constant, the change in
drain current ID is noted for change in drain source voltage VDS. The variation of ID with VDS for
different constant values of VGS can be obtained and plotted on a graph.
 Fig: 2.32 Drain characteristics
When VGS is zero, small drain current flow through the MOSFET. When VGS is made
positive, drain current is increases. When VGS is made negative, the drain current is decreases.

Transfer Characteristics
The graph between gate source voltage VGS and drain current ID for a constant drain and
source voltage VDS is called the transfer characteristics of MOSFET.
For a fixed VDS voltage, when VGS is zero small drain current flow through the MOSFET.
When VGS is increased above zero, the drain current is also increased. When VGS is reduced
below zero, the drain current decreases and reaches zero. The gate source voltage VGS at
which the drain current become zero is called VGS(off), at this voltage the current is completely
occupied by the positive charges, therefore electrons cannot move from source to drain.

Fig: 2.33 Transfer Characteristics

N channel depletion MOSFET can be operated with gate voltage negative (depletion
mode) and with gate voltage positive (enhancement mode).