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SRAM Dynamic Stability: Theory, Variability and Analysis: Wei Dong Peng Li Garng M. Huang

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13 views8 pages

SRAM Dynamic Stability: Theory, Variability and Analysis: Wei Dong Peng Li Garng M. Huang

phase shift manifestation of graphene

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tanuj_sharma1991
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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SRAM Dynamic Stability: Theory, Variability and Analysis

Wei Dong Peng Li Garng M. Huang


Department of ECE Department of ECE Department of ECE
Texas A&M University Texas A&M University Texas A&M University
College Station, TX 77843 College Station, TX 77843 College Station, TX 77843
weidong@neo.tamu.edu pli@neo.tamu.edu ghuang@neo.tamu.edu

ABSTRACT It is important to note that stability occupies a central


Technology scaling in sub-100nm regime has significantly role in SRAM operations. While the stability in standby
shrunk the SRAM stability margins in data retention, read or hold implies proper data retention under SEUs and noise
and write operations. Conventional static noise margins injection, stabilities in read and write correspond to non-
(SNMs) are unable to capture nonlinear cell dynamics and destructive reads and successful writes, respectively. How-
become inappropriate for state-of-the-art SRAMs with shrink- ever, the widely used static noise margins (SNMs) [5] cannot
ing access time and/or advanced dynamic read-write-assist capture the fundamental nonlinear dynamics upon which
circuits. Using the insights gained from rigorous nonlin- SRAM cells operate. Although simple to obtain, SNMs as-
ear system theory, we define the much needed SRAM dy- sume the DC operation condition and are used with the
namic noise margins (DNMs). The newly defined DNMs assumption that timing events have infinite time duration.
not only capture key SRAM nonlinear dynamical character- Due to the intrinsic complexity, dynamic noise margins are
istics but also provide valuable design insights. Furthermore, researched to a much less extent. In many ways, they may
we show how system theory can be exploited to develop not have been defined rigorously. However, dynamic stabil-
CAD algorithms that can analyze SRAM dynamic stabil- ity metrics are strongly desirable because of the following
ity characteristics three orders of magnitude faster than a reasons. SEU and noise induced soft error analysis requires
brute-force approach while maintaining SPICE-level accu- an understanding of the duration, amplitude, and charge
racy. We also demonstrate a parametric dynamic stability of the injected noise and their interactions with the non-
analysis approach suitable for low-probability cell failures, linear SRAM cell dynamics. Practically, reads and writes
leading to three orders of magnitude runtime speedup for behave in an increasingly dynamic fashion in state-of-the-
yield analysis under high-sigma parameter variations. art SRAM designs with shrinking access cycle time and/or
read-write-assist circuitry [3, 15]. In the latter case, well
timed wordline pulses and write schemes are employed to
1. INTRODUCTION enhance the read and write margins. Successful reads and
Static random access memories (SRAMs) provide indis- writes depend on precise timing control where the nonlinear
pensable on-chip data storage and continue to dominate the dynamics of SRAM cells plays a critical role. In design, bal-
silicon area in many applications. It is projected that more ance must be made between conflicting static and dynamic
than 90% of silicon real estate will be occupied by SRAM stability margins in hold, read and write while considering
in the future [1]. However, technology scaling in sub-100nm their variability.
regime has significantly shrunk SRAM stability margins in In this work, we start by developing an understanding on
data retention (standby mode), read and write [1–3]. At the the basic nonlinear dynamics of SRAM cells using rigorous
same time, the susceptibility to single event upsets (SEU) nonlinear system theory. In particular, we employ the no-
induced soft errors continues to cause concerns [4]. tion of stability boundary, or separatrix [16,17], and show its
The SRAM performance and its variability have been ex- central role in determining SRAM dynamic stability. Using
tensively studied in the past [5–9]. In [2, 10], either simu- separatrix, new dynamic noise margins (DNMs), in a way
lation based first-order models or closed-form performance relevant to basic SRAM operations, are defined. The new
models using simple transistor models are employed to de- DNMs not only characterize the fundamental system charac-
rive SRAM statistical performance distributions. Mixture teristics behind SRAM operations, but also provide valuable
important sampling is applied to speedup Monte-Carlo simu- design insights by connecting dynamic stability with key de-
lation to more efficiently capture rare failure events [11]. The sign parameters. Interestingly, the conventional SNMs are
same objective is approached by combining extreme value special cases of our more general DNMs.
statistics theory and data filtering in [12]. Euler-Newton To embody our system concepts and DNM metrics into a
curve tracing is proposed to find the boundary between the practical CAD tool with SPICE-level accuracy, we show how
success and failure regions for read access time yield analysis efficient system-theoretically motivated CAD algorithms can
in [13]. A semi-analytical SRAM dynamical stability model be developed. By exploiting nonlinear system theory, a fast
is proposed in [14], where approximated circuit equations separatrix tracing algorithm for SRAM cells under device
based on simple device models are solved in time domain. mismatch is developed. The entire separatrix can be ef-
The use of piecewise linearization of circuit equations, how- ficiently computed by running two special transistor-level
ever, can lead to inaccuracy and the challenging issue of transient simulations, achieving three orders of magnitude
process variations is not addressed.
speedup over the brute-force approach. With this as a ba- Without loss of generality, the simple 2D case (N = 2) is
sis, we further present a parametric DNM analysis approach, focused to simplify the visual presentation. As a nonlinear
which for a given DNM performance target identifies the dynamical system, a cell has three equilibria, which satisfy
acceptance regions in the parameter space. The approach
f (xe ) = 0. (2)
employs Newton method based acceleration and allows for
efficient dynamic stability yield analysis over wide range Two of them are stable and denoted as xse ,
corresponding to
of parametric variations, speeding up expensive high-sigma the zero and one states of the cell. The third one, denoted
Monte-Carlo simulation by three orders of magnitude. as xue , is unstable and also referred to as the saddle. The
stable manifold of an equilibrium xe is defined as [16]
2. BACKGROUND
W s (xe ) = {x ∈ RN | lim φ(t, x) = xe }, (3)
Conventional SNMs in hold and read are shown in Fig. 1. t→∞
In hold, the conventional static noise margin (SNM) is deter- where φ(t, x) is the state trajectory that starts from x and
mined as the side of the largest square that can be inscribed converges to xe .
between the mirrored DC voltage transfer curves (VTCs) of
V2 (Vdd, Vdd) V2 Stable equilibrium (Vdd, Vdd)
the cross-coupled inverters [5]. This measure corresponds to Stable equilibrium
the largest differential voltage noise that can be tolerated at instable
the two storage nodes. SNM in read can be defined similarly instable
equilibrium Separatrix
equilibrium
by including the two access transistors as part of the inverter
pair VTCs. SNM in read represents the largest DC voltage
perturbation that can be tolerated without a state flip, or
a destructive read. During write, one bit line is discharged
and the other is pre-charged. The two inverter VTCs do (0,0) Stable equilibrium V1 (0,0) Stable equilibrium V1
not form any enclosed region. SNM in write is found by Symmetric SRAM Cell SRAM Cell w/ Mismatch
inscribing the largest square in between the two VTCs. To
Figure 3: The separatrix of an SRAM cell: symmet-
Vdd
Vn
hold ric cell vs. cell with mismatch.
WL WL read
To understand SRAM dynamic stability, we consider how
+
-

the SRAM state transits from one stable equilibrium to the


other (i.e. a state flip) under an SEU, read or write event.
+
-

Bit Vn Bit_B The stability region, or region of attraction, of a stable equi-


0 Vdd
librium is defined to be its stable manifold. There exists
Figure 1: Static noise margins in hold and read. a stability region for each stable equilibrium in the state
space of a cell. Starting from any initial state in the sta-
underscore the importance of dynamic stability, we exam-
bility region, the transient SRAM state trajectory will be
ine the correlations between the SNM and our new DNM
attracted towards to the corresponding stable equilibrium.
in hold as outlined in Section 4.3. The results are shown
The boundary between two stability regions, or the sepa-
in Fig. 2. Totally 600 random samples of a 6T SRAM cell
ratrix, splits the entire state space. The importance of the
are taken, where independent Gaussian transistor threshold
separatrix lies in that a state flip will be generated if and only
voltage variations are assumed. No strong correlation be-
if the amplitude and duration of the disturbance to the cell
tween the SNM and DNM is observed. Hence, in practice,
are high and long enough so that the state is pushed away
it is difficult to determine whether a better SNM always cor-
from the initial stable equilibrium to cross the separatrix. In
responds to an improved DNM. The SNM and DNM must
Fig. 3, the separatrix of a symmetric cell is contrasted with
be both analyzed to provide design guidance.
that of an asymmetric cell with device mismatch across the
1
two cross coupled inverters. The vector field (time deriva-
tives of the state variables) is shown by arrowed lines. While
Normalized Static Noise Margin

0.98

0.96
the separatrix of the former is along the well expected 45◦
0.94

0.92
line, the one of the latter is distorted by mismatch.
0.9

0.88

0.86
4. DYNAMIC NOISE MARGINS
0.84
Using the concept of stability boundary, new dynamic
0.82

0.8
noise margins (DNMs) are defined for read, write and hold.
0.65 0.7 0.75 0.8 0.85 0.9 0.95 1
Normalized Dynamic Noise Margin

Figure 2: Correlation between SNM and DNM. 4.1 Dynamic Noise Margin in Read
The read DNM is defined for a given wordline pulse width
3. STABILITY BOUNDARY: SEPARATRIX TR . To obtain the read DNM, the circuit setup correspond-
An SRAM cell can be described using the MNA equations ing to the read operation in Fig. 4 (a) is analyzed. Before
the read starts, the bit and bit-bar lines are modeled as two
d
f (x(t)) + q(x(t)) + u(t) = 0, (1) fully charged line capacitances. Beside the cell being read,
dt other unselected cells in the same column may draw leakage
where x(t) ∈ RN is the vector of nodal voltages and branch currents from either the bit or bit-bar lines depending on the
currents, u(t) ∈ RN is the input, f (·) and q(·) are nonlin- stored value. These leakage contributions can be properly
ear functions describing static and dynamic nonlinearities. modeled and included to capture the inter-cell interaction.
First, the separatrix of the cell in hold, i.e. when the two ac- overwrites the SRAM state, hence producing a state flip.
cess transistors are off, is analyzed (e.g. using the algorithm The cell in write mode is analyzed using the circuit setup in
described in Section 5). Then, starting from an initial zero Fig. 5 (a). One of the bit and bit-bar lines are discharged
or one state, the transient state trajectory of the cell with before the write starts. Hence, the initial voltage of one
the access transistors turned on (Fig. 4 (a)) is simulated. bit/bit-bar line capacitor is set to zero. Similar to the pre-
The time it takes for the trajectory to reach the separatrix vious case, transient analysis is performed to compute the
is denoted as Tacross . As shown in Fig. 4 (b), the read DNM time, Tacross, at which the state trajectory crosses the sep-
is defined as aratrix of the hold mode. For a given wordline pulse width,
TDNM,R = Tacross − TR . (4) TW , the write DNM is defined

This is an appropriate dynamic stability metric as follows. TDNM,W = TW − Tacross . (5)


As the read process proceeds (the access transistors remain …
on), the cell state may be pushed away from its initial state leakage 0 1
towards the separatrix of the cell with the access transistors High Cell Low
off. Note that after the wordline goes off, the read operation VDD TW
TW
ends and the cell returns to hold. Hence, if the trajectory
does indeed go across the separatrix, a state flip will be Initial charge: WL Initial charge:
WL
generated after the access transistors are turned off in hold. QB=VDDCB x2 1 QBB=0
… 0
1 0 leakage CB x1 CBB
High Cell High

TR VDD TR

Initial charge: WL Initial charge: (a)


WL
QB=VDDCB x2 1 QBB=VDDCBB
0
CB x1 CBB V2 Separatrix: access trans. off
Write Margin:
TW - Tacross
Tacross
(a)

V2 Separatrix: access trans. off


TW
Read Margin: V1
Trajectory: access trans. on
Tacross - TR
(b)
TR Figure 5: Write dynamic noise margin: a) circuit
Tacross setup, and b) definition of write DNM.

V1 When TW is set to ∞, our DNM can correctly predict


Trajectory: access trans. on the static write-ability. On the other hand, when TW < ∞,
(b) which corresponds to the normal write operation, however,
the SNM may provide an optimistic estimate for dynamic
Figure 4: Read dynamic noise margin: a) circuit
write-ability. That is, even if the SNM predicts a success-
setup, and b) definition of read DNM.
ful write, in the reality, the write can actually fail. For
The defined read DNM specifies the amount of read oper- the state-of-the-art SRAM designs with short access cycles
ation time margin before read instability takes place. That and advanced read/write timing control circuitry, the dis-
is, when Tacross > TR , there exists a positive margin; when tinctions between the SNMs and DNMs in read and write
Tacross = TR , the cell is on the verge of read instability; reveal the important role of cell nonlinear dynamics in de-
when Tacross < TR , state-flip happens and the cell loses termining dynamic SRAM stability.
read stability. As can be seen, TDNM,R decreases as TR , the
pulse width of the wordline signal, increases. It is easy to 4.3 Dynamic Noise Margin in Hold
see that when TR = ∞, our read DNM will correctly pre- The DNM in hold characterizes the data retention prop-
dict the static read stability, i.e. whether or not the state erty of the cell under SEUs and noisy operating condition.
will be flipped if the duration of the read is infinite. On the Due to the scope limitation, the hold DNM is only briefly
other hand, if the conventional SNM is used to evaluate the introduced. As in Fig. 6, the DNM may be examined by in-
cell read stability when TR < ∞, which corresponds to the jecting a current disturbance into the cell. Compared with
normal read operation, a pessimistic estimate may be pro- the use of noise voltage disturbance in the SNM [5], model-
duced. That is, even if the SNM predicts a state flip, but in ing the disturbance as an injected current more physically
reality, it may not happen. reflects the nonlinear dynamic nature of the cell. The DNM
shall be evaluated by considering both the amplitude and
4.2 Dynamic Noise Margin in Write duration of the current disturbance. Depending on these
The write DNM can be defined in a way analogous to two factors, the state trajectory in hold may cross the sep-
that of the read DNM, but by noting that a successful write aratrix, leading to instability. As in read, the conventional
SNM may provide a pessimistic stability estimate in hold found by integrating the system equations along the direc-
when blindly applied under dynamic noise injection. tion of the stable eigenvector backward in time. Integration
Separatrix:
backward in time prevents the state trajectory to converge
Sep(v1, v2) =0 (v1(T0), v2(T0)) to any of the equilibrium points and enforces the trajectory
V2 to stay on the stability boundary.
The above theoretical results provide a foundation for the
following highly efficient separatrix tracing algorithm.
I0
Algorithm 1 Fast Stable-Manifold Separatrix Tracing
T0 1: Compute the equilibria (xse and xu e ) for the cell;
2: Find the stable eigenvector, us , for the saddle xu e : the stable
eigenvector corresponds to the stable eigenvalue at the saddle;
Transient trajectory V1
3: Choose two initial conditions:
x0{1,2} = xue ± εus , ε is small;
Figure 6: Hold dynamic noise margin.
4: Perform two transient simulations from initial conditions
5. TRACING SEPARATRIX x0{1,2} for the modified dynamical system:
Consider a brute-force approach for finding the separatrix d
in hold as shown in Fig. 7 (a). The entire state space of f (x(t)) − q(x(t)) = 0; (7)
dt
the SRAM cell is sampled using a dense grid. Then, each 5: Output the separatrix as:
grid point is used as an initial condition in transistor-level
transient simulation. Starting from each initial condition,
the SRAM state trajectory may be attracted eventually to ∂A = {x|x = φM (t, x01 ) or φM (t, x02 ), t = [0, Tmax ]}, (8)
one of the stable equilibria, i.e., the sampled point (initial where φM is the state trajectory of the modified system, and
condition) in the state space falls into the stability region of Tmax is the maximum duration of the two transient runs.
the corresponding equilibrium. If a large number of samples
are taken, the separation between points falling into the two The tracing algorithm is illustrated in Fig. 7 (b). In con-
stability regions forms the separatrix. The number of tran- trast to the original system in (1), integration backward in
sient runs required in this approach, however, makes it time time is reflected by negating the differential term in the
consuming. The high cost of the brute-force approach makes modified system in (7). Intuitively, negating the differen-
the statistical dynamic stability analysis, where parameter tial term reverses the vector field, as shown in the dashed
variations are considered, even more difficult. arrow lines in Fig. 7 (b) (compare with the original field in
X2 Stable equilibrium (Vdd, Vdd) X2 Stable equilibrium (Vdd, Vdd)
Fig. 3). Note that along the separatrix, the direction of the
vector field points away from xue . Elsewhere in the state
space, the vector field points towards the separatrix. Since
Separatrix
saddle the two transient simulations do not start from equilibrium
xue , but from a neighborhood of it, the state trajectories
saddle will move. Due to the new vector field, they do not con-
Separatrix verge to the saddle nor the two stable equilibrium points,
but are actually forced to stay on the separatrix, making it
(0,0) Stable equilibrium X1 (0,0) Stable equilibrium X1 possible to efficiently find the entire separatrix by using only
(a) (b) two transient runs. In practice, step 2 of the algorithm can
be bypassed as long as the two initial conditions are per-
Figure 7: Finding the separatrix: a) brute-force turbed from the saddle along opposite directions. Here, the
dense sampling, and b) fast stable-manifold tracing. exact stable eigenvector us is not required since the unsta-
ble components dissipate fast as we integrate backward in
To derive a much more efficient system-theoretical alter-
time [16, 18]. Another practical issue is to find the saddle.
native, denote the stability boundary of the two stability re-
Usually the saddle can be found directly in one DC analy-
gions as ∂A. For SRAM cells, the following stability bound-
sis with suitable choice of the initial guess and convergence
ary theorem exists [16, 17]:
control. We have also found that the saddle could be found
Theorem 1. The separatrix (stability boundary) of the rather reliably through one transient simulation of the mod-
two stable equilibria is the stable manifold of the unstable ified dynamic system (7) starting from an initial condition.
equilibrium (saddle point), i.e.,
6. DYNAMIC STABILITY YIELD
∂A = W s (xue ), (6) The proposed separatrix tracing algorithm enables DNM
where xue is the unstable equilibrium on the boundary of ∂A. analysis through efficient computation of the separatrix, which
is central to dynamic stability. Nevertheless, statistical SRAM
Importantly, Theorem 1 implies that to find the stability analysis via direct Monte-Carlo simulation may be still pro-
boundary, one shall identify the saddle on the stability bound- hibitively expensive. Large SRAM memories may have tens
ary and then find its stable manifold. From the view point of millions of or even more cells. To achieve a good yield for
of Stable Manifold Theory [18], the stable eigenvector of the the entire SRAM system, each SRAM cell must be designed
linearized system at an equilibrium is tangent to its corre- to tolerate wide range of parametric variations such as ran-
sponding stable manifold. This implies that by starting in dom dopant fluctuation induced threshold voltage variation.
a neighborhood of xue , the desired stable manifold can be Cell-level failures are rare events with very low probability
and accurate yield estimate requires a very large number initiated to find a point di at ∂Ωaccept . Then, the tangent
of Monte-Carlo samples. To further improve the efficiency direction, ti , and normal direction, ni , of the acceptance re-
of dynamic stability yield analysis, we proposed a Newton gion boundary are evaluated at di . The search moves over a
method accelerated parametric analysis technique. short distance along ti . To move back to ∂Ωaccept , the search
continues along the new search direct li+1 , which is set to be
6.1 Problem Formulation ni . The procedure repeats till a set of points on ∂Ωaccept are
Without loss of generality, the proposed yield analysis is found. This general principle of acceptance region boundary
described using the read DNM as an example. For a given tracing is similar to the idea in [13]. In our case, however,
wordline pulse width TR and a target read DNM Ttarget , us- the search direction adaption as described above is used to
ing (4), the read DNM yield is given as the following prob- ensure a reliable and fast tracing of ∂Ωaccept . More impor-
ability tantly, complications arisen specifically from the dynamic
stability analysis must be properly handled as below.
YDNM,R = P r{TDNM,R ( p) ≥ Ttarget }
The key step in the above procedure is to find a point
p) ≥ Ttarget + TR }
= P r{Tacross ( on the boundary along search direction l starting from an
p) ≥ Tacross,0 },
= P r{Tacross ( (9) initial point p0 . Such p satisfies the line equation p  = p0 +
M Δl · l, where Δl is the search length. For p  ∈ ∂Ωaccept , the
where p ∈ R is a set of M parameter variations with  p=0
nonlinear scalar equation in Δl must be satisfied
corresponding to the nominal condition, and Tacross,0 =
Ttarget + TR is a constant. Instead of performing Monte- (Δl) ≡ Tacross(p0 + Δl · l) − Tacross,0 = 0. (12)
Carlo simulation, DNM yield can be computed more effi-
ciently by identifying the acceptance region in the parameter To speedup the solution of the above equation using Newton
space, Ωaccept , i.e., the parameter subspace that corresponds method, the key task is to compute the derivative ∂(Δl)/∂Δl,
to SRAM cells meeting the DNM specification Ttarget . YDNM,R which is the focus of the subsequent discussion.
can be then simply computed as the probabilistically weighted 6.2.1 Derivation of Newton Derivatives
volume or area of the acceptance region
   The separatrix in hold may be specified as a general non-
1 if p ∈ Ωaccept linear separatrix line equation in state variables x = [x1 , x2 ]T
YDNM,R = · · · g(
p)f (
p)d
p, g(
p) = and the parameter variation Δl

P
0 otherwise
(10) Sep(Δl, x1 , x2 ) = 0. (13)
where f (·) is the PDF of p .
For ease of presentation, the identification of the accep- In practice, after the separatrix is computed through the
tance region in a two-dimensional parameter space (M = 2) proposed tracing algorithm, it can be represented as a piece-
is considered, which is shown in Fig. 8 (a). From the nomi- wise linear function connecting the points along the tracing
nal design at the center of the acceptance region, four initial trajectories. For any given guess for Δl, Tacross can be com-
directions are selected to search for the boundary of the ac- puted by performing a transient simulation of the cell in
ceptance region, ∂Ωaccept , in each quadrant read from an stable equilibrium initial condition to check
whether (12) is satisfied or not. This is shown in Fig. 9 (a).
∂Ωaccept = {
p | Tacross (
p) = Tacross,0 }. (11) At Tacross , the transient trajectory satisfies (13), specifically
Possible initial directions can be along the 45 , 135 , 225◦ ◦ ◦
Sep (Δl, x1 (Tacross(Δl), Δl), x2 (Tacross(Δl), Δl)) = 0.
and 315◦ lines. It shall be noted that, in principle, it is (14)
possible that the search along a direction does not reach any
boundary, indicating the acceptance region is not closed. X2 Separatrix: Sep(Δl, X1, X2) =0 X ∂x(t1 , Δl ) ∂x (t 2 , Δl ) ∂x (tn , Δl )
∂Δl ∂Δl ∂Δl
Derivatives along
ti +1 separatrix
p2

Tacross (p) = Tacross,0 Failure


li +1 = ni Derivatives
Region
di+1 along trajectory …
ti ni
X1 0 t1 t2 tn t
p1 di
li (a) (b)
Accept. boundary
Region Search Starting
Directions Point Search Figure 9: Derivative computation: a) key deriva-
Length Δl
tives for Tacross, b) parametric transient sensitivities.
(a) (b)

Here, both the state variables and Tacross depend on Δl.


Figure 8: DNM yield analysis: a) find the accep-
If (12) is not satisfied, ∂(Δl)/∂Δl = ∂Tacross/∂Δl shall be
tance region boundary, b) search along a direction.
computed such that Newton method can be used to correct
Δl. Differentiating both sides of (14) w.r.t Δl gives
6.2 Acceleration via Newton Method  
The search for ∂Ωaccept is detailed in Fig. 8 (b), where ∂Sep ∂Sep ∂x1 ∂Tacross ∂Sep ∂x1
+ + +
the search direction is adapted. A complete search cycle is ∂Δl ∂x1 ∂Tacross ∂Δl ∂x1 ∂Δl
 
shown in the figure. Starting from an initial point in the ∂Sep ∂x2 ∂Tacross ∂Sep ∂x2
+ = 0, (15)
parameter space, a search along a unit-length vector li is ∂x2 ∂Tacross ∂Δl ∂x2 ∂Δl
or equivalently parameters in p  can be computed individually in the same
fashion. Denote the sensitivity vector of state x1 (x2 ) w.r.t
∂(Δl) ∂Tacross
= all the parameters at time ti as s1,i (s2,i ), the scaler sensi-
∂Δl ∂Δl
∂Sep tivity along the search direction l is simply s1,i,l = lT · s1,i
∂Δl
+ ∂Sep ∂x1
∂x ∂Δl
+ ∂Sep ∂x2
∂x2 ∂Δl
= − ∂Sep ∂x1 1 . (16) (s2,i,l = lT · s2,i ).
∂x1 ∂Tacross
+ ∂Sep ∂x2
∂x2 ∂Tacross The aforementioned parametric dynamic stability analysis
can be extended to include more transistor parameter vari-
6.2.2 Computation of Newton Derivatives ations, which amounts to search the acceptance boundaries
In (16), ∂Sep
∂x1
and ∂Sep
∂x2
are the sensitivities of the separa- in a higher dimensional parameter space. The same Newton
trix line equation, where the transient trajectory intersects method acceleration can be applied with a more involved
the separatrix. They can be readily computed once the sepa- search direction control.
∂x1 ∂x2
ratrix is traced out using Algorithm 1. ∂Tacross and ∂Tacross
are the time derivatives of the transient trajectory, again at
the intersection between the transient trajectory and the
7. EXPERIMENTAL RESULTS
separatrix (Fig. 9 (a)), hence they are readily available from The proposed techniques are implemented using C/C++
the simulated transient waveforms. as part of a SPICE-like simulation environment on a Linux
The key remaining components in (16), ∂Sep ∂Δl
∂x1
, ∂Δl and server with 3.0GHZ clock frequency and 2GB memory. We
∂x2 consider a 6-T SRAM cell structure with 1V supply voltage,
∂Δl
, are the derivatives of the separatrix line equation and
as shown in Fig. 10(a), under various parameter settings.
state trajectory (at Tacross ) w.r.t the parameter variation
Δl evaluated at the intersection. Note that in this work the
separatrix line equation Sep(·) is formed as a piecewise linear
7.1 Separatrix Tracing
function connecting the points along the traced transient First, consider the case where the cell is fully symmetric.
trajectories. Hence, it suffices to compute the sensitivities As in Fig. 10(b), the saddle is found to be at (0.4229363V,
of the transient trajectory w.r.t Δl and then use the chain 0.4229363V). The separatrix is obtained using the proposed
rule to finally get ∂Sep
∂Δl
. Therefore, for any of ∂Sep
∂Δl
∂x1
, ∂Δl and separatrix tracing method via two transient runs. As ex-
∂x2 pected, the separatrix is along the 45◦ line, which verifies
∂Δl
, what remains to be discussed is to compute transient
the correctness of our algorithm. Next, we consider two cells
response parametric sensitivities at certain time instance.
with transistor parameter variations across the two inverters
It turns out that this can be achieved by accumulating the
and show their separatrice in Fig. 11(a) and Fig. 11(b). In
parametric sensitivities throughout the transient analysis,
the former case, the threshold voltages of N-type transistors
a technique employed in time-domain shooting method for
M 1 and M 3 are both increased by 20% and the threshold
steady-state RF simulation [13, 19], as shown in Fig. 9 (b).
voltages of P-type transistors M 2 and M 4 are decreased by
Consider the parameter form of the MNA equations
20%. The separatrix is still along the 45◦ line, however,
d the saddle moves to (0.5123445V, 0.5123445V). For the sec-
f (x(t), p
) + q(x(t),  p) + u(t) = 0. (17)
dt ond case in Fig. 11(b), the effective channel lengths and
Using a standard numerical integration method, say Back- the threshold voltages of M 1 and M 2 are simultaneously
ward Euler, in transient analysis, (17) is discretized over a decreased by 30% and those of M 3 and M 4 are increased
set of time points [t0 , t1 , t2 , · · · , tK ] by 30%. Due to the mismatch effects, the separatrix is no
longer a straight line and the saddle moves to (0.3612088V,
) − q(x(ti−1 ), p
q(x(ti ), p ) 0.4596336V).
f (x(ti ), p
) + + u(ti ) = 0. (18)
ti − ti−1
Differentiating (18) w.r.t a parameter pj , pj ∈ p , leads to 1
    0.8
∂q ∂x ∂q ∂q ∂x ∂q
∂x
· ∂pj
+ ∂pj t
− ∂x · ∂p j
+ ∂pj t
separatrix
i i−1
+ 0.6
ti − ti−1
X2

 0.4
∂f ∂x ∂f
· + = 0. (19) equilibrium point
∂x ∂pj ∂pj ti 0.2

∂f ∂q ∂f ∂q 0
Define: Gi = | ,
∂x ti
Ci = | ,
∂x ti
di = | ,
∂pj ti
ei = | ,
∂pj ti
0 0.2 0.4 0.6 0.8 1
X1
∂x
si = | ,
∂pj ti
and Δt = ti − ti−1 . (19) can be written as (a) A 6-T SRAM cell (b) separatrix
 −1  
Ci Ci−1 si−1 ei−1 − ei
si = + Gi + − di . (20) Figure 10: Separatrix of a symmetric cell.
Δti Δti Δti
Note that di and ei can be obtained by computing the sensi- Since the main cost of our tracing algorithm comes from
tivities of device model evaluations. The matrix inversion in the two transient runs, the separatrix tracing method is very
(20) can be facilitated by reusing the matrix factorization in efficient compared with the brute-force method. The separa-
the last Newton iteration of the transient simulation for each trix tracing time is less than 1 minute. But if we run 100x100
ti . Hence, by accumulating the transient response sensitivi- brute-force transient simulations to sample the state space
ties starting from time t0 according to (20), sensitivities at to obtain the separatrix at 1% accuracy, the total runtime
any other time points can be rather efficiently computed as is about 38 hours. Hence, the proposed method provides
part of the transient analysis. The sensitivities w.r.t. other more than 2000X speedup. To verify the accuracy of the
1 1 are −0.002ns, 0.002ns, 0.013ns and 0.025ns, respectively.
separatrix separatrix Again, we use brute-force transient simulations to verify our
0.8 0.8
results, as shown in Fig. 13. It can be seen that in the first
0.6 0.6 case, no state flip is produced, indicating a write failure,

X2
X2

45 degree line which is correctly predicted by our negative DNM margin.


0.4 0.4
In all other three cases, the cell is successfully written, con-
equilibrium point
0.2 0.2 equilibrium point sistent to the computed positive write DNMs.
0 0
0 0.2 0.4 0.6 0.8 1 0 0.2 0.4 0.6 0.8 1 1
X1 X1
(a) Case 1 : VT variations (b) Case 2 : VT and Lef f vari- 0.8
ations Separatrix
0.6 TW3 T
W2

X2
Figure 11: Separatrix under device variations. 0.4 T
W1

0.2
tracing algorithm, we randomly select 20 points close to the T
W4
separatrix in the state space. We run transient simulations 0
0 0.2 0.4 0.6 0.8 1
by taking these points as initial conditions. Each transient X1
state trajectory ends up at the correct stable equilibrium Figure 13: Verification of write DNMs.
points without crossing the separatrix.
7.2.3 Hold DNM
7.2 Dynamic noise margin analysis To understand the cell stability in hold, a noise current
Several DNM analyses for read, write and hold are con- with an amplitude of 135μA is injected into one of the stor-
ducted, where the initial SRAM state is at x1 = 1.0V and age nodes. The duration is varied as: TH1 = 1.685ns,
x2 = 0V in Fig. 10(a). TH2 = 1.683ns, TH3 = 1.654ns, TH4 = 1.460ns. To charac-
terize the hold DNM, again the separatrix in hold (without
7.2.1 Read DNM noise injection) is traced. Then, with the noise injection,
We consider an asymmetric 6-T SRAM cell for read DNM a transient simulation is performed to find the separatrix
analysis. We first trace the separatrix in hold. In the read crossing time Tacross to be 1.684ns. The hold DNM may
mode, with the access transistors being turned on, start- be defined as the difference between Tacross and each TH .
ing from a stable equilibrium, a transient run is used to Given this, for TH1 , the hold DNM is negative, suggesting
compute the time at which the state trajectory crosses the a state flip, which is confirmed by the transient simulation
separatrix, or Tacross. It is found to be 8.71ns. Then, con- shown in Fig. 14. For each of the other three cases, the
sider four worldline turn-on times TR1 = 8.72ns, TR2 = hold DNM is positive and hence no state flip happens, as
8.70ns, TR3 = 8.20ns, TR4 = 5.00ns. According to our read confirmed in the same figure.
DNM definition, the read DNMs for these four cases are
−0.01ns, 0.01ns, 0.51ns and 3.71ns, respectively. Next, we 1
use the transient simulations to verify our read DNM results.
The simulation trajectories under the four worldline turn-on 0.8
Separatrix
TH1
times are shown in Fig. 12. As expected, in the first case a
0.6
state flip is produced, indicated by a negative read DNM. In
X2

each of the other three cases, there is no read instability (the 0.4
state trajectory moves back to the initial stable equilibrium TH3
after the read operation ends). 0.2 TH4
TH2
1
0
0 0.2 0.4 0.6 0.8 1
X1
0.8 Separatrix
TR1 Figure 14: Verification of hold DNMs.
0.6

7.3 Parametric DNM analysis


X2

0.4
TR2 The read and write DNM variations under independent
0.2 T
R3
Gaussian random transistor threshold voltage variations are
TR4 considered. The nominal threshold voltages for NMOS and
0
0 0.2 0.4 0.6 0.8 1 PMOS transistors are 0.3V and -0.28V, respectively. The
X1 initial SRAM state is also at x1 = 1.0V and x2 = 0V
Figure 12: Verification of read DNMs. (Fig. 10(a)).
In the first example, we consider the VT variations of tran-
7.2.2 Write DNM sistors M 1 and M 5 in Fig. 10(a). Ttarget + TR in (9) is set
For the same cell, we further analyze write DNMs when to be 0.3ns and accordingly the acceptance region boundary
the wordline pulse width is set to be TW 1 = 0.038ns, TW 2 = is:
0.042ns, TW 3 = 0.053ns, TW 4 = 0.065ns, respectively. For
the write, the time for the trajectory to reach the separatrix, ∂Ωaccept = {(Vth1 , Vth5 ) | Tacross (Vth1 , Vth5 ) = 0.3ns},
Tacross , is found to be 0.040ns. Therefore, the write DNMs (21)
−0.2
where Vth1 and Vth5 represent the threshold voltages of tran-
sistors M1 and M5. The traced boundary is shown in Fig. 15.
−0.25

Failure Region

Vth4(V)
0.4 −0.3
Accept.
Accept.
0.35 Region
Region −0.35
Tacross(Vth3,Vth4)=0.2ns
Failure
Vth5(V)

0.3 Region −0.4


0.2 0.25 0.3 0.35 0.4
Vth3(V)
0.25
T (Vth1,Vth5)=0.3ns
Figure 17: Write DNM acceptance region.
across

0.2
0.2 0.25 0.3 0.35 0.4
9. REFERENCES
[1] K. Chakraborty and P. Mazumder. Fault-Tolerance and
Vth1(V)
Reliability Techniques for High-Density Random-Access
Figure 15: Read DNM acceptance region - case 1. Memories. Prentice Hall, 2002.
[2] K. Roy S. Mukhopadhyay, H. Mahmoodi. Modeling of failure
Next, we consider the variations of the threshold voltages probability and statistical design of SRAM array for yield
enhancement in nanoscaled cmos. IEEE Trans. CAD,
of transistors M3 and M4. The traced boundary is plotted in 24(12):1859–1880, Dec. 2005.
Fig. 16. To verify the correctness of the traced boundaries, [3] M. Khellah, Y. Ye, N. S. Kim, D. Somasekhar, G. Pandya,
A. Farhang, K. Zhang, C. Webb, and V. De. Wordline & bitline
−0.3 pulsing schemes for improving SRAM cell stability in low-vcc
65nm CMOS designs. In Symp. on VLSI Circuits, June 2006.
−0.32
[4] P. C. Murley and G. R. Srinivasan. Soft-error monte carlo
−0.34 Accept. modeling, program, SEMM. IBM J. Res. Develop.,
Region 40(1):109–118, Jan. 1996.
Vth4(V)

−0.36
Failure [5] J. Lohstroh, E. Seevinck, and J. D. Groot. Worst-case static
−0.38 Region noise margin criteria for logic circuits and their mathematical
equivalence. IEEE J. of Solid-State Circuits, sc-18(6):803–806,
−0.4
Dec. 1983.
−0.42 Tacross(Vth3,Vth4)=0.6ns [6] E. Seevinck, F. J. List, and J. Lohstroh. Static-noise margin
analysis of MOS SRAM cells. IEEE J. of Solid-State Circuits,
−0.44
0.46 0.462 0.464 0.466 sc-22(5):748–754, Oct. 1987.
Vth3(V) [7] A. J. Bhavnagarwala, X. Tang, and J. D. Meindl. The impact
Figure 16: Read DNM acceptance region - case 2. of intrinsic device fluctuations on CMOS SRAM cell stability.
IEEE J. of Solid-State Circuits, 36(4):658–665, Apr. 2001.
we select 50 points close to the boundary from each side in [8] E. Grossar, M. Stucchi, K. Maex, and W. Dehaene. Read
stability and write-ability analysis of SRAM cells of nanometer
the parameter space shown in Fig.15. For each parameter technologies. IEEE J. of Solid-State Circuits,
corner, we simulate the SRAM cell to obtain time Tacross . 41(11):2577–2588, Nov. 2006.
The simulated Tacross values of the points left to the bound- [9] R. V. Joshi, S. Mukhopadhyay, D. W. Plass, Y. H. Chan,
ary are close to 0.3ns and larger. The Tacross values of the C. Chuang, and A. Devgan. Variability analysis for sub-100 nm
PD/SOI CMOS SRAM cell. In European Solid-State Circuits
points right to the boundary are also close to 0.3ns, but Conf., Sept. 2004.
smaller. [10] K. Agarwal and S. Nassif. Statistical analysis of SRAM cell
Since we have obtained the boundary of acceptance region, stability. In IEEE/ACM Design Automation Conf., July 2006.
the yield of read DNM can be efficiently evaluated. How- [11] R. Kanj, R. Joshi, and S. Nassif. Mixture importance sampling
and its application to the analysis of SRAM designs in the
ever, if we use Monte Carlo simulation to evaluate the read presence of rare failure events. In IEEE/ACM Design
DNM yield, to cover the wide range of variations (e.g. 6σ or Automation Conf., July 2006.
beyond), the number of samples required can be huge. One [12] A. Singhee and R. A. Rutenbar. Statistical blockade: A novel
method for very fast Monte Carlo simulation for rare circuit
Monte-Carlo run on average takes 10 seconds. Assuming one events, and its application. In IEEE/ACM Design,
million samples are needed, then a total of 107 seconds will Automation and Test in Europe Conf., Apr. 2007.
be required. For the above two cases, the proposed method [13] S. Srivastava and J. Roychowdhury. Rapid estimation of the
takes 63 and 57 minutes, respectively, hence providing a run- probability of SRAM failure due to MOS threshold variations.
In IEEE Custom Integrated Circuits Conf., Sept. 2007.
time speedup of three orders of magnitude. [14] B. Zhang, A. Arapostathis, S. Nassif, and M. Orshansky.
For statistical write DNM analysis, the threshold voltage Analytical modeling of SRAM dynamic stability. In
variations of M3 and M4 are considered. The specified write IEEE/ACM Int. Conf. on Computer-Aided Design, Nov. 2006.
DNM is setup so that Tacross should be at most 0.2ns. The [15] H. Pilo et al. An SRAM design in 65nm and 45nm technology
nodes featuring read and write-assist circuits to expand
traced boundary, as shown in Fig. 17, is computed with a operating voltage. In Symp. on VLSI Circuits, June 2006.
similar efficiency, by using 71 minutes. [16] J. Zaborszky, G. M. Huang, B. Zheng, and T. C. Leung. On the
phase portrait of a class of large nonlinear dynamic systems
such as the power system. IEEE Trans. Automatic Control,
8. CONCLUSIONS pages 4–15, Jan. 1988.
[17] G. M. Huang, W. Dong, Y. Ho, and P. Li. Tracing SRAM
In this work, nonlinear system theory is adopted to pro- separatrix for dynamic noise margin analysis under device
vide a basis for rigorous understanding of SRAM dynamic mismatch. In IEEE Int. Behavioral Modeling and Simulation
stability. Using the concept of stability boundary, new DNM Conf., 2007.
[18] H. Khalil. Nonlinear Systems, 3rd Edition. Prentice Hall, 2002.
metrics are defined for read, write and hold. Nonlinear sys-
[19] K. Kundert, J. White, and A. Sangiovanni-Vincentelli.
tem theory is further exploited to develop fast SPICE-level Steady-state methods for simulating analog and microwave
CAD algorithm for tracing the separatrix. A fast Newton- circuits. Kluwer Academic Publisher, Boston, 1990.
based DNM yield analysis is also presented.

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