Reg.No.
CSE
MODEL EXAM-I(SET-1)
Programme & Branch B.E. & CSE Semester III
Course Code & Name CS3352-DIGITAL PRINCIPLES AND COMPUTER Date 22/12/2022
ORGANIZATION
Maximum Marks 100 Duration and Time 3hr & 9.30am - 12.30pm
PART – A (Answer ALL questions) (10x2=20 Marks)
Blooms
Q.No Questions CO Mark
Level
1. What is Translation look as aside Buffer? BL1 5 2
2. Define Refresh circuit BL2 5 2
3. What is Cache Memory and also Explain hit rate and Miss rate BL1 5 2
4. What is Mapping function and also explain its types BL3 5 2
What is Replacement Algorithm? And list the Common
5. BL2 5 2
Replacement Algorithm.
6. What is Virtual Memory? BL3 5 2
7. What is SATA?list operating modes of SATA BL2 5 2
8. Differentiate Memory mapped and I/O mapped I/O BL1 5 2
9. What is Serial and Parallel interface BL2 5 2
10. Differentiate Synchronous and Asynchronous Counters. BL2 2 2
PART – B (Answer any Two Questions) (5X 13 = 65 Marks)
Blooms
Q.No Questions CO Mark
Level
What is meant by Cache Memory, also explain the mapping function
11. a in Cache memory to determine how memory blocks are placed in BL2 5 13
Cache
Or
11. b Elaborate on the various memory technology and its relevance BL3 5 13
What is Virtual memory? Explain the steps involved in virtual
12. a BL1 5 13
memory address translation
Or
(i)Discuss about Programmed I/Os (Polling method) associated with
12. b computers BL3 5 13
(ii)Discuss about Interrupt Driven I/O method (6)
Discuss DMA Controller with Block Diagram and also explain its
13. a BL2 5 13
Types
Or
Write Short notes on USB, SATA
13. b BL2 5 13
Draw and Explain the Programmable Parallel interface
14. a BL1 5 13
Or
Design a binary counter using T flip flops to count in the following
14. b sequences: (i) 000, 001, 010, 011, 100, 101, 111, 000 BL4 2 13
Consider the design of 4-bit BCD counter that counts in the
15. a following way: 0000,0010,0011,….,1001 and back to 0000 BL4 2 13
Or
Design and implement Mod-10 Synchronous Up counter using TFFs
15. b BL4 2 13
PART – C (Answer any one Question) (1 X 15 = 15 Marks)
Blooms
Q.No Questions CO Mark
Level
Draw and explain a 4-bit SISO, SIPO, PIPO, and PISO Shift
16. a Registers. BL2 2 15
Or
(i)Draw and explain 4-bit Universal shift register
16. b (ii)Explain the Johnson counters with neat sketch. BL3 2 15
Blooms Level Marks
BL1 33
BL2 63
BL3 45
BL4 39
BL5 0
BL6 0
Total 180
Q.No Course Outcomes Marks
CO5 : Identify the characteristics of various memory
1,2,3,4,5,6,7,8,9,11,12,1,14(a) 109
systems and I/O communication
CO2 : Design sequential circuits and analyse the design
10,14(b),15,16 71
procedures
**BL1-Remember BL2-Understand BL3-Apply BL4-Analysis BL5-Evaluate BL6-Create**
COURSE INSTRUCTOR HOD / ECE PRINCIPAL
[Mrs.S.Manjula,AP/ECE] [Dr.M.Poonguzhali,Prof/ECE] [Dr.MunusamiViswanathan]
