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Chap 3

Chapter 3 covers the Intel 8086 processor's programming and instruction sets, focusing on various addressing modes and assembly language programming. It outlines the chapter objectives, introduces assembly language, and details the instruction set of the 8086, including data transfer and stack operations. The chapter emphasizes the importance of understanding addressing modes for efficient software development and provides examples of each mode.

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0% found this document useful (0 votes)
12 views128 pages

Chap 3

Chapter 3 covers the Intel 8086 processor's programming and instruction sets, focusing on various addressing modes and assembly language programming. It outlines the chapter objectives, introduces assembly language, and details the instruction set of the 8086, including data transfer and stack operations. The chapter emphasizes the importance of understanding addressing modes for efficient software development and provides examples of each mode.

Uploaded by

amare3088
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
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Chapter 3

Intel 8086 PROCESSOR PROGRAMING &


INSTRUCTION SETS

1
Outline of the chapter
 Introduction
 8086 Addressing Modes
 Introduction to Assembly Language
Programming
 Instruction Set of 8086
 Assembly Language Programming

2
CHAPTER OBJECTIVES
 Upon completion of this chapter, you will be able to:

 Explain the operation of each data-addressing mode.


 Use the data-addressing modes to form assembly language statements.
 Explain the operation of each program memory-addressing mode.
 Use the program memory-addressing modes to form assembly and machine language
statements.
 Select the appropriate addressing mode to accomplish a given task.
 Detail the difference between addressing memory data using real mode and protected
mode operation.
 Describe the sequence of events that place data onto the stack or remove data from the
stack.
 Explain how a data structure is placed in memory and used with software.

3
Introduction
 Efficient software development for the microprocessor requires a complete familiarity with the
addressing modes employed by each instruction

 The 8086 has about 117 different instructions with about 300 opcodes.
 The 8086 instruction sets can contain no operand, single operand, and two operand instructions.
 The 8086 instructions do not permit memory to memory operations except for string instructions
which involve array operations.
 The processor can access memory in different ways that are collectively called addressing mode.
 In this chapter, the MOV (move data) instruction is used to describe the data-addressing modes

 The MOV instruction transfers bytes or words of data between two registers or between registers
and memory in the 8086

4
8086 Addressing Modes
The addressing modes describe the types of operands and the
way they are accessed for executing an instruction.
The number of addressing modes is determined when the
microprocessor is designed and cannot be changed.
 The 8086 provides a total of seven distinct addressing
modes:

MOV instructions are used to explain


5 addressing modes.
8086 Addressing Modes
A) Register Addressing Mode: MOV reg1, reg2;
Relatively fast transfer since memory is not accessed.
Examples:
 MOV BX, DX ; copy the contents of DX into BX
 MOV ES, AX ; copy the contents of AX into ES
 ADD AL, BH ; add the contents of BH to Contents of AL.

The size of reg1 and reg2 must be the same.


MOV CL, AX is illegal for instance.

6
8086 Addressing Modes
B) Immediate Addressing Mode:
MOV reg, constant;
It can be used to load info into any of the registers except the segment
registers(DS,ES ,SS & CS) and flag register.
Examples:
 MOV AX, 2550H ; move 2550H into AX
 MOV CX, 625 ; Load the decimal value 625 into CX
 MOV BL, 40H ; Load 40H into BL
 MOV DS, 0123H; is illegal why?
Instead we can use: MOV AX, 0123H followed by
MOV DS, AX

7
8086 Addressing Modes
C) Direct Addressing Mode: MOV reg, [constant] or MOV [constant], reg;
 Here constant is not operand but it is an offset or address in memory of operand.
Example:
MOV DL, [2400H]; move contents of DS: 2400H into DL
Exercise 3-1: Find the physical address of the memory location and its contents after the execution of
the following, assuming that DS = 1512H.
MOV AL, 99H
MOV [3518H], AL
 The instructionset does not support a memory-to memory transfer, except with the MOVS
instruction.
 Example: The MOVS CX, LIST instruction copies the word-sized contents of memory location LIST
into register CX

8
8086 Addressing Modes
D) Register indirect Addressing Mode:

MOV reg1, [reg2] or MOV [reg2], reg1; here the address of the memory location where the operand resides is
held by a register, reg2.The One with Square bracket.
reg1 can be any general purpose register and reg2 can be either of SI, DI, or BX
Example: MOV AL, [BX]; moves into AL the contents of the memory location pointed to by DS:BX
MOV CL, [SI] ; move contents of DS:SI into CL
MOV [DI], AH; move contents of AH into DS:DI

For 16 bit register: This have two physical addresses(the lower physical address (LPA)
and the higher physical address (HPA))
 The higher byte of the data belongs to the higher physical address and the lower byte
of the data belongs to the lower physical address

MOV DX, [BX]; move contents of DS:BX into DL and contents of DS:BX+1 into DH

9
8086 Addressing Modes

Exercise 3-2: Assume that DS = 1120H, SI = 2498H, and AX = 17FEH. Show the
contents of memory locations after the execution of MOV [SI], AX

Solution: The contents of AX are moved into memory locations with logical address
DS: SI and DS: SI + 1;
therefore, the physical address starts at DS (shifted left) + SI = 13698. According to
the little endian convention, low address I3698H contains FE, the low byte, and high
address 13699H will contain 17, the high byte.

10
8086 Addressing Modes

E) Based Relative Addressing Mode:


MOV reg1, [reg2]+const; or
 MOV [reg2]+const, reg1;
 NB: const is an 8-bit displacement value.
 Reg2+const=an Effective address(EA)
reg1 can be any general purpose register and reg2 can only be either of BP or BX
The default segments used for the calculation of the physical address (PA) are DS
for BX and SS for BP.
 PA= DS*10H+BX+const; EA=BX + const or
 PA=SS*10H+BP+const and EA= BP + const

11
8086 Addressing Modes
Examples:
MOV CX, [BX]+10 ; move DS:BX+10 and DS:BX+10+1 into CX.
 LPA = DS*10H+ BX + 10,the data at this memory location is moved to CL
 HPA= DS*10H+ BX + 10+1,the data at this memory location is moved to CH

MOV AL, [BP]+5 ;PA = SS*10H + BP + 5


Alternative codings for MOV reg1, [reg2]+const is MOV reg1, [reg2+const] or MOV reg1,
const[reg2]
For instance, MOV CX, [BX]+10 is same as "MOV CX, [BX+10]" or "MOV CX, 10[BX]"

12
8086 Addressing Modes

F) Indexed relative Addressing Mode: MOV reg1, [reg2]+const or MOV


[reg2]+const, reg1; const is an 8-bit displacement value.
reg1 can be any general purpose register and reg2 can only be either of
DI or SI
PA= DS*10H+DI+const; EA=DI+ const or PA=DS*10H+SI+const and EA=
SI + const
Examples: MOV DX, [SI]+5
;PA = DS (shifted left) + SI + 5
MOV CL, [DI]+20 ;PA = DS (shifted left) + DI + 20
13
8086 Addressing Modes

Exercise 3-3: Assume that DS = 4500, SS = 2000, BX = 2100, SI


= 1486, DI = 8500, BP = 7814, and AX = 2512. Show the exact
physical memory location where AX is stored in each of the
following. All values are in hex.

Solution: In each case PA = segment register (shifted left) + offset


register + displacement.
(a) DS:BX+20 location 47120 = (12) and 47121 =(25)
(b) DS:SI+10 location 46496 = (12) and 46497 = (25)
(c) DS:DI+4location 4D504 = (12) and 4D505 = (25)
(d) SS:BP+12 location 27826 = (12) and 27827 = (25)
14
8086 Addressing Modes

G) Based Indexed Addressing Mode: MOV reg1, [reg2][reg3]+const or


MOV [reg2][reg3]+const, reg1; const is an 8-bit displacement value.
reg1 can be any general purpose register and reg2 can only be either of
DI or SI and reg3 can only be either of BX or BP.
PA= DS*10H+BX+DI+const; EA=DI+BX+ const or
PA=SS*10H+BP+SI+const and EA= SI +BP+ const

Examples:
MOV CL,[BX][DI]+8 ;PA = DS (shifted left) + BX + DI + 8
MOV CH,[BX][SI]+20 ;PA = DS (shifted left) + BX + SI + 20
MOV AH,[BP][SI]+29 ;PA = SS (shifted left) + BP + SI + 29
15
Note that "MOV AX, [SI][DI]+displacement" is illegal.
8086 Addressing Modes

Summary of addressing modes

16
8086 Addressing Modes

Summary of addressing modes

17
8086 Addressing Modes
Summary of addressing modes

18
Introduction to 8086 Assembly
Language

19 By: Getinet G
Introduction to Assembly Language Programming

 Program execution in any microprocessor system consists of


fetching binary information from memory and decoding that
information to determine the instruction represented.
 For us it is much easier to remember the mnemonic SUB AX,AX
than the corresponding machine code 2BC0.
 For this reason, we write source files containing all the
instruction mnemonics needed to execute a program.

20
Introduction to Assembly Language Programming

The source file is converted into an object file, containing the actual
binary information the machine will understand, by a special program
called an assembler.
Some assemblers allow the entire source file to be written and assembled
at one time.
Other assemblers, called single-line assemblers, work with one source line
at a time and are restricted in operation.
The DEBUG utility that comes with DOS and Windows (up to Windows XP)
contains a built-in, single-line assembler.

21
Introduction to Assembly Language Programming
We use a cross-assembler instead of single-line assembler.
The source file in the example, TOTAL.ASM, is presented as input to
the assembler.
The assembler will convert all source statements into the correct
binary codes and place these into the object file TOTAL.OBJ.
A second file created by the assembler is the list file, TOTAL.LST,
which contains all the original source file text plus the additional
code generated by the assembler.
The list file may be displayed on the screen, or printed.
The object file may not be printed or displayed, since it is just code.

22
Introduction to Assembly Language Programming

23
Introduction to Assembly Language Programming
The sample source file, a subroutine designed to
find the sum of 16 bytes stored in memory.

24
Introduction to Assembly Language Programming

The list file for our example subroutine looks like this:

25
Introduction to Assembly Language Programming

 Assembler Directives ORG, SEGMENT, END


When writing 8086 source files, we separate code
areas from data areas.
We may even have a separate area reserved for the
stack.
The new source file for TOTAL, which includes separate
areas called segments, contains many new pseudo
codes to help the assembler generate the correct
machine code for the object file.
26
Introduction to Assembly Language Programming

Most assemblers now accept simplified segment


directives and automatically generate the
necessary code to manage segments.
The TOTAL source file, rewritten with simplified
segment directives, now looks like:

27
Introduction to Assembly Language Programming

28
Introduction to Assembly Language Programming

The first directive, .MODEL, instructs the assembler that the


type of program being created falls into a category called
SMALL.
All of the programs in this course are small programs. Other
models are as indicated in Table 3.4.
The .DATA directive indicates the beginning of a data segment.
There is no need to indicate the end of the data segment. This
is automatically assumed when the .CODE directive is
encountered, which begins the code segment.

29
Introduction to Assembly Language Programming

30
Introduction to Assembly Language Programming

When a large program must be written by a team of people, each person will be
assigned a few subroutines to write.
They must all assemble and test their individual sections to ensure the code
executes correctly.
When all portions of the program (called modules, after a technique called modular
programming) are assembled and tested, their object files are combined into one
large object file via a program called a linker.
Figure 3.2 represents this process. The linker examines each object file, determining
its length in bytes, its proper place in the final object file, and what modifications
should be made to it.
In addition, a special collection of object files is sometimes available in a library
file.

31
Introduction to Assembly Language Programming

32
Introduction to Assembly Language Programming
When the linker is through, the final code is written to a file called the
load module. Another program called a loader takes care of loading
the program into memory.
Usually the linker and loader are combined into a single program
called a link-loader.
So, writing the source file is actually only the first step in a long
process.
But even before a source file can be written, the programmer must
understand the instructions that will be used in the source file.
The remaining sections will begin coverage of this important topic,
Instruction Set of 8086.
33
Instruction Set of 8086
The instruction set of the 8086 microprocessor is
divided into seven different groups:
i. Data transfer
ii. Strings
iii. Arithmetic
iv. Bit manipulation
v. Loops and jumps
vi. Subroutine and interrupt
vii. Processor control

34
Instruction Set of 8086

i. Data transfer Instructions:


This group of instructions makes it possible to move (copy) data around
inside the processor and between the processor and its memory.
a). MOV; MOV Destination, Source:
 Transfer can be from register to register, register to memory or from memory to
register but not from memory to memory.
 The source and destination must be of same type i.e. either both must be byte or
word.
 NB. MOV instruction does not affect any flags.

35
Instruction Set of 8086

36
Instruction Set of 8086

i. Data transfer Instructions:


b) PUSH and POP instructions: are used to load to or receive
data from the stack memory.
PUSH Source : (Push Data onto Stack): decrements the stack
pointer (SP)by 2 and copies a word from a specified source to the
location in the stack segment where the stack pointer then points.
The source of the word can be a general- purpose register, a
segment register, or memory.
No flags are affected by this instruction.

37
Instruction Set of 8086

EXAMPLES:
PUSH BX; Decrement SP by 2, copy BX to stack
PUSH DS; Decrement SP by 2, copy DS to stack
PUSH AL; Illegal, must push a word .
PUSH TABLE [BX]; Decrement SP by 2, copy word from memory in DS
at EA = TABLE + [BX] to stack

 PUSHA ; Save all 16-bit registers onto the stack in the following order: AX, CX,
DX, BX, SP, BP, SI, DI. The value of the SP is that before the PUSHA instruction.
 PUSHF; copies the contents of the flag register to the stack.

38
Instruction Set of 8086

39
Instruction Set of 8086
i. Data transfer Instructions:
C) POP instruction
 Syntax POP Destination: copies a word from the stack location pointed
to by the stack pointer to a destination specified in the Instruction.
The destination can be a general-purpose register, a segment register, or a
memory location. The data in the stack is not changed.
After the word is copied to the specified destination, the stack pointer is
automatically incremented by 2 to point to the next word on the stack.
 All Registers except CS and IP are copied by POP instruction
 No flags are affected by the POP instruction.

40
Instruction Set of 8086

EXAMPLES:
POP DX; Copy a word from top of stack to DX Increment SP
by 2
POP DS; Copy a word from top of stack to DS Increment SP
by 2
POP TABLE [BX]; Copy a word from top of stack to memory
in DS with EA = TABLE +[BX]
 NOTE: POP CS Is illegal.

41
Instruction Set of 8086

42
Instruction Set of 8086

POP A Destination (Pop All Registers).


All registers are popped from the stack in the order indicated in Table 3-6.
Note that the contents of the SP are not loaded with the data popped off the stack.
This is necessary to prevent the stack from changing locations halfway through the execution.

43
Instruction Set of 8086

Overflow and Underflow of


Stack:
PUSH instruction decrements SP by 2. At some
point, if SP=0000H and if there is an attempt
to PUSH data on the stack, Stack overflow
will result.
On the other hand, POP instruction increments
SP by 2. At some point, if SP=FFFFH and if
44
there is an attempt to POP data from the stack,
Instruction Set of 8086

IN Accumulator, Port; (Input Byte or word from Port):


 Data read from an input port always ends up in the accumulator.
 IN: copy data from a port. Port can be direct or indirect.
 Indirect: If a full 16-bit port address must be specified, the port address is loaded
into register DX, and IN AL,DX or IN AX, DX is used to read the input port.
 Direct; If the port number is between 00 and FFH, for instance, to input from port
80H we would use IN AL,80H or IN AX,80H. Using AL in the operand field causes 8
bits of data to be read. Two bytes can be input by using AX in the operand field.

45
Instruction Set of 8086

OUT Port, Accumulator (Output Byte or Word to


Port):
With OUT, we can send 8 or 16 bits of data to an output
port.
The port address may be loaded into DX for use with OUT
DX, AL or OUT DX, AX, or specified within the instruction, as
in OUT 80H,AL or OUT 80H, AX.

46
Instruction Set of 8086

i. Data transfer Instructions:


LEA Destination, Source (Load Effective Address):
Determines the offset of the variable or memory location named as
the source and loads this address in the specified 16-bit register.
Flags are not affected by LEA instruction.

47
Instruction Set of 8086
i. Data transfer Instructions:
 LEA Destination, Source; (Load Effective Address):
This instruction is used to load the offset of the source memory
operand into one of the processor's registers.
The memory operand may be specified by any number of
addressing modes. The destination may not be a segment register.
MOV BX, 35h
MOV DI, 12h
LEA SI, [BX+DI] ; SI = 35h + 12h = 47h
Note: The integrated 8086 assembler automatically replaces LEA with a more efficient
MOV where possible. For example:
org 100h
LEA AX, m ; AX = offset of m
RET
m dw 1234h
48 END
Instruction Set of 8086

i. Data transfer Instructions:


 XCHG Destination, Source (Exchange Data):
used to swap the contents of two 8-, or 16-bit operands.
One operand must be a processor register (excluding the segment registers). The other
operand may be a register or a memory location.
If a memory location is used as an operand it is assumed to be within a data segment.
Example: Registers AL and BL contain 30H and 40H, respectively. What is the result of
XCHG AL, BL?
Solution: After execution, AL contains 40 and BL contains 30.
The machine code for XCHG AL, BL is 86 C3. It may be interesting to note that the
machine code for XCHG BL. AL (which performs the same operation as XCHG AL, BL) is
86D8.

49
Instruction Set of 8086

i. Data transfer Instructions:


XLAT Translate-Table (Translate Byte):
XLAT assumes that a 256-byte data table has been written into
memory at the starting address contained in register BX.
The number in register AL at the beginning of execution is used as
an index into the translation table.
The byte stored at the address formed by the addition of BX and
AL is then copied into AL.
The translation table is assumed to be in the data segment.
AL AL+BX+DS*10H
o Only instruction adding an 8-bit to a 16-bit
50
number.
Instruction Set of 8086

Example for XLAT Instruction


 Assume DS=0300H, BX=0100h and AL=0DH, ODH represents
the ASCII code of the character CR.
 The execution of XLAT replaces the contents of AL by the content of
the memory location with the physical address: Ph. A =
DS*10H+BX +AL=03000+0100+0DH=0310DH; Thus AL 
[0310DH].
 Assuming this memory locations contains 52H (EBCDIC code for CR)
this value is placed in AL; Thus AL= 52H
 Therefore, XLAT Performs the direct table lookup technique often
used to convert one code to another .
51
Instruction Set of 8086

i. Data transfer Instructions:


Reading Assignment:
LDS
LES
LAHF and
SAHF

52
Instruction Set of 8086
ii. String Instructions:
String is series of data byte or word available in memory at consecutive locations. It
is either referred as byte string or word string that can be up to 64KB in length..
 Their memory is always allocated in a sequential order.
 Instructions used to manipulate strings are called string manipulation instructions.
 A nice feature of the 8086 is its ability to handle strings.
 An example of a string might be a sequence of ASCII character codes that constitute a
password, or the ASCII codes for “Good Morning!.“
 The common operations that we can perform on any string are :
 Copying,
 Comparing
 Scanning.

53
Instruction Set of 8086
ii. String Instructions:
 A special instruction called the repeat prefix can be used to repeat the copy,
compare, or scan.
 Register CX contains the repeat count necessary for the repeat prefix. CX is
decremented during the string operation, which terminates when CX reaches 0.
 SI register points to the first element of the source string, which must be
located in the data segment(DS).
 The destination string is located in a similar way via the DI register and must
reside in the extra segment(ES).
 Direction flag (DF) is used to control the way SI and DI are adjusted during a
string instruction. They are automatically incremented or decremented by 1, or
2, based on the value of the direction flag and the size of the string elements.

54
Instruction Set of 8086

55
Instruction Set of 8086
 Initializing the String Pointers
 Before we can use any string instruction, we have to initialize the SI, DS, DI, and ES
registers. The source string (SHOPPER) in Figure 3-8 could be pointed by these
instructions:
MOV AX, 0510H; string segment-address
MOV DS, AX
MOV SI, 0 ; string offset within segment
 When the contents of SI and DS are combined to form an effective address, 05100H will be the first byte
accessed in the data segment.
 A similar technique is used to initialize the destination string (SHOPPING):
MOV AX, 04A8H ; string segment - address
MOV ES, AX
MOV DI, 0 ; string offset within segment

56
Instruction Set of 8086
 REP/ REPE/ REPZ/ REPNE/ REPNZ: Are available for use by the programmer to
control the way a string operation is repeated.
 They are all recognized by the assembler as prefix instructions for string operations.

 MOVS (move string) and STOS (store string) make use of the REP prefix.
 When preceded by REP, these string operations repeat until CX decrements to 0.
 REPE and REPZ operate the same way, but are used for SCAS (scan string) and CMPS
(compare string). Each time SCAS or CMPS completes its operation, the zero flag is
tested and execution continues (repeats) as long as the zero flag is set.
 REPNE and REPNZ also repeat as long as CX does not equal 0 but require that the
zero flag be cleared to continue.

57
Instruction Set of 8086
INSTRUCTION CODE CONDITION FOR Exit
REP CX=0

REPE/REPZ CX=0 ,or , ZF=0

REPNE/REPNZ CX=0 , or, ZF=1

58
Instruction Set of 8086
Instruction Mnemonic Destination Source Prefix

Move string byte MOVSB ES:[DI] DS:[SI] REP


Move string word MOVSW ES:[DI] DS:[SI] REP
Store string byte STOSB ES:DI AL REP
Store string word STOSW ES:DI AX REP
Load string byte LODSB AL DS:[SI] none
Load string word LODSW AX DS:[SI] none
Compare string byte CMPSB ES:[DI] DS:[SI] REPE/REPNE
Compare string word CMPSW ES:[DI] DS:[SI] REPE/REPNE

Scan string byte SCASB ES:[DI] AL REPE/REPNE

59
Scan string word SCASW ES:[DI] AX REPE/REPNE
1. LODS
 The LODS instruction loads AL or AX with data stored at the data segment offset
address indexed by the SI register. After loading AL with a byte or AX with a
word, the contents of SI increment, if D = 0 or the contents of SI decrement, if D
= 1.
Before execution Instructions After Execution
DF=0 LODSB AL=DS;[SI]
SI=SI+1
DF=1 LODSB AL=DS:[SI]
SI=SI-1

DF=0 LODSW AX=DS:[SI]


SI=SI+2

DF=1 LODSW AX=DS:[SI]


SI=SI-2
60
2. STOS
 The STOS instruction stores AL or AX at the extra segment memory locations
addressed by the DI register.
Before execution Instructions After Execution
DF=0 STOSB ES:[DI]=AL
DI=DI+1
DF=1 STOSB ES:[DI]=AL
DI=DI-1

DF=0 STOSW ES:[DI] = AL


ES:[DI+1] = AH
DI = DI + 2
DF=1 STOSW ES:[DI] = AL
ES:[DI+1] = AH
DI = DI - 2
61
3. MOVS
 The instruction MOVS transfers data from one memory location to another. This is the only
memory-to-memory transfer allowed in the 8088 .
 The MOVS instruction transfers a byte or word from the data segment location addressed by
SI to the extra segment location addressed by DI.
 The pointers (SI & DI) then increment or decrement the value as dictated by the direction flag

Before Execution Instructions After Execution


DF=0 MOVSB ES:[DI] = DS:[SI]
DI = DI + 1
SI = SI + 1

DF=1 MOVSB ES:[DI] = DS:[SI]


DI = DI - 1
SI = SI – 1
DF=0 MOVSW ES:[DI] = DS:[SI]
ES:[DI+1] = DS:[SI+1]
DI = DI + 2
SI = SI + 2

DF=1 MOVSW ES:[DI] = DS:[SI]


ES:[DI+1] = DS:[SI+1]
62 By: Getinet G
DI = DI – 2
8086 Program to transfer a block of 4 bytes by using string
instructions

Problem :
Write an Assembly Language program(ALP) to transfer a block of 4 bytes, starting
address is 0500 and transfer the block at address 0600 by using string instructions.
 Assumptions Assume that there are 4 blocks in memory addresses 0500, 0501,
0502, 0503.
 Algorithm –
1) Assign value 0500H in SI and 0600H in DI
2) Assign the value 0000 H to AX
3) Move the content of AX in DS
4) Move the content of AX in ES
5) Assign the value 0004 H to CX
6) Clear the directional flag
7) Repeat until CX=0, Move string block
8) Halt of the program

63
MEMORY ADDRESS ALP COMMENTS

0400 MOV SI, 0500 SI = 0500

0403 MOV DI, 0600 DI =0 600

0406 MOV AX, 0000 AX = 0000

0409 MOV DS, AX DS =AX

040B MOV ES, AX ES =AX

040D MOV CX, 0004 CX = 0004

0410 CLD CLEAR DIRECTIONAL FLAG

0411 REP REPEAT UNTIL CX=0

64 0412 MOVSB MOVE THE BLOCK


Instruction Set of 8086
Example:
Using string instructions, write a program that transfers a block of 20 bytes of data.
Say ABCDEFGHIJKLMNOPQRST from Memory at a logical address of DS:SI to ES:DI.

65
Instruction Set of 8086
Example: write a program that uses STOSB to store byte AAH into 100 memory locations.
.MODEL SMALL
.DATA
MEM_LOCATION DB 100 DUP (?)
.CODE ;WRITE THE CODE
MOV AL,AAH;
MOV DI,0
MOV [DI],AL
MOV CX,100
CLD
RPT
STOSB
Return

66
 Home work
 :write a program that uses STOSB to store byte AAH
into 100 memory locations. and uses LODSB to
change 10th memory location to 0DH.

67
Instruction Set of 8086
Home work
Assuming that there is a spelling of “teff" in an
electronic dictionary and a user types in “teaf", write a
program that compares these two and displays the
following message, depending on the result:
1 . If they are equal, display "The spelling is correct".
2. If they are not equal, display "Wrong spelling".
.MODEL SMALL
.DATA
DATA_DICT DB "teff"
DATA_TYPED DB "teef"
MESSAGE1 DB "The spelling is correct",'$'
MESSAGE2 DB "Wrong spelling",'$'
.CODE
68
;write the code here
Instruction Set of 8086

iii. Arithmetic Instruction


This group of instructions provides the 8086 with its
basic integer math skills.
Floating point math operations are handled by a
separate group of instructions.
Addition, subtraction, multiplication, and division can all
be performed on different sizes and types of numbers.

69
Instruction Set of 8086
Addition Instructions: includes
ADD: Addition
 ADD destination, source
All Flags are affected: AF, CF, OF, PF, SF, ZF.

ADC: Addition with carry

 ADC destination, source: adds the status of the carry flag into the result
 All Flags are affected: AF, CF, OF, PF, SF, ZF.

INC: Increment (Add 1):The INC instruction adds 1 to a specified register or to a memory location.

 INC Destination

AF, OF, PF, SF, and ZF are affected (updated) by this instruction.

Note that the carry flag (CF) is not affected. This means that if an 8-bit destination containing FFH or a

16-bit destination containing FFFFH is incremented, the result will be all 0's with no carry.
70
Instruction Set of 8086

71
Instruction Set of 8086

72
Instruction Set of 8086
 Subtraction Instructions: This group of instructions
consist of the following group of instructions.
 SUB: Subtraction
 SUB destination, source
 Flags Affected: AF, CF, OF, PF, SF, and ZF
 SBB: Subtraction with borrow
 SBB destination,source
 Flags Affected: AF, CF, OF, PF, SF, and ZF

 DEC: Decrement
 NEG: 2’s Complement of a number .To get
73
signed number
Instruction Set of 8086

74
Instruction Set of 8086
 DEC Instruction: DEC destination.
 The DEC instruction subtract 1 from the specified destination.
 The destination may be a register or a memory location.
 The AF, OF, PF, SF and ZF flags are affected.
 Note that: The CF is not affected. If the contents of 8-bit register
are 00H and 16-bit register are 0000H, after DEC instruction
contents of registers will be FFH and FFFFH respectively without
affecting CF.

75
Instruction Set of 8086

 NEG This Instruction: Form 2’s complement;


 NEG Destination
 This instruction replaces the number in a destination
with the 2’s complement of that number.
 The destination can be a register or a memory
location. instruction can be implemented by inverting
each bit and adding 1 to it.
 The flags that can be affected are: AF, CF, SF, PF, ZF
and OF.

76
Instruction Set of 8086
 CMP (Comparison instruction):
 CMP Destination, Source
 This instruction compares a byte from the specified
source with a byte from the specified destination, or a
word from the specified source with a word from the
specified destination.
 The source can be an immediate number, a register,
or a memory location. The destination can be a
register or a memory location.

77
Instruction Set of 8086
 The comparison is actually done by subtracting the
source byte or word from the destination byte or word.
 The source and the destination are not changed, but
the flags are set to indicate the results of the
comparison.
 AF, OF, SF, ZF, PF, and CF are updated by the CMP
instruction.

78
Instruction Set of 8086

79
Instruction Set of 8086

 Multiplication Instructions: This group of


instructions consist of following group of instructions:
• MUL: Unsigned Multiplication
• IMUL: Signed Multiplication

80
Instruction Set of 8086
 MUL Instruction: MUL source
 This instruction multiplies an unsigned byte from source and
unsigned byte in AL register or unsigned word from source and
unsigned word in AX register.
 The source can be a register or a memory location.
 When the byte is multiplied by the contents of AL, the result is
stored in AX. The most significant byte is stored in AH and least
significant byte is stored in AL.
 When the word is multiplied by the contents of AX, the most
significant word of result is stored in DX and least significant
word of result is stored in AX.
 Flags: MUL affect AF, PF, SF, and ZF flags.

81
Instruction Set of 8086

82
Instruction Set of 8086
 IMUL Instruction: IMUL source
 This instruction multiplies an signed byte from source and signed byte
in AL register or signed word from source and signed word in AX
register.
 The source can be a register or a memory location.
 When the signed byte is multiplied by AL, the signed result is stored in
AX.
 The most significant byte is stored in AH and least significant byte is
stored in AL.
 When the signed word is multiplied by AX, the most significant word of
result is stored in DX and least significant word of result is stored in AX.

83
Instruction Set of 8086
 If the magnitude of the product does not require all the bits of
the destination, the, unused bits will be filled with copies of the
sign bit.
 If the upper byte of a 16-bit result or the upper word of a 32-bit
result contains only copies of the sign bit (all 0's or all 1's),
then CF and the OF will both be 0.
 If the upper byte of a 16-bit result or the upper word of a 32-bit
result contains part of the product, CF and OF will both be 1.
 You can use the status of these flags to determine whether the
upper byte or word of the product needs to be kept. AF, PF, SF,
and ZF are undefined after IMUL.

84
Instruction Set of 8086

85
Instruction Set of 8086
 Division Instructions: This group consists of the
following group of instructions
• DIV
• IDIV

[READING ASSINGEMENT]

86
Instruction Set of 8086

 BCD and ASCII arithmetic instructions


 The 8086 allows arithmetic manipulation of
both BCD and ASCII data.
 This is accomplished by instructions that
adjust the numbers for BCD and ASCII
arithmetic.

87
Instruction Set of 8086
 BCD Arithmetic: Intel 8086 provides two instructions
to support BCD arithmetic.
 The DAA (Decimal Adjust after Addition) instruction
that follows BCD addition &
 The DAS (Decimal Adjust after Subtraction) which
follows BCD subtraction.
Both instructions correct the result of the addition or
subtraction so that it is a BCD number.

88
Instruction Set of 8086
 ASCII Arithmetic: Numerical data coming into a
computer from a terminal is usually in ASCII code. In this
code, the numbers 0 to 9 are represented by the ASCII
codes 30H to 39H. The 8086 provides four instructions
for ASCII arithmetic.
 AAA: ASCII adjust after addition
 AAS: ASCII adjust after subtraction
 AAM: ASCII adjust after multiplication
 AAD: ASCII adjust before division

89
Instruction Set of 8086
iv. Bit manipulation Instructions
The instructions in this group are used to perform
Boolean (logical) operations on binary data, shift or
rotate bits left or right in register or memory operands.
These operations are very useful when converting data
from one form to another or for manipulating specific
patterns, such as a single bit that moves through each
position of a register.
 These instructions include:
 NOT, AND, OR, XOR, TEST, SHL/SAL, SHR, SAR, ROL, ROR, RCL, & RCR

90
Instruction Set of 8086
 NOT Instruction;
 NOT Destination
o The NOT instruction inverts each bit (forms the 1's
complement) of the byte or word at the specified destination.
o The destination can be a register or a memory location.
o No flags are affected by the NOT Instruction.
 EXAMPLES:
NOT BX ; Complement contents of BX register
NOT BYTE PTR [BX] ;Complement memory byte at offset [BX]
in data segment

91
Instruction Set of 8086
 AND Instruction:
 AND Destination, Source
ANDs each bit in a source byte or word with the same number bit in a
destination byte or word. The result is put in the specified destination.
The contents of the specified source will not be changed.
A bit can be masked (reset) by ANDing it with 0.
The source operand can be an immediate number, the contents of a
register, or the contents of a memory location.
The destination can be a register or a memory location.
 The source and the destination cannot both be memory locations in the
same instruction.
Flags: CF and OF are both 0 after AND. PF, SF, and ZF are updated by AND.
AF is undefined. Note that PF has meaning only for an 8-bit operand.

92
Instruction Set of 8086

EXAMPLES :
AND CX, [SI] ;AND word in DS at offset [SI] with word in CX register
;Result in CX register
AND BH, CL ;AND byte in CL with byte in BH Result in BH
AND BX, 00FFH ;AND word in BX with immediate 00FFH.
Masks upper byte, leaves lower byte unchanged
If BX = 10110011 01011110 then AND BX, 00FFH Mask out upper 8
bits of BX and the Result: BX = 00000000 01011110 CF, OF, PF, SF, ZF
=0

93
Instruction Set of 8086

 OR Instruction; OR Destination, Source


This instruction ORs each bit in a source byte or word with the corresponding bit in a
destination byte or word. The result is put in the specified destination.
The contents of the specified source will not be changed.
 A bit in the destination operand can be set to a 1 by simply ORing that bit with a 1 in the
same bit of the source operand. A bit ORed with 0 is not changed.
The source operand can be an immediate number, the contents of a register, or the contents
of a memory location .
The destination can be a register or a memory location.
The source and the destination cannot both be memory locations in the same instruction.
Flags: CF and OF are both 0 after OR. PF, SF, and ZF are updated by the OR instruction. AF is
undefined after OR.

94
Instruction Set of 8086

EXAMPLES (SYNTAX):
OR AH, CL ; CL ORed with AH, result in AH. CL not changed
OR BP, SI ; SI ORed with BP, result in BP. SI not changed
OR SI, BP ; BP ORed with SI, result in SI. BP not changed
OR BL, 80H ; BL ORed with immediate 80H. Set MSB of BL to a 1
OR CX, TABLE [BX][SI] ; CX ORed with word from effective address TABLE[BX][SI]
in ;data segment.
OR CX, 0FF00H ; If CX = 00111101 10100101 then OR CX with immediate
;FF00H, Result in CX = 11111111 10100101
;CF=0,OF=0,PF= 1,SF= 1,ZF=0.

95
Instruction Set of 8086
 XOR Instruction; XOR Destination, source
 This instruction Exclusive-ORs each bit in a source byte or word with the
same number bit in a destination byte or word.
 The result replaces the contents of the specified destination. The contents
of the specified source will not be changed.
 A bit Exclusive-ORed with a 1 will be inverted. A bit Exclusive-ORed with a
0 will not be changed.
 The source operand can be an immediate number, the contents of a
register, or the contents of a memory .
 The destination can be a register or a memory location.
 The source and destination cannot both be memory locations in the same
instruction.
 Flags: CF and OF are both 0 after XOR. PF, SF, and ZF are updated. PF has
meaning only for an 8-bit operand. AF is undefined after XOR.
96
Instruction Set of 8086

EXAMPLES:
XOR CL,BH ;Byte in BH Exclusive-ORed with byte in CL. Result in CL. ;BH
not chanced
XOR BP,DL ;Word in DI Exclusive-ORed with word in BP. Result
;in BP. DI not changed
XOR WORD PTR [BX], 00FFH ;Exclusive-OR immediate number ;OOFFH with
word at offset [BXI in data
;segment. Result in memory location [BX]
; If BX = 0011110 01101001 , CX = 00000000 11111111
XOR BX,CX ; Result: BX = 0011110110010110 Note bits in lower
;byte are inverted CF,OF,SF,ZF = 0, PF = 1, AF

97
Instruction Set of 8086
 TEST Instruction; TEST Destination, source
This instruction ANDs the contents of a source byte or word with the contents of the
specified destination word.
Flags are updated, but neither operand is changed.
The TEST instruction is often used to set flags before a Conditional Jump instruction.
The source operand can be an immediate number, the contents of a register, or the
contents of a memory .
The destination operand can be in a register or in a memory location. The source
and the destination cannot both be memory locations in an instruction.
Flags: CF and OF are both 0's after TEST. PF, SF, and ZF will be updated to show the
results of the ANDing. PF has meaning only for the lower 8 bits of the destination. AF
will be undefined.
98
Instruction Set of 8086

99
Instruction Set of 8086
v. Loops and Jumps:
When there is a need to change the path of program
execution by forcing the processor to fetch its next
instruction from a new location we can use Jump
instructions.
When there is a need to execute some portion of the
program more than one times we can use loop
instructions.

100
Instruction Set of 8086
Jump instructions are classified as
Unconditional Jump (JMP)
Conditional Jump (J cond)

101
Instruction Set of 8086
 JMP-Unconditional jump to Specified Destination
 This instruction will always cause the 8086 to fetch its next Instruction from
the location specified in the instruction rather than from the next location
after the JMP instruction.

 If the destination is in the same code segment as the JMP instruction, then
only the instruction pointer will be changed to get to the destination location.
This is referred to as a near jump.

 If the destination for the jump instruction is in a segment with a name


different from that of the segment containing the JMP instruction, then both
the instruction pointer and the code segment register contents will be
changed to get to the destination location. This is referred to as a far jump.
 The JMP instruction affects no flags.
102
Instruction Set of 8086

103
Instruction Set of 8086
 Conditional Jump Instructions
Conditional jumps are always short jumps in the 8086.

These instructions will cause a jump to a label given in the Instruction, if


the desired conditions occurs in the program before the execution of the
instruction.

The destination must be in the range of -128 bytes to +127 bytes from
the address of the instruction after the conditional transfer instruction.

If the jump is not taken (jump condition is not fulfilled), execution simply
goes on to the next instruction.
104
Instruction Set of 8086

105
Instruction Set of 8086

Example: Write an assembly language program


(ALP)that adds two numbers from memory in data
segment at offsets of 1100H and 1101H and stores
the result at an offset of (1102H if it is positive, 1103H
if it is negative and 1104H if it is zero.

106
Start

N1+N2

Store
Result<0 Yes result in
1103H

No
Store
Result=0 result in
Yes 1104H

No
Store
result in
1102H

107 End
Instruction Set of 8086

ALP:
MOV AL, [1100H] ; AL=N1
ADD AL, [1101H] ; AL=N1+N2
JS NEGATIVE
JZ NULL
MOV [1102H],AL; Positive result
JMP END
NEGATIVE: MOV [1103H], AL; Negative result
JUMP END
NULL: MOV [1104H], AL; NULL RESULT
END: HLT
108
Instruction Set of 8086
Loop:
Syntax : LOOP Label
 This instruction is used to repeat a series of instruction
some number of times. The number is specified in the
CX register.
 The CX register is automatically decremented by one,
each time after execution of LOOP instruction. Until
CX=0, execution will jump to a destination specified by a
label in the instructions.

109
Instruction Set of 8086
For LOOPE/LOOPZ and LOOPNE/LOOPNZ instructions
there is one more condition for exit from loop, which
is given below.

110
Instruction Set of 8086

Examples
MOV BX, OFFSET PRICE ;Point BX at first element in array
MOV CX, 40 ;Load CX with number of elements in array
NEXT: MOV AL, [BX] ; Get elements from array
ADD AL, 07H ;Add correction factor
DAA ;decimal adjust result
MOV [BX], AL ; Put result back in array
LOOP NEXT ; Repeat until all elements adjusted.

MOV BX, OFFSET ARRAY ;point BX at start of the array


DEC BX
MOV CX, 100 ;put number of array elements in CX
NEXT1:INC BX ;point to next element in array
CMP [BX], 0FFH ;Compare array elements FFH
111 LOOPE NEXT1
Instruction Set of 8086

vi. Subroutine and interrupt Instructions


 CALL– call a procedure:
 The CALL instruction is used to transfer execution to
a subprogram or procedure.
 There are two basic types of calls, near and far.

112
Instruction Set of 8086
 A near call is a call to a procedure, which is in the same
code segment as the CALL instruction.
 When the 8086 executes a near CALL instruction, it
decrements the stack pointer by 2 and copies the offset of
the next instruction after the CALL onto the stack. This offset
saved on the stack is referred to as the return address.
 A near CALL instruction will also load the instruction pointer
with the offset of the first instruction in the procedure.
 A RET instruction at the end of the procedure will return
execution to the instruction after the call by copying the
offset saved on the stack back to IP.

113
Instruction Set of 8086

 A far call is a call to a procedure, which is in a different segment from


the one that contains the CALL instruction.
 When the 8086 executes a far call, it decrements the stack pointer by 2
and copies the contents of the CS register to the stack. It then
decrements the stack pointer by 2 again and copies the offset of the
instruction after the CALL instruction to the stack.
 Finally, it loads CS with the segment base of the segment, which
contains the procedure, and loads IP with the offset of the first
instruction of the procedure in that segment.
 A RET instruction at the end of the procedure will return execution to
the next Instruction after the CALL by restoring the saved values of CS
and IP from the stack.
114
Instruction Set of 8086
 RET-Return Execution from Procedure to Calling
Program
The RET instruction will return execution from a
procedure to the next instruction after the CALL
instruction which was used to CALL the procedure.
If the procedure is a near procedure (in the same
code segment as the CALL instruction), then the
return will be done by replacing the instruction
pointer with a word from the top of the stack.

115
Instruction Set of 8086
 INT-interrupt Program Execution-INT Type
 ‘Interrupt’ is an instruction that breaks the normal sequence
of execution of instructions, diverts its execution to some
other program called Interrupt Service Routine (ISR).
 After executing ISR, the control is transferred back again to
the main program which was being executed at the time of
interruption.
 Normal program can be interrupted by three ways:
 By external signal
 By a special instruction in the program or
 By the occurrence of some condition.

116
Instruction Set of 8086
 Therefore, there are two major types of
interrupts
 Hardware generated (derived from a
hardware signal or external signal)
 Software generated (internally derived from
the execution of an instruction which could
be by special instruction in the program or
condition produced by instruction)

117
Instruction Set of 8086
Examples:
 INT 21h /AH=1 read character from standard
input, with echo, result is stored in AL. If there is
no character in the keyboard buffer, the function
waits until any key is pressed.
Example: MOV AH,1
INT 21h
{Read by your own details of Interrupt
Instructions}.
118
Instruction Set of 8086

vii. Processor control instructions


Flag Set/clear Instructions:
STC: sets the carry flag, STC doesn’t affect any other
flag.
CLC: resets the carry flag to zero. CLC doesn’t affect any
other flag.
CMC: complements the carry flag. CMC doesn’t affect
any other flag.

119
Instruction Set of 8086

STD: sets the direction flag. It doesn’t affect any


other flag.
CLD: reset the DF. It doesn’t affect any other flag.
STI: sets the interrupt flag to one. This enables INTR
interrupt of the 8086. It doesn’t affect any other flag.
CLI: resets the interrupt flag to zero. Due to this 8086
will not respond to an interrupt signal on its INTR
input. It doesn’t affect any other flag.

120
Instruction Set of 8086

 External hardware synchronization


instructions:
 These instructions include: HLT, WAIT, ESC, LOCK,
NOP
 HLT instruction:
 The HLT instruction will cause the 8086 to stop fetching and
executing instructions. The 8086 will enter a halt state.
 The only ways to get the processor out of the halt state are
with an interrupt signal on the INTR pin, an interrupt signal on
the NMI pin, or a reset signal on the RESET input.
121
Instruction Set of 8086

 WAIT-Wait for Test Signal or interrupt Signal


When this instruction executes, the 8086 enters an idle condition in which it
is doing no processing.
The 8086 will stay in this idle state until the 8086 TEST input pin is made
low or until an interrupt signal is received on the INTR or the NMI interrupt
input pins.
If a valid interrupt occurs while the 8086 is in this idle state, the 8086 will
return to the idle state after the interrupt service procedure executes.
It returns to the idle state because the address of the WAIT instruction is the
address pushed on the stack when the 8086 responds to the interrupt

122
Instruction Set of 8086

 ESC-Escape
This instruction is used to pass instructions to a coprocessor, such as the
8087-math coprocessor, which shares the address and data bus with an 8086.
Instructions for the coprocessor are represented by a 6-bit code embedded in
the escape instruction.
As the 8086 fetches instruction bytes, the coprocessor also catches these
bytes from the data bus and puts them in its queue. However, the
coprocessor treats all the normal 8086 instructions as NOPs.

123
Instruction Set of 8086

When the 8086 fetches an ESC instruction, the


coprocessor decodes the instruction and carries out
the action specified by the 6-bit code specified in
the instruction.
In most cases the 8086 treats the ESC instruction
as a NOP.
In some cases the 8086 will access a data item in
memory for the coprocessor.

124
Instruction Set of 8086

LOCK-Assert Bus Lock Signal


Many microcomputer systems contain several
microprocessors.
The LOCK prefix allows a microprocessor to make sure
that another processor does not take control of the
system bus while it is in the middle of a critical
instruction which uses the system bus.
The LOCK prefix is put in front of the critical instruction.

125
Instruction Set of 8086

When an instruction with a LOCK prefix executes, the 8086


will assert its bus lock signal output. This signal is connected
to an external bus controller device, which then prevents any
other processor from taking over the system bus.
LOCK affects no flags.
EXAMPLE:
LOCK XCHG SEMAPHORE, AL ;
The XCHG instruction requires two bus accesses. The LOCK prefix prevents another
processor from taking control of the system bus between the two accesses.

126
Instruction Set of 8086

NOP-Perform No Operation
This instruction simply uses up three clock cycles and
Increments the instruction pointer to point to the next
instruction.
NOP affects no flags.
 The NOP instruction can be used to increase the delay of a
delay loop.
When hand coding a NOP can also be used to hold a place
in a program for an instruction that will be added later.

127
End of Chapter Three!

128

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